[U-Boot-Users] Marvell 88E1111 PHY

Hello,
my u-boot is now booting from flash. Big thanks to everyone helped me. ;-)
But now i am configuring ethernet in u-boot for my 440GX Board. It uses Marvel 88E1111 PHY´s. Did someone worked with this PHY and u-boot or knows if it is supported?
config file definitions:
#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0x5 /* PHY address, See schematics */ #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ #define CONFIG_NETMASK 255.255.252.0 #define CONFIG_IPADDR 192.168.0.116 #define CONFIG_ETHADDR 00:04:AC:E3:28:8A
#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ CFG_CMD_IRQ | \ CFG_CMD_I2C | \ CFG_CMD_BEDBUG | \ CFG_CMD_ENV | \ CFG_CMD_MII | \ CFG_CMD_DIAG | \ CFG_CMD_PING | \ CFG_CMD_NET | \ CFG_CMD_ELF )
Thanks for any help,
David

On Wednesday 15 June 2005 11:59, David Grab wrote:
Hello,
my u-boot is now booting from flash. Big thanks to everyone helped me. ;-)
But now i am configuring ethernet in u-boot for my 440GX Board. It uses Marvel 88E1111 PHY´s. Did someone worked with this PHY and u-boot or knows if it is supported?
config file definitions:
#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0x5 /* PHY address, See schematics */ #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ #define CONFIG_NETMASK 255.255.252.0 #define CONFIG_IPADDR 192.168.0.116 #define CONFIG_ETHADDR 00:04:AC:E3:28:8A
#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ CFG_CMD_IRQ | \ CFG_CMD_I2C | \ CFG_CMD_BEDBUG | \ CFG_CMD_ENV | \ CFG_CMD_MII | \ CFG_CMD_DIAG | \ CFG_CMD_PING | \ CFG_CMD_NET | \ CFG_CMD_ELF )
Thanks for any help,
Hi,
I know, that the MPC85xx CPU specific part contains support for the Marvel 88E1111, check the file tsec.c in u-boot/cpu/mpc85xx
Hope this help Gerhard

On 6/15/05, David Grab d.grab@hima.com wrote:
But now i am configuring ethernet in u-boot for my 440GX Board. It uses Marvel 88E1111 PHY´s. Did someone worked with this PHY and u-boot or knows if it is supported?
I'm using u-boot 1.1.2 with an 8555E and Marvell 88E1111 phys successfully. There is support in the tsec.[ch] files under cpu/mpc85xx.
One odd thing I noted is that the config sequence in tsec.c includes a register write sequence to some register 30 pages for which I could not find documentation in either the 1011 or 1111 datasheets. Out of curiosity, I tried to init the phys with and without these register writes and didn't see different behavior, so I left them in.
Cheers, Kylo
participants (3)
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David Grab
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Gerhard Jaeger
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Kylo Ginsberg