Dear Pooja,

in message cmajjb$oie$1@sea.gmane.org you wrote:

In the process of porting U-boot for Malta which uses mips 4Kec I discovered that the stack required for intial C environment can neither be obtained by some on-chip memory (IMMR in MPC8xx ) nor by using DCACHE in locked mode. Mips 4KC has the DCache locked mode support but Mips 4KEC has it only through external pin interface.

I have o admit that I don't know the details of this specirfic CPU, but are you _really_ sure that there is no way to lock (parts of) the data cache? I would be relly suprised if this was the case...

I am looking for a way of not using the C code till code has started running from RAM. But how do I get the value of gd(global data pointer)

This "way" is a major redesign and rewrite of U-Boot.

which U-boot expects? README file does not mention anything about mips registers which are specifially used for this purpose.

No matter what you do, sooner or later you will find that you need some preliminary stack and eventually storage space for a few variables. So instead of creating several new problems, I recommend to try to fix the root problem first, and all the rest will fall in place.

Best regards,

Wolfgang Denk