[PATCH v2 0/9] Add DT USB definitions for SAM9X60, SAMA5D2 and SAMA7
This patch series originates from the bigger patch series: https://lists.denx.de/pipermail/u-boot/2022-December/502865.html
Add the basic DT USB definitions for SAM9X60, SAMA5D2 and SAMA7. The required pinctrl definitions have been added as well as additional definitions for the UTMI related clocks and their relationship with the Reset driver.
v1 -> v2: - split patches for SoC/Board separately - use usb@
Sergiu Moga (9): ARM: dts: sam9x60: Add OHCI and EHCI DT nodes ARM: dts: sam9x60_curiosity: Add pinctrl and gpio properties for USB ARM: dts: sam9x60ek: Add pinctrl and gpio properties for USB dt-bindings: reset: add sama7g5 definitions dt-bindings: clk: at91: Define additional UTMI related clocks ARM: dts: sama7g5: Add USB and UTMI DT nodes ARM: dts: sama7g5ek: Add pinctrl, gpio and phy properties for USB ARM: dts: sama5d2_icp: Add pinctrl nodes for USB related DT nodes ARM: dts: sama5d27_wlsom1_ek: Add pinctrl nodes for USB DT nodes
arch/arm/dts/at91-sam9x60_curiosity.dts | 21 +++++++ arch/arm/dts/at91-sama5d27_wlsom1_ek.dts | 25 ++++++++ arch/arm/dts/at91-sama5d2_icp.dts | 22 +++++++ arch/arm/dts/at91-sama7g5ek.dts | 34 +++++++++++ arch/arm/dts/sam9x60.dtsi | 18 ++++++ arch/arm/dts/sam9x60ek.dts | 21 +++++++ arch/arm/dts/sama7g5.dtsi | 73 +++++++++++++++++++++++ include/dt-bindings/clk/at91.h | 5 ++ include/dt-bindings/reset/sama7g5-reset.h | 10 ++++ 9 files changed, 229 insertions(+) create mode 100644 include/dt-bindings/reset/sama7g5-reset.h
Add the OHCI and EHCI DT nodes for the sam9x60 SoC's.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com ---
v1 -> v2: - use usb@
arch/arm/dts/sam9x60.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi index 17224ef771..4fcfb5c597 100644 --- a/arch/arm/dts/sam9x60.dtsi +++ b/arch/arm/dts/sam9x60.dtsi @@ -69,6 +69,24 @@ #size-cells = <1>; ranges;
+ usb1: usb@600000 { + compatible = "atmel,at91rm9200-ohci", "usb-ohci"; + reg = <0x00600000 0x100000>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 21>; + clock-names = "ohci_clk", "hclk", "uhpck"; + status = "disabled"; + }; + + usb2: usb@700000 { + compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; + reg = <0x00700000 0x100000>; + clocks = <&pmc PMC_TYPE_CORE 8>, <&pmc PMC_TYPE_PERIPHERAL 22>; + clock-names = "usb_clk", "ehci_clk"; + assigned-clocks = <&pmc PMC_TYPE_CORE 8>; + assigned-clock-rates = <480000000>; + status = "disabled"; + }; + ebi: ebi@10000000 { compatible = "microchip,sam9x60-ebi"; #address-cells = <2>;
On 1/3/23 16:35, Sergiu Moga wrote:
Add the OHCI and EHCI DT nodes for the sam9x60 SoC's.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com
v1 -> v2:
use usb@
arch/arm/dts/sam9x60.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi index 17224ef771..4fcfb5c597 100644 --- a/arch/arm/dts/sam9x60.dtsi +++ b/arch/arm/dts/sam9x60.dtsi @@ -69,6 +69,24 @@ #size-cells = <1>; ranges;
usb1: usb@600000 {compatible = "atmel,at91rm9200-ohci", "usb-ohci";reg = <0x00600000 0x100000>;clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 21>;
./scripts/checkpatch.pl on this patch indicates
WARNING: line length of 121 exceeds 100 columns #93: FILE: arch/arm/dts/sam9x60.dtsi:75: + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 21>;
Please run checkpatch on all your patches.
Also, wait a few days before sending V2 , no need to send V2 immediately while review of V1 is still ongoing.
On 03.01.2023 17:47, Marek Vasut wrote:
On 1/3/23 16:35, Sergiu Moga wrote:
Add the OHCI and EHCI DT nodes for the sam9x60 SoC's.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com
v1 -> v2:
- use usb@
arch/arm/dts/sam9x60.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi index 17224ef771..4fcfb5c597 100644 --- a/arch/arm/dts/sam9x60.dtsi +++ b/arch/arm/dts/sam9x60.dtsi @@ -69,6 +69,24 @@ #size-cells = <1>; ranges;
+ usb1: usb@600000 { + compatible = "atmel,at91rm9200-ohci", "usb-ohci"; + reg = <0x00600000 0x100000>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 21>;
./scripts/checkpatch.pl on this patch indicates
WARNING: line length of 121 exceeds 100 columns #93: FILE: arch/arm/dts/sam9x60.dtsi:75: + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 21>;
Please run checkpatch on all your patches.
Also, wait a few days before sending V2 , no need to send V2 immediately while review of V1 is still ongoing.
It was my understanding that exceeding the character per line limit on DT's is acceptable. All of our DT's are like this.
On 1/3/23 16:56, Sergiu.Moga@microchip.com wrote:
On 03.01.2023 17:47, Marek Vasut wrote:
On 1/3/23 16:35, Sergiu Moga wrote:
Add the OHCI and EHCI DT nodes for the sam9x60 SoC's.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com
v1 -> v2:
- use usb@
arch/arm/dts/sam9x60.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi index 17224ef771..4fcfb5c597 100644 --- a/arch/arm/dts/sam9x60.dtsi +++ b/arch/arm/dts/sam9x60.dtsi @@ -69,6 +69,24 @@ #size-cells = <1>; ranges;
+ usb1: usb@600000 { + compatible = "atmel,at91rm9200-ohci", "usb-ohci"; + reg = <0x00600000 0x100000>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 21>;
./scripts/checkpatch.pl on this patch indicates
WARNING: line length of 121 exceeds 100 columns #93: FILE: arch/arm/dts/sam9x60.dtsi:75: + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 21>;
Please run checkpatch on all your patches.
Also, wait a few days before sending V2 , no need to send V2 immediately while review of V1 is still ongoing.
It was my understanding that exceeding the character per line limit on DT's is acceptable. All of our DT's are like this.
Not to my knowledge or per what is in other DTs. Is that some exception here ?
On 1/3/23 18:00, Marek Vasut wrote:
On 1/3/23 16:56, Sergiu.Moga@microchip.com wrote:
On 03.01.2023 17:47, Marek Vasut wrote:
On 1/3/23 16:35, Sergiu Moga wrote:
Add the OHCI and EHCI DT nodes for the sam9x60 SoC's.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com
v1 -> v2:
- use usb@
arch/arm/dts/sam9x60.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi index 17224ef771..4fcfb5c597 100644 --- a/arch/arm/dts/sam9x60.dtsi +++ b/arch/arm/dts/sam9x60.dtsi @@ -69,6 +69,24 @@ #size-cells = <1>; ranges;
+ usb1: usb@600000 { + compatible = "atmel,at91rm9200-ohci", "usb-ohci"; + reg = <0x00600000 0x100000>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 21>;
./scripts/checkpatch.pl on this patch indicates
WARNING: line length of 121 exceeds 100 columns #93: FILE: arch/arm/dts/sam9x60.dtsi:75: + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 21>;
Please run checkpatch on all your patches.
Also, wait a few days before sending V2 , no need to send V2 immediately while review of V1 is still ongoing.
It was my understanding that exceeding the character per line limit on DT's is acceptable. All of our DT's are like this.
Not to my knowledge or per what is in other DTs. Is that some exception here ?
DTs have not had restrictions on 80 chars per line. Have a look in Linux.
Also, as we have a requirement to keep the DT from Linux, we either have to patch up Linux if there is a problem in the DT, or keep it in sync with Linux. We may have exceptions if there is a too big amount of work to be done now to change things, to have differences in term of DT between Uboot and Linux. But the general guideline is to keep the DT in sync with Linux as it's ABI.
Eugen
On 1/4/23 08:24, Eugen.Hristev@microchip.com wrote:
On 1/3/23 18:00, Marek Vasut wrote:
On 1/3/23 16:56, Sergiu.Moga@microchip.com wrote:
On 03.01.2023 17:47, Marek Vasut wrote:
On 1/3/23 16:35, Sergiu Moga wrote:
Add the OHCI and EHCI DT nodes for the sam9x60 SoC's.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com
v1 -> v2:
- use usb@
arch/arm/dts/sam9x60.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi index 17224ef771..4fcfb5c597 100644 --- a/arch/arm/dts/sam9x60.dtsi +++ b/arch/arm/dts/sam9x60.dtsi @@ -69,6 +69,24 @@ #size-cells = <1>; ranges;
+ usb1: usb@600000 { + compatible = "atmel,at91rm9200-ohci", "usb-ohci"; + reg = <0x00600000 0x100000>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 21>;
./scripts/checkpatch.pl on this patch indicates
WARNING: line length of 121 exceeds 100 columns #93: FILE: arch/arm/dts/sam9x60.dtsi:75: + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 21>;
Please run checkpatch on all your patches.
Also, wait a few days before sending V2 , no need to send V2 immediately while review of V1 is still ongoing.
It was my understanding that exceeding the character per line limit on DT's is acceptable. All of our DT's are like this.
Not to my knowledge or per what is in other DTs. Is that some exception here ?
DTs have not had restrictions on 80 chars per line. Have a look in Linux.
Also, as we have a requirement to keep the DT from Linux, we either have to patch up Linux if there is a problem in the DT, or keep it in sync with Linux. We may have exceptions if there is a too big amount of work to be done now to change things, to have differences in term of DT between Uboot and Linux. But the general guideline is to keep the DT in sync with Linux as it's ABI.
Linux checkpatch.pl --strict does complain about the line length for sam9x60.dtsi , it was demoted from warning to check there.
Can you send a separate follow-up patch to U-Boot checkpatch.pl which does the same , so we'd be in sync with Linux ?
On 04.01.2023 11:56, Marek Vasut wrote:
On 1/4/23 08:24, Eugen.Hristev@microchip.com wrote:
On 1/3/23 18:00, Marek Vasut wrote:
On 1/3/23 16:56, Sergiu.Moga@microchip.com wrote:
On 03.01.2023 17:47, Marek Vasut wrote:
On 1/3/23 16:35, Sergiu Moga wrote:
Add the OHCI and EHCI DT nodes for the sam9x60 SoC's.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com
v1 -> v2:
- use usb@
arch/arm/dts/sam9x60.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi index 17224ef771..4fcfb5c597 100644 --- a/arch/arm/dts/sam9x60.dtsi +++ b/arch/arm/dts/sam9x60.dtsi @@ -69,6 +69,24 @@ #size-cells = <1>; ranges;
+ usb1: usb@600000 { + compatible = "atmel,at91rm9200-ohci", "usb-ohci"; + reg = <0x00600000 0x100000>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 21>;
./scripts/checkpatch.pl on this patch indicates
WARNING: line length of 121 exceeds 100 columns #93: FILE: arch/arm/dts/sam9x60.dtsi:75: + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 21>;
Please run checkpatch on all your patches.
Also, wait a few days before sending V2 , no need to send V2 immediately while review of V1 is still ongoing.
It was my understanding that exceeding the character per line limit on DT's is acceptable. All of our DT's are like this.
Not to my knowledge or per what is in other DTs. Is that some exception here ?
DTs have not had restrictions on 80 chars per line. Have a look in Linux.
Also, as we have a requirement to keep the DT from Linux, we either have to patch up Linux if there is a problem in the DT, or keep it in sync with Linux. We may have exceptions if there is a too big amount of work to be done now to change things, to have differences in term of DT between Uboot and Linux. But the general guideline is to keep the DT in sync with Linux as it's ABI.
Linux checkpatch.pl --strict does complain about the line length for sam9x60.dtsi , it was demoted from warning to check there.
Can you send a separate follow-up patch to U-Boot checkpatch.pl which does the same , so we'd be in sync with Linux ?
I am sorry, I do not know at the moment where that change is supposed to be made in checkpatch.pl. So, right now, I would rather focus my time on updating these patch series to be good enough and only afterwards I would take a look at where exactly I should make the change for checkpatch.pl as well, if that's fine. Thanks for the understanding.
On 1/4/23 11:17, Sergiu.Moga@microchip.com wrote:
On 04.01.2023 11:56, Marek Vasut wrote:
On 1/4/23 08:24, Eugen.Hristev@microchip.com wrote:
On 1/3/23 18:00, Marek Vasut wrote:
On 1/3/23 16:56, Sergiu.Moga@microchip.com wrote:
On 03.01.2023 17:47, Marek Vasut wrote:
On 1/3/23 16:35, Sergiu Moga wrote: > Add the OHCI and EHCI DT nodes for the sam9x60 SoC's. > > Signed-off-by: Sergiu Moga sergiu.moga@microchip.com > --- > > v1 -> v2: > - use usb@ > > arch/arm/dts/sam9x60.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi > index 17224ef771..4fcfb5c597 100644 > --- a/arch/arm/dts/sam9x60.dtsi > +++ b/arch/arm/dts/sam9x60.dtsi > @@ -69,6 +69,24 @@ > #size-cells = <1>; > ranges; > > + usb1: usb@600000 { > + compatible = "atmel,at91rm9200-ohci", > "usb-ohci"; > + reg = <0x00600000 0x100000>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc > PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 21>;
./scripts/checkpatch.pl on this patch indicates
WARNING: line length of 121 exceeds 100 columns #93: FILE: arch/arm/dts/sam9x60.dtsi:75: + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 21>;
Please run checkpatch on all your patches.
Also, wait a few days before sending V2 , no need to send V2 immediately while review of V1 is still ongoing.
It was my understanding that exceeding the character per line limit on DT's is acceptable. All of our DT's are like this.
Not to my knowledge or per what is in other DTs. Is that some exception here ?
DTs have not had restrictions on 80 chars per line. Have a look in Linux.
Also, as we have a requirement to keep the DT from Linux, we either have to patch up Linux if there is a problem in the DT, or keep it in sync with Linux. We may have exceptions if there is a too big amount of work to be done now to change things, to have differences in term of DT between Uboot and Linux. But the general guideline is to keep the DT in sync with Linux as it's ABI.
Linux checkpatch.pl --strict does complain about the line length for sam9x60.dtsi , it was demoted from warning to check there.
Can you send a separate follow-up patch to U-Boot checkpatch.pl which does the same , so we'd be in sync with Linux ?
I am sorry, I do not know at the moment where that change is supposed to be made in checkpatch.pl.
Have a look at linux checkpatch.pl git log , it will be there already. It changes DT line length WARNING to CHECK .
So, right now, I would rather focus my time on updating these patch series to be good enough and only afterwards I would take a look at where exactly I should make the change for checkpatch.pl as well, if that's fine. Thanks for the understanding.
Right, that's why I wrote separate follow up patch.
Add the required pinctrl and gpio properties needed by the USB DT nodes of the sam9x60_curiosity boards.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com ---
v1 -> v2: - this patch was not here, previously split from 1/6 of v1
arch/arm/dts/at91-sam9x60_curiosity.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)
diff --git a/arch/arm/dts/at91-sam9x60_curiosity.dts b/arch/arm/dts/at91-sam9x60_curiosity.dts index 7c5b6ae2b8..d6ae3d648d 100644 --- a/arch/arm/dts/at91-sam9x60_curiosity.dts +++ b/arch/arm/dts/at91-sam9x60_curiosity.dts @@ -49,6 +49,13 @@ atmel,pins = <AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; }; + + usb1 { + pinctrl_usb_default: usb_default { + atmel,pins = <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_NONE + AT91_PIOD 18 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; + }; + }; }; }; }; @@ -89,3 +96,17 @@ phy-mode = "rmii"; status = "okay"; }; + +&usb1 { + num-ports = <3>; + atmel,vbus-gpio = <0 + &pioD 15 GPIO_ACTIVE_HIGH + &pioD 18 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb_default>; + status = "okay"; +}; + +&usb2 { + status = "okay"; +};
Add the required pinctrl and gpio properties required by the USB DT nodes of the sam9x60ek boards.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com ---
v1 -> v2: - this patch was not here, previously split from 1/6 of v1
arch/arm/dts/sam9x60ek.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)
diff --git a/arch/arm/dts/sam9x60ek.dts b/arch/arm/dts/sam9x60ek.dts index 1a02e2cb79..45e2f4cc40 100644 --- a/arch/arm/dts/sam9x60ek.dts +++ b/arch/arm/dts/sam9x60ek.dts @@ -139,6 +139,13 @@ <AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; };
+ usb1 { + pinctrl_usb_default: usb_default { + atmel,pins = <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_NONE + AT91_PIOD 16 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; + }; + }; + }; }; }; @@ -213,3 +220,17 @@ phy-mode = "rmii"; status = "okay"; }; + +&usb1 { + num-ports = <3>; + atmel,vbus-gpio = <0 + &pioD 15 GPIO_ACTIVE_HIGH + &pioD 16 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb_default>; + status = "okay"; +}; + +&usb2 { + status = "okay"; +};
Upstream linux commit 5994f58977e0.
Add reset bindings for SAMA7G5. At the moment only USB PHYs are included.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com ---
v1 -> v2: - nothing
include/dt-bindings/reset/sama7g5-reset.h | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 include/dt-bindings/reset/sama7g5-reset.h
diff --git a/include/dt-bindings/reset/sama7g5-reset.h b/include/dt-bindings/reset/sama7g5-reset.h new file mode 100644 index 0000000000..2116f41d04 --- /dev/null +++ b/include/dt-bindings/reset/sama7g5-reset.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ + +#ifndef __DT_BINDINGS_RESET_SAMA7G5_H +#define __DT_BINDINGS_RESET_SAMA7G5_H + +#define SAMA7G5_RESET_USB_PHY1 4 +#define SAMA7G5_RESET_USB_PHY2 5 +#define SAMA7G5_RESET_USB_PHY3 6 + +#endif /* __DT_BINDINGS_RESET_SAMA7G5_H */
On 1/3/23 16:35, Sergiu Moga wrote:
Upstream linux commit 5994f58977e0.
Add reset bindings for SAMA7G5. At the moment only USB PHYs are included.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com
v1 -> v2:
nothing
include/dt-bindings/reset/sama7g5-reset.h | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 include/dt-bindings/reset/sama7g5-reset.h
diff --git a/include/dt-bindings/reset/sama7g5-reset.h b/include/dt-bindings/reset/sama7g5-reset.h new file mode 100644 index 0000000000..2116f41d04 --- /dev/null +++ b/include/dt-bindings/reset/sama7g5-reset.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+#ifndef __DT_BINDINGS_RESET_SAMA7G5_H +#define __DT_BINDINGS_RESET_SAMA7G5_H
+#define SAMA7G5_RESET_USB_PHY1 4 +#define SAMA7G5_RESET_USB_PHY2 5 +#define SAMA7G5_RESET_USB_PHY3 6
Is there no reset with ID 0/1/2/3 ?
On 03.01.2023 17:48, Marek Vasut wrote:
On 1/3/23 16:35, Sergiu Moga wrote:
Upstream linux commit 5994f58977e0.
Add reset bindings for SAMA7G5. At the moment only USB PHYs are included.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com
v1 -> v2:
- nothing
include/dt-bindings/reset/sama7g5-reset.h | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 include/dt-bindings/reset/sama7g5-reset.h
diff --git a/include/dt-bindings/reset/sama7g5-reset.h b/include/dt-bindings/reset/sama7g5-reset.h new file mode 100644 index 0000000000..2116f41d04 --- /dev/null +++ b/include/dt-bindings/reset/sama7g5-reset.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+#ifndef __DT_BINDINGS_RESET_SAMA7G5_H +#define __DT_BINDINGS_RESET_SAMA7G5_H
+#define SAMA7G5_RESET_USB_PHY1 4 +#define SAMA7G5_RESET_USB_PHY2 5 +#define SAMA7G5_RESET_USB_PHY3 6
Is there no reset with ID 0/1/2/3 ?
No, there is not.
On 1/3/23 16:55, Sergiu.Moga@microchip.com wrote:
On 03.01.2023 17:48, Marek Vasut wrote:
On 1/3/23 16:35, Sergiu Moga wrote:
Upstream linux commit 5994f58977e0.
Add reset bindings for SAMA7G5. At the moment only USB PHYs are included.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com
v1 -> v2:
- nothing
include/dt-bindings/reset/sama7g5-reset.h | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 include/dt-bindings/reset/sama7g5-reset.h
diff --git a/include/dt-bindings/reset/sama7g5-reset.h b/include/dt-bindings/reset/sama7g5-reset.h new file mode 100644 index 0000000000..2116f41d04 --- /dev/null +++ b/include/dt-bindings/reset/sama7g5-reset.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+#ifndef __DT_BINDINGS_RESET_SAMA7G5_H +#define __DT_BINDINGS_RESET_SAMA7G5_H
+#define SAMA7G5_RESET_USB_PHY1 4 +#define SAMA7G5_RESET_USB_PHY2 5 +#define SAMA7G5_RESET_USB_PHY3 6
Is there no reset with ID 0/1/2/3 ?
No, there is not.
Please just add a comment into the file then, explaining that.
On 03.01.2023 17:59, Marek Vasut wrote:
On 1/3/23 16:55, Sergiu.Moga@microchip.com wrote:
On 03.01.2023 17:48, Marek Vasut wrote:
On 1/3/23 16:35, Sergiu Moga wrote:
Upstream linux commit 5994f58977e0.
Add reset bindings for SAMA7G5. At the moment only USB PHYs are included.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com
v1 -> v2:
- nothing
include/dt-bindings/reset/sama7g5-reset.h | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 include/dt-bindings/reset/sama7g5-reset.h
diff --git a/include/dt-bindings/reset/sama7g5-reset.h b/include/dt-bindings/reset/sama7g5-reset.h new file mode 100644 index 0000000000..2116f41d04 --- /dev/null +++ b/include/dt-bindings/reset/sama7g5-reset.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+#ifndef __DT_BINDINGS_RESET_SAMA7G5_H +#define __DT_BINDINGS_RESET_SAMA7G5_H
+#define SAMA7G5_RESET_USB_PHY1 4 +#define SAMA7G5_RESET_USB_PHY2 5 +#define SAMA7G5_RESET_USB_PHY3 6
Is there no reset with ID 0/1/2/3 ?
No, there is not.
Please just add a comment into the file then, explaining that.
Would this not make the commit different from the upstream linux commit referenced in the commit message? Perhaps it would be better to place this comment in the commit message instead?
On 1/3/23 17:35, Sergiu.Moga@microchip.com wrote:
On 03.01.2023 17:59, Marek Vasut wrote:
On 1/3/23 16:55, Sergiu.Moga@microchip.com wrote:
On 03.01.2023 17:48, Marek Vasut wrote:
On 1/3/23 16:35, Sergiu Moga wrote:
Upstream linux commit 5994f58977e0.
Add reset bindings for SAMA7G5. At the moment only USB PHYs are included.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com
v1 -> v2:
- nothing
include/dt-bindings/reset/sama7g5-reset.h | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 include/dt-bindings/reset/sama7g5-reset.h
diff --git a/include/dt-bindings/reset/sama7g5-reset.h b/include/dt-bindings/reset/sama7g5-reset.h new file mode 100644 index 0000000000..2116f41d04 --- /dev/null +++ b/include/dt-bindings/reset/sama7g5-reset.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+#ifndef __DT_BINDINGS_RESET_SAMA7G5_H +#define __DT_BINDINGS_RESET_SAMA7G5_H
+#define SAMA7G5_RESET_USB_PHY1 4 +#define SAMA7G5_RESET_USB_PHY2 5 +#define SAMA7G5_RESET_USB_PHY3 6
Is there no reset with ID 0/1/2/3 ?
No, there is not.
Please just add a comment into the file then, explaining that.
Would this not make the commit different from the upstream linux commit referenced in the commit message? Perhaps it would be better to place this comment in the commit message instead?
That works too, thanks.
Add definitions for an additional main UTMI clock as well as its respective subclocks.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com ---
v1 -> v2: - nothing
include/dt-bindings/clk/at91.h | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/include/dt-bindings/clk/at91.h b/include/dt-bindings/clk/at91.h index e30756b280..386f01cf31 100644 --- a/include/dt-bindings/clk/at91.h +++ b/include/dt-bindings/clk/at91.h @@ -18,5 +18,10 @@ #define PMC_TYPE_PERIPHERAL 3 #define PMC_TYPE_GCK 4 #define PMC_TYPE_SLOW 5 +#define UTMI 6 + +#define UTMI1 0 +#define UTMI2 1 +#define UTMI3 2
#endif
Define the USB and UTMI DT nodes for the sama7g5 SoC's.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com ---
v1 -> v2: - use usb@
arch/arm/dts/sama7g5.dtsi | 73 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+)
diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index 6388a60e53..e8527e97e4 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -16,6 +16,8 @@ #include <dt-bindings/dma/at91.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/mfd/at91-usart.h> +#include <dt-bindings/reset/sama7g5-reset.h> +#include <dt-bindings/clock/at91.h>
/ { model = "Microchip SAMA7G5 family SoC"; @@ -103,6 +105,54 @@ }; };
+ utmi_clk: utmi-clk { + compatible = "microchip,sama7g5-utmi-clk"; + sfr-phandle = <&sfr>; + #clock-cells = <1>; + clocks = <&pmc PMC_TYPE_CORE 27>; + clock-names = "utmi_clk"; + resets = <&reset_controller SAMA7G5_RESET_USB_PHY1>, + <&reset_controller SAMA7G5_RESET_USB_PHY2>, + <&reset_controller SAMA7G5_RESET_USB_PHY3>; + reset-names = "usb0_reset", "usb1_reset", "usb2_reset"; + }; + + utmi { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + usb_phy0: phy@0 { + compatible = "microchip,sama7g5-usb-phy"; + sfr-phandle = <&sfr>; + reg = <0>; + clocks = <&utmi_clk UTMI1>; + clock-names = "utmi_clk"; + status = "disabled"; + #phy-cells = <0>; + }; + + usb_phy1: phy@1 { + compatible = "microchip,sama7g5-usb-phy"; + sfr-phandle = <&sfr>; + reg = <1>; + clocks = <&utmi_clk UTMI2>; + clock-names = "utmi_clk"; + status = "disabled"; + #phy-cells = <0>; + }; + + usb_phy2: phy@2 { + compatible = "microchip,sama7g5-usb-phy"; + sfr-phandle = <&sfr>; + reg = <2>; + clocks = <&utmi_clk UTMI3>; + clock-names = "utmi_clk"; + status = "disabled"; + #phy-cells = <0>; + }; + }; + vddout25: fixed-regulator-vddout25 { compatible = "regulator-fixed";
@@ -127,6 +177,24 @@ #size-cells = <1>; ranges;
+ usb2: usb@400000 { + compatible = "microchip,sama7g5-ohci", "usb-ohci"; + reg = <0x00400000 0x100000>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 106>, <&utmi_clk UTMI1>, <&usb_clk>; + clock-names = "ohci_clk", "hclk", "uhpck"; + status = "disabled"; + }; + + usb3: usb@500000 { + compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; + reg = <0x00500000 0x100000>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&usb_clk>, <&pmc PMC_TYPE_PERIPHERAL 106>; + clock-names = "usb_clk", "ehci_clk"; + status = "disabled"; + }; + nfc_sram: sram@600000 { compatible = "mmio-sram"; no-memory-wc; @@ -559,6 +627,11 @@ status = "disabled"; };
+ sfr: sfr@e1624000 { + compatible = "microchip,sama7g5-sfr", "syscon"; + reg = <0xe1624000 0x4000>; + }; + eic: interrupt-controller@e1628000 { compatible = "microchip,sama7g5-eic"; reg = <0xe1628000 0xec>;
Add the required pinctrl, gpio and phy properties required by the USB DT nodes of the sama7g5ek boards.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com ---
v1 -> v2: - this patch was not here, previously split from 4/6 of v1
arch/arm/dts/at91-sama7g5ek.dts | 34 +++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+)
diff --git a/arch/arm/dts/at91-sama7g5ek.dts b/arch/arm/dts/at91-sama7g5ek.dts index 9b247fcaf6..31adc4d3e7 100644 --- a/arch/arm/dts/at91-sama7g5ek.dts +++ b/arch/arm/dts/at91-sama7g5ek.dts @@ -761,6 +761,11 @@ pinmux = <PIN_PB1__SPDIF_TX>; bias-disable; }; + + pinctrl_usb_default: usb_default { + pinmux = <PIN_PC6__GPIO>; + bias-disable; + }; };
&pwm { @@ -837,6 +842,35 @@ status = "okay"; };
+&usb2 { + num-ports = <3>; + atmel,vbus-gpio = <0 + 0 + &pioA PIN_PC6 GPIO_ACTIVE_HIGH + >; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb_default>; + phys = <&usb_phy2>; + phy-names = "usb"; + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&usb_phy0 { + status = "okay"; +}; + +&usb_phy1 { + status = "okay"; +}; + +&usb_phy2 { + status = "okay"; +}; + &vddout25 { vin-supply = <&vdd_3v3>; status = "okay";
Add the pinctrl subnodes required by the USB related DT nodes.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com ---
v1 -> v2: - nothing
arch/arm/dts/at91-sama5d2_icp.dts | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)
diff --git a/arch/arm/dts/at91-sama5d2_icp.dts b/arch/arm/dts/at91-sama5d2_icp.dts index 2dffae9c5c..4f796c6c94 100644 --- a/arch/arm/dts/at91-sama5d2_icp.dts +++ b/arch/arm/dts/at91-sama5d2_icp.dts @@ -154,7 +154,29 @@ <PIN_PA13__SDMMC0_CD>; bias-disable; }; + + pinctrl_usb_default: usb_default { + pinmux = <PIN_PC17__GPIO>; + bias-disable; + }; + + pinctrl_usba_vbus: usba_vbus { + pinmux = <PIN_PD23__GPIO>; + bias-disable; + }; }; }; }; }; + +&usb1 { + num-ports = <3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb_default>; + status = "okay"; +}; + +&usb2 { + phy_type = "hsic"; + status = "okay"; +};
Add the pinctrl nodes required by the USB related DT nodes.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com ---
v1 -> v2: - nothing
arch/arm/dts/at91-sama5d27_wlsom1_ek.dts | 25 ++++++++++++++++++++++++ 1 file changed, 25 insertions(+)
diff --git a/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts b/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts index eec183d5de..6d4b35ea96 100644 --- a/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts +++ b/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts @@ -143,7 +143,32 @@ pinmux = <PIN_PC9__GPIO>; bias-pull-up; }; + + pinctrl_usb_default: usb_default { + pinmux = <PIN_PA10__GPIO>; + bias-disable; + }; + + pinctrl_usba_vbus: usba_vbus { + pinmux = <PIN_PA16__GPIO>; + bias-disable; + }; }; }; }; }; + +&usb1 { + num-ports = <3>; + atmel,vbus-gpio = <0 + &pioA PIN_PA10 GPIO_ACTIVE_HIGH + 0 + >; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb_default>; + status = "okay"; +}; + +&usb2 { + status = "okay"; +};
On 1/3/23 17:35, Sergiu Moga wrote:
This patch series originates from the bigger patch series: https://lists.denx.de/pipermail/u-boot/2022-December/502865.html
Add the basic DT USB definitions for SAM9X60, SAMA5D2 and SAMA7. The required pinctrl definitions have been added as well as additional definitions for the UTMI related clocks and their relationship with the Reset driver.
v1 -> v2:
- split patches for SoC/Board separately
- use usb@
Sergiu Moga (9): ARM: dts: sam9x60: Add OHCI and EHCI DT nodes ARM: dts: sam9x60_curiosity: Add pinctrl and gpio properties for USB ARM: dts: sam9x60ek: Add pinctrl and gpio properties for USB dt-bindings: reset: add sama7g5 definitions dt-bindings: clk: at91: Define additional UTMI related clocks ARM: dts: sama7g5: Add USB and UTMI DT nodes ARM: dts: sama7g5ek: Add pinctrl, gpio and phy properties for USB ARM: dts: sama5d2_icp: Add pinctrl nodes for USB related DT nodes ARM: dts: sama5d27_wlsom1_ek: Add pinctrl nodes for USB DT nodes
arch/arm/dts/at91-sam9x60_curiosity.dts | 21 +++++++ arch/arm/dts/at91-sama5d27_wlsom1_ek.dts | 25 ++++++++ arch/arm/dts/at91-sama5d2_icp.dts | 22 +++++++ arch/arm/dts/at91-sama7g5ek.dts | 34 +++++++++++ arch/arm/dts/sam9x60.dtsi | 18 ++++++ arch/arm/dts/sam9x60ek.dts | 21 +++++++ arch/arm/dts/sama7g5.dtsi | 73 +++++++++++++++++++++++ include/dt-bindings/clk/at91.h | 5 ++ include/dt-bindings/reset/sama7g5-reset.h | 10 ++++ 9 files changed, 229 insertions(+) create mode 100644 include/dt-bindings/reset/sama7g5-reset.h
Hi Marek,
If you have nothing against it, I will take the DTs through at91 tree now, as I am preparing my PR for 2023.04 . As DT is ABI and this series is on the list for a while now, I see no reason to delay it. Are you fine with that ?
Thanks, Eugen
On 1/4/23 09:09, Eugen.Hristev@microchip.com wrote:
On 1/3/23 17:35, Sergiu Moga wrote:
This patch series originates from the bigger patch series: https://lists.denx.de/pipermail/u-boot/2022-December/502865.html
Add the basic DT USB definitions for SAM9X60, SAMA5D2 and SAMA7. The required pinctrl definitions have been added as well as additional definitions for the UTMI related clocks and their relationship with the Reset driver.
v1 -> v2:
- split patches for SoC/Board separately
- use usb@
Sergiu Moga (9): ARM: dts: sam9x60: Add OHCI and EHCI DT nodes ARM: dts: sam9x60_curiosity: Add pinctrl and gpio properties for USB ARM: dts: sam9x60ek: Add pinctrl and gpio properties for USB dt-bindings: reset: add sama7g5 definitions dt-bindings: clk: at91: Define additional UTMI related clocks ARM: dts: sama7g5: Add USB and UTMI DT nodes ARM: dts: sama7g5ek: Add pinctrl, gpio and phy properties for USB ARM: dts: sama5d2_icp: Add pinctrl nodes for USB related DT nodes ARM: dts: sama5d27_wlsom1_ek: Add pinctrl nodes for USB DT nodes
arch/arm/dts/at91-sam9x60_curiosity.dts | 21 +++++++ arch/arm/dts/at91-sama5d27_wlsom1_ek.dts | 25 ++++++++ arch/arm/dts/at91-sama5d2_icp.dts | 22 +++++++ arch/arm/dts/at91-sama7g5ek.dts | 34 +++++++++++ arch/arm/dts/sam9x60.dtsi | 18 ++++++ arch/arm/dts/sam9x60ek.dts | 21 +++++++ arch/arm/dts/sama7g5.dtsi | 73 +++++++++++++++++++++++ include/dt-bindings/clk/at91.h | 5 ++ include/dt-bindings/reset/sama7g5-reset.h | 10 ++++ 9 files changed, 229 insertions(+) create mode 100644 include/dt-bindings/reset/sama7g5-reset.h
Hi Marek,
If you have nothing against it, I will take the DTs through at91 tree now, as I am preparing my PR for 2023.04 . As DT is ABI and this series is on the list for a while now, I see no reason to delay it. Are you fine with that ?
I am hoping for a V3 with feedback on V1 and V2 addressed .
participants (4)
-
Eugen.Hristev＠microchip.com -
Marek Vasut -
Sergiu Moga -
Sergiu.Moga＠microchip.com