[PATCH 0/4] P1010RDB: Add device tree support and enable DM PCIe driver

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Zhiqiang Hou

14 Apr 2020 14 Apr '20

11:30 a.m.

From: Hou Zhiqiang Zhiqiang.Hou@nxp.com

This patch set is to add device tree support and enable U-Boot Driver Module PCIe driver on P1010RDB.

Hou Zhiqiang (4): powerpc: Enable device tree support for P1010RDB powerpc: P1010RDB: Compile legacy PCIe routines conditionally powerpc: P1010RDB: Disable legacy PCIe driver when DM_PCI is enabled configs: P1010RDB: Enable PCIe driver

arch/powerpc/dts/Makefile | 2 + arch/powerpc/dts/p1010rdb-pa.dts | 17 ++++++++ arch/powerpc/dts/p1010rdb-pa_36b.dts | 17 ++++++++ arch/powerpc/dts/p1010rdb-pb.dts | 17 ++++++++ arch/powerpc/dts/p1010rdb-pb_36b.dts | 17 ++++++++ arch/powerpc/dts/p1010rdb_32b.dtsi | 22 ++++++++++ arch/powerpc/dts/p1010rdb_36b.dtsi | 22 ++++++++++ arch/powerpc/dts/p1010si-post.dtsi | 46 ++++++++++++++++++++ arch/powerpc/dts/p1010si-pre.dtsi | 27 ++++++++++++ board/freescale/p1010rdb/p1010rdb.c | 4 +- configs/P1010RDB-PA_36BIT_NAND_defconfig | 7 ++- configs/P1010RDB-PA_36BIT_NOR_defconfig | 8 +++- configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 7 ++- configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 7 ++- configs/P1010RDB-PA_NAND_defconfig | 7 ++- configs/P1010RDB-PA_NOR_defconfig | 8 +++- configs/P1010RDB-PA_SDCARD_defconfig | 7 ++- configs/P1010RDB-PA_SPIFLASH_defconfig | 7 ++- configs/P1010RDB-PB_36BIT_NAND_defconfig | 7 ++- configs/P1010RDB-PB_36BIT_NOR_defconfig | 8 +++- configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 7 ++- configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 7 ++- configs/P1010RDB-PB_NAND_defconfig | 7 ++- configs/P1010RDB-PB_NOR_defconfig | 8 +++- configs/P1010RDB-PB_SDCARD_defconfig | 7 ++- configs/P1010RDB-PB_SPIFLASH_defconfig | 7 ++- include/configs/P1010RDB.h | 42 +++++++++++------- 27 files changed, 315 insertions(+), 34 deletions(-) create mode 100644 arch/powerpc/dts/p1010rdb-pa.dts create mode 100644 arch/powerpc/dts/p1010rdb-pa_36b.dts create mode 100644 arch/powerpc/dts/p1010rdb-pb.dts create mode 100644 arch/powerpc/dts/p1010rdb-pb_36b.dts create mode 100644 arch/powerpc/dts/p1010rdb_32b.dtsi create mode 100644 arch/powerpc/dts/p1010rdb_36b.dtsi create mode 100644 arch/powerpc/dts/p1010si-post.dtsi create mode 100644 arch/powerpc/dts/p1010si-pre.dtsi

-- 2.17.1

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Zhiqiang Hou

14 Apr 14 Apr

11:30 a.m.

New subject: [PATCH 1/4] powerpc: Enable device tree support for P1010RDB

From: Hou Zhiqiang Zhiqiang.Hou@nxp.com

Add device tree for P1010RDB boards and enable CONFIG_OF_CONTROL so that device tree can be compiled.

Signed-off-by: Hou Zhiqiang Zhiqiang.Hou@nxp.com --- arch/powerpc/dts/Makefile | 2 + arch/powerpc/dts/p1010rdb-pa.dts | 17 ++++++++ arch/powerpc/dts/p1010rdb-pa_36b.dts | 17 ++++++++ arch/powerpc/dts/p1010rdb-pb.dts | 17 ++++++++ arch/powerpc/dts/p1010rdb-pb_36b.dts | 17 ++++++++ arch/powerpc/dts/p1010rdb_32b.dtsi | 22 ++++++++++ arch/powerpc/dts/p1010rdb_36b.dtsi | 22 ++++++++++ arch/powerpc/dts/p1010si-post.dtsi | 46 ++++++++++++++++++++ arch/powerpc/dts/p1010si-pre.dtsi | 27 ++++++++++++ configs/P1010RDB-PA_36BIT_NAND_defconfig | 3 +- configs/P1010RDB-PA_36BIT_NOR_defconfig | 4 +- configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 3 +- configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 3 +- configs/P1010RDB-PA_NAND_defconfig | 3 +- configs/P1010RDB-PA_NOR_defconfig | 4 +- configs/P1010RDB-PA_SDCARD_defconfig | 3 +- configs/P1010RDB-PA_SPIFLASH_defconfig | 3 +- configs/P1010RDB-PB_36BIT_NAND_defconfig | 3 +- configs/P1010RDB-PB_36BIT_NOR_defconfig | 4 +- configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 3 +- configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 3 +- configs/P1010RDB-PB_NAND_defconfig | 3 +- configs/P1010RDB-PB_NOR_defconfig | 4 +- configs/P1010RDB-PB_SDCARD_defconfig | 3 +- configs/P1010RDB-PB_SPIFLASH_defconfig | 3 +- 25 files changed, 223 insertions(+), 16 deletions(-) create mode 100644 arch/powerpc/dts/p1010rdb-pa.dts create mode 100644 arch/powerpc/dts/p1010rdb-pa_36b.dts create mode 100644 arch/powerpc/dts/p1010rdb-pb.dts create mode 100644 arch/powerpc/dts/p1010rdb-pb_36b.dts create mode 100644 arch/powerpc/dts/p1010rdb_32b.dtsi create mode 100644 arch/powerpc/dts/p1010rdb_36b.dtsi create mode 100644 arch/powerpc/dts/p1010si-post.dtsi create mode 100644 arch/powerpc/dts/p1010si-pre.dtsi

diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile index 3195351c9c..7eb005f450 100644 --- a/arch/powerpc/dts/Makefile +++ b/arch/powerpc/dts/Makefile @@ -1,6 +1,8 @@ # SPDX-License-Identifier: GPL-2.0+

dtb-$(CONFIG_TARGET_MPC8548CDS) += mpc8548cds.dtb mpc8548cds_36b.dtb +dtb-$(CONFIG_TARGET_P1010RDB_PA) += p1010rdb-pa.dtb p1010rdb-pa_36b.dtb +dtb-$(CONFIG_TARGET_P1010RDB_PB) += p1010rdb-pb.dtb p1010rdb-pb_36b.dtb dtb-$(CONFIG_TARGET_P1020RDB_PC) += p1020rdb-pc.dtb p1020rdb-pc_36b.dtb dtb-$(CONFIG_TARGET_P1020RDB_PD) += p1020rdb-pd.dtb dtb-$(CONFIG_TARGET_P2020RDB) += p2020rdb-pc.dtb p2020rdb-pc_36b.dtb diff --git a/arch/powerpc/dts/p1010rdb-pa.dts b/arch/powerpc/dts/p1010rdb-pa.dts new file mode 100644 index 0000000000..c66c4923ac --- /dev/null +++ b/arch/powerpc/dts/p1010rdb-pa.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P1010 RDB Device Tree Source + * + * Copyright 2020 NXP + */ + +/include/ "p1010si-pre.dtsi" + +/ { + model = "fsl,P1010RDB"; + compatible = "fsl,P1010RDB"; + + /include/ "p1010rdb_32b.dtsi" +}; + +/include/ "p1010si-post.dtsi" diff --git a/arch/powerpc/dts/p1010rdb-pa_36b.dts b/arch/powerpc/dts/p1010rdb-pa_36b.dts new file mode 100644 index 0000000000..b943de7cbb --- /dev/null +++ b/arch/powerpc/dts/p1010rdb-pa_36b.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P1010 RDB Device Tree Source (36-bit address map) + * + * Copyright 2020 NXP + */ + +/include/ "p1010si-pre.dtsi" + +/ { + model = "fsl,P1010RDB"; + compatible = "fsl,P1010RDB"; + + /include/ "p1010rdb_36b.dtsi" +}; + +/include/ "p1010si-post.dtsi" diff --git a/arch/powerpc/dts/p1010rdb-pb.dts b/arch/powerpc/dts/p1010rdb-pb.dts new file mode 100644 index 0000000000..2675d5d92b --- /dev/null +++ b/arch/powerpc/dts/p1010rdb-pb.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P1010RDB Device Tree Source + * + * Copyright 2020 NXP + */ + +/include/ "p1010si-pre.dtsi" + +/ { + model = "fsl,P1010RDB-PB"; + compatible = "fsl,P1010RDB-PB"; + + /include/ "p1010rdb_32b.dtsi" +}; + +/include/ "p1010si-post.dtsi" diff --git a/arch/powerpc/dts/p1010rdb-pb_36b.dts b/arch/powerpc/dts/p1010rdb-pb_36b.dts new file mode 100644 index 0000000000..45ccf91c41 --- /dev/null +++ b/arch/powerpc/dts/p1010rdb-pb_36b.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P1010 RDB Device Tree Source (36-bit address map) + * + * Copyright 2020 NXP + */ + +/include/ "p1010si-pre.dtsi" + +/ { + model = "fsl,P1010RDB-PB"; + compatible = "fsl,P1010RDB-PB"; + + /include/ "p1010rdb_36b.dtsi" +}; + +/include/ "p1010si-post.dtsi" diff --git a/arch/powerpc/dts/p1010rdb_32b.dtsi b/arch/powerpc/dts/p1010rdb_32b.dtsi new file mode 100644 index 0000000000..5da790da5e --- /dev/null +++ b/arch/powerpc/dts/p1010rdb_32b.dtsi @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P1010RDB Device Tree Source + * + * Copyright 2020 NXP + */ + +soc: soc@ffe00000 { + ranges = <0x0 0x0 0xffe00000 0x100000>; +}; + +pci1: pcie@ffe09000 { + reg = <0 0xffe09000 0 0x1000>; + ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 + 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; +}; + +pci0: pcie@ffe0a000 { + reg = <0 0xffe0a000 0 0x1000>; + ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 + 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; +}; diff --git a/arch/powerpc/dts/p1010rdb_36b.dtsi b/arch/powerpc/dts/p1010rdb_36b.dtsi new file mode 100644 index 0000000000..54dd16e43b --- /dev/null +++ b/arch/powerpc/dts/p1010rdb_36b.dtsi @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P1010RDB Device Tree Source (36-bit address map) + * + * Copyright 2020 NXP + */ + +soc: soc@fffe00000 { + ranges = <0x0 0xf 0xffe00000 0x100000>; +}; + +pci1: pcie@fffe09000 { + reg = <0xf 0xffe09000 0 0x1000>; + ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000 + 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; +}; + +pci0: pcie@fffe0a000 { + reg = <0xf 0xffe0a000 0 0x1000>; + ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000 + 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; +}; diff --git a/arch/powerpc/dts/p1010si-post.dtsi b/arch/powerpc/dts/p1010si-post.dtsi new file mode 100644 index 0000000000..e24b5e4063 --- /dev/null +++ b/arch/powerpc/dts/p1010si-post.dtsi @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P1010 Silicon/SoC Device Tree Source (post include) + * + * Copyright 2020 NXP + */ + +&soc { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "fsl,p1010-immr", "simple-bus"; + bus-frequency = <0>; + + mpic: pic@40000 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <4>; + reg = <0x40000 0x40000>; + compatible = "fsl,mpic"; + device_type = "open-pic"; + big-endian; + single-cpu-affinity; + last-interrupt-source = <255>; + }; +}; + +/* controller at 0x9000 */ +&pci1 { + compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq"; + law_trgt_if = <1>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; +}; + +/* controller at 0xa000 */ +&pci0 { + compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq"; + law_trgt_if = <2>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; +}; diff --git a/arch/powerpc/dts/p1010si-pre.dtsi b/arch/powerpc/dts/p1010si-pre.dtsi new file mode 100644 index 0000000000..9d7bb6c95d --- /dev/null +++ b/arch/powerpc/dts/p1010si-pre.dtsi @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P1010 Silicon/SoC Device Tree Source (pre include) + * + * Copyright 2020 NXP + */ + +/dts-v1/; + +/include/ "e500v2_power_isa.dtsi" + +/ { + compatible = "fsl,P1010"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,P1010@0 { + device_type = "cpu"; + reg = <0x0>; + }; + }; +}; diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 4b2b8c4628..414b6d1116 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -9,6 +9,8 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" +CONFIG_OF_CONTROL=y CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_PHYS_64BIT=y CONFIG_SYS_CUSTOM_LDSCRIPT=y @@ -68,4 +70,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 6f328a5745..b083f19a92 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -3,7 +3,10 @@ CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_MPC85xx=y +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" +CONFIG_OF_CONTROL=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -49,4 +52,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 83ad24aea8..a4f68bc3fd 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -10,6 +10,8 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" +CONFIG_OF_CONTROL=y CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_PHYS_64BIT=y CONFIG_FIT=y @@ -62,4 +64,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 08d8864653..faf7b13396 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -12,6 +12,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" +CONFIG_OF_CONTROL=y CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_PHYS_64BIT=y CONFIG_FIT=y @@ -64,4 +66,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 796e112732..c8dddc5f40 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -9,6 +9,8 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" +CONFIG_OF_CONTROL=y CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" @@ -67,4 +69,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 73dbb867e2..1edcf75165 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -3,7 +3,10 @@ CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_MPC85xx=y +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" +CONFIG_OF_CONTROL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -48,4 +51,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 947bd22657..b83d0e7528 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -10,6 +10,8 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" +CONFIG_OF_CONTROL=y CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -61,4 +63,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index bd6d1ea702..cf7f68c471 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -12,6 +12,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" +CONFIG_OF_CONTROL=y CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -63,4 +65,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 1461b89f24..c1053a0781 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -9,6 +9,8 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" +CONFIG_OF_CONTROL=y CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_PHYS_64BIT=y CONFIG_SYS_CUSTOM_LDSCRIPT=y @@ -68,4 +70,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index c857c8d728..28245b59c7 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -3,7 +3,10 @@ CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_MPC85xx=y +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" +CONFIG_OF_CONTROL=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -49,4 +52,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index f79796a480..8f3a4c005f 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -10,6 +10,8 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" +CONFIG_OF_CONTROL=y CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_PHYS_64BIT=y CONFIG_FIT=y @@ -62,4 +64,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index c4c3c4486c..f90e787df4 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -12,6 +12,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" +CONFIG_OF_CONTROL=y CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_PHYS_64BIT=y CONFIG_FIT=y @@ -64,4 +66,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 8378eede02..cc2d7b5580 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -9,6 +9,8 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" +CONFIG_OF_CONTROL=y CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" @@ -67,4 +69,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 764017a907..85f2f0b3b5 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -3,7 +3,10 @@ CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_MPC85xx=y +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" +CONFIG_OF_CONTROL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -48,4 +51,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 437858b800..71ad5dfd3d 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -10,6 +10,8 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" +CONFIG_OF_CONTROL=y CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -61,4 +63,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 7f222db0ab..8de212c1cd 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -12,6 +12,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" +CONFIG_OF_CONTROL=y CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -63,4 +65,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y

-- 2.17.1

Zhiqiang Hou

11:30 a.m.

New subject: [PATCH 2/4] powerpc: P1010RDB: Compile legacy PCIe routines conditionally

From: Hou Zhiqiang Zhiqiang.Hou@nxp.com

Compile the legacy PCIe initialization reoutines for P1010RDB boards only when DM_PCI is not enabled.

Signed-off-by: Hou Zhiqiang Zhiqiang.Hou@nxp.com --- board/freescale/p1010rdb/p1010rdb.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/freescale/p1010rdb/p1010rdb.c b/board/freescale/p1010rdb/p1010rdb.c index a086692683..5057eac38a 100644 --- a/board/freescale/p1010rdb/p1010rdb.c +++ b/board/freescale/p1010rdb/p1010rdb.c @@ -124,7 +124,7 @@ int board_early_init_r(void) return 0; }

-#ifdef CONFIG_PCI +#if defined(CONFIG_PCI) && !defined(CONFIG_DM_PCI) void pci_init_board(void) { fsl_pcie_init_board(0); @@ -457,7 +457,7 @@ int ft_board_setup(void *blob, bd_t *bd) base = env_get_bootm_low(); size = env_get_bootm_size();

-#if defined(CONFIG_PCI) +#if defined(CONFIG_PCI) && !defined(CONFIG_DM_PCI) FT_FSL_PCI_SETUP; #endif

-- 2.17.1

Zhiqiang Hou

11:30 a.m.

New subject: [PATCH 3/4] powerpc: P1010RDB: Disable legacy PCIe driver when DM_PCI is enabled

From: Hou Zhiqiang Zhiqiang.Hou@nxp.com

Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled for P1010RDB board.

Signed-off-by: Hou Zhiqiang Zhiqiang.Hou@nxp.com --- include/configs/P1010RDB.h | 42 +++++++++++++++++++++++--------------- 1 file changed, 26 insertions(+), 16 deletions(-)

diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 60e8904d42..7c178ac53a 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -113,8 +113,6 @@ #if defined(CONFIG_PCI) #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ -#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ -#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */

/* @@ -122,19 +120,13 @@ * Memory space is mapped 1-1, but I/O space must start from 0. */ /* controller 1, Slot 1, tgtid 1, Base address a000 */ -#define CONFIG_SYS_PCIE1_NAME "mini PCIe Slot" #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull #else -#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0x80000000 #endif -#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ #define CONFIG_SYS_PCIE1_IO_VIRT 0xffc00000 -#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 -#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc00000ull #else @@ -142,27 +134,45 @@ #endif

/* controller 2, Slot 2, tgtid 2, Base address 9000 */ +#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull +#else +#define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000 +#endif +#define CONFIG_SYS_PCIE2_IO_VIRT 0xffc10000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_PCIE2_IO_PHYS 0xfffc10000ull +#else +#define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 +#endif + +#if !defined(CONFIG_DM_PCI) +#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ +#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ +#define CONFIG_SYS_PCIE1_NAME "mini PCIe Slot" +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 +#else +#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 +#endif +#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ + #if defined(CONFIG_TARGET_P1010RDB_PA) #define CONFIG_SYS_PCIE2_NAME "PCIe Slot" #elif defined(CONFIG_TARGET_P1010RDB_PB) #define CONFIG_SYS_PCIE2_NAME "mini PCIe Slot" #endif -#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE2_MEM_BUS 0xc0000000 -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull #else #define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000 -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000 #endif #define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCIE2_IO_VIRT 0xffc10000 #define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE2_IO_PHYS 0xfffc10000ull -#else -#define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 #endif

#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */

-- 2.17.1

Zhiqiang Hou

11:30 a.m.

New subject: [PATCH 4/4] configs: P1010RDB: Enable PCIe driver

From: Hou Zhiqiang Zhiqiang.Hou@nxp.com

Enable the DM PCIe driver in P1010RDB defconfigs.

Signed-off-by: Hou Zhiqiang Zhiqiang.Hou@nxp.com --- configs/P1010RDB-PA_36BIT_NAND_defconfig | 4 ++++ configs/P1010RDB-PA_36BIT_NOR_defconfig | 4 ++++ configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 4 ++++ configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 4 ++++ configs/P1010RDB-PA_NAND_defconfig | 4 ++++ configs/P1010RDB-PA_NOR_defconfig | 4 ++++ configs/P1010RDB-PA_SDCARD_defconfig | 4 ++++ configs/P1010RDB-PA_SPIFLASH_defconfig | 4 ++++ configs/P1010RDB-PB_36BIT_NAND_defconfig | 4 ++++ configs/P1010RDB-PB_36BIT_NOR_defconfig | 4 ++++ configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 4 ++++ configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 4 ++++ configs/P1010RDB-PB_NAND_defconfig | 4 ++++ configs/P1010RDB-PB_NOR_defconfig | 4 ++++ configs/P1010RDB-PB_SDCARD_defconfig | 4 ++++ configs/P1010RDB-PB_SPIFLASH_defconfig | 4 ++++ 16 files changed, 64 insertions(+)

diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 414b6d1116..99a18e6a78 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -63,6 +63,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index b083f19a92..bafe039c91 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -45,6 +45,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index a4f68bc3fd..47fc959ab7 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -57,6 +57,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index faf7b13396..e4d7ae0b63 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -59,6 +59,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index c8dddc5f40..a350430f22 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -62,6 +62,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 1edcf75165..12723a29d4 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -44,6 +44,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index b83d0e7528..b9c0a3f7c5 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -56,6 +56,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index cf7f68c471..28ab1a9624 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -58,6 +58,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index c1053a0781..4bb38737ca 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -63,6 +63,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 28245b59c7..a457d42d1e 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -45,6 +45,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 8f3a4c005f..3611a955cd 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -57,6 +57,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index f90e787df4..25074f56a0 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -59,6 +59,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index cc2d7b5580..b7e70fbc1e 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -61,6 +61,10 @@ CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_E1000=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 85f2f0b3b5..f21263aeaf 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -43,6 +43,10 @@ CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_E1000=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 71ad5dfd3d..15e0883424 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -56,6 +56,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 8de212c1cd..7fc0c5e3cd 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -58,6 +58,10 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y

-- 2.17.1

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Zhiqiang Hou