[U-Boot] [PATCH 1/8] arm/davinci: fix DDR2/mDDR memory controller initialization for Omap L138

follow section 15.2.13.1 (Initializing Following Device Power Up or Reset) of OMAP-L138 DSP+ARM Processor Technical Reference Manual
Signed-off-by: Mikhail Kshevetskiy mikhail.kshevetskiy@gmail.com --- arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c | 25 ++++++++++++++++------- arch/arm/include/asm/arch-davinci/hardware.h | 1 + 2 files changed, 19 insertions(+), 7 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c b/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c index df7d6a2..9682407 100644 --- a/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c +++ b/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c @@ -190,13 +190,21 @@ int da850_ddr_setup(void)
setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_LOCK); setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_POWERDWN); - - setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_IOPWRDWN); } - + setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_IOPWRDWN); writel(CONFIG_SYS_DA850_DDR2_DDRPHYCR, &dv_ddr2_regs_ctrl->ddrphycr); - clrbits_le32(&davinci_syscfg1_regs->ddr_slew, - (1 << DDR_SLEW_CMOSEN_BIT)); + + if (CONFIG_SYS_DA850_DDR2_SDBCR & (1 << DV_DDR_SDCR_DDR2EN_SHIFT)){ + /* DDR2 */ + clrbits_le32(&davinci_syscfg1_regs->ddr_slew, + (1 << DDR_SLEW_DDR_PDENA_BIT) | + (1 << DDR_SLEW_CMOSEN_BIT)); + }else{ + /* MOBILE DDR */ + setbits_le32(&davinci_syscfg1_regs->ddr_slew, + (1 << DDR_SLEW_DDR_PDENA_BIT) | + (1 << DDR_SLEW_CMOSEN_BIT)); + }
/* * SDRAM Configuration Register (SDCR): @@ -216,7 +224,10 @@ int da850_ddr_setup(void) writel(tmp, &dv_ddr2_regs_ctrl->sdbcr);
/* write memory configuration and timing */ - writel(CONFIG_SYS_DA850_DDR2_SDBCR2, &dv_ddr2_regs_ctrl->sdbcr2); + if (!(CONFIG_SYS_DA850_DDR2_SDBCR & (1 << DV_DDR_SDCR_DDR2EN_SHIFT))){ + /* MOBILE DDR only*/ + writel(CONFIG_SYS_DA850_DDR2_SDBCR2, &dv_ddr2_regs_ctrl->sdbcr2); + } writel(CONFIG_SYS_DA850_DDR2_SDTIMR, &dv_ddr2_regs_ctrl->sdtimr); writel(CONFIG_SYS_DA850_DDR2_SDTIMR2, &dv_ddr2_regs_ctrl->sdtimr2);
@@ -240,7 +251,7 @@ int da850_ddr_setup(void)
/* disable self refresh */ clrbits_le32(&dv_ddr2_regs_ctrl->sdrcr, - DV_DDR_SDRCR_LPMODEN | DV_DDR_SDRCR_LPMODEN); + DV_DDR_SDRCR_LPMODEN | DV_DDR_SDRCR_MCLKSTOPEN); writel(CONFIG_SYS_DA850_DDR2_PBBPR, &dv_ddr2_regs_ctrl->pbbpr);
return 0; diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index b145c6e..56e5743 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -505,6 +505,7 @@ struct davinci_syscfg1_regs { ((struct davinci_syscfg1_regs *)DAVINCI_SYSCFG1_BASE)
#define DDR_SLEW_CMOSEN_BIT 4 +#define DDR_SLEW_DDR_PDENA_BIT 5
#define VTP_POWERDWN (1 << 6) #define VTP_LOCK (1 << 7)

Signed-off-by: Mikhail Kshevetskiy mikhail.kshevetskiy@gmail.com --- arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c | 5 +++++ arch/arm/include/asm/arch-davinci/hardware.h | 1 + arch/arm/include/asm/arch-davinci/pinmux_defs.h | 1 + 3 files changed, 7 insertions(+)
diff --git a/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c b/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c index fa07fb5..dbae5fa 100644 --- a/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c +++ b/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c @@ -35,6 +35,11 @@ const struct pinmux_config spi1_pins_scs0[] = { };
/* UART pin muxer settings */ +const struct pinmux_config uart0_pins_txrx[] = { + { pinmux(3), 2, 4 }, /* UART0_RXD */ + { pinmux(3), 2, 5 }, /* UART0_TXD */ +}; + const struct pinmux_config uart1_pins_txrx[] = { { pinmux(4), 2, 6 }, /* UART1_RXD */ { pinmux(4), 2, 7 }, /* UART1_TXD */ diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index 56e5743..76aca24 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -447,6 +447,7 @@ struct davinci_pllc_regs { /* Clock IDs */ enum davinci_clk_ids { DAVINCI_SPI0_CLKID = 2, + DAVINCI_UART0_CLKID = 2, DAVINCI_UART2_CLKID = 2, DAVINCI_MMC_CLKID = 2, DAVINCI_MDIO_CLKID = 4, diff --git a/arch/arm/include/asm/arch-davinci/pinmux_defs.h b/arch/arm/include/asm/arch-davinci/pinmux_defs.h index 07aceaa..eddb3f7 100644 --- a/arch/arm/include/asm/arch-davinci/pinmux_defs.h +++ b/arch/arm/include/asm/arch-davinci/pinmux_defs.h @@ -28,6 +28,7 @@ extern const struct pinmux_config spi1_pins_base[3]; extern const struct pinmux_config spi1_pins_scs0[1];
/* UART pin muxer settings */ +extern const struct pinmux_config uart0_pins_txrx[2]; extern const struct pinmux_config uart1_pins_txrx[2]; extern const struct pinmux_config uart2_pins_txrx[2]; extern const struct pinmux_config uart2_pins_rtscts[2];

also fix NS16550_init() as we need 16x divider
Signed-off-by: Mikhail Kshevetskiy mikhail.kshevetskiy@gmail.com --- drivers/serial/ns16550.c | 2 +- include/ns16550.h | 9 +++++++++ 2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 0c23955..e6dec0c 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -52,7 +52,7 @@ void NS16550_init(NS16550_t com_port, int baud_divisor) serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); serial_out(UART_LCRVAL, &com_port->lcr); #if (defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)) || \ - defined(CONFIG_AM33XX) + defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX)
#if defined(CONFIG_APTIX) /* /13 mode so Aptix 6MHz can hit 115200 */ diff --git a/include/ns16550.h b/include/ns16550.h index e9d2eda..51cb5b4 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -46,6 +46,14 @@ struct NS16550 { UART_REG(lsr); /* 5 */ UART_REG(msr); /* 6 */ UART_REG(spr); /* 7 */ +#ifdef CONFIG_SOC_DA8XX + UART_REG(reg8); /* 8 */ + UART_REG(reg9); /* 9 */ + UART_REG(revid1); /* A */ + UART_REG(revid2); /* B */ + UART_REG(pwr_mgmt); /* C */ + UART_REG(mdr1); /* D */ +#else UART_REG(mdr1); /* 8 */ UART_REG(reg9); /* 9 */ UART_REG(regA); /* A */ @@ -58,6 +66,7 @@ struct NS16550 { UART_REG(ssr); /* 11*/ UART_REG(reg12); /* 12*/ UART_REG(osc_12m_sel); /* 13*/ +#endif };
#define thr rbr

Hi Mikhail,
On Tue, Jun 12, 2012 at 11:15 PM, Mikhail Kshevetskiy mikhail.kshevetskiy@gmail.com wrote:
also fix NS16550_init() as we need 16x divider
Signed-off-by: Mikhail Kshevetskiy mikhail.kshevetskiy@gmail.com
drivers/serial/ns16550.c | 2 +- include/ns16550.h | 9 +++++++++ 2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 0c23955..e6dec0c 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -52,7 +52,7 @@ void NS16550_init(NS16550_t com_port, int baud_divisor) serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); serial_out(UART_LCRVAL, &com_port->lcr); #if (defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)) || \
- defined(CONFIG_AM33XX)
- defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX)
Please fix the checkpatch warning here (no spaces at start of line).
Otherwise:
Acked-by: Christian Riesch christian.riesch@omicron.at Tested-by: Christian Riesch christian.riesch@omicron.at
Regards, Christian
#if defined(CONFIG_APTIX) /* /13 mode so Aptix 6MHz can hit 115200 */ diff --git a/include/ns16550.h b/include/ns16550.h index e9d2eda..51cb5b4 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -46,6 +46,14 @@ struct NS16550 { UART_REG(lsr); /* 5 */ UART_REG(msr); /* 6 */ UART_REG(spr); /* 7 */ +#ifdef CONFIG_SOC_DA8XX
- UART_REG(reg8); /* 8 */
- UART_REG(reg9); /* 9 */
- UART_REG(revid1); /* A */
- UART_REG(revid2); /* B */
- UART_REG(pwr_mgmt); /* C */
- UART_REG(mdr1); /* D */
+#else UART_REG(mdr1); /* 8 */ UART_REG(reg9); /* 9 */ UART_REG(regA); /* A */ @@ -58,6 +66,7 @@ struct NS16550 { UART_REG(ssr); /* 11*/ UART_REG(reg12); /* 12*/ UART_REG(osc_12m_sel); /* 13*/ +#endif };
#define thr rbr
1.7.10
U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

current code does not support spi flashes that have 0x90 read_id command, so fix this
Signed-off-by: Mikhail Kshevetskiy mikhail.kshevetskiy@gmail.com --- drivers/mtd/spi/spi_flash.c | 64 +++++++++++++++++++++++----------- drivers/mtd/spi/spi_flash_internal.h | 1 + 2 files changed, 45 insertions(+), 20 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index f689cc4..5c931da 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -306,13 +306,44 @@ static const struct { }; #define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)
+struct spi_flash *spi_analize_flash_probe(struct spi_slave *spi, + u8 *idcode, size_t idcode_len, u8 *id) +{ + struct spi_flash *flash = NULL; + int i, shift; + u8 *idp; + +#ifdef DEBUG + printf("SF: Got idcodes\n"); + print_buffer(0, idcode, 1, idcode_len, 0); +#endif + + /* count the number of continuation bytes */ + for (shift = 0, idp = idcode; + shift < idcode_len && *idp == 0x7f; + ++shift, ++idp) + continue; + + *id = *idp; + /* search the table for matches in shift and id */ + for (i = 0; i < ARRAY_SIZE(flashes); ++i) + if (flashes[i].shift == shift && flashes[i].idcode == *idp) { + /* we have a match, call probe */ + flash = flashes[i].probe(spi, idp); + if (flash) + break; + } + + return flash; +} + struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int spi_mode) { struct spi_slave *spi; struct spi_flash *flash = NULL; - int ret, i, shift; - u8 idcode[IDCODE_LEN], *idp; + u8 cmd[4], idcode[IDCODE_LEN], id; + int ret;
spi = spi_setup_slave(bus, cs, max_hz, spi_mode); if (!spi) { @@ -331,28 +362,21 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, if (ret) goto err_read_id;
-#ifdef DEBUG - printf("SF: Got idcodes\n"); - print_buffer(0, idcode, 1, sizeof(idcode), 0); -#endif + flash = spi_analize_flash_probe(spi, idcode, sizeof(idcode), &id); + if (id == 0xff) { + /* try CMD_READ_ID_NEW command */ + cmd[0] = CMD_READ_ID_NEW; + spi_flash_addr(0x000000, cmd);
- /* count the number of continuation bytes */ - for (shift = 0, idp = idcode; - shift < IDCODE_CONT_LEN && *idp == 0x7f; - ++shift, ++idp) - continue; + ret = spi_flash_cmd_read(spi, cmd, sizeof(cmd), idcode, sizeof(idcode)); + if (ret) + goto err_read_id;
- /* search the table for matches in shift and id */ - for (i = 0; i < ARRAY_SIZE(flashes); ++i) - if (flashes[i].shift == shift && flashes[i].idcode == *idp) { - /* we have a match, call probe */ - flash = flashes[i].probe(spi, idp); - if (flash) - break; - } + flash = spi_analize_flash_probe(spi, idcode, sizeof(idcode), &id); + }
if (!flash) { - printf("SF: Unsupported manufacturer %02x\n", *idp); + printf("SF: Unsupported manufacturer %02x\n", id); goto err_manufacturer_probe; }
diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index 91e036a..b8bd5d5 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -14,6 +14,7 @@
/* Common commands */ #define CMD_READ_ID 0x9f +#define CMD_READ_ID_NEW 0x90
#define CMD_READ_ARRAY_SLOW 0x03 #define CMD_READ_ARRAY_FAST 0x0b

current SST driver does not support well this types of flash, so use linux-3.3 code as a base.
Signed-off-by: Mikhail Kshevetskiy mikhail.kshevetskiy@gmail.com --- drivers/mtd/spi/Makefile | 3 +- drivers/mtd/spi/spi_flash.c | 3 + drivers/mtd/spi/spi_flash_internal.h | 1 + drivers/mtd/spi/sst25l.c | 363 ++++++++++++++++++++++++++++++++++ 4 files changed, 369 insertions(+), 1 deletion(-) create mode 100644 drivers/mtd/spi/sst25l.c
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile index 90f8392..9285bf7 100644 --- a/drivers/mtd/spi/Makefile +++ b/drivers/mtd/spi/Makefile @@ -34,7 +34,8 @@ COBJS-$(CONFIG_SPI_FLASH_ATMEL) += atmel.o COBJS-$(CONFIG_SPI_FLASH_EON) += eon.o COBJS-$(CONFIG_SPI_FLASH_MACRONIX) += macronix.o COBJS-$(CONFIG_SPI_FLASH_SPANSION) += spansion.o -COBJS-$(CONFIG_SPI_FLASH_SST) += sst.o +COBJS-$(CONFIG_SPI_FLASH_SST) += sst.o +COBJS-$(CONFIG_SPI_FLASH_SST25L) += sst25l.o COBJS-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.o COBJS-$(CONFIG_SPI_FLASH_WINBOND) += winbond.o COBJS-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 5c931da..846b9b0 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -285,6 +285,9 @@ static const struct { #ifdef CONFIG_SPI_FLASH_SST { 0, 0xbf, spi_flash_probe_sst, }, #endif +#ifdef CONFIG_SPI_FLASH_SST25L + { 0, 0xbf, spi_flash_probe_sst25l, }, +#endif #ifdef CONFIG_SPI_FLASH_STMICRO { 0, 0x20, spi_flash_probe_stmicro, }, #endif diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index b8bd5d5..89d9036 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -98,6 +98,7 @@ struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode); struct spi_flash *spi_flash_probe_eon(struct spi_slave *spi, u8 *idcode); struct spi_flash *spi_flash_probe_macronix(struct spi_slave *spi, u8 *idcode); struct spi_flash *spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode); +struct spi_flash *spi_flash_probe_sst25l(struct spi_slave *spi, u8 *idcode); struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 *idcode); struct spi_flash *spi_flash_probe_winbond(struct spi_slave *spi, u8 *idcode); struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi, u8 *idcode); diff --git a/drivers/mtd/spi/sst25l.c b/drivers/mtd/spi/sst25l.c new file mode 100644 index 0000000..6c2cc0f --- /dev/null +++ b/drivers/mtd/spi/sst25l.c @@ -0,0 +1,363 @@ +/* + * Driver for SST25L SPI Flash chips + * + * (C) Copyright 2000-2002 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * Copyright 2008, Network Appliance Inc. + * Jason McMullan mcmullan@netapp.com + * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. + * TsiChung Liew (Tsi-Chung.Liew@freescale.com) + * Copyright (c) 2008-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <malloc.h> +#include <spi_flash.h> +#include <watchdog.h> + +#include "spi_flash_internal.h" + +#define SST25L_CMD_WRSR 0x01 /* Write status register */ +#define SST25L_CMD_WRDI 0x04 /* Write disable */ +#define SST25L_CMD_RDSR 0x05 /* Read status register */ +#define SST25L_CMD_WREN 0x06 /* Write enable */ +#define SST25L_CMD_READ 0x03 /* High speed read */ + +#define SST25L_CMD_EWSR 0x50 /* Enable write status register */ +#define SST25L_CMD_SECTOR_ERASE 0x20 /* Erase sector */ +#define SST25L_CMD_READ_ID 0x90 /* Read device ID */ +#define SST25L_CMD_AAI_PROGRAM 0xaf /* Auto address increment */ + +#define SST25L_STATUS_BUSY (1 << 0) /* Chip is busy */ +#define SST25L_STATUS_WREN (1 << 1) /* Write enabled */ +#define SST25L_STATUS_BP0 (1 << 2) /* Block protection 0 */ +#define SST25L_STATUS_BP1 (1 << 3) /* Block protection 1 */ + +struct flash_info { + const char *name; + u16 device_id; + u32 page_size; + u32 nr_pages; + u32 erase_size; +}; + +struct sst25l_spi_flash { + struct spi_flash flash; + const struct flash_info *flash_info; +}; + +#define to_sst25l_spi_flash(x) container_of(x, struct sst25l_spi_flash, flash) + +static struct flash_info sst25l_flash_info[] = { + {"sst25vf010a", 0xbf49, 256, 512, 4096}, + {"sst25lf020a", 0xbf43, 256, 1024, 4096}, + {"sst25lf040a", 0xbf44, 256, 2048, 4096}, +}; + +static inline int spi_write_sync(struct spi_slave *spi, const u8 *data, size_t len) +{ + return spi_xfer(spi, 8 * len, data, NULL, SPI_XFER_BEGIN | SPI_XFER_END); +} + +static int sst25l_status(struct spi_flash *flash, int *status) +{ + unsigned char cmd_resp[2]; + int err; + + cmd_resp[0] = SST25L_CMD_RDSR; + cmd_resp[1] = 0xff; + + err = spi_xfer(flash->spi, 8 * sizeof(cmd_resp), cmd_resp, cmd_resp, + SPI_XFER_BEGIN | SPI_XFER_END); + if (err < 0) + return err; + + *status = cmd_resp[1]; + return 0; +} + +static int sst25l_write_enable(struct spi_flash *flash, int enable) +{ + unsigned char command[2]; + int status, err; + + command[0] = enable ? SST25L_CMD_WREN : SST25L_CMD_WRDI; + err = spi_write_sync(flash->spi, command, 1); + if (err) + return err; + + command[0] = SST25L_CMD_EWSR; + err = spi_write_sync(flash->spi, command, 1); + if (err) + return err; + + command[0] = SST25L_CMD_WRSR; + command[1] = enable ? 0 : SST25L_STATUS_BP0 | SST25L_STATUS_BP1; + err = spi_write_sync(flash->spi, command, 2); + if (err) + return err; + + if (enable) { + err = sst25l_status(flash, &status); + if (err) + return err; + if (!(status & SST25L_STATUS_WREN)) + return -1; + } + + return 0; +} + +static int sst25l_wait_till_ready(struct spi_flash *flash, unsigned long timeout) +{ + unsigned long timebase; + int status, err; + + timebase = get_timer(0); + do { + WATCHDOG_RESET(); + + err = sst25l_status(flash, &status); + if (err) + return err; + if (!(status & SST25L_STATUS_BUSY)) + return 0; + + } while (get_timer(timebase) < timeout); + + return -1; +} + +static int sst25l_erase_sector(struct spi_flash *flash, u32 offset) +{ + unsigned char command[4]; + int err; + + err = sst25l_write_enable(flash, 1); + if (err) + return err; + + command[0] = SST25L_CMD_SECTOR_ERASE; + command[1] = offset >> 16; + command[2] = offset >> 8; + command[3] = offset; + err = spi_write_sync(flash->spi, command, 4); + if (err) + return err; + + err = sst25l_wait_till_ready(flash, SPI_FLASH_SECTOR_ERASE_TIMEOUT); + if (err) + return err; + + return sst25l_write_enable(flash, 0); +} + +static int sst25l_erase(struct spi_flash *flash, u32 offset, size_t len) +{ + struct sst25l_spi_flash *sst25l = to_sst25l_spi_flash(flash); + const struct flash_info *flash_info = sst25l->flash_info; + u32 end = offset + len; + int err; + + /* Sanity checks */ + if (len % flash_info->erase_size) + return -1; + + if (offset % flash_info->erase_size) + return -1; + + err = sst25l_wait_till_ready(flash, SPI_FLASH_PROG_TIMEOUT); + if (err) + return err; + + while (offset < end) { + err = sst25l_erase_sector(flash, offset); + if (err) + return err; + offset += flash_info->erase_size; + } + return 0; +} + +static int sst25l_read(struct spi_flash *flash, u32 offset, size_t len, void *data) +{ + unsigned char command[4]; + int ret; + + command[0] = SST25L_CMD_READ; + command[1] = offset >> 16; + command[2] = offset >> 8; + command[3] = offset; + + /* Wait for previous write/erase to complete */ + ret = sst25l_wait_till_ready(flash, SPI_FLASH_PROG_TIMEOUT); + if (ret) + return ret; + + ret = spi_xfer(flash->spi, 8 * sizeof(command), command, NULL, SPI_XFER_BEGIN); + if (ret) + return ret; + + ret = spi_xfer(flash->spi, 8 * len, NULL, data, SPI_XFER_END); + if (ret) + return ret; + + return 0; +} + +static int sst25l_write(struct spi_flash *flash, u32 offset, size_t len, const char *buf) +{ + struct sst25l_spi_flash *sst25l = to_sst25l_spi_flash(flash); + const struct flash_info *flash_info = sst25l->flash_info; + int i, j, ret, bytes, copied = 0; + unsigned char command[5]; + + if (offset % flash_info->page_size) + return -1; + + ret = sst25l_write_enable(flash, 1); + if (ret) + goto out; + + for (i = 0; i < len; i += flash_info->page_size) { + ret = sst25l_wait_till_ready(flash, SPI_FLASH_PROG_TIMEOUT); + if (ret) + goto out; + + /* Write the first byte of the page */ + command[0] = SST25L_CMD_AAI_PROGRAM; + command[1] = (offset + i) >> 16; + command[2] = (offset + i) >> 8; + command[3] = (offset + i); + command[4] = buf[i]; + ret = spi_write_sync(flash->spi, command, 5); + if (ret < 0) + goto out; + copied++; + + /* + * Write the remaining bytes using auto address + * increment mode + */ + bytes = min(flash_info->page_size, len - i); + for (j = 1; j < bytes; j++, copied++) { + ret = sst25l_wait_till_ready(flash, SPI_FLASH_PROG_TIMEOUT); + if (ret) + goto out; + + command[1] = buf[i + j]; + ret = spi_write_sync(flash->spi, command, 2); + if (ret) + goto out; + } + } + +out: + ret = sst25l_write_enable(flash, 0); + if (ret) + return ret; + + return (copied == len) ? 0 : -1; +} + +static int sst25l_flash_erase(struct spi_flash *flash, u32 offset, size_t len) +{ + int ret; + + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: unable to claim SPI bus\n"); + return ret; + } + + ret = sst25l_erase(flash, offset, len); + if (ret) { + debug("SF: unable to erase spi flash sector\n"); + return ret; + } + + spi_release_bus(flash->spi); + return ret; +} + +static int sst25l_flash_read(struct spi_flash *flash, u32 offset, size_t len, void *data) +{ + int ret; + + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: unable to claim SPI bus\n"); + return ret; + } + + ret = sst25l_read(flash, offset, len, data); + if (ret) { + debug("SF: unable to read spi flash\n"); + return ret; + } + + spi_release_bus(flash->spi); + return ret; +} + +static int sst25l_flash_write(struct spi_flash *flash, u32 offset, size_t len, const void *buf) +{ + int ret; + + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: unable to claim SPI bus\n"); + return ret; + } + + ret = sst25l_write(flash, offset, len, buf); + if (ret) { + debug("SF: unable to write spi flash\n"); + return ret; + } + + spi_release_bus(flash->spi); + return ret; +} + +struct spi_flash * +spi_flash_probe_sst25l(struct spi_slave *spi, u8 *idcode) +{ + const struct flash_info *flash_info = NULL; + struct sst25l_spi_flash *stm; + size_t i; + u16 device_id = ((u16)idcode[0] << 8) + idcode[1]; + + for (i = 0; i < ARRAY_SIZE(sst25l_flash_info); ++i) + if (sst25l_flash_info[i].device_id == device_id){ + flash_info = &sst25l_flash_info[i]; + break; + } + + if (flash_info == NULL) { + debug("SF: Unsupported SST25L ID %04x\n", device_id); + return NULL; + } + + stm = malloc(sizeof(*stm)); + if (!stm) { + debug("SF: Failed to allocate memory\n"); + return NULL; + } + + stm->flash_info = flash_info; + stm->flash.spi = spi; + stm->flash.name = flash_info->name; + + stm->flash.read = sst25l_flash_read; + stm->flash.write = sst25l_flash_write; + stm->flash.erase = sst25l_flash_erase; + + stm->flash.page_size = flash_info->page_size; + stm->flash.sector_size = flash_info->erase_size; + stm->flash.size = flash_info->page_size * flash_info->nr_pages; + + return &stm->flash; +}

Signed-off-by: Mikhail Kshevetskiy mikhail.kshevetskiy@gmail.com --- drivers/mmc/mmc.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index aebe578..69df64a 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -1253,7 +1253,9 @@ int mmc_startup(struct mmc *mmc) (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff); sprintf(mmc->block_dev.revision, "%d.%d", mmc->cid[2] >> 28, (mmc->cid[2] >> 24) & 0xf); +#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT) init_part(&mmc->block_dev); +#endif
return 0; }

Signed-off-by: Mikhail Kshevetskiy mikhail.kshevetskiy@gmail.com --- arch/arm/cpu/arm926ejs/davinci/Makefile | 5 ++ arch/arm/cpu/arm926ejs/davinci/spl.c | 91 +++++++++++++++++++--- arch/arm/cpu/arm926ejs/davinci/spl_mmc.c | 37 +++++++++ arch/arm/cpu/arm926ejs/davinci/spl_nand.c | 11 +++ arch/arm/cpu/arm926ejs/davinci/spl_spi_flash.c | 25 ++++++ arch/arm/cpu/arm926ejs/davinci/spl_ymodem.c | 41 ++++++++++ arch/arm/include/asm/arch-davinci/davinci_boot.h | 25 ++++++ include/configs/cam_enc_4xx.h | 12 +-- include/configs/da850evm.h | 19 +++-- include/configs/hawkboard.h | 11 +-- 10 files changed, 247 insertions(+), 30 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/davinci/spl_mmc.c create mode 100644 arch/arm/cpu/arm926ejs/davinci/spl_nand.c create mode 100644 arch/arm/cpu/arm926ejs/davinci/spl_spi_flash.c create mode 100644 arch/arm/cpu/arm926ejs/davinci/spl_ymodem.c create mode 100644 arch/arm/include/asm/arch-davinci/davinci_boot.h
diff --git a/arch/arm/cpu/arm926ejs/davinci/Makefile b/arch/arm/cpu/arm926ejs/davinci/Makefile index da7efac..12bd37a 100644 --- a/arch/arm/cpu/arm926ejs/davinci/Makefile +++ b/arch/arm/cpu/arm926ejs/davinci/Makefile @@ -40,6 +40,11 @@ ifdef CONFIG_SPL_BUILD COBJS-y += spl.o COBJS-$(CONFIG_SOC_DM365) += dm365_lowlevel.o COBJS-$(CONFIG_SOC_DA8XX) += da850_lowlevel.o + +COBJS-$(CONFIG_SPL_NAND_SUPPORT) += spl_nand.o +COBJS-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += spl_spi_flash.o +COBJS-$(CONFIG_SPL_YMODEM_SUPPORT) += spl_ymodem.o +COBJS-$(CONFIG_SPL_MMC_SUPPORT) += spl_mmc.o endif
SOBJS = reset.o diff --git a/arch/arm/cpu/arm926ejs/davinci/spl.c b/arch/arm/cpu/arm926ejs/davinci/spl.c index 74632e5..a8c318c 100644 --- a/arch/arm/cpu/arm926ejs/davinci/spl.c +++ b/arch/arm/cpu/arm926ejs/davinci/spl.c @@ -25,9 +25,11 @@ #include <asm/utils.h> #include <nand.h> #include <asm/arch/dm365_lowlevel.h> +#include <asm/arch/davinci_boot.h> #include <ns16550.h> #include <malloc.h> #include <spi_flash.h> +#include <linux/compiler.h>
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
@@ -72,25 +74,92 @@ void board_init_f(ulong dummy) relocate_code(CONFIG_SPL_STACK, NULL, CONFIG_SPL_TEXT_BASE); }
+u32 davinci_boot_device(void){ +#ifdef CONFIG_SOC_DA8XX + u32 bootmode = ((*((vu_long*)0x01C14020)) & 0x1F); + switch(bootmode){ + case 0x0E: /* NAND 8 */ + case 0x10: /* NAND 16 */ + return BOOT_DEVICE_NAND; + case 0x0A: + case 0x0C: + return BOOT_DEVICE_SPI_FLASH; + case 0x16: /* UART0 */ + case 0x17: /* UART1 */ + case 0x14: /* UART2 */ + return BOOT_DEVICE_UART; + case 0x1C: /* MMC/SD */ + return BOOT_DEVICE_MMC; + default: + return BOOT_DEVICE_NONE; + } +#else +#ifdef +#endif CONFIG_SPL_NAND_SUPPORT + return BOOT_DEVICE_NAND; +#endif +#ifdef BOOT_DEVICE_SPI_FLASH + return BOOT_DEVICE_SPI_FLASH; +#endif +#ifdef CONFIG_SPL_YMODEM_SUPPORT + return BOOT_DEVICE_UART; +#endif +#ifdef CONFIG_SPL_MMC_SUPPORT + return BOOT_DEVICE_MMC; +#endif +} + void board_init_r(gd_t *id, ulong dummy) { -#ifdef CONFIG_SPL_NAND_LOAD - nand_init(); - puts("Nand boot...\n"); - nand_boot(); -#endif -#ifdef CONFIG_SPL_SPI_LOAD - mem_malloc_init(CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_LEN, - CONFIG_SYS_MALLOC_LEN); + u32 boot_device; + void (*uboot)(void) __noreturn; + + mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START, + CONFIG_SYS_SPL_MALLOC_SIZE);
gd = &gdata; gd->bd = &bdata; gd->flags |= GD_FLG_RELOC; +#ifdef CONFIG_SPL_SERIAL_SUPPORT gd->baudrate = CONFIG_BAUDRATE; - serial_init(); /* serial communications setup */ + serial_init(); gd->have_console = 1; +#endif
- puts("SPI boot...\n"); - spi_boot(); + boot_device = davinci_boot_device(); + debug("boot device - %d\n", boot_device); + switch (boot_device) { +#ifdef CONFIG_SPL_NAND_SUPPORT + case BOOT_DEVICE_NAND: + puts("Booting from nand flash ...\n"); + spl_nand_load_image(); + break; +#endif +#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT + case BOOT_DEVICE_SPI_FLASH: + puts("Booting from spi flash ...\n"); + spl_spi_flash_load_image(); + break; #endif +#ifdef CONFIG_SPL_YMODEM_SUPPORT + case BOOT_DEVICE_UART: + puts("Booting from uart ...\n"); + spl_ymodem_load_image(); + break; +#endif +#ifdef CONFIG_SPL_MMC_SUPPORT + case BOOT_DEVICE_MMC: + puts("Booting from mmc/sd card...\n"); + spl_mmc_load_image(); + break; +#endif + default: + printf("SPL: Un-supported Boot Device - %d!!!\n", boot_device); + hang(); + break; + } + + puts("Jump to U-Boot image...\n"); + uboot = (void *) CONFIG_SYS_TEXT_BASE; + (*uboot)(); } diff --git a/arch/arm/cpu/arm926ejs/davinci/spl_mmc.c b/arch/arm/cpu/arm926ejs/davinci/spl_mmc.c new file mode 100644 index 0000000..520ecd1 --- /dev/null +++ b/arch/arm/cpu/arm926ejs/davinci/spl_mmc.c @@ -0,0 +1,37 @@ +#include <common.h> +#include <asm/u-boot.h> +#include <asm/utils.h> +#include <mmc.h> +#include <asm/arch/sdmmc_defs.h> + +DECLARE_GLOBAL_DATA_PTR; + +void spl_mmc_load_image(void) +{ + int ret; + struct mmc *mmc; + + mmc_initialize(gd->bd); + /* We register only one device. So, the dev id is always 0 */ + mmc = find_mmc_device(0); + if (!mmc) { + puts("spl: mmc device not found!!\n"); + hang(); + } + + ret = mmc_init(mmc); + if (ret) { + printf("spl: mmc init failed: err - %d\n", ret); + hang(); + } + + ret = mmc->block_dev.block_read(0, CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, + CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS, + (void *) CONFIG_SYS_TEXT_BASE); + if (ret < 0) { + printf("spl: mmc blk read err - %d\n", ret); + hang(); + } + + debug("Loaded %d sectors from SD/MMC card\n", CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS); +} diff --git a/arch/arm/cpu/arm926ejs/davinci/spl_nand.c b/arch/arm/cpu/arm926ejs/davinci/spl_nand.c new file mode 100644 index 0000000..bad1e8f --- /dev/null +++ b/arch/arm/cpu/arm926ejs/davinci/spl_nand.c @@ -0,0 +1,11 @@ +#include <common.h> +#include <nand.h> + +void spl_nand_load_image(void) +{ + nand_init(); + nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS, + CONFIG_SYS_NAND_U_BOOT_SIZE, + (void *) CONFIG_SYS_TEXT_BASE); + debug("Loaded %d bytes from NAND flash\n", CONFIG_SYS_NAND_U_BOOT_SIZE); +} diff --git a/arch/arm/cpu/arm926ejs/davinci/spl_spi_flash.c b/arch/arm/cpu/arm926ejs/davinci/spl_spi_flash.c new file mode 100644 index 0000000..2d5b045 --- /dev/null +++ b/arch/arm/cpu/arm926ejs/davinci/spl_spi_flash.c @@ -0,0 +1,25 @@ +#include <common.h> +#include <spi_flash.h> + +void spl_spi_flash_load_image(void) +{ + int ret; + struct spi_flash *flash; + + flash = spi_flash_probe(CONFIG_SPL_SPI_BUS, CONFIG_SPL_SPI_CS, + CONFIG_SF_DEFAULT_SPEED, SPI_MODE_3); + if (!flash) { + puts("spl: spi flash probe failed.\n"); + hang(); + } + + ret = spi_flash_read(flash, CONFIG_SYS_SPI_U_BOOT_OFFS, + CONFIG_SYS_SPI_U_BOOT_SIZE, + (void *) CONFIG_SYS_TEXT_BASE); + if (ret < 0) { + printf("spl: spi flash read err - %d\n", ret); + hang(); + } + + debug("Loaded %d bytes from SPI flash\n", CONFIG_SYS_SPI_U_BOOT_SIZE); +} diff --git a/arch/arm/cpu/arm926ejs/davinci/spl_ymodem.c b/arch/arm/cpu/arm926ejs/davinci/spl_ymodem.c new file mode 100644 index 0000000..be6786b --- /dev/null +++ b/arch/arm/cpu/arm926ejs/davinci/spl_ymodem.c @@ -0,0 +1,41 @@ +#include <common.h> +#include <xyzModem.h> +#include <asm/u-boot.h> +#include <asm/utils.h> + +#define BUF_SIZE 1024 + +static int getcymodem(void) { + if (tstc()) + return (getc()); + return -1; +} + +void spl_ymodem_load_image(void) +{ + int size; + int err; + int res; + connection_info_t info; + ulong store_addr = ~0; + + size = 0; + info.mode = xyzModem_ymodem; + res = xyzModem_stream_open (&info, &err); + if (!res) { + store_addr = CONFIG_SYS_TEXT_BASE; + while ((res = + xyzModem_stream_read ((char*)store_addr, 1024, &err)) > 0) { + store_addr += res; + size += res; + } + } else { + printf("spl: ymodem err - %s\n", xyzModem_error(err)); + hang(); + } + + xyzModem_stream_close (&err); + xyzModem_stream_terminate (false, &getcymodem); + + debug("Loaded %d bytes from UART\n", size); +} diff --git a/arch/arm/include/asm/arch-davinci/davinci_boot.h b/arch/arm/include/asm/arch-davinci/davinci_boot.h new file mode 100644 index 0000000..5d553ee --- /dev/null +++ b/arch/arm/include/asm/arch-davinci/davinci_boot.h @@ -0,0 +1,25 @@ +#ifndef _DAVINCI_BOOT_H_ +#define _DAVINCI_BOOT_H_ + +/* Boot device */ +#define BOOT_DEVICE_NONE 0 +#define BOOT_DEVICE_NAND 1 +#define BOOT_DEVICE_SPI_FLASH 2 +#define BOOT_DEVICE_UART 3 +#define BOOT_DEVICE_MMC 4 + +u32 davinci_boot_device(void); + +/* NAND SPL functions */ +void spl_nand_load_image(void); + +/* SPI FLASH SPL functions */ +void spl_spi_flash_load_image(void); + +/* YMODEM SPL functions */ +void spl_ymodem_load_image(void); + +/* MMC SPL functions */ +void spl_mmc_load_image(void); + +#endif /* _DAVINCI_BOOT_H_ */ diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h index 71faf1c..58dde89 100644 --- a/include/configs/cam_enc_4xx.h +++ b/include/configs/cam_enc_4xx.h @@ -219,18 +219,18 @@
/* Defines for SPL */ #define CONFIG_SPL +#define CONFIG_SPL_LDSCRIPT "$(BOARDDIR)/u-boot-spl.lds" +#define CONFIG_SPL_STACK (0x00010000 + 0x7f00) +#define CONFIG_SPL_TEXT_BASE 0x00000020 /*CONFIG_SYS_SRAM_START*/ +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_LEN) +#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN +#define CONFIG_SPL_MAX_SIZE 12320 #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_NAND_SUPPORT #define CONFIG_SPL_NAND_SIMPLE -#define CONFIG_SPL_NAND_LOAD #define CONFIG_SYS_NAND_HW_ECC_OOBFIRST #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_POST_MEM_SUPPORT -#define CONFIG_SPL_LDSCRIPT "$(BOARDDIR)/u-boot-spl.lds" -#define CONFIG_SPL_STACK (0x00010000 + 0x7f00) - -#define CONFIG_SPL_TEXT_BASE 0x00000020 /*CONFIG_SYS_SRAM_START*/ -#define CONFIG_SPL_MAX_SIZE 12320
#ifndef CONFIG_SPL_BUILD #define CONFIG_SYS_TEXT_BASE 0x81080000 diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 989472b..e027fe7 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -315,20 +315,23 @@
/* defines for SPL */ #define CONFIG_SPL +#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-da850evm.lds" +#define CONFIG_SPL_STACK 0x8001ff00 +#define CONFIG_SPL_TEXT_BASE 0x80000000 +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_LEN) +#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN +#define CONFIG_SPL_MAX_SIZE 32768 +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_FLASH_SUPPORT -#define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 -#define CONFIG_SPL_SERIAL_SUPPORT -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-da850evm.lds" -#define CONFIG_SPL_STACK 0x8001ff00 -#define CONFIG_SPL_TEXT_BASE 0x80000000 -#define CONFIG_SPL_MAX_SIZE 32768 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x30000 +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_YMODEM_SUPPORT +
/* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000 diff --git a/include/configs/hawkboard.h b/include/configs/hawkboard.h index 6d2d4fb..a3b8d5d 100644 --- a/include/configs/hawkboard.h +++ b/include/configs/hawkboard.h @@ -59,14 +59,15 @@
/* Spl */ #define CONFIG_SPL -#define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_SIMPLE -#define CONFIG_SPL_NAND_LOAD -#define CONFIG_SPL_LIBGENERIC_SUPPORT /* for udelay and __div64_32 for NAND */ -#define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-hawk.lds" #define CONFIG_SPL_TEXT_BASE 0xc1080000 #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_LEN) +#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN +#define CONFIG_SPL_LIBGENERIC_SUPPORT /* for udelay and __div64_32 for NAND */ +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SPL_SERIAL_SUPPORT
/* * Memory Info

Hi,
On Tuesday, June 12, 2012, Mikhail Kshevetskiy wrote:
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.comjavascript:;
arch/arm/cpu/arm926ejs/davinci/Makefile | 5 ++ arch/arm/cpu/arm926ejs/davinci/spl.c | 91 +++++++++++++++++++--- arch/arm/cpu/arm926ejs/davinci/spl_mmc.c | 37 +++++++++ arch/arm/cpu/arm926ejs/davinci/spl_nand.c | 11 +++ arch/arm/cpu/arm926ejs/davinci/spl_spi_flash.c | 25 ++++++ arch/arm/cpu/arm926ejs/davinci/spl_ymodem.c | 41 ++++++++++ arch/arm/include/asm/arch-davinci/davinci_boot.h | 25 ++++++ include/configs/cam_enc_4xx.h | 12 +-- include/configs/da850evm.h | 19 +++-- include/configs/hawkboard.h | 11 +-- 10 files changed, 247 insertions(+), 30 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/davinci/spl_mmc.c create mode 100644 arch/arm/cpu/arm926ejs/davinci/spl_nand.c create mode 100644 arch/arm/cpu/arm926ejs/davinci/spl_spi_flash.c create mode 100644 arch/arm/cpu/arm926ejs/davinci/spl_ymodem.c create mode 100644 arch/arm/include/asm/arch-davinci/davinci_boot.h
diff --git a/arch/arm/cpu/arm926ejs/davinci/Makefile b/arch/arm/cpu/arm926ejs/davinci/Makefile index da7efac..12bd37a 100644 --- a/arch/arm/cpu/arm926ejs/davinci/Makefile +++ b/arch/arm/cpu/arm926ejs/davinci/Makefile @@ -40,6 +40,11 @@ ifdef CONFIG_SPL_BUILD COBJS-y += spl.o COBJS-$(CONFIG_SOC_DM365) += dm365_lowlevel.o COBJS-$(CONFIG_SOC_DA8XX) += da850_lowlevel.o
+COBJS-$(CONFIG_SPL_NAND_SUPPORT) += spl_nand.o +COBJS-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += spl_spi_flash.o +COBJS-$(CONFIG_SPL_YMODEM_SUPPORT) += spl_ymodem.o +COBJS-$(CONFIG_SPL_MMC_SUPPORT) += spl_mmc.o endif
SOBJS = reset.o diff --git a/arch/arm/cpu/arm926ejs/davinci/spl.c b/arch/arm/cpu/arm926ejs/davinci/spl.c index 74632e5..a8c318c 100644 --- a/arch/arm/cpu/arm926ejs/davinci/spl.c +++ b/arch/arm/cpu/arm926ejs/davinci/spl.c @@ -25,9 +25,11 @@ #include <asm/utils.h> #include <nand.h> #include <asm/arch/dm365_lowlevel.h> +#include <asm/arch/davinci_boot.h> #include <ns16550.h> #include <malloc.h> #include <spi_flash.h> +#include <linux/compiler.h>
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
@@ -72,25 +74,92 @@ void board_init_f(ulong dummy) relocate_code(CONFIG_SPL_STACK, NULL, CONFIG_SPL_TEXT_BASE); }
+u32 davinci_boot_device(void){ +#ifdef CONFIG_SOC_DA8XX
u32 bootmode = ((*((vu_long*)0x01C14020)) & 0x1F);
You should probably introduce defines for the address and the bitmask. How about using readl?
switch(bootmode){
case 0x0E: /* NAND 8 */
case 0x10: /* NAND 16 */
return BOOT_DEVICE_NAND;
case 0x0A:
case 0x0C:
return BOOT_DEVICE_SPI_FLASH;
case 0x16: /* UART0 */
case 0x17: /* UART1 */
case 0x14: /* UART2 */
return BOOT_DEVICE_UART;
case 0x1C: /* MMC/SD */
return BOOT_DEVICE_MMC;
default:
return BOOT_DEVICE_NONE;
}
Nice :-)
+#else +#ifdef +#endif CONFIG_SPL_NAND_SUPPORT
return BOOT_DEVICE_NAND;
+#endif +#ifdef BOOT_DEVICE_SPI_FLASH
return BOOT_DEVICE_SPI_FLASH;
+#endif +#ifdef CONFIG_SPL_YMODEM_SUPPORT
return BOOT_DEVICE_UART;
+#endif +#ifdef CONFIG_SPL_MMC_SUPPORT
return BOOT_DEVICE_MMC;
+#endif +}
void board_init_r(gd_t *id, ulong dummy) { -#ifdef CONFIG_SPL_NAND_LOAD
nand_init();
puts("Nand boot...\n");
nand_boot();
-#endif -#ifdef CONFIG_SPL_SPI_LOAD
mem_malloc_init(CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_LEN,
CONFIG_SYS_MALLOC_LEN);
u32 boot_device;
void (*uboot)(void) __noreturn;
mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START,
CONFIG_SYS_SPL_MALLOC_SIZE); gd = &gdata; gd->bd = &bdata; gd->flags |= GD_FLG_RELOC;
+#ifdef CONFIG_SPL_SERIAL_SUPPORT gd->baudrate = CONFIG_BAUDRATE;
serial_init(); /* serial communications setup */
serial_init(); gd->have_console = 1;
+#endif
puts("SPI boot...\n");
spi_boot();
boot_device = davinci_boot_device();
debug("boot device - %d\n", boot_device);
switch (boot_device) {
+#ifdef CONFIG_SPL_NAND_SUPPORT
case BOOT_DEVICE_NAND:
puts("Booting from nand flash ...\n");
spl_nand_load_image();
break;
+#endif +#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
case BOOT_DEVICE_SPI_FLASH:
puts("Booting from spi flash ...\n");
spl_spi_flash_load_image();
break;
#endif +#ifdef CONFIG_SPL_YMODEM_SUPPORT
case BOOT_DEVICE_UART:
puts("Booting from uart ...\n");
spl_ymodem_load_image();
break;
+#endif +#ifdef CONFIG_SPL_MMC_SUPPORT
case BOOT_DEVICE_MMC:
puts("Booting from mmc/sd card...\n");
spl_mmc_load_image();
break;
+#endif
default:
printf("SPL: Un-supported Boot Device - %d!!!\n",
boot_device);
hang();
break;
}
puts("Jump to U-Boot image...\n");
uboot = (void *) CONFIG_SYS_TEXT_BASE;
(*uboot)();
} diff --git a/arch/arm/cpu/arm926ejs/davinci/spl_mmc.c b/arch/arm/cpu/arm926ejs/davinci/spl_mmc.c new file mode 100644 index 0000000..520ecd1 --- /dev/null +++ b/arch/arm/cpu/arm926ejs/davinci/spl_mmc.c @@ -0,0 +1,37 @@ +#include <common.h> +#include <asm/u-boot.h> +#include <asm/utils.h> +#include <mmc.h> +#include <asm/arch/sdmmc_defs.h>
+DECLARE_GLOBAL_DATA_PTR;
+void spl_mmc_load_image(void) +{
int ret;
struct mmc *mmc;
mmc_initialize(gd->bd);
/* We register only one device. So, the dev id is always 0 */
mmc = find_mmc_device(0);
if (!mmc) {
puts("spl: mmc device not found!!\n");
hang();
}
ret = mmc_init(mmc);
if (ret) {
printf("spl: mmc init failed: err - %d\n", ret);
hang();
}
ret = mmc->block_dev.block_read(0,
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR,
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS,
(void *) CONFIG_SYS_TEXT_BASE);
if (ret < 0) {
printf("spl: mmc blk read err - %d\n", ret);
hang();
}
debug("Loaded %d sectors from SD/MMC card\n",
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS); +} diff --git a/arch/arm/cpu/arm926ejs/davinci/spl_nand.c b/arch/arm/cpu/arm926ejs/davinci/spl_nand.c new file mode 100644 index 0000000..bad1e8f --- /dev/null +++ b/arch/arm/cpu/arm926ejs/davinci/spl_nand.c @@ -0,0 +1,11 @@ +#include <common.h> +#include <nand.h>
+void spl_nand_load_image(void) +{
nand_init();
nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
CONFIG_SYS_NAND_U_BOOT_SIZE,
(void *) CONFIG_SYS_TEXT_BASE);
debug("Loaded %d bytes from NAND flash\n",
CONFIG_SYS_NAND_U_BOOT_SIZE);
Why not use the code from drivers/mtd/nand/nand_spl_load.c?
+}
diff --git a/arch/arm/cpu/arm926ejs/davinci/spl_spi_flash.c b/arch/arm/cpu/arm926ejs/davinci/spl_spi_flash.c new file mode 100644 index 0000000..2d5b045 --- /dev/null +++ b/arch/arm/cpu/arm926ejs/davinci/spl_spi_flash.c @@ -0,0 +1,25 @@ +#include <common.h> +#include <spi_flash.h>
+void spl_spi_flash_load_image(void) +{
int ret;
struct spi_flash *flash;
flash = spi_flash_probe(CONFIG_SPL_SPI_BUS, CONFIG_SPL_SPI_CS,
CONFIG_SF_DEFAULT_SPEED, SPI_MODE_3);
if (!flash) {
puts("spl: spi flash probe failed.\n");
hang();
}
ret = spi_flash_read(flash, CONFIG_SYS_SPI_U_BOOT_OFFS,
CONFIG_SYS_SPI_U_BOOT_SIZE,
(void *) CONFIG_SYS_TEXT_BASE);
This duplicates the code in drivers/mtd/spi/spi_spl_load.c.
if (ret < 0) {
printf("spl: spi flash read err - %d\n", ret);
hang();
}
debug("Loaded %d bytes from SPI flash\n",
CONFIG_SYS_SPI_U_BOOT_SIZE); +} diff --git a/arch/arm/cpu/arm926ejs/davinci/spl_ymodem.c b/arch/arm/cpu/arm926ejs/davinci/spl_ymodem.c new file mode 100644 index 0000000..be6786b --- /dev/null +++ b/arch/arm/cpu/arm926ejs/davinci/spl_ymodem.c @@ -0,0 +1,41 @@ +#include <common.h> +#include <xyzModem.h> +#include <asm/u-boot.h> +#include <asm/utils.h>
+#define BUF_SIZE 1024
+static int getcymodem(void) {
if (tstc())
return (getc());
return -1;
+}
+void spl_ymodem_load_image(void) +{
int size;
int err;
int res;
connection_info_t info;
ulong store_addr = ~0;
size = 0;
info.mode = xyzModem_ymodem;
res = xyzModem_stream_open (&info, &err);
if (!res) {
store_addr = CONFIG_SYS_TEXT_BASE;
while ((res =
xyzModem_stream_read ((char*)store_addr, 1024,
&err)) > 0) {
store_addr += res;
size += res;
}
} else {
printf("spl: ymodem err - %s\n", xyzModem_error(err));
hang();
}
xyzModem_stream_close (&err);
xyzModem_stream_terminate (false, &getcymodem);
debug("Loaded %d bytes from UART\n", size);
+} diff --git a/arch/arm/include/asm/arch-davinci/davinci_boot.h b/arch/arm/include/asm/arch-davinci/davinci_boot.h new file mode 100644 index 0000000..5d553ee --- /dev/null +++ b/arch/arm/include/asm/arch-davinci/davinci_boot.h @@ -0,0 +1,25 @@ +#ifndef _DAVINCI_BOOT_H_ +#define _DAVINCI_BOOT_H_
+/* Boot device */ +#define BOOT_DEVICE_NONE 0 +#define BOOT_DEVICE_NAND 1 +#define BOOT_DEVICE_SPI_FLASH 2 +#define BOOT_DEVICE_UART 3 +#define BOOT_DEVICE_MMC 4
+u32 davinci_boot_device(void);
+/* NAND SPL functions */ +void spl_nand_load_image(void);
+/* SPI FLASH SPL functions */ +void spl_spi_flash_load_image(void);
+/* YMODEM SPL functions */ +void spl_ymodem_load_image(void);
+/* MMC SPL functions */ +void spl_mmc_load_image(void);
+#endif /* _DAVINCI_BOOT_H_ */ diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h index 71faf1c..58dde89 100644 --- a/include/configs/cam_enc_4xx.h +++ b/include/configs/cam_enc_4xx.h @@ -219,18 +219,18 @@
/* Defines for SPL */ #define CONFIG_SPL +#define CONFIG_SPL_LDSCRIPT "$(BOARDDIR)/u-boot-spl.lds" +#define CONFIG_SPL_STACK (0x00010000 + 0x7f00) +#define CONFIG_SPL_TEXT_BASE 0x00000020 /*CONFIG_SYS_SRAM_START*/ +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_LEN) +#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN +#define CONFIG_SPL_MAX_SIZE 12320 #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_NAND_SUPPORT #define CONFIG_SPL_NAND_SIMPLE -#define CONFIG_SPL_NAND_LOAD #define CONFIG_SYS_NAND_HW_ECC_OOBFIRST #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_POST_MEM_SUPPORT -#define CONFIG_SPL_LDSCRIPT "$(BOARDDIR)/u-boot-spl.lds" -#define CONFIG_SPL_STACK (0x00010000 + 0x7f00)
-#define CONFIG_SPL_TEXT_BASE 0x00000020 /*CONFIG_SYS_SRAM_START*/ -#define CONFIG_SPL_MAX_SIZE 12320
#ifndef CONFIG_SPL_BUILD #define CONFIG_SYS_TEXT_BASE 0x81080000 diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 989472b..e027fe7 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -315,20 +315,23 @@
/* defines for SPL */ #define CONFIG_SPL +#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-da850evm.lds" +#define CONFIG_SPL_STACK 0x8001ff00 +#define CONFIG_SPL_TEXT_BASE 0x80000000 +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_LEN) +#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN +#define CONFIG_SPL_MAX_SIZE 32768 +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_FLASH_SUPPORT -#define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 -#define CONFIG_SPL_SERIAL_SUPPORT -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-da850evm.lds" -#define CONFIG_SPL_STACK 0x8001ff00 -#define CONFIG_SPL_TEXT_BASE 0x80000000 -#define CONFIG_SPL_MAX_SIZE 32768 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x30000 +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_YMODEM_SUPPORT
/* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000 diff --git a/include/configs/hawkboard.h b/include/configs/hawkboard.h index 6d2d4fb..a3b8d5d 100644 --- a/include/configs/hawkboard.h +++ b/include/configs/hawkboard.h @@ -59,14 +59,15 @@
/* Spl */ #define CONFIG_SPL -#define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_SIMPLE -#define CONFIG_SPL_NAND_LOAD -#define CONFIG_SPL_LIBGENERIC_SUPPORT /* for udelay and __div64_32 for NAND */ -#define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-hawk.lds" #define CONFIG_SPL_TEXT_BASE 0xc1080000 #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_LEN) +#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN +#define CONFIG_SPL_LIBGENERIC_SUPPORT /* for udelay and __div64_32 for NAND */ +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SPL_SERIAL_SUPPORT
/*
- Memory Info
-- 1.7.10
Regards, Christian
U-Boot mailing list U-Boot@lists.denx.de javascript:; http://lists.denx.de/mailman/listinfo/u-boot

we have a board with 128 Kb spi flash, so normal u-boot.ais does not fit on it.
Signed-off-by: Mikhail Kshevetskiy mikhail.kshevetskiy@gmail.com --- Makefile | 14 ++++++++++++++ arch/arm/cpu/arm926ejs/davinci/spl.c | 6 ++++++ arch/arm/cpu/arm926ejs/davinci/spl_mmc.c | 9 +++++++-- arch/arm/cpu/arm926ejs/davinci/spl_nand.c | 9 +++++++-- arch/arm/cpu/arm926ejs/davinci/spl_spi_flash.c | 7 ++++++- arch/arm/cpu/arm926ejs/davinci/spl_ymodem.c | 4 ++++ lib/Makefile | 2 ++ spl/Makefile | 1 + 8 files changed, 47 insertions(+), 5 deletions(-)
diff --git a/Makefile b/Makefile index 0197239..1cd6f03 100644 --- a/Makefile +++ b/Makefile @@ -452,6 +452,20 @@ $(obj)u-boot.ais: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin $(obj)u-boot.ais rm $(obj)spl/u-boot-spl{,-pad}.ais
+$(obj)u-boot-gzip.ais: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin + $(obj)tools/mkimage -s -n /dev/null -T aisimage \ + -e $(CONFIG_SPL_TEXT_BASE) \ + -d $(obj)spl/u-boot-spl.bin \ + $(obj)spl/u-boot-spl.ais + $(OBJCOPY) ${OBJCFLAGS} -I binary \ + --pad-to=$(CONFIG_SPL_MAX_SIZE) -O binary \ + $(obj)spl/u-boot-spl.ais $(obj)spl/u-boot-spl-pad.ais + cp $(obj)u-boot.bin $(obj)spl/u-boot.bin + gzip $(obj)spl/u-boot.bin + cat $(obj)spl/u-boot-spl-pad.ais $(obj)spl/u-boot.bin.gz > \ + $(obj)u-boot-gzip.ais + rm $(obj)spl/u-boot-spl{,-pad}.ais $(obj)spl/u-boot.bin.gz + $(obj)u-boot.sb: $(obj)u-boot.bin $(obj)spl/u-boot-spl.bin elftosb -zdf imx28 -c $(TOPDIR)/board/$(BOARDDIR)/u-boot.bd \ -o $(obj)u-boot.sb diff --git a/arch/arm/cpu/arm926ejs/davinci/spl.c b/arch/arm/cpu/arm926ejs/davinci/spl.c index a8c318c..f6ddea3 100644 --- a/arch/arm/cpu/arm926ejs/davinci/spl.c +++ b/arch/arm/cpu/arm926ejs/davinci/spl.c @@ -111,6 +111,7 @@ u32 davinci_boot_device(void){
void board_init_r(gd_t *id, ulong dummy) { + int size; u32 boot_device; void (*uboot)(void) __noreturn;
@@ -159,6 +160,11 @@ void board_init_r(gd_t *id, ulong dummy) break; }
+#ifdef CONFIG_SPL_GUNZIP_SUPPORT + size = CONFIG_SPL_GUNZIP_MAX_SIZE; + gunzip((void*)CONFIG_SYS_TEXT_BASE, 512 * 1024, (void*)CONFIG_SPL_GUNZIP_LOAD_ADDR, &size); +#endif + puts("Jump to U-Boot image...\n"); uboot = (void *) CONFIG_SYS_TEXT_BASE; (*uboot)(); diff --git a/arch/arm/cpu/arm926ejs/davinci/spl_mmc.c b/arch/arm/cpu/arm926ejs/davinci/spl_mmc.c index 520ecd1..ce8b57b 100644 --- a/arch/arm/cpu/arm926ejs/davinci/spl_mmc.c +++ b/arch/arm/cpu/arm926ejs/davinci/spl_mmc.c @@ -26,8 +26,13 @@ void spl_mmc_load_image(void) }
ret = mmc->block_dev.block_read(0, CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, - CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS, - (void *) CONFIG_SYS_TEXT_BASE); + CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS, +#ifndef CONFIG_SPL_GUNZIP_SUPPORT + (void *) CONFIG_SYS_TEXT_BASE +#else + (void *) CONFIG_SPL_GUNZIP_LOAD_ADDR +#endif + ); if (ret < 0) { printf("spl: mmc blk read err - %d\n", ret); hang(); diff --git a/arch/arm/cpu/arm926ejs/davinci/spl_nand.c b/arch/arm/cpu/arm926ejs/davinci/spl_nand.c index bad1e8f..da5358c 100644 --- a/arch/arm/cpu/arm926ejs/davinci/spl_nand.c +++ b/arch/arm/cpu/arm926ejs/davinci/spl_nand.c @@ -5,7 +5,12 @@ void spl_nand_load_image(void) { nand_init(); nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS, - CONFIG_SYS_NAND_U_BOOT_SIZE, - (void *) CONFIG_SYS_TEXT_BASE); + CONFIG_SYS_NAND_U_BOOT_SIZE, +#ifndef CONFIG_SPL_GUNZIP_SUPPORT + (void *) CONFIG_SYS_TEXT_BASE +#else + (void *) CONFIG_SPL_GUNZIP_LOAD_ADDR +#endif + ); debug("Loaded %d bytes from NAND flash\n", CONFIG_SYS_NAND_U_BOOT_SIZE); } diff --git a/arch/arm/cpu/arm926ejs/davinci/spl_spi_flash.c b/arch/arm/cpu/arm926ejs/davinci/spl_spi_flash.c index 2d5b045..710429f 100644 --- a/arch/arm/cpu/arm926ejs/davinci/spl_spi_flash.c +++ b/arch/arm/cpu/arm926ejs/davinci/spl_spi_flash.c @@ -15,7 +15,12 @@ void spl_spi_flash_load_image(void)
ret = spi_flash_read(flash, CONFIG_SYS_SPI_U_BOOT_OFFS, CONFIG_SYS_SPI_U_BOOT_SIZE, - (void *) CONFIG_SYS_TEXT_BASE); +#ifndef CONFIG_SPL_GUNZIP_SUPPORT + (void *) CONFIG_SYS_TEXT_BASE +#else + (void *) CONFIG_SPL_GUNZIP_LOAD_ADDR +#endif + ); if (ret < 0) { printf("spl: spi flash read err - %d\n", ret); hang(); diff --git a/arch/arm/cpu/arm926ejs/davinci/spl_ymodem.c b/arch/arm/cpu/arm926ejs/davinci/spl_ymodem.c index be6786b..0844ff4 100644 --- a/arch/arm/cpu/arm926ejs/davinci/spl_ymodem.c +++ b/arch/arm/cpu/arm926ejs/davinci/spl_ymodem.c @@ -23,7 +23,11 @@ void spl_ymodem_load_image(void) info.mode = xyzModem_ymodem; res = xyzModem_stream_open (&info, &err); if (!res) { +#ifndef CONFIG_SPL_GUNZIP_SUPPORT store_addr = CONFIG_SYS_TEXT_BASE; +#else + store_addr = CONFIG_SPL_GUNZIP_LOAD_ADDR; +#endif while ((res = xyzModem_stream_read ((char*)store_addr, 1024, &err)) > 0) { store_addr += res; diff --git a/lib/Makefile b/lib/Makefile index 1e8478f..3acffd9 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -59,6 +59,8 @@ endif
ifdef CONFIG_SPL_BUILD COBJS-$(CONFIG_SPL_YMODEM_SUPPORT) += crc16.o +COBJS-$(CONFIG_SPL_GUNZIP_SUPPORT) += crc32.o +COBJS-$(CONFIG_SPL_GUNZIP_SUPPORT) += gunzip.o endif COBJS-y += ctype.o COBJS-y += div64.o diff --git a/spl/Makefile b/spl/Makefile index ea7d475..d11d8b2 100644 --- a/spl/Makefile +++ b/spl/Makefile @@ -52,6 +52,7 @@ LIBS-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += drivers/mtd/spi/libspi_flash.o LIBS-$(CONFIG_SPL_SPI_SUPPORT) += drivers/spi/libspi.o LIBS-$(CONFIG_SPL_FAT_SUPPORT) += fs/fat/libfat.o LIBS-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/libgeneric.o +LIBS-$(CONFIG_SPL_GUNZIP_SUPPORT) += lib/zlib/libz.o LIBS-$(CONFIG_SPL_POWER_SUPPORT) += drivers/power/libpower.o LIBS-$(CONFIG_SPL_NAND_SUPPORT) += drivers/mtd/nand/libnand.o LIBS-$(CONFIG_SPL_ONENAND_SUPPORT) += drivers/mtd/onenand/libonenand.o

Hi Mikhail,
On Tue, Jun 12, 2012 at 11:15 PM, Mikhail Kshevetskiy mikhail.kshevetskiy@gmail.com wrote:
follow section 15.2.13.1 (Initializing Following Device Power Up or Reset) of OMAP-L138 DSP+ARM Processor Technical Reference Manual
Thanks for fixing this! Just out of curiosity: Did you hit any problem or were you just comparing the code with the reference manual?
Signed-off-by: Mikhail Kshevetskiy mikhail.kshevetskiy@gmail.com
arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c | 25 ++++++++++++++++------- arch/arm/include/asm/arch-davinci/hardware.h | 1 + 2 files changed, 19 insertions(+), 7 deletions(-)
Acked-by: Christian Riesch christian.riesch@omicron.at
For the calimain board
Tested-by: Christian Riesch christian.riesch@omicron.at
Regards, Christian

On Thu, 21 Jun 2012 09:37:09 +0200 Christian Riesch christian.riesch@omicron.at wrote:
Hi Mikhail,
On Tue, Jun 12, 2012 at 11:15 PM, Mikhail Kshevetskiy mikhail.kshevetskiy@gmail.com wrote:
follow section 15.2.13.1 (Initializing Following Device Power Up or Reset) of OMAP-L138 DSP+ARM Processor Technical Reference Manual
Thanks for fixing this! Just out of curiosity: Did you hit any problem or were you just comparing the code with the reference manual?
Hard to say, I faced with memory initialization problem (caused by hardware bug). Before I hit a real problem, I study omap documentation and find disagreements with the code. So i just fix it.
Signed-off-by: Mikhail Kshevetskiy mikhail.kshevetskiy@gmail.com
arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c | 25 ++++++++++++++++------- arch/arm/include/asm/arch-davinci/hardware.h | 1 + 2 files changed, 19 insertions(+), 7 deletions(-)
Acked-by: Christian Riesch christian.riesch@omicron.at
For the calimain board
Tested-by: Christian Riesch christian.riesch@omicron.at
Regards, Christian

Hi Mikhail,
On Tue, Jun 12, 2012 at 11:15 PM, Mikhail Kshevetskiy mikhail.kshevetskiy@gmail.com wrote:
follow section 15.2.13.1 (Initializing Following Device Power Up or Reset) of OMAP-L138 DSP+ARM Processor Technical Reference Manual
Signed-off-by: Mikhail Kshevetskiy mikhail.kshevetskiy@gmail.com
Your patch causes a few checkpatch warnings, see below.
arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c | 25 ++++++++++++++++------- arch/arm/include/asm/arch-davinci/hardware.h | 1 + 2 files changed, 19 insertions(+), 7 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c b/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c index df7d6a2..9682407 100644 --- a/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c +++ b/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c @@ -190,13 +190,21 @@ int da850_ddr_setup(void)
setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_LOCK); setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_POWERDWN);
- setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_IOPWRDWN);
}
- setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_IOPWRDWN);
writel(CONFIG_SYS_DA850_DDR2_DDRPHYCR, &dv_ddr2_regs_ctrl->ddrphycr);
- clrbits_le32(&davinci_syscfg1_regs->ddr_slew,
- (1 << DDR_SLEW_CMOSEN_BIT));
- if (CONFIG_SYS_DA850_DDR2_SDBCR & (1 << DV_DDR_SDCR_DDR2EN_SHIFT)){
missing whitespace before {
- /* DDR2 */
- clrbits_le32(&davinci_syscfg1_regs->ddr_slew,
- (1 << DDR_SLEW_DDR_PDENA_BIT) |
- (1 << DDR_SLEW_CMOSEN_BIT));
- }else{
missing whitespaces before and after "else".
- /* MOBILE DDR */
- setbits_le32(&davinci_syscfg1_regs->ddr_slew,
- (1 << DDR_SLEW_DDR_PDENA_BIT) |
- (1 << DDR_SLEW_CMOSEN_BIT));
- }
/* * SDRAM Configuration Register (SDCR): @@ -216,7 +224,10 @@ int da850_ddr_setup(void) writel(tmp, &dv_ddr2_regs_ctrl->sdbcr);
/* write memory configuration and timing */
- writel(CONFIG_SYS_DA850_DDR2_SDBCR2, &dv_ddr2_regs_ctrl->sdbcr2);
- if (!(CONFIG_SYS_DA850_DDR2_SDBCR & (1 << DV_DDR_SDCR_DDR2EN_SHIFT))){
missing whitespace before {
Please fix these warnings and resubmit. Thank you! Regards, Christian
- /* MOBILE DDR only*/
- writel(CONFIG_SYS_DA850_DDR2_SDBCR2, &dv_ddr2_regs_ctrl->sdbcr2);
- }
writel(CONFIG_SYS_DA850_DDR2_SDTIMR, &dv_ddr2_regs_ctrl->sdtimr); writel(CONFIG_SYS_DA850_DDR2_SDTIMR2, &dv_ddr2_regs_ctrl->sdtimr2);
@@ -240,7 +251,7 @@ int da850_ddr_setup(void)
/* disable self refresh */ clrbits_le32(&dv_ddr2_regs_ctrl->sdrcr,
- DV_DDR_SDRCR_LPMODEN | DV_DDR_SDRCR_LPMODEN);
- DV_DDR_SDRCR_LPMODEN | DV_DDR_SDRCR_MCLKSTOPEN);
writel(CONFIG_SYS_DA850_DDR2_PBBPR, &dv_ddr2_regs_ctrl->pbbpr);
return 0; diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index b145c6e..56e5743 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -505,6 +505,7 @@ struct davinci_syscfg1_regs { ((struct davinci_syscfg1_regs *)DAVINCI_SYSCFG1_BASE)
#define DDR_SLEW_CMOSEN_BIT 4 +#define DDR_SLEW_DDR_PDENA_BIT 5
#define VTP_POWERDWN (1 << 6) #define VTP_LOCK (1 << 7) -- 1.7.10
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Mikhail Kshevetskiy