Xilinx ZynqMP - ZCU102: SPL not able to use MMC/SD card
Hi!
I am trying to switch to as much current vanilla SW as possible on Xilinx ZCU102 evaluation board. But I am stuck at a very early stage.
I've got U-Boot + SPL + Linux kernel & userspace compilled, but even after trying hard I had no success in running SPL to read ATF, not even speaking about the main U-Boot.
I keep getting (debug info included):
U-Boot SPL 2022.01-rc1 (Nov 09 2021 - 13:57:10 +0100) PMUFW: v1.1 Loading new PMUFW cfg obj (2024 bytes) Silicon version: 3 EL Level: EL3 Multiboot: 0 Trying to boot from MMC2 spl: could not initialize mmc. error: -19 Trying to boot from MMC1 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-legacy = 0 0 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-mmc-hs = 63 72 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-sd-hs = 63 60 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-uhs-sdr12 = 0 0 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-uhs-sdr25 = 63 60 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-uhs-sdr50 = 0 72 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-uhs-sdr104 = 0 135 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-uhs-ddr50 = 183 48 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-mmc-ddr52 = 54 72 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-mmc-hs200 = 0 135 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-mmc-hs400 = 0 0 arasan_sdhci mmc@ff170000: arasan_sdhci_set_tapdelay, host:mmc@ff170000, mode:0 CMD_SEND:0 ARG 0x00000000 MMC_RSP_NONE CMD_SEND:8 ARG 0x000001aa RET -110 CMD_SEND:55 ARG 0x00000000 RET -110 CMD_SEND:0 ARG 0x00000000 MMC_RSP_NONE CMD_SEND:1 ARG 0x00000000 RET -110 Card did not respond to voltage select! : -110 mmc_init: -95, time 22 spl: mmc init failed with error: -95 SPL: Unsupported Boot Device 0 SPL: failed to boot from all boot devices (err=-6) ### ERROR ### Please RESET the board ###
The base address is AFAIK correct and the SPL itself has been successfully loaded from this very SD card. I suppose MMC2 lines to be a kind of necessity.
I tried a few versions of U-Boot, including the last snapshot release (as shown) with exactly the same results. Any ideas?
Thank you!
On Tue, Nov 09, 2021 at 09:21:41PM +0100, Daniel Cizinsky wrote:
Hi!
I am trying to switch to as much current vanilla SW as possible on Xilinx ZCU102 evaluation board. But I am stuck at a very early stage.
I've got U-Boot + SPL + Linux kernel & userspace compilled, but even after trying hard I had no success in running SPL to read ATF, not even speaking about the main U-Boot.
I don't even know whether my e-mail went through to the conference. I just wanted to know, if not being able to use SD card on this board using a vanilla modern U-Boot SPL is a known bug, or if there are any people outthere using it successfully. Probably not, or they are not interested in sharing the simple fact.
With rc3 I'm getting exactly the same errors:
U-Boot SPL 2022.01-rc3 (Nov 29 2021 - 23:50:47 +0100) PMUFW: v1.1 Loading new PMUFW cfg obj (2024 bytes) Silicon version: 3 EL Level: EL3 Multiboot: 0 Trying to boot from MMC2 spl: could not initialize mmc. error: -19 Trying to boot from MMC1 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-legacy = 0 0 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-mmc-hs = 63 72 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-sd-hs = 63 60 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-uhs-sdr12 = 0 0 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-uhs-sdr25 = 63 60 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-uhs-sdr50 = 0 72 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-uhs-sdr104 = 0 135 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-uhs-ddr50 = 183 48 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-mmc-ddr52 = 54 72 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-mmc-hs200 = 0 135 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-mmc-hs400 = 0 0 arasan_sdhci mmc@ff170000: arasan_sdhci_set_tapdelay, host:mmc@ff170000, mode:0 CMD_SEND:0 ARG 0x00000000 MMC_RSP_NONE CMD_SEND:8 ARG 0x000001aa RET -110 CMD_SEND:55 ARG 0x00000000 RET -110 CMD_SEND:0 ARG 0x00000000 MMC_RSP_NONE CMD_SEND:1 ARG 0x00000000 RET -110 Card did not respond to voltage select! : -110 mmc_init: -95, time 23 spl: mmc init failed with error: -95 SPL: Unsupported Boot Device 0 SPL: failed to boot from all boot devices (err=-6) ### ERROR ### Please RESET the board ###
On Mon, Nov 29, 2021 at 4:01 PM Daniel Cizinsky listy@gebbeth.cz wrote:
On Tue, Nov 09, 2021 at 09:21:41PM +0100, Daniel Cizinsky wrote:
Hi!
I am trying to switch to as much current vanilla SW as possible on Xilinx ZCU102 evaluation board. But I am stuck at a very early stage.
I've got U-Boot + SPL + Linux kernel & userspace compilled, but even after trying hard I had no success in running SPL to read ATF, not even speaking about the main U-Boot.
I don't even know whether my e-mail went through to the conference. I just wanted to know, if not being able to use SD card on this board using a vanilla modern U-Boot SPL is a known bug, or if there are any people outthere using it successfully. Probably not, or they are not interested in sharing the simple fact.
Your messages seem to have gone to the mailing list fine. Just so you see someone reply, here's a response, though it may not be particularly helpful. It's kind of like "how do I do X" and someone answers "have you tried Y"?
I have a ZCU102 eval board. I am not using mainline U-Boot, though, and instead use Xilinx's version of U-Boot.
repo: git://github.com/xilinx/u-boot-xlnx.git version: xilinx-v2020.2 defconfig: xilinx_zynqmp_virt
I do modify the config to have CONFIG_OF_LIST="zynqmp-zcu102-rev1.0".
SD boot with that works fine for me. I understand the appeal of being on mainline if possible, but consider trying Xilinx's tree to help your debugging (if you still have SD issues with that, then perhaps it is a hardware problem with your board?).
With rc3 I'm getting exactly the same errors:
U-Boot SPL 2022.01-rc3 (Nov 29 2021 - 23:50:47 +0100) PMUFW: v1.1 Loading new PMUFW cfg obj (2024 bytes) Silicon version: 3 EL Level: EL3 Multiboot: 0 Trying to boot from MMC2 spl: could not initialize mmc. error: -19 Trying to boot from MMC1
My own boot output is very similar up to this point, but then I get:
spl_load_image_fat_os: error reading image u-boot.bin, err - -2 [some ATF prints] U-Boot 2020.01 (Nov 24 2021 - 19:05:46 -0700)
and full U-Boot is loaded at that point (it ends up loading u-boot.itb off the SD card, which contains the ATF, full U-Boot, and the device tree for U-Boot, if I recall correctly)
[snip]
Best of luck, Joel
Hi,
On 11/30/21 00:01, Daniel Cizinsky wrote:
On Tue, Nov 09, 2021 at 09:21:41PM +0100, Daniel Cizinsky wrote:
Hi!
I am trying to switch to as much current vanilla SW as possible on Xilinx ZCU102 evaluation board. But I am stuck at a very early stage.
I've got U-Boot + SPL + Linux kernel & userspace compilled, but even after trying hard I had no success in running SPL to read ATF, not even speaking about the main U-Boot.
I don't even know whether my e-mail went through to the conference. I just wanted to know, if not being able to use SD card on this board using a vanilla modern U-Boot SPL is a known bug, or if there are any people outthere using it successfully. Probably not, or they are not interested in sharing the simple fact.
With rc3 I'm getting exactly the same errors:
U-Boot SPL 2022.01-rc3 (Nov 29 2021 - 23:50:47 +0100) PMUFW: v1.1 Loading new PMUFW cfg obj (2024 bytes) Silicon version: 3 EL Level: EL3 Multiboot: 0 Trying to boot from MMC2 spl: could not initialize mmc. error: -19 Trying to boot from MMC1 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-legacy = 0 0 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-mmc-hs = 63 72 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-sd-hs = 63 60 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-uhs-sdr12 = 0 0 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-uhs-sdr25 = 63 60 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-uhs-sdr50 = 0 72 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-uhs-sdr104 = 0 135 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-uhs-ddr50 = 183 48 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-mmc-ddr52 = 54 72 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-mmc-hs200 = 0 135 arasan_sdhci mmc@ff170000: Using predefined clock phase for clk-phase-mmc-hs400 = 0 0 arasan_sdhci mmc@ff170000: arasan_sdhci_set_tapdelay, host:mmc@ff170000, mode:0 CMD_SEND:0 ARG 0x00000000 MMC_RSP_NONE CMD_SEND:8 ARG 0x000001aa RET -110 CMD_SEND:55 ARG 0x00000000 RET -110 CMD_SEND:0 ARG 0x00000000 MMC_RSP_NONE CMD_SEND:1 ARG 0x00000000 RET -110 Card did not respond to voltage select! : -110 mmc_init: -95, time 23 spl: mmc init failed with error: -95 SPL: Unsupported Boot Device 0 SPL: failed to boot from all boot devices (err=-6) ### ERROR ### Please RESET the board ###
I did try latest yesterday and didn't see any issue. How do you build u-boot? And what board version do you have?
Log below.
Thanks, Michal
U-Boot SPL 2022.01-rc2-00097-g657a869c04e9 (Nov 29 2021 - 14:15:08 +0100) PMUFW: v1.1 Loading new PMUFW cfg obj (2032 bytes) Silicon version: 3 EL Level: EL3 Chip ID: zu9eg Multiboot: 0 Trying to boot from MMC2 spl: could not initialize mmc. error: -19 Trying to boot from MMC1 spl_load_image_fat_os: error reading image u-boot.bin, err - -2 NOTICE: BL31: Secure code at 0x7e000000 NOTICE: BL31: Non secure code at 0x8000000 NOTICE: BL31: v2.4(release):v2.4-594-g82a773bd39b4 NOTICE: BL31: Built : 07:54:47, Oct 20 2021
U-Boot 2022.01-rc2-00097-g657a869c04e9 (Nov 29 2021 - 14:15:08 +0100)
CPU: ZynqMP Silicon: v3 Model: ZynqMP ZCU102 Rev1.0 Board: Xilinx ZynqMP DRAM: 4 GiB PMUFW: v1.1 Xilinx I2C Legacy format at nvmem0: Board name: zcu102 Board rev: 1.0 Board SN: 847316301727-67998 Ethernet mac: 00:0a:35:03:70:f6 EL Level: EL2 Chip ID: zu9eg NAND: 0 MiB MMC: mmc@ff170000: 0 Loading Environment from FAT... *** Error - No Valid Environment Area found *** Warning - bad env area, using default environment
In: serial Out: serial Err: serial Bootmode: LVL_SHFT_SD_MODE1 Reset reason: SRST Net: ZYNQ GEM: ff0e0000, mdio bus ff0e0000, phyaddr 12, interface rgmii-id eth0: ethernet@ff0e0000 scanning bus for devices... SATA link 0 timeout. SATA link 1 timeout. AHCI 0001.0301 32 slots 2 ports 6 Gbps 0x3 impl SATA mode flags: 64bit ncq pm clo only pmp fbss pio slum part ccc apst starting USB... Bus dwc3@fe200000: Register 2000440 NbrPorts 2 Starting the controller USB XHCI 1.00 scanning bus dwc3@fe200000 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 0 ZynqMP>
On Tue, Nov 30, 2021 at 08:28:51AM +0100, Michal Simek wrote:
I did try latest yesterday and didn't see any issue.
Hi!
Thank you very much to both of you for letting me know!
How do you build u-boot?
I use Buildroot with some simple scripts (just to make sure we begin with a clean table and known .configs).
And what board version do you have?
It says on PCB: HW-Z1-ZCU102 Revision 1.1
Older U-Boot, which gets past MMC says: ATF running on XCZU9EG/silicon v4/RTL5.1
I guess it's pretty common one, the only difference to original set is DDR as we like to have all the boards exactly the same (and some set came with one kind of RAM and other with another, so we decided to have the third kind, but the same for all boards in our company).
I'll try to attach the config file of U-Boot I build. If attaching files is not possible, it's available at: http://gebbeth.cz/pub/xilinx/u-boot.config
Thanks for any comment!
On 12/1/21 00:10, Daniel Cizinsky wrote:
On Tue, Nov 30, 2021 at 08:28:51AM +0100, Michal Simek wrote:
I did try latest yesterday and didn't see any issue.
Hi!
Thank you very much to both of you for letting me know!
How do you build u-boot?
I use Buildroot with some simple scripts (just to make sure we begin with a clean table and known .configs).
And what board version do you have?
It says on PCB: HW-Z1-ZCU102 Revision 1.1
Older U-Boot, which gets past MMC says: ATF running on XCZU9EG/silicon v4/RTL5.1
I guess it's pretty common one, the only difference to original set is DDR as we like to have all the boards exactly the same (and some set came with one kind of RAM and other with another, so we decided to have the third kind, but the same for all boards in our company).
I'll try to attach the config file of U-Boot I build. If attaching files is not possible, it's available at: http://gebbeth.cz/pub/xilinx/u-boot.config
Thanks for any comment!
buildroot config is quite different compare to one which is in the tree. I don't think anybody really keeps that configs there up2date. And there is really no reason not to build it in direct way.
Just follow documentation present doc/board/xilinx/zynqmp.rst and in your case run export DEVICE_TREE=zynqmp-zcu102-rev1.1
Thanks, Michal
On Wed, Dec 01, 2021 at 08:36:12AM +0100, Michal Simek wrote:
buildroot config is quite different compare to one which is in the tree. I don't think anybody really keeps that configs there up2date. And there is really no reason not to build it in direct way.
Just follow documentation present doc/board/xilinx/zynqmp.rst and in your case run export DEVICE_TREE=zynqmp-zcu102-rev1.1
Thank you, Michal!
I have already tried that way. But problems with cross compilation were too many, that I have simply taken the config out of the native tree you described and used it in Buildroot tree. I am not using Buildroot shipped defaultconfig at all.
I tried once again the sole u-boot build, but it is failing to link tools/dumpimage and I guess it will go ahead failing on and on if I happen to fix this one. That's the place I were at about a month ago...
On 12/1/21 09:40, Daniel Cizinsky wrote:
On Wed, Dec 01, 2021 at 08:36:12AM +0100, Michal Simek wrote:
buildroot config is quite different compare to one which is in the tree. I don't think anybody really keeps that configs there up2date. And there is really no reason not to build it in direct way.
Just follow documentation present doc/board/xilinx/zynqmp.rst and in your case run export DEVICE_TREE=zynqmp-zcu102-rev1.1
Thank you, Michal!
I have already tried that way. But problems with cross compilation were too many, that I have simply taken the config out of the native tree you described and used it in Buildroot tree. I am not using Buildroot shipped defaultconfig at all.
What kind of issues?
I tried once again the sole u-boot build, but it is failing to link tools/dumpimage and I guess it will go ahead failing on and on if I happen to fix this one. That's the place I were at about a month ago...
CI look is using toolchain which you can also get through this. ./tools/buildman/buildman --fetch-arch...
I am using Xilinx toolchain from Vivado/Vitis. But other toolchain should be fine too.
Thanks, Michal
participants (4)
-
Daniel Cizinsky -
Joel Carlson -
Michal Simek -
Michal Simek