[U-Boot] [RESEND-2 PATCH 0/4] sunxi: Enable EMAC on A83T boards using Realtek RTL8211E PHY
From: Chen-Yu Tsai wens@csie.org
(Resending yet again with correct email address now subscribed and with proper cover letter subject. Sorry for the noise.)
Hi everyone,
This series enables EMAC (Ethernet controller) on two A83T boards, the Cubietruck Plus and Bananapi M3.
A couple of changes are required to the clock definitions to make the compiler happy, as it hasn't been coverted to use the common CLK and DM_RESET framework. These changes are not used in the A83T code path.
The other two patches enable the sun8i-emac and Realtek PHY driver in their respective defconfigs. The device trees already have the EMAC enabled.
Since these are compile time issues, all patches should go through the same tree.
Regards ChenYu
Chen-Yu Tsai (4): sunxi: Fix compilation of sun8i-emac for A83T net: sun8i-emac: Fix compilation for A83T sunxi: Enable EMAC on the Cubietruck Plus sunxi: Enable EMAC on the Bananapi M3
arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h | 4 ++++ configs/Cubietruck_plus_defconfig | 2 ++ configs/Sinovoip_BPI_M3_defconfig | 2 ++ drivers/net/sun8i_emac.c | 3 +++ 4 files changed, 11 insertions(+)
From: Chen-Yu Tsai wens@csie.org
The A83T has its own clock header file and clock control module structure, unlike H3/A64/R40 which share a common one. As such some of the SoC specific fields or macros are undefined when building U-boot for A83T.
Add dummy entries to the clock control module structure to make the compiler happy. The code path using these fields is unused for A83T in the driver.
Signed-off-by: Chen-Yu Tsai wens@csie.org ---
arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h b/arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h index 14df3cc8f46b..15c1d6fe820a 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h @@ -124,6 +124,10 @@ struct sunxi_ccm_reg { u32 ahb_reset3_cfg; /* 0x2d0 AHB1 Reset 3 config */ u32 reserved32; /* 0x2d4 */ u32 apb2_reset_cfg; /* 0x2d8 BUS Reset 4 config */ + + /* the following exist only to make sun8i-emac happy */ + u32 gmac_clk_cfg; + u32 bus_gate4; };
/* apb2 bit field */
From: Chen-Yu Tsai wens@csie.org
The A83T has its own clock header file and clock control module structure, unlike H3/A64/R40 which share a common one. As such some of the SoC specific fields or macros are undefined when building U-boot for A83T.
Define the AHB_RESET_OFFSET_EPHY macro if it isn't already defined to make the compiler happy. The code path including this macro is unused in the driver for A83T.
Signed-off-by: Chen-Yu Tsai wens@csie.org
--- This patch should go in with the others through the sunxi tree, not independently through the net tree.
drivers/net/sun8i_emac.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index c9798445c7dd..b6b4b1030153 100644 --- a/drivers/net/sun8i_emac.c +++ b/drivers/net/sun8i_emac.c @@ -68,6 +68,9 @@ #define CONFIG_MDIO_TIMEOUT (3 * CONFIG_SYS_HZ)
#define AHB_GATE_OFFSET_EPHY 0 +#ifndef AHB_RESET_OFFSET_EPHY +#define AHB_RESET_OFFSET_EPHY 2 +#endif
/* IO mux settings */ #define SUN8I_IOMUX_H3 2
From: Chen-Yu Tsai wens@csie.org
The Cubietruck Plus has an RTL8211E PHY connected to the EMAC using RGMII. The PHY is powered by DLDO4 @ 3.3V, while the I/O pins are powered by DLDO3 @ 2.5V.
This patch enables the EMAC and Realtek PHY drivers in the defconfig. The device tree file already has the EMAC enabled.
Signed-off-by: Chen-Yu Tsai wens@csie.org ---
configs/Cubietruck_plus_defconfig | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/configs/Cubietruck_plus_defconfig b/configs/Cubietruck_plus_defconfig index 869bffcfca0c..044af12779c6 100644 --- a/configs/Cubietruck_plus_defconfig +++ b/configs/Cubietruck_plus_defconfig @@ -20,6 +20,8 @@ CONFIG_CONSOLE_MUX=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-cubietruck-plus" +CONFIG_PHY_REALTEK=y +CONFIG_SUN8I_EMAC=y CONFIG_AXP_DLDO3_VOLT=2500 CONFIG_AXP_DLDO4_VOLT=3300 CONFIG_AXP_FLDO1_VOLT=1200
From: Chen-Yu Tsai wens@csie.org
The Bananapi M3 has an RTL8211E PHY connected to the EMAC using RGMII. The PHY is powered by DCDC1 through SW @ 3.3V.
This patch enables the EMAC and Realtek PHY drivers in the defconfig. The device tree file already has the EMAC enabled.
Signed-off-by: Chen-Yu Tsai wens@csie.org
---
configs/Sinovoip_BPI_M3_defconfig | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig index 79743a9c9a51..bb2dbb5dd5c2 100644 --- a/configs/Sinovoip_BPI_M3_defconfig +++ b/configs/Sinovoip_BPI_M3_defconfig @@ -21,6 +21,8 @@ CONFIG_CONSOLE_MUX=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-bananapi-m3" +CONFIG_PHY_REALTEK=y +CONFIG_SUN8I_EMAC=y CONFIG_AXP_DCDC5_VOLT=1200 CONFIG_AXP_DLDO3_VOLT=2500 CONFIG_AXP_SW_ON=y
Hi,
On Fri, Apr 12, 2019 at 4:05 PM Chen-Yu Tsai wens@kernel.org wrote:
From: Chen-Yu Tsai wens@csie.org
(Resending yet again with correct email address now subscribed and with proper cover letter subject. Sorry for the noise.)
Hi everyone,
This series enables EMAC (Ethernet controller) on two A83T boards, the Cubietruck Plus and Bananapi M3.
A couple of changes are required to the clock definitions to make the compiler happy, as it hasn't been coverted to use the common CLK and DM_RESET framework. These changes are not used in the A83T code path.
The other two patches enable the sun8i-emac and Realtek PHY driver in their respective defconfigs. The device trees already have the EMAC enabled.
Since these are compile time issues, all patches should go through the same tree.
Regards ChenYu
Chen-Yu Tsai (4): sunxi: Fix compilation of sun8i-emac for A83T net: sun8i-emac: Fix compilation for A83T sunxi: Enable EMAC on the Cubietruck Plus sunxi: Enable EMAC on the Bananapi M3
We have EPHY clock and reset support via respective framework [1] would you rebase these changes on top this.
[1] http://git.denx.de/?p=u-boot-sunxi.git;a=commitdiff;h=6b2ccabee2368d059513a9...
On Wed, Apr 17, 2019 at 4:38 AM Jagan Teki jagan@amarulasolutions.com wrote:
Hi,
On Fri, Apr 12, 2019 at 4:05 PM Chen-Yu Tsai wens@kernel.org wrote:
From: Chen-Yu Tsai wens@csie.org
(Resending yet again with correct email address now subscribed and with proper cover letter subject. Sorry for the noise.)
Hi everyone,
This series enables EMAC (Ethernet controller) on two A83T boards, the Cubietruck Plus and Bananapi M3.
A couple of changes are required to the clock definitions to make the compiler happy, as it hasn't been coverted to use the common CLK and DM_RESET framework. These changes are not used in the A83T code path.
The other two patches enable the sun8i-emac and Realtek PHY driver in their respective defconfigs. The device trees already have the EMAC enabled.
Since these are compile time issues, all patches should go through the same tree.
Regards ChenYu
Chen-Yu Tsai (4): sunxi: Fix compilation of sun8i-emac for A83T net: sun8i-emac: Fix compilation for A83T sunxi: Enable EMAC on the Cubietruck Plus sunxi: Enable EMAC on the Bananapi M3
We have EPHY clock and reset support via respective framework [1] would you rebase these changes on top this.
[1] http://git.denx.de/?p=u-boot-sunxi.git;a=commitdiff;h=6b2ccabee2368d059513a9...
Lovely! I'll throw the clock register bit patches out and rework the other stuff.
Does anyone else have these boards for testing though? I'm away from my boards for the next two weeks (which is past the merge window).
ChenYu
On Thu, Apr 18, 2019 at 8:09 AM Chen-Yu Tsai wens@kernel.org wrote:
On Wed, Apr 17, 2019 at 4:38 AM Jagan Teki jagan@amarulasolutions.com wrote:
Hi,
On Fri, Apr 12, 2019 at 4:05 PM Chen-Yu Tsai wens@kernel.org wrote:
From: Chen-Yu Tsai wens@csie.org
(Resending yet again with correct email address now subscribed and with proper cover letter subject. Sorry for the noise.)
Hi everyone,
This series enables EMAC (Ethernet controller) on two A83T boards, the Cubietruck Plus and Bananapi M3.
A couple of changes are required to the clock definitions to make the compiler happy, as it hasn't been coverted to use the common CLK and DM_RESET framework. These changes are not used in the A83T code path.
The other two patches enable the sun8i-emac and Realtek PHY driver in their respective defconfigs. The device trees already have the EMAC enabled.
Since these are compile time issues, all patches should go through the same tree.
Regards ChenYu
Chen-Yu Tsai (4): sunxi: Fix compilation of sun8i-emac for A83T net: sun8i-emac: Fix compilation for A83T sunxi: Enable EMAC on the Cubietruck Plus sunxi: Enable EMAC on the Bananapi M3
We have EPHY clock and reset support via respective framework [1] would you rebase these changes on top this.
[1] http://git.denx.de/?p=u-boot-sunxi.git;a=commitdiff;h=6b2ccabee2368d059513a9...
Lovely! I'll throw the clock register bit patches out and rework the other stuff.
Does anyone else have these boards for testing though? I'm away from my boards for the next two weeks (which is past the merge window).
Looks like the EPHY clock and resets weren't converted. So it still needs some sort of fix to build. Do you have anything in the works regarding EPHY?
ChenYu
On Thu, Apr 18, 2019 at 9:15 AM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 8:09 AM Chen-Yu Tsai wens@kernel.org wrote:
On Wed, Apr 17, 2019 at 4:38 AM Jagan Teki jagan@amarulasolutions.com wrote:
Hi,
On Fri, Apr 12, 2019 at 4:05 PM Chen-Yu Tsai wens@kernel.org wrote:
From: Chen-Yu Tsai wens@csie.org
(Resending yet again with correct email address now subscribed and with proper cover letter subject. Sorry for the noise.)
Hi everyone,
This series enables EMAC (Ethernet controller) on two A83T boards, the Cubietruck Plus and Bananapi M3.
A couple of changes are required to the clock definitions to make the compiler happy, as it hasn't been coverted to use the common CLK and DM_RESET framework. These changes are not used in the A83T code path.
The other two patches enable the sun8i-emac and Realtek PHY driver in their respective defconfigs. The device trees already have the EMAC enabled.
Since these are compile time issues, all patches should go through the same tree.
Regards ChenYu
Chen-Yu Tsai (4): sunxi: Fix compilation of sun8i-emac for A83T net: sun8i-emac: Fix compilation for A83T sunxi: Enable EMAC on the Cubietruck Plus sunxi: Enable EMAC on the Bananapi M3
We have EPHY clock and reset support via respective framework [1] would you rebase these changes on top this.
[1] http://git.denx.de/?p=u-boot-sunxi.git;a=commitdiff;h=6b2ccabee2368d059513a9...
Lovely! I'll throw the clock register bit patches out and rework the other stuff.
Does anyone else have these boards for testing though? I'm away from my boards for the next two weeks (which is past the merge window).
Looks like the EPHY clock and resets weren't converted. So it still needs some sort of fix to build. Do you have anything in the works regarding EPHY?
Looks like sunxi/next has the answer. And the new defconfigs build cleanly. Would you like to me respin on top with RFT? It doesn't actually matter what branch the defconfig patches are based on since they apply cleanly to either branch.
ChenYu
On Thu, Apr 18, 2019 at 10:00 PM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 9:15 AM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 8:09 AM Chen-Yu Tsai wens@kernel.org wrote:
On Wed, Apr 17, 2019 at 4:38 AM Jagan Teki jagan@amarulasolutions.com wrote:
Hi,
On Fri, Apr 12, 2019 at 4:05 PM Chen-Yu Tsai wens@kernel.org wrote:
From: Chen-Yu Tsai wens@csie.org
(Resending yet again with correct email address now subscribed and with proper cover letter subject. Sorry for the noise.)
Hi everyone,
This series enables EMAC (Ethernet controller) on two A83T boards, the Cubietruck Plus and Bananapi M3.
A couple of changes are required to the clock definitions to make the compiler happy, as it hasn't been coverted to use the common CLK and DM_RESET framework. These changes are not used in the A83T code path.
The other two patches enable the sun8i-emac and Realtek PHY driver in their respective defconfigs. The device trees already have the EMAC enabled.
Since these are compile time issues, all patches should go through the same tree.
Regards ChenYu
Chen-Yu Tsai (4): sunxi: Fix compilation of sun8i-emac for A83T net: sun8i-emac: Fix compilation for A83T sunxi: Enable EMAC on the Cubietruck Plus sunxi: Enable EMAC on the Bananapi M3
We have EPHY clock and reset support via respective framework [1] would you rebase these changes on top this.
[1] http://git.denx.de/?p=u-boot-sunxi.git;a=commitdiff;h=6b2ccabee2368d059513a9...
Lovely! I'll throw the clock register bit patches out and rework the other stuff.
Does anyone else have these boards for testing though? I'm away from my boards for the next two weeks (which is past the merge window).
Looks like the EPHY clock and resets weren't converted. So it still needs some sort of fix to build. Do you have anything in the works regarding EPHY?
Looks like sunxi/next has the answer. And the new defconfigs build cleanly. Would you like to me respin on top with RFT? It doesn't actually matter what branch the defconfig patches are based on since they apply cleanly to either branch.
Yes, ie what I'm thinking.
BTW: the existing code doesn't enable the use_internal_phy for H3_EMAC, any idea? ie what I was thought and prepared this EPHY CLK and RESET support enabled it which indeed enabling use_internal_phy
On Thu, Apr 18, 2019 at 9:42 AM Jagan Teki jagan@amarulasolutions.com wrote:
On Thu, Apr 18, 2019 at 10:00 PM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 9:15 AM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 8:09 AM Chen-Yu Tsai wens@kernel.org wrote:
On Wed, Apr 17, 2019 at 4:38 AM Jagan Teki jagan@amarulasolutions.com wrote:
Hi,
On Fri, Apr 12, 2019 at 4:05 PM Chen-Yu Tsai wens@kernel.org wrote:
From: Chen-Yu Tsai wens@csie.org
(Resending yet again with correct email address now subscribed and with proper cover letter subject. Sorry for the noise.)
Hi everyone,
This series enables EMAC (Ethernet controller) on two A83T boards, the Cubietruck Plus and Bananapi M3.
A couple of changes are required to the clock definitions to make the compiler happy, as it hasn't been coverted to use the common CLK and DM_RESET framework. These changes are not used in the A83T code path.
The other two patches enable the sun8i-emac and Realtek PHY driver in their respective defconfigs. The device trees already have the EMAC enabled.
Since these are compile time issues, all patches should go through the same tree.
Regards ChenYu
Chen-Yu Tsai (4): sunxi: Fix compilation of sun8i-emac for A83T net: sun8i-emac: Fix compilation for A83T sunxi: Enable EMAC on the Cubietruck Plus sunxi: Enable EMAC on the Bananapi M3
We have EPHY clock and reset support via respective framework [1] would you rebase these changes on top this.
[1] http://git.denx.de/?p=u-boot-sunxi.git;a=commitdiff;h=6b2ccabee2368d059513a9...
Lovely! I'll throw the clock register bit patches out and rework the other stuff.
Does anyone else have these boards for testing though? I'm away from my boards for the next two weeks (which is past the merge window).
Looks like the EPHY clock and resets weren't converted. So it still needs some sort of fix to build. Do you have anything in the works regarding EPHY?
Looks like sunxi/next has the answer. And the new defconfigs build cleanly. Would you like to me respin on top with RFT? It doesn't actually matter what branch the defconfig patches are based on since they apply cleanly to either branch.
Yes, ie what I'm thinking.
BTW: the existing code doesn't enable the use_internal_phy for H3_EMAC, any idea? ie what I was thought and prepared this EPHY CLK and RESET support enabled it which indeed enabling use_internal_phy
The original code had:
if (priv->variant == H3_EMAC) { int parent = fdt_parent_offset(gd->fdt_blob, offset);
if (parent >= 0 && !fdt_node_check_compatible(gd->fdt_blob, parent, "allwinner,sun8i-h3-mdio-internal")) priv->use_internal_phy = true; }
in sun8i_emac_eth_ofdata_to_platdata(), which I think is what you're asking about?
ChenYu
On Thu, Apr 18, 2019 at 10:19 PM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 9:42 AM Jagan Teki jagan@amarulasolutions.com wrote:
On Thu, Apr 18, 2019 at 10:00 PM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 9:15 AM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 8:09 AM Chen-Yu Tsai wens@kernel.org wrote:
On Wed, Apr 17, 2019 at 4:38 AM Jagan Teki jagan@amarulasolutions.com wrote:
Hi,
On Fri, Apr 12, 2019 at 4:05 PM Chen-Yu Tsai wens@kernel.org wrote: > > From: Chen-Yu Tsai wens@csie.org > > (Resending yet again with correct email address now subscribed > and with proper cover letter subject. Sorry for the noise.) > > Hi everyone, > > This series enables EMAC (Ethernet controller) on two A83T boards, > the Cubietruck Plus and Bananapi M3. > > A couple of changes are required to the clock definitions to make the > compiler happy, as it hasn't been coverted to use the common CLK and > DM_RESET framework. These changes are not used in the A83T code path. > > The other two patches enable the sun8i-emac and Realtek PHY driver in > their respective defconfigs. The device trees already have the EMAC > enabled. > > Since these are compile time issues, all patches should go through > the same tree. > > Regards > ChenYu > > > Chen-Yu Tsai (4): > sunxi: Fix compilation of sun8i-emac for A83T > net: sun8i-emac: Fix compilation for A83T > sunxi: Enable EMAC on the Cubietruck Plus > sunxi: Enable EMAC on the Bananapi M3
We have EPHY clock and reset support via respective framework [1] would you rebase these changes on top this.
[1] http://git.denx.de/?p=u-boot-sunxi.git;a=commitdiff;h=6b2ccabee2368d059513a9...
Lovely! I'll throw the clock register bit patches out and rework the other stuff.
Does anyone else have these boards for testing though? I'm away from my boards for the next two weeks (which is past the merge window).
Looks like the EPHY clock and resets weren't converted. So it still needs some sort of fix to build. Do you have anything in the works regarding EPHY?
Looks like sunxi/next has the answer. And the new defconfigs build cleanly. Would you like to me respin on top with RFT? It doesn't actually matter what branch the defconfig patches are based on since they apply cleanly to either branch.
Yes, ie what I'm thinking.
BTW: the existing code doesn't enable the use_internal_phy for H3_EMAC, any idea? ie what I was thought and prepared this EPHY CLK and RESET support enabled it which indeed enabling use_internal_phy
The original code had:
if (priv->variant == H3_EMAC) { int parent = fdt_parent_offset(gd->fdt_blob, offset); if (parent >= 0 && !fdt_node_check_compatible(gd->fdt_blob, parent, "allwinner,sun8i-h3-mdio-internal")) priv->use_internal_phy = true; }in sun8i_emac_eth_ofdata_to_platdata(), which I think is what you're asking about?
Yes, the same but priv->use_internal_phy not assign to true at the end.
On Thu, Apr 18, 2019 at 9:51 AM Jagan Teki jagan@amarulasolutions.com wrote:
On Thu, Apr 18, 2019 at 10:19 PM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 9:42 AM Jagan Teki jagan@amarulasolutions.com wrote:
On Thu, Apr 18, 2019 at 10:00 PM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 9:15 AM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 8:09 AM Chen-Yu Tsai wens@kernel.org wrote:
On Wed, Apr 17, 2019 at 4:38 AM Jagan Teki jagan@amarulasolutions.com wrote: > > Hi, > > On Fri, Apr 12, 2019 at 4:05 PM Chen-Yu Tsai wens@kernel.org wrote: > > > > From: Chen-Yu Tsai wens@csie.org > > > > (Resending yet again with correct email address now subscribed > > and with proper cover letter subject. Sorry for the noise.) > > > > Hi everyone, > > > > This series enables EMAC (Ethernet controller) on two A83T boards, > > the Cubietruck Plus and Bananapi M3. > > > > A couple of changes are required to the clock definitions to make the > > compiler happy, as it hasn't been coverted to use the common CLK and > > DM_RESET framework. These changes are not used in the A83T code path. > > > > The other two patches enable the sun8i-emac and Realtek PHY driver in > > their respective defconfigs. The device trees already have the EMAC > > enabled. > > > > Since these are compile time issues, all patches should go through > > the same tree. > > > > Regards > > ChenYu > > > > > > Chen-Yu Tsai (4): > > sunxi: Fix compilation of sun8i-emac for A83T > > net: sun8i-emac: Fix compilation for A83T > > sunxi: Enable EMAC on the Cubietruck Plus > > sunxi: Enable EMAC on the Bananapi M3 > > We have EPHY clock and reset support via respective framework [1] > would you rebase these changes on top this. > > [1] http://git.denx.de/?p=u-boot-sunxi.git;a=commitdiff;h=6b2ccabee2368d059513a9...
Lovely! I'll throw the clock register bit patches out and rework the other stuff.
Does anyone else have these boards for testing though? I'm away from my boards for the next two weeks (which is past the merge window).
Looks like the EPHY clock and resets weren't converted. So it still needs some sort of fix to build. Do you have anything in the works regarding EPHY?
Looks like sunxi/next has the answer. And the new defconfigs build cleanly. Would you like to me respin on top with RFT? It doesn't actually matter what branch the defconfig patches are based on since they apply cleanly to either branch.
Yes, ie what I'm thinking.
BTW: the existing code doesn't enable the use_internal_phy for H3_EMAC, any idea? ie what I was thought and prepared this EPHY CLK and RESET support enabled it which indeed enabling use_internal_phy
The original code had:
if (priv->variant == H3_EMAC) { int parent = fdt_parent_offset(gd->fdt_blob, offset); if (parent >= 0 && !fdt_node_check_compatible(gd->fdt_blob, parent, "allwinner,sun8i-h3-mdio-internal")) priv->use_internal_phy = true; }in sun8i_emac_eth_ofdata_to_platdata(), which I think is what you're asking about?
Yes, the same but priv->use_internal_phy not assign to true at the end.
Doesn't the last line set it to true?
I'm not sure what you're asking. Are you asking when you should set priv->use_internal_phy?
ChenYu
On Thu, Apr 18, 2019 at 10:33 PM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 9:51 AM Jagan Teki jagan@amarulasolutions.com wrote:
On Thu, Apr 18, 2019 at 10:19 PM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 9:42 AM Jagan Teki jagan@amarulasolutions.com wrote:
On Thu, Apr 18, 2019 at 10:00 PM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 9:15 AM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 8:09 AM Chen-Yu Tsai wens@kernel.org wrote: > > On Wed, Apr 17, 2019 at 4:38 AM Jagan Teki jagan@amarulasolutions.com wrote: > > > > Hi, > > > > On Fri, Apr 12, 2019 at 4:05 PM Chen-Yu Tsai wens@kernel.org wrote: > > > > > > From: Chen-Yu Tsai wens@csie.org > > > > > > (Resending yet again with correct email address now subscribed > > > and with proper cover letter subject. Sorry for the noise.) > > > > > > Hi everyone, > > > > > > This series enables EMAC (Ethernet controller) on two A83T boards, > > > the Cubietruck Plus and Bananapi M3. > > > > > > A couple of changes are required to the clock definitions to make the > > > compiler happy, as it hasn't been coverted to use the common CLK and > > > DM_RESET framework. These changes are not used in the A83T code path. > > > > > > The other two patches enable the sun8i-emac and Realtek PHY driver in > > > their respective defconfigs. The device trees already have the EMAC > > > enabled. > > > > > > Since these are compile time issues, all patches should go through > > > the same tree. > > > > > > Regards > > > ChenYu > > > > > > > > > Chen-Yu Tsai (4): > > > sunxi: Fix compilation of sun8i-emac for A83T > > > net: sun8i-emac: Fix compilation for A83T > > > sunxi: Enable EMAC on the Cubietruck Plus > > > sunxi: Enable EMAC on the Bananapi M3 > > > > We have EPHY clock and reset support via respective framework [1] > > would you rebase these changes on top this. > > > > [1] http://git.denx.de/?p=u-boot-sunxi.git;a=commitdiff;h=6b2ccabee2368d059513a9... > > Lovely! I'll throw the clock register bit patches out and rework the > other stuff. > > Does anyone else have these boards for testing though? I'm away from > my boards for the next two weeks (which is past the merge window).
Looks like the EPHY clock and resets weren't converted. So it still needs some sort of fix to build. Do you have anything in the works regarding EPHY?
Looks like sunxi/next has the answer. And the new defconfigs build cleanly. Would you like to me respin on top with RFT? It doesn't actually matter what branch the defconfig patches are based on since they apply cleanly to either branch.
Yes, ie what I'm thinking.
BTW: the existing code doesn't enable the use_internal_phy for H3_EMAC, any idea? ie what I was thought and prepared this EPHY CLK and RESET support enabled it which indeed enabling use_internal_phy
The original code had:
if (priv->variant == H3_EMAC) { int parent = fdt_parent_offset(gd->fdt_blob, offset); if (parent >= 0 && !fdt_node_check_compatible(gd->fdt_blob, parent, "allwinner,sun8i-h3-mdio-internal")) priv->use_internal_phy = true; }in sun8i_emac_eth_ofdata_to_platdata(), which I think is what you're asking about?
Yes, the same but priv->use_internal_phy not assign to true at the end.
Doesn't the last line set it to true?
I'm not sure what you're asking. Are you asking when you should set priv->use_internal_phy?
Inside if statement seems to failed and which intern not setting use_internal_phy to true. so at the end priv->use_internal_phy is false (as default) is it the proper behavior, I thought it is wrong.
On Thu, Apr 18, 2019 at 10:07 AM Jagan Teki jagan@amarulasolutions.com wrote:
On Thu, Apr 18, 2019 at 10:33 PM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 9:51 AM Jagan Teki jagan@amarulasolutions.com wrote:
On Thu, Apr 18, 2019 at 10:19 PM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 9:42 AM Jagan Teki jagan@amarulasolutions.com wrote:
On Thu, Apr 18, 2019 at 10:00 PM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 9:15 AM Chen-Yu Tsai wens@kernel.org wrote: > > On Thu, Apr 18, 2019 at 8:09 AM Chen-Yu Tsai wens@kernel.org wrote: > > > > On Wed, Apr 17, 2019 at 4:38 AM Jagan Teki jagan@amarulasolutions.com wrote: > > > > > > Hi, > > > > > > On Fri, Apr 12, 2019 at 4:05 PM Chen-Yu Tsai wens@kernel.org wrote: > > > > > > > > From: Chen-Yu Tsai wens@csie.org > > > > > > > > (Resending yet again with correct email address now subscribed > > > > and with proper cover letter subject. Sorry for the noise.) > > > > > > > > Hi everyone, > > > > > > > > This series enables EMAC (Ethernet controller) on two A83T boards, > > > > the Cubietruck Plus and Bananapi M3. > > > > > > > > A couple of changes are required to the clock definitions to make the > > > > compiler happy, as it hasn't been coverted to use the common CLK and > > > > DM_RESET framework. These changes are not used in the A83T code path. > > > > > > > > The other two patches enable the sun8i-emac and Realtek PHY driver in > > > > their respective defconfigs. The device trees already have the EMAC > > > > enabled. > > > > > > > > Since these are compile time issues, all patches should go through > > > > the same tree. > > > > > > > > Regards > > > > ChenYu > > > > > > > > > > > > Chen-Yu Tsai (4): > > > > sunxi: Fix compilation of sun8i-emac for A83T > > > > net: sun8i-emac: Fix compilation for A83T > > > > sunxi: Enable EMAC on the Cubietruck Plus > > > > sunxi: Enable EMAC on the Bananapi M3 > > > > > > We have EPHY clock and reset support via respective framework [1] > > > would you rebase these changes on top this. > > > > > > [1] http://git.denx.de/?p=u-boot-sunxi.git;a=commitdiff;h=6b2ccabee2368d059513a9... > > > > Lovely! I'll throw the clock register bit patches out and rework the > > other stuff. > > > > Does anyone else have these boards for testing though? I'm away from > > my boards for the next two weeks (which is past the merge window). > > Looks like the EPHY clock and resets weren't converted. So it still > needs some sort of fix to build. Do you have anything in the works > regarding EPHY?
Looks like sunxi/next has the answer. And the new defconfigs build cleanly. Would you like to me respin on top with RFT? It doesn't actually matter what branch the defconfig patches are based on since they apply cleanly to either branch.
Yes, ie what I'm thinking.
BTW: the existing code doesn't enable the use_internal_phy for H3_EMAC, any idea? ie what I was thought and prepared this EPHY CLK and RESET support enabled it which indeed enabling use_internal_phy
The original code had:
if (priv->variant == H3_EMAC) { int parent = fdt_parent_offset(gd->fdt_blob, offset); if (parent >= 0 && !fdt_node_check_compatible(gd->fdt_blob, parent, "allwinner,sun8i-h3-mdio-internal")) priv->use_internal_phy = true; }in sun8i_emac_eth_ofdata_to_platdata(), which I think is what you're asking about?
Yes, the same but priv->use_internal_phy not assign to true at the end.
Doesn't the last line set it to true?
I'm not sure what you're asking. Are you asking when you should set priv->use_internal_phy?
Inside if statement seems to failed and which intern not setting use_internal_phy to true. so at the end priv->use_internal_phy is false (as default) is it the proper behavior, I thought it is wrong.
Not sure why it fails. fdt_node_check_compatible will return 0 if the node lists the given compatible string. And fdt_parent_offset returns >= 0 for a valid offset. The logic looks correct:
If the PHY node's parent is compatible with "allwinner,sun8i-h3-mdio-internal", set priv->use_internal_phy = true.
ChenYu
On Thu, Apr 18, 2019 at 10:43 PM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 10:07 AM Jagan Teki jagan@amarulasolutions.com wrote:
On Thu, Apr 18, 2019 at 10:33 PM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 9:51 AM Jagan Teki jagan@amarulasolutions.com wrote:
On Thu, Apr 18, 2019 at 10:19 PM Chen-Yu Tsai wens@kernel.org wrote:
On Thu, Apr 18, 2019 at 9:42 AM Jagan Teki jagan@amarulasolutions.com wrote:
On Thu, Apr 18, 2019 at 10:00 PM Chen-Yu Tsai wens@kernel.org wrote: > > On Thu, Apr 18, 2019 at 9:15 AM Chen-Yu Tsai wens@kernel.org wrote: > > > > On Thu, Apr 18, 2019 at 8:09 AM Chen-Yu Tsai wens@kernel.org wrote: > > > > > > On Wed, Apr 17, 2019 at 4:38 AM Jagan Teki jagan@amarulasolutions.com wrote: > > > > > > > > Hi, > > > > > > > > On Fri, Apr 12, 2019 at 4:05 PM Chen-Yu Tsai wens@kernel.org wrote: > > > > > > > > > > From: Chen-Yu Tsai wens@csie.org > > > > > > > > > > (Resending yet again with correct email address now subscribed > > > > > and with proper cover letter subject. Sorry for the noise.) > > > > > > > > > > Hi everyone, > > > > > > > > > > This series enables EMAC (Ethernet controller) on two A83T boards, > > > > > the Cubietruck Plus and Bananapi M3. > > > > > > > > > > A couple of changes are required to the clock definitions to make the > > > > > compiler happy, as it hasn't been coverted to use the common CLK and > > > > > DM_RESET framework. These changes are not used in the A83T code path. > > > > > > > > > > The other two patches enable the sun8i-emac and Realtek PHY driver in > > > > > their respective defconfigs. The device trees already have the EMAC > > > > > enabled. > > > > > > > > > > Since these are compile time issues, all patches should go through > > > > > the same tree. > > > > > > > > > > Regards > > > > > ChenYu > > > > > > > > > > > > > > > Chen-Yu Tsai (4): > > > > > sunxi: Fix compilation of sun8i-emac for A83T > > > > > net: sun8i-emac: Fix compilation for A83T > > > > > sunxi: Enable EMAC on the Cubietruck Plus > > > > > sunxi: Enable EMAC on the Bananapi M3 > > > > > > > > We have EPHY clock and reset support via respective framework [1] > > > > would you rebase these changes on top this. > > > > > > > > [1] http://git.denx.de/?p=u-boot-sunxi.git;a=commitdiff;h=6b2ccabee2368d059513a9... > > > > > > Lovely! I'll throw the clock register bit patches out and rework the > > > other stuff. > > > > > > Does anyone else have these boards for testing though? I'm away from > > > my boards for the next two weeks (which is past the merge window). > > > > Looks like the EPHY clock and resets weren't converted. So it still > > needs some sort of fix to build. Do you have anything in the works > > regarding EPHY? > > Looks like sunxi/next has the answer. And the new defconfigs build cleanly. > Would you like to me respin on top with RFT? It doesn't actually matter > what branch the defconfig patches are based on since they apply cleanly to > either branch.
Yes, ie what I'm thinking.
BTW: the existing code doesn't enable the use_internal_phy for H3_EMAC, any idea? ie what I was thought and prepared this EPHY CLK and RESET support enabled it which indeed enabling use_internal_phy
The original code had:
if (priv->variant == H3_EMAC) { int parent = fdt_parent_offset(gd->fdt_blob, offset); if (parent >= 0 && !fdt_node_check_compatible(gd->fdt_blob, parent, "allwinner,sun8i-h3-mdio-internal")) priv->use_internal_phy = true; }in sun8i_emac_eth_ofdata_to_platdata(), which I think is what you're asking about?
Yes, the same but priv->use_internal_phy not assign to true at the end.
Doesn't the last line set it to true?
I'm not sure what you're asking. Are you asking when you should set priv->use_internal_phy?
Inside if statement seems to failed and which intern not setting use_internal_phy to true. so at the end priv->use_internal_phy is false (as default) is it the proper behavior, I thought it is wrong.
Not sure why it fails. fdt_node_check_compatible will return 0 if the node lists the given compatible string. And fdt_parent_offset returns >= 0 for a valid offset. The logic looks correct:
If the PHY node's parent is compatible with "allwinner,sun8i-h3-mdio-internal", set priv->use_internal_phy = true.
Yes, ie what I thought off. anyway the sunxi/next change has proper logic to traverse the child and set it to true. please make your changes on top, thanks!
participants (2)
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Chen-Yu Tsai -
Jagan Teki