[U-Boot] [PATCH v2 1/9] powerpc, mpc8xx: clear top of stack
Reported-by: Joakim Tjernlund Joakim.Tjernlund@infinera.com Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr --- arch/powerpc/cpu/mpc8xx/start.S | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S index 8dde4beeea1..b8bdaaec2fa 100644 --- a/arch/powerpc/cpu/mpc8xx/start.S +++ b/arch/powerpc/cpu/mpc8xx/start.S @@ -144,9 +144,11 @@ in_flash: ori r2, r2, CONFIG_SYS_DER@l mtspr DER, r2
- /* set up the stack in internal DPRAM */ + /* set up the stack on top of internal DPRAM */ lis r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@h ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@l + stw r0, -4(r3) + stw r0, -8(r3) addi r1, r3, -8
bl board_init_f_alloc_reserve
Add mcr3000 device tree and activate CONFIG_DM and CONFIG_OF_CONTROL
Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr --- arch/powerpc/dts/Makefile | 1 + arch/powerpc/dts/mcr3000.dts | 12 ++++++++++++ board/cssi/MCR3000/u-boot.lds | 6 ++++++ configs/MCR3000_defconfig | 3 +++ 4 files changed, 22 insertions(+) create mode 100644 arch/powerpc/dts/mcr3000.dts
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile index a19aa56300d..172bed4c202 100644 --- a/arch/powerpc/dts/Makefile +++ b/arch/powerpc/dts/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+
dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb +dtb-$(CONFIG_MCR3000) += mcr3000.dtb
targets += $(dtb-y)
diff --git a/arch/powerpc/dts/mcr3000.dts b/arch/powerpc/dts/mcr3000.dts new file mode 100644 index 00000000000..e4b222857b5 --- /dev/null +++ b/arch/powerpc/dts/mcr3000.dts @@ -0,0 +1,12 @@ +/* + * MCR3000 Device Tree Source + * + * Copyright 2017 CS Systemes d'Information + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; + +/ { +}; diff --git a/board/cssi/MCR3000/u-boot.lds b/board/cssi/MCR3000/u-boot.lds index a32c0e721e8..447ffded814 100644 --- a/board/cssi/MCR3000/u-boot.lds +++ b/board/cssi/MCR3000/u-boot.lds @@ -69,6 +69,12 @@ SECTIONS __ex_table : { *(__ex_table) } __stop___ex_table = .;
+ /* + * _end - This is end of u-boot.bin image. + * dtb will be appended here to make u-boot-dtb.bin + */ + _end = .; + . = ALIGN(4096); __init_begin = .; .text.init : { *(.text.init) } diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig index 29a60e3a986..6d7dda82a21 100644 --- a/configs/MCR3000_defconfig +++ b/configs/MCR3000_defconfig @@ -73,3 +73,6 @@ CONFIG_MPC8XX_FEC=y CONFIG_SHA256=y CONFIG_LZMA=y CONFIG_OF_LIBFDT=y +CONFIG_DM=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="mcr3000"
On Wed, Nov 21, 2018 at 08:51:43AM +0000, Christophe Leroy wrote:
Add mcr3000 device tree and activate CONFIG_DM and CONFIG_OF_CONTROL
Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr
Applied to u-boot/master, thanks!
This patch adds a DM driver for the MPC8xx watchdog. Basically, the watchdog is enabled by default from the start and SYPCR register has to be writen once to set the timeout and/or deactivate the watchdog. Once written, it cannot be written again.
It means that wdt_stop() can be called before wdt_start() to stop the watchdog, but cannot be called if wdt_start() has been called.
Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr --- drivers/watchdog/Kconfig | 7 ++++++ drivers/watchdog/mpc8xx_wdt.c | 51 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 58 insertions(+)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 4796da08239..21f789b87c1 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -136,4 +136,11 @@ config WDT_MT7621 Select this to enable Ralink / Mediatek watchdog timer, which can be found on some MediaTek chips.
+config WDT_MPC8xx + bool "MPC8xx watchdog timer support" + depends on WDT && MPC8xx + select CONFIG_MPC8xx_WATCHDOG + help + Select this to enable mpc8xx watchdog timer + endmenu diff --git a/drivers/watchdog/mpc8xx_wdt.c b/drivers/watchdog/mpc8xx_wdt.c index ccb06ac425f..c24c2a9da6d 100644 --- a/drivers/watchdog/mpc8xx_wdt.c +++ b/drivers/watchdog/mpc8xx_wdt.c @@ -4,6 +4,8 @@ */
#include <common.h> +#include <dm.h> +#include <wdt.h> #include <mpc8xx.h> #include <asm/cpm_8xx.h> #include <asm/io.h> @@ -16,3 +18,52 @@ void hw_watchdog_reset(void) out_be16(&immap->im_siu_conf.sc_swsr, 0xaa39); /* write magic2 */ }
+#ifdef CONFIG_WDT_MPC8xx +static int mpc8xx_wdt_start(struct udevice *dev, u64 timeout, ulong flags) +{ + immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR; + + out_be32(&immap->im_siu_conf.sc_sypcr, CONFIG_SYS_SYPCR); + + if (!(in_be32(&immap->im_siu_conf.sc_sypcr) & SYPCR_SWE)) + return -EBUSY; + return 0; + +} + +static int mpc8xx_wdt_stop(struct udevice *dev) +{ + immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR; + + out_be32(&immap->im_siu_conf.sc_sypcr, CONFIG_SYS_SYPCR & ~SYPCR_SWE); + + if (in_be32(&immap->im_siu_conf.sc_sypcr) & SYPCR_SWE) + return -EBUSY; + return 0; +} + +static int mpc8xx_wdt_reset(struct udevice *dev) +{ + hw_watchdog_reset(); + + return 0; +} + +static const struct wdt_ops mpc8xx_wdt_ops = { + .start = mpc8xx_wdt_start, + .reset = mpc8xx_wdt_reset, + .stop = mpc8xx_wdt_stop, +}; + +static const struct udevice_id mpc8xx_wdt_ids[] = { + { .compatible = "fsl,pq1-wdt" }, + {} +}; + +U_BOOT_DRIVER(wdt_mpc8xx) = { + .name = "wdt_mpc8xx", + .id = UCLASS_WDT, + .of_match = mpc8xx_wdt_ids, + .ops = &mpc8xx_wdt_ops, +}; +#endif /* CONFIG_WDT_MPC8xx */
On Wed, Nov 21, 2018 at 08:51:45AM +0000, Christophe Leroy wrote:
This patch adds a DM driver for the MPC8xx watchdog. Basically, the watchdog is enabled by default from the start and SYPCR register has to be writen once to set the timeout and/or deactivate the watchdog. Once written, it cannot be written again.
It means that wdt_stop() can be called before wdt_start() to stop the watchdog, but cannot be called if wdt_start() has been called.
Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr
Applied to u-boot/master, thanks!
This patch switches MCR3000 board to the new DM watchdog.
The change in u-boot.lds is because MCR3000.o grows a bit with this patch and doesn't fit anymore below env_offset on some versions of GCC.
Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr --- v2: fixed build failure for lack of space before env_offset in u-boot.lds
arch/powerpc/dts/mcr3000.dts | 3 +++ board/cssi/MCR3000/MCR3000.c | 16 ++++++++++++++++ board/cssi/MCR3000/u-boot.lds | 1 - configs/MCR3000_defconfig | 3 +++ 4 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/dts/mcr3000.dts b/arch/powerpc/dts/mcr3000.dts index e4b222857b5..ef423d73c20 100644 --- a/arch/powerpc/dts/mcr3000.dts +++ b/arch/powerpc/dts/mcr3000.dts @@ -9,4 +9,7 @@ /dts-v1/;
/ { + WDT: watchdog@0 { + compatible = "fsl,pq1-wdt"; + }; }; diff --git a/board/cssi/MCR3000/MCR3000.c b/board/cssi/MCR3000/MCR3000.c index ffbeb14ed0f..d26ac35b440 100644 --- a/board/cssi/MCR3000/MCR3000.c +++ b/board/cssi/MCR3000/MCR3000.c @@ -12,6 +12,8 @@ #include <mpc8xx.h> #include <fdt_support.h> #include <asm/io.h> +#include <dm/uclass.h> +#include <wdt.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -143,3 +145,17 @@ int board_early_init_f(void)
return 0; } + +int board_early_init_r(void) +{ + struct udevice *watchdog_dev = NULL; + + if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) { + puts("Cannot find watchdog!\n"); + } else { + puts("Enabling watchdog.\n"); + wdt_start(watchdog_dev, 0xffff, 0); + } + + return 0; +} diff --git a/board/cssi/MCR3000/u-boot.lds b/board/cssi/MCR3000/u-boot.lds index 447ffded814..70aef3241c8 100644 --- a/board/cssi/MCR3000/u-boot.lds +++ b/board/cssi/MCR3000/u-boot.lds @@ -19,7 +19,6 @@ SECTIONS arch/powerpc/cpu/mpc8xx/start.o (.text) arch/powerpc/cpu/mpc8xx/traps.o (.text*) arch/powerpc/lib/built-in.o (.text*) - board/cssi/MCR3000/built-in.o (.text*) drivers/net/built-in.o (.text*)
. = DEFINED(env_offset) ? env_offset : .; diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig index 6d7dda82a21..2e79425bdbc 100644 --- a/configs/MCR3000_defconfig +++ b/configs/MCR3000_defconfig @@ -42,6 +42,7 @@ CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run flashboot" CONFIG_MISC_INIT_R=y +CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="S3K> " @@ -76,3 +77,5 @@ CONFIG_OF_LIBFDT=y CONFIG_DM=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="mcr3000" +CONFIG_WDT=y +CONFIG_WDT_MPC8xx=y
On Wed, Nov 21, 2018 at 08:51:47AM +0000, Christophe Leroy wrote:
This patch switches MCR3000 board to the new DM watchdog.
The change in u-boot.lds is because MCR3000.o grows a bit with this patch and doesn't fit anymore below env_offset on some versions of GCC.
Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr
Applied to u-boot/master, thanks!
Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr --- drivers/serial/serial_mpc8xx.c | 77 ++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 74 insertions(+), 3 deletions(-)
diff --git a/drivers/serial/serial_mpc8xx.c b/drivers/serial/serial_mpc8xx.c index 292912b7ee2..f2d241417a4 100644 --- a/drivers/serial/serial_mpc8xx.c +++ b/drivers/serial/serial_mpc8xx.c @@ -6,6 +6,7 @@
#include <common.h> #include <command.h> +#include <dm.h> #include <serial.h> #include <watchdog.h> #include <asm/cpm_8xx.h> @@ -35,9 +36,9 @@ struct serialbuffer { uchar txbuf; /* tx buffers */ };
-static void serial_setdivisor(cpm8xx_t __iomem *cp) +static void serial_setdivisor(cpm8xx_t __iomem *cp, int baudrate) { - int divisor = (gd->cpu_clk + 8 * gd->baudrate) / 16 / gd->baudrate; + int divisor = (gd->cpu_clk + 8 * baudrate) / 16 / baudrate;
if (divisor / 16 > 0x1000) { /* bad divisor, assume 50MHz clock and 9600 baud */ @@ -71,7 +72,7 @@ static void smc_setbrg(void)
out_be32(&cp->cp_simode, 0);
- serial_setdivisor(cp); + serial_setdivisor(cp, gd->baudrate); }
static int smc_init(void) @@ -186,11 +187,13 @@ static void smc_putc(const char c) WATCHDOG_RESET(); }
+#ifndef CONFIG_DM_SERIAL static void smc_puts(const char *s) { while (*s) smc_putc(*s++); } +#endif
static int smc_getc(void) { @@ -233,6 +236,7 @@ static int smc_tstc(void) return !(in_be16(&rtx->rxbd.cbd_sc) & BD_SC_EMPTY); }
+#ifndef CONFIG_DM_SERIAL struct serial_device serial_smc_device = { .name = "serial_smc", .start = smc_init, @@ -253,3 +257,70 @@ void mpc8xx_serial_initialize(void) { serial_register(&serial_smc_device); } +#endif + +#ifdef CONFIG_DM_SERIAL +static int serial_mpc8xx_setbrg(struct udevice *dev, int baudrate) +{ + immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR; + cpm8xx_t __iomem *cp = &(im->im_cpm); + + /* Set up the baud rate generator. + * See 8xx_io/commproc.c for details. + * + * Wire BRG1 to SMCx + */ + + out_be32(&cp->cp_simode, 0); + + serial_setdivisor(cp, baudrate); + + return 0; +} + +static int serial_mpc8xx_probe(struct udevice *dev) +{ + return smc_init(); +} + +static int serial_mpc8xx_putc(struct udevice *dev, const char ch) +{ + smc_putc(ch); + + return 0; +} + +static int serial_mpc8xx_getc(struct udevice *dev) +{ + return smc_getc(); +} + +static int serial_mpc8xx_pending(struct udevice *dev, bool input) +{ + if (input) + return smc_tstc(); + + return 0; +} + +static const struct dm_serial_ops serial_mpc8xx_ops = { + .putc = serial_mpc8xx_putc, + .pending = serial_mpc8xx_pending, + .getc = serial_mpc8xx_getc, + .setbrg = serial_mpc8xx_setbrg, +}; + +static const struct udevice_id serial_mpc8xx_ids[] = { + { .compatible = "fsl,pq1-smc" }, + { } +}; + +U_BOOT_DRIVER(serial_mpc8xx) = { + .name = "serial_mpc8xx", + .id = UCLASS_SERIAL, + .of_match = serial_mpc8xx_ids, + .probe = serial_mpc8xx_probe, + .ops = &serial_mpc8xx_ops, + .flags = DM_FLAG_PRE_RELOC, +}; +#endif
On Wed, Nov 21, 2018 at 08:51:49AM +0000, Christophe Leroy wrote:
Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr
Applied to u-boot/master, thanks!
Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr --- arch/powerpc/dts/mcr3000.dts | 7 +++++++ configs/MCR3000_defconfig | 1 + 2 files changed, 8 insertions(+)
diff --git a/arch/powerpc/dts/mcr3000.dts b/arch/powerpc/dts/mcr3000.dts index ef423d73c20..5abf111dc5f 100644 --- a/arch/powerpc/dts/mcr3000.dts +++ b/arch/powerpc/dts/mcr3000.dts @@ -12,4 +12,11 @@ WDT: watchdog@0 { compatible = "fsl,pq1-wdt"; }; + SERIAL: smc@0 { + compatible = "fsl,pq1-smc"; + }; + + chosen { + stdout-path = &SERIAL; + }; }; diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig index 2e79425bdbc..33c6073648d 100644 --- a/configs/MCR3000_defconfig +++ b/configs/MCR3000_defconfig @@ -79,3 +79,4 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="mcr3000" CONFIG_WDT=y CONFIG_WDT_MPC8xx=y +CONFIG_DM_SERIAL=y
On Wed, Nov 21, 2018 at 08:51:51AM +0000, Christophe Leroy wrote:
Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr
Applied to u-boot/master, thanks!
Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr --- drivers/serial/serial.c | 2 - drivers/serial/serial_mpc8xx.c | 97 ++++++------------------------------------ include/serial.h | 1 - 3 files changed, 14 insertions(+), 86 deletions(-)
diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index c499601f000..09365ba6a1e 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -119,7 +119,6 @@ U_BOOT_ENV_CALLBACK(baudrate, on_baudrate); serial_initfunc(atmel_serial_initialize); serial_initfunc(mcf_serial_initialize); serial_initfunc(mpc85xx_serial_initialize); -serial_initfunc(mpc8xx_serial_initialize); serial_initfunc(mxc_serial_initialize); serial_initfunc(ns16550_serial_initialize); serial_initfunc(pl01x_serial_initialize); @@ -173,7 +172,6 @@ void serial_initialize(void) atmel_serial_initialize(); mcf_serial_initialize(); mpc85xx_serial_initialize(); - mpc8xx_serial_initialize(); mxc_serial_initialize(); ns16550_serial_initialize(); pl01x_serial_initialize(); diff --git a/drivers/serial/serial_mpc8xx.c b/drivers/serial/serial_mpc8xx.c index f2d241417a4..50d6e70f177 100644 --- a/drivers/serial/serial_mpc8xx.c +++ b/drivers/serial/serial_mpc8xx.c @@ -59,7 +59,7 @@ static void serial_setdivisor(cpm8xx_t __iomem *cp, int baudrate) * as serial console interface. */
-static void smc_setbrg(void) +static int serial_mpc8xx_setbrg(struct udevice *dev, int baudrate) { immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR; cpm8xx_t __iomem *cp = &(im->im_cpm); @@ -72,10 +72,12 @@ static void smc_setbrg(void)
out_be32(&cp->cp_simode, 0);
- serial_setdivisor(cp, gd->baudrate); + serial_setdivisor(cp, baudrate); + + return 0; }
-static int smc_init(void) +static int serial_mpc8xx_probe(struct udevice *dev) { immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR; smc_t __iomem *sp; @@ -140,7 +142,7 @@ static int smc_init(void) out_8(&sp->smc_smce, 0xff);
/* Set up the baud rate generator */ - smc_setbrg(); + serial_mpc8xx_setbrg(dev, gd->baudrate);
/* Make the first buffer the only buffer. */ setbits_be16(&rtx->txbd.cbd_sc, BD_SC_WRAP); @@ -167,14 +169,14 @@ static int smc_init(void) return 0; }
-static void smc_putc(const char c) +static int serial_mpc8xx_putc(struct udevice *dev, const char c) { immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR; cpm8xx_t __iomem *cpmp = &(im->im_cpm); struct serialbuffer __iomem *rtx;
if (c == '\n') - smc_putc('\r'); + serial_mpc8xx_putc(dev, '\r');
rtx = (struct serialbuffer __iomem *)&cpmp->cp_dpmem[CPM_SERIAL_BASE];
@@ -185,17 +187,11 @@ static void smc_putc(const char c)
while (in_be16(&rtx->txbd.cbd_sc) & BD_SC_READY) WATCHDOG_RESET(); -}
-#ifndef CONFIG_DM_SERIAL -static void smc_puts(const char *s) -{ - while (*s) - smc_putc(*s++); + return 0; } -#endif
-static int smc_getc(void) +static int serial_mpc8xx_getc(struct udevice *dev) { immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR; cpm8xx_t __iomem *cpmp = &(im->im_cpm); @@ -225,84 +221,20 @@ static int smc_getc(void) return c; }
-static int smc_tstc(void) +static int serial_mpc8xx_pending(struct udevice *dev, bool input) { immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR; cpm8xx_t __iomem *cpmp = &(im->im_cpm); struct serialbuffer __iomem *rtx;
+ if (!input) + return 0; + rtx = (struct serialbuffer __iomem *)&cpmp->cp_dpmem[CPM_SERIAL_BASE];
return !(in_be16(&rtx->rxbd.cbd_sc) & BD_SC_EMPTY); }
-#ifndef CONFIG_DM_SERIAL -struct serial_device serial_smc_device = { - .name = "serial_smc", - .start = smc_init, - .stop = NULL, - .setbrg = smc_setbrg, - .getc = smc_getc, - .tstc = smc_tstc, - .putc = smc_putc, - .puts = smc_puts, -}; - -__weak struct serial_device *default_serial_console(void) -{ - return &serial_smc_device; -} - -void mpc8xx_serial_initialize(void) -{ - serial_register(&serial_smc_device); -} -#endif - -#ifdef CONFIG_DM_SERIAL -static int serial_mpc8xx_setbrg(struct udevice *dev, int baudrate) -{ - immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR; - cpm8xx_t __iomem *cp = &(im->im_cpm); - - /* Set up the baud rate generator. - * See 8xx_io/commproc.c for details. - * - * Wire BRG1 to SMCx - */ - - out_be32(&cp->cp_simode, 0); - - serial_setdivisor(cp, baudrate); - - return 0; -} - -static int serial_mpc8xx_probe(struct udevice *dev) -{ - return smc_init(); -} - -static int serial_mpc8xx_putc(struct udevice *dev, const char ch) -{ - smc_putc(ch); - - return 0; -} - -static int serial_mpc8xx_getc(struct udevice *dev) -{ - return smc_getc(); -} - -static int serial_mpc8xx_pending(struct udevice *dev, bool input) -{ - if (input) - return smc_tstc(); - - return 0; -} - static const struct dm_serial_ops serial_mpc8xx_ops = { .putc = serial_mpc8xx_putc, .pending = serial_mpc8xx_pending, @@ -323,4 +255,3 @@ U_BOOT_DRIVER(serial_mpc8xx) = { .ops = &serial_mpc8xx_ops, .flags = DM_FLAG_PRE_RELOC, }; -#endif diff --git a/include/serial.h b/include/serial.h index ec25db6e601..9133d07fd51 100644 --- a/include/serial.h +++ b/include/serial.h @@ -224,7 +224,6 @@ struct serial_dev_priv { void atmel_serial_initialize(void); void mcf_serial_initialize(void); void mpc85xx_serial_initialize(void); -void mpc8xx_serial_initialize(void); void mxc_serial_initialize(void); void ns16550_serial_initialize(void); void pl01x_serial_initialize(void);
On Wed, Nov 21, 2018 at 08:51:53AM +0000, Christophe Leroy wrote:
Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr
Applied to u-boot/master, thanks!
CC common/board_r.o common/board_r.c:747:2: error: ‘initr_spi’ undeclared here (not in a function) initr_spi, ^ make[1]: *** [common/board_r.o] Error 1
Fixes: ebe76a2df9f6 ("dm: Remove spi_init() from board_r.c when using driver model") Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr --- common/board_r.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/board_r.c b/common/board_r.c index c55e33eec27..0c2129b8ceb 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -743,7 +743,7 @@ static init_fnc_t init_sequence_r[] = { /* initialize higher level parts of CPU like time base and timers */ cpu_init_r, #endif -#ifdef CONFIG_PPC +#if defined(CONFIG_PPC) && !defined(CONFIG_DM_SPI) initr_spi, #endif #ifdef CONFIG_CMD_NAND
On Wed, Nov 21, 2018 at 2:21 PM Christophe Leroy christophe.leroy@c-s.fr wrote:
CC common/board_r.o common/board_r.c:747:2: error: ‘initr_spi’ undeclared here (not in a function) initr_spi, ^ make[1]: *** [common/board_r.o] Error 1
I have a patch to remove this code, which is not doing anything. will take care while applying your dm patch.
On Wed, Nov 21, 2018 at 08:51:55AM +0000, Christophe Leroy wrote:
CC common/board_r.o common/board_r.c:747:2: error: ‘initr_spi’ undeclared here (not in a function) initr_spi, ^ make[1]: *** [common/board_r.o] Error 1
Fixes: ebe76a2df9f6 ("dm: Remove spi_init() from board_r.c when using driver model") Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr
Applied to u-boot/master, thanks!
Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr --- drivers/spi/mpc8xx_spi.c | 179 ++++++++--------------------------------------- 1 file changed, 30 insertions(+), 149 deletions(-)
diff --git a/drivers/spi/mpc8xx_spi.c b/drivers/spi/mpc8xx_spi.c index 285fd4d2cc0..b020ce2b9d7 100644 --- a/drivers/spi/mpc8xx_spi.c +++ b/drivers/spi/mpc8xx_spi.c @@ -17,64 +17,19 @@ */
#include <common.h> +#include <dm.h> #include <mpc8xx.h> +#include <spi.h> + #include <asm/cpm_8xx.h> -#include <linux/ctype.h> -#include <malloc.h> -#include <post.h> -#include <serial.h> - -#define SPI_EEPROM_WREN 0x06 -#define SPI_EEPROM_RDSR 0x05 -#define SPI_EEPROM_READ 0x03 -#define SPI_EEPROM_WRITE 0x02 - -/* --------------------------------------------------------------- - * Offset for initial SPI buffers in DPRAM: - * We need a 520 byte scratch DPRAM area to use at an early stage. - * It is used between the two initialization calls (spi_init_f() - * and spi_init_r()). - * The value 0xb00 makes it far enough from the start of the data - * area (as well as from the stack pointer). - * --------------------------------------------------------------- */ -#ifndef CONFIG_SYS_SPI_INIT_OFFSET -#define CONFIG_SYS_SPI_INIT_OFFSET 0xB00 -#endif +#include <asm/io.h>
#define CPM_SPI_BASE_RX CPM_SPI_BASE #define CPM_SPI_BASE_TX (CPM_SPI_BASE + sizeof(cbd_t))
-/* ------------------- - * Function prototypes - * ------------------- */ -ssize_t spi_xfer(size_t); - -/* ------------------- - * Variables - * ------------------- */ - #define MAX_BUFFER 0x104
-/* ---------------------------------------------------------------------- - * Initially we place the RX and TX buffers at a fixed location in DPRAM! - * ---------------------------------------------------------------------- */ -static uchar *rxbuf = - (uchar *)&((cpm8xx_t *)&((immap_t *)CONFIG_SYS_IMMR)->im_cpm)->cp_dpmem - [CONFIG_SYS_SPI_INIT_OFFSET]; -static uchar *txbuf = - (uchar *)&((cpm8xx_t *)&((immap_t *)CONFIG_SYS_IMMR)->im_cpm)->cp_dpmem - [CONFIG_SYS_SPI_INIT_OFFSET+MAX_BUFFER]; - -/* ************************************************************************** - * - * Function: spi_init_f - * - * Description: Init SPI-Controller (ROM part) - * - * return: --- - * - * *********************************************************************** */ -void spi_init_f(void) +static int mpc8xx_spi_probe(struct udevice *dev) { immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR; cpm8xx_t __iomem *cp = &immr->im_cpm; @@ -180,117 +135,24 @@ void spi_init_f(void) clrbits_be16(&tbdf->cbd_sc, BD_SC_READY); clrbits_be16(&rbdf->cbd_sc, BD_SC_EMPTY);
- /* Set the bd's rx and tx buffer address pointers */ - out_be32(&rbdf->cbd_bufaddr, (ulong)rxbuf); - out_be32(&tbdf->cbd_bufaddr, (ulong)txbuf); - /* 10 + 11 */ out_8(&cp->cp_spim, 0); /* Mask all SPI events */ out_8(&cp->cp_spie, SPI_EMASK); /* Clear all SPI events */
- return; + return 0; }
-/* ************************************************************************** - * - * Function: spi_init_r - * - * Description: Init SPI-Controller (RAM part) - - * The malloc engine is ready and we can move our buffers to - * normal RAM - * - * return: --- - * - * *********************************************************************** */ -void spi_init_r(void) +static int mpc8xx_spi_xfer(struct udevice *dev, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) { immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR; cpm8xx_t __iomem *cp = &immr->im_cpm; - spi_t __iomem *spi = (spi_t __iomem *)&cp->cp_dparam[PROFF_SPI]; - cbd_t __iomem *tbdf, *rbdf; - - /* Disable relocation */ - out_be16(&spi->spi_rpbase, 0); - - /* tx and rx buffer descriptors */ - tbdf = (cbd_t __iomem *)&cp->cp_dpmem[CPM_SPI_BASE_TX]; - rbdf = (cbd_t __iomem *)&cp->cp_dpmem[CPM_SPI_BASE_RX]; - - /* Allocate memory for RX and TX buffers */ - rxbuf = (uchar *)malloc(MAX_BUFFER); - txbuf = (uchar *)malloc(MAX_BUFFER); - - out_be32(&rbdf->cbd_bufaddr, (ulong)rxbuf); - out_be32(&tbdf->cbd_bufaddr, (ulong)txbuf); - - return; -} - -/**************************************************************************** - * Function: spi_write - **************************************************************************** */ -ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len) -{ - int i; - - memset(rxbuf, 0, MAX_BUFFER); - memset(txbuf, 0, MAX_BUFFER); - *txbuf = SPI_EEPROM_WREN; /* write enable */ - spi_xfer(1); - memcpy(txbuf, addr, alen); - *txbuf = SPI_EEPROM_WRITE; /* WRITE memory array */ - memcpy(alen + txbuf, buffer, len); - spi_xfer(alen + len); - /* ignore received data */ - for (i = 0; i < 1000; i++) { - *txbuf = SPI_EEPROM_RDSR; /* read status */ - txbuf[1] = 0; - spi_xfer(2); - if (!(rxbuf[1] & 1)) - break; - udelay(1000); - } - if (i >= 1000) - printf("*** spi_write: Time out while writing!\n"); - - return len; -} - -/**************************************************************************** - * Function: spi_read - **************************************************************************** */ -ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len) -{ - memset(rxbuf, 0, MAX_BUFFER); - memset(txbuf, 0, MAX_BUFFER); - memcpy(txbuf, addr, alen); - *txbuf = SPI_EEPROM_READ; /* READ memory array */ - - /* - * There is a bug in 860T (?) that cuts the last byte of input - * if we're reading into DPRAM. The solution we choose here is - * to always read len+1 bytes (we have one extra byte at the - * end of the buffer). - */ - spi_xfer(alen + len + 1); - memcpy(buffer, alen + rxbuf, len); - - return len; -} - -/**************************************************************************** - * Function: spi_xfer - **************************************************************************** */ -ssize_t spi_xfer(size_t count) -{ - immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR; - cpm8xx_t __iomem *cp = &immr->im_cpm; - spi_t __iomem *spi = (spi_t __iomem *)&cp->cp_dparam[PROFF_SPI]; cbd_t __iomem *tbdf, *rbdf; int tm; + size_t count = (bitlen + 7) / 8;
- /* Disable relocation */ - out_be16(&spi->spi_rpbase, 0); + if (count > MAX_BUFFER) + return -EINVAL;
tbdf = (cbd_t __iomem *)&cp->cp_dpmem[CPM_SPI_BASE_TX]; rbdf = (cbd_t __iomem *)&cp->cp_dpmem[CPM_SPI_BASE_RX]; @@ -299,10 +161,12 @@ ssize_t spi_xfer(size_t count) clrbits_be32(&cp->cp_pbdat, 0x0001);
/* Setting tx bd status and data length */ + out_be32(&tbdf->cbd_bufaddr, (ulong)dout); out_be16(&tbdf->cbd_sc, BD_SC_READY | BD_SC_LAST | BD_SC_WRAP); out_be16(&tbdf->cbd_datlen, count);
/* Setting rx bd status and data length */ + out_be32(&rbdf->cbd_bufaddr, (ulong)din); out_be16(&rbdf->cbd_sc, BD_SC_EMPTY | BD_SC_WRAP); out_be16(&rbdf->cbd_datlen, 0); /* rx length has no significance */
@@ -333,3 +197,20 @@ ssize_t spi_xfer(size_t count)
return count; } + +static const struct dm_spi_ops mpc8xx_spi_ops = { + .xfer = mpc8xx_spi_xfer, +}; + +static const struct udevice_id mpc8xx_spi_ids[] = { + { .compatible = "fsl,mpc8xx-spi" }, + { } +}; + +U_BOOT_DRIVER(mpc8xx_spi) = { + .name = "mpc8xx_spi", + .id = UCLASS_SPI, + .of_match = mpc8xx_spi_ids, + .ops = &mpc8xx_spi_ops, + .probe = mpc8xx_spi_probe, +};
On Wed, Nov 21, 2018 at 2:21 PM Christophe Leroy christophe.leroy@c-s.fr wrote:
Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr
drivers/spi/mpc8xx_spi.c | 179 ++++++++---------------------------------------
Update Kconfig to move the config definition in DM_SPI area.
/* Setting tx bd status and data length */
out_be32(&tbdf->cbd_bufaddr, (ulong)dout); out_be16(&tbdf->cbd_sc, BD_SC_READY | BD_SC_LAST | BD_SC_WRAP); out_be16(&tbdf->cbd_datlen, count); /* Setting rx bd status and data length */out_be32(&rbdf->cbd_bufaddr, (ulong)din); out_be16(&rbdf->cbd_sc, BD_SC_EMPTY | BD_SC_WRAP); out_be16(&rbdf->cbd_datlen, 0); /* rx length has no significance */@@ -333,3 +197,20 @@ ssize_t spi_xfer(size_t count)
return count;}
+static const struct dm_spi_ops mpc8xx_spi_ops = {
.xfer = mpc8xx_spi_xfer,+};
+static const struct udevice_id mpc8xx_spi_ids[] = {
{ .compatible = "fsl,mpc8xx-spi" },
Is this binding from Linux?
On Wed, Nov 21, 2018 at 2:39 PM Jagan Teki jagan@amarulasolutions.com wrote:
On Wed, Nov 21, 2018 at 2:21 PM Christophe Leroy christophe.leroy@c-s.fr wrote:
Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr
drivers/spi/mpc8xx_spi.c | 179 ++++++++---------------------------------------
How did you handle this eeprom calls?
cmd/built-in.o: In function `eeprom_init': ~/u-boot-dev/cmd/eeprom.c:71: undefined reference to `spi_init_f' cmd/built-in.o: In function `eeprom_rw_block': ~/u-boot-dev/cmd/eeprom.c:135: undefined reference to `spi_read' ~/u-boot-dev/cmd/eeprom.c:137: undefined reference to `spi_write'
Le 21/11/2018 à 11:18, Jagan Teki a écrit :
On Wed, Nov 21, 2018 at 2:39 PM Jagan Teki jagan@amarulasolutions.com wrote:
On Wed, Nov 21, 2018 at 2:21 PM Christophe Leroy christophe.leroy@c-s.fr wrote:
Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr
drivers/spi/mpc8xx_spi.c | 179 ++++++++---------------------------------------
How did you handle this eeprom calls?
cmd/built-in.o: In function `eeprom_init': ~/u-boot-dev/cmd/eeprom.c:71: undefined reference to `spi_init_f' cmd/built-in.o: In function `eeprom_rw_block': ~/u-boot-dev/cmd/eeprom.c:135: undefined reference to `spi_read' ~/u-boot-dev/cmd/eeprom.c:137: undefined reference to `spi_write'
Oops, didn't see that. Indeed the HW I have doesn't have eeprom, I tested the SPI driver with thermal monitoring.
I see you sent a patch fixing it, thanks.
Christophe
Le 21/11/2018 à 10:09, Jagan Teki a écrit :
On Wed, Nov 21, 2018 at 2:21 PM Christophe Leroy christophe.leroy@c-s.fr wrote:
Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr
drivers/spi/mpc8xx_spi.c | 179 ++++++++---------------------------------------
Update Kconfig to move the config definition in DM_SPI area.
You did it already it seems, thanks.
/* Setting tx bd status and data length */
out_be32(&tbdf->cbd_bufaddr, (ulong)dout); out_be16(&tbdf->cbd_sc, BD_SC_READY | BD_SC_LAST | BD_SC_WRAP); out_be16(&tbdf->cbd_datlen, count); /* Setting rx bd status and data length */out_be32(&rbdf->cbd_bufaddr, (ulong)din); out_be16(&rbdf->cbd_sc, BD_SC_EMPTY | BD_SC_WRAP); out_be16(&rbdf->cbd_datlen, 0); /* rx length has no significance */@@ -333,3 +197,20 @@ ssize_t spi_xfer(size_t count)
return count;}
+static const struct dm_spi_ops mpc8xx_spi_ops = {
.xfer = mpc8xx_spi_xfer,+};
+static const struct udevice_id mpc8xx_spi_ids[] = {
{ .compatible = "fsl,mpc8xx-spi" },Is this binding from Linux?
No, on Linux we have a common driver for 8xx and most of 8xxx. But the Uboot 8xxx SPI driver is too light to easily include 8xx so it was easier to port the existing 8xx driver to DM at the moment.
When the 8xxx implements QE mode SPI for the 83xx, then I'll be able to amend it to also support 8xx.
Christophe
On Wed, Nov 21, 2018 at 08:51:57AM +0000, Christophe Leroy wrote:
Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr
Applied to u-boot/master, thanks!
On Wed, 2018-11-21 at 08:51 +0000, Christophe Leroy wrote:
Reported-by: Joakim Tjernlund Joakim.Tjernlund@infinera.com Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr
Reviewed-by: Joakim Tjernlund Joakim.Tjernlund@infinera.com
Leroy, if you need space, you may want to revive: https://github.com/u-boot/u-boot/commit/39768f7715ed637ef02f49fc7de664cc1aaf... it got reverted as some odd 8xx boards broke. I think these are gone now.
Jocke
arch/powerpc/cpu/mpc8xx/start.S | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S index 8dde4beeea1..b8bdaaec2fa 100644 --- a/arch/powerpc/cpu/mpc8xx/start.S +++ b/arch/powerpc/cpu/mpc8xx/start.S @@ -144,9 +144,11 @@ in_flash: ori r2, r2, CONFIG_SYS_DER@l mtspr DER, r2
/* set up the stack in internal DPRAM */
/* set up the stack on top of internal DPRAM */ lis r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@h ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@lstw r0, -4(r3)stw r0, -8(r3) addi r1, r3, -8 bl board_init_f_alloc_reserve-- 2.13.3
U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
On Wed, Nov 21, 2018 at 08:51:41AM +0000, Christophe Leroy wrote:
Reported-by: Joakim Tjernlund Joakim.Tjernlund@infinera.com Signed-off-by: Christophe Leroy christophe.leroy@c-s.fr Reviewed-by: Joakim Tjernlund Joakim.Tjernlund@infinera.com
Applied to u-boot/master, thanks!
participants (5)
-
Christophe LEROY -
Christophe Leroy
-
Jagan Teki -
Joakim Tjernlund -
Tom Rini