[PATCH 1/3] fpga: intel_pr: Change to use fdt_get_resource()
From: Ley Foon Tan ley.foon.tan@intel.com
HSD #1508201592: Change from fdtdec_get_addr() to fdt_get_resource().
fdtdec_get_addr() returns a 64-bit value, including base address and register size. Change to use fdt_get_resource() and get base address from struct fdt_resource.
Signed-off-by: Ley Foon Tan ley.foon.tan@intel.com Signed-off-by: Jit Loon Lim jit.loon.lim@intel.com --- drivers/fpga/intel_pr.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/fpga/intel_pr.c b/drivers/fpga/intel_pr.c index b8f510fbd7..6637425452 100644 --- a/drivers/fpga/intel_pr.c +++ b/drivers/fpga/intel_pr.c @@ -34,6 +34,8 @@ static int intel_get_freeze_br_addr(fdt_addr_t *addr, unsigned int region) { int offset; char freeze_br[12]; + struct fdt_resource r; + int ret;
snprintf(freeze_br, sizeof(freeze_br), "freeze_br%d", region);
@@ -49,13 +51,15 @@ static int intel_get_freeze_br_addr(fdt_addr_t *addr, unsigned int region) return -ENODEV; }
- *addr = fdtdec_get_addr(gd->fdt_blob, offset, "reg"); - if (*addr == FDT_ADDR_T_NONE) { + ret = fdt_get_resource(gd->fdt_blob, offset, "reg", 0, &r); + if (ret) { printf("%s has no 'reg' property!\n", freeze_br); - return -ENXIO; + return ret; }
- return 0; + *addr = r.start; + + return ret; }
static int intel_freeze_br_do_freeze(unsigned int region)
From: "Chew, Chiau Ee" chiau.ee.chew@intel.com
HSD #1508949110: For Agilex and Stratix10, before FPGA Partial Reconfiguration (PR) operation, SW need to set reset_req bit in freeze_csr_ctrl register to reset PR region. The same bit need to be cleared after FPGA PR operation is done.
Signed-off-by: Chew, Chiau Ee chiau.ee.chew@intel.com Signed-off-by: Jit Loon Lim jit.loon.lim@intel.com --- drivers/fpga/intel_pr.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/fpga/intel_pr.c b/drivers/fpga/intel_pr.c index 6637425452..a0a758488b 100644 --- a/drivers/fpga/intel_pr.c +++ b/drivers/fpga/intel_pr.c @@ -81,10 +81,17 @@ static int intel_freeze_br_do_freeze(unsigned int region)
writel(FREEZE_CSR_CTRL_FREEZE_REQ, addr + FREEZE_CSR_CTRL_OFFSET);
- return wait_for_bit_le32((const u32 *)(addr + + ret = wait_for_bit_le32((const u32 *)(addr + FREEZE_CSR_STATUS_OFFSET), FREEZE_CSR_STATUS_FREEZE_REQ_DONE, true, FREEZE_TIMEOUT, false); + + if (ret) + writel(0, addr + FREEZE_CSR_CTRL_OFFSET); + else + writel(FREEZE_CSR_CTRL_RESET_REQ, addr + FREEZE_CSR_CTRL_OFFSET); + + return ret; }
static int intel_freeze_br_do_unfreeze(unsigned int region) @@ -97,6 +104,8 @@ static int intel_freeze_br_do_unfreeze(unsigned int region) if (ret) return ret;
+ writel(0, addr + FREEZE_CSR_CTRL_OFFSET); + status = readl(addr + FREEZE_CSR_STATUS_OFFSET);
if (status & FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE) @@ -106,10 +115,14 @@ static int intel_freeze_br_do_unfreeze(unsigned int region)
writel(FREEZE_CSR_CTRL_UNFREEZE_REQ, addr + FREEZE_CSR_CTRL_OFFSET);
- return wait_for_bit_le32((const u32 *)(addr + + ret = wait_for_bit_le32((const u32 *)(addr + FREEZE_CSR_STATUS_OFFSET), FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE, true, FREEZE_TIMEOUT, false); + + writel(0, addr + FREEZE_CSR_CTRL_OFFSET); + + return ret; }
static int do_pr(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
From: "Chew, Chiau Ee" <chiau.ee.chew@@intel.com>
This is to enable check on the freeze_illegal_request register whereby high on any bit of this bus indicates a read or write issue by a static region master when an freeze bridge is in the freeze state. In the case if any of the bit is high, write 1 to first clear the bit and then return with error.
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@@intel.com> Signed-off-by: Jit Loon Lim jit.loon.lim@intel.com --- drivers/fpga/intel_pr.c | 54 ++++++++++++++++++++++++++++++++++------- 1 file changed, 45 insertions(+), 9 deletions(-)
diff --git a/drivers/fpga/intel_pr.c b/drivers/fpga/intel_pr.c index a0a758488b..e84845c918 100644 --- a/drivers/fpga/intel_pr.c +++ b/drivers/fpga/intel_pr.c @@ -62,6 +62,49 @@ static int intel_get_freeze_br_addr(fdt_addr_t *addr, unsigned int region) return ret; }
+static int intel_freeze_br_req_ack(fdt_addr_t addr, u32 req_ack) +{ + u32 status, illegal, ctrl; + int ret = -ETIMEDOUT; + unsigned long start = get_timer(0); + + while (1) { + illegal = readl(addr + FREEZE_CSR_ILLEGAL_REQ_OFFSET); + if (illegal) { + printf("illegal request 0x%08x detected in freeze bridge\n", illegal); + + writel(illegal, addr + FREEZE_CSR_ILLEGAL_REQ_OFFSET); + + illegal = readl(addr + FREEZE_CSR_ILLEGAL_REQ_OFFSET); + if (illegal) + printf("illegal request 0x%08x detected in freeze bridge are not cleared\n", + illegal); + + ret = -EINVAL; + break; + } + + status = readl(addr + FREEZE_CSR_STATUS_OFFSET); + status &= req_ack; + if (status) { + ctrl = readl(addr + FREEZE_CSR_CTRL_OFFSET); + printf("%s request %x acknowledged %x %x\n", + __func__, req_ack, status, ctrl); + + ret = 0; + break; + } + + if (get_timer(start) > FREEZE_TIMEOUT) + break; + + udelay(1); + WATCHDOG_RESET(); + } + + return ret; +} + static int intel_freeze_br_do_freeze(unsigned int region) { u32 status; @@ -81,11 +124,7 @@ static int intel_freeze_br_do_freeze(unsigned int region)
writel(FREEZE_CSR_CTRL_FREEZE_REQ, addr + FREEZE_CSR_CTRL_OFFSET);
- ret = wait_for_bit_le32((const u32 *)(addr + - FREEZE_CSR_STATUS_OFFSET), - FREEZE_CSR_STATUS_FREEZE_REQ_DONE, true, - FREEZE_TIMEOUT, false); - + ret = intel_freeze_br_req_ack(addr, FREEZE_CSR_STATUS_FREEZE_REQ_DONE); if (ret) writel(0, addr + FREEZE_CSR_CTRL_OFFSET); else @@ -115,10 +154,7 @@ static int intel_freeze_br_do_unfreeze(unsigned int region)
writel(FREEZE_CSR_CTRL_UNFREEZE_REQ, addr + FREEZE_CSR_CTRL_OFFSET);
- ret = wait_for_bit_le32((const u32 *)(addr + - FREEZE_CSR_STATUS_OFFSET), - FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE, true, - FREEZE_TIMEOUT, false); + ret = intel_freeze_br_req_ack(addr, FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE);
writel(0, addr + FREEZE_CSR_CTRL_OFFSET);
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Jit Loon Lim