[PATCH] config: imx: Add PHYTEC's phycore-imx8mm-fspi_defconfig
This configuration file provides support for booting phycore module (on e.g. polis-rdk base development board) from QSPI memory.
Moreover, the SDP SPL gadget is supported, so single flash.bin binary can be used with uuu (with uuu -v -b qspi ~/u-boot/flash.bin) to flash QSPI in the factory or during debricking.
Signed-off-by: Lukasz Majewski lukma@denx.de --- configs/phycore-imx8mm-fspi_defconfig | 158 ++++++++++++++++++++++++++ 1 file changed, 158 insertions(+) create mode 100644 configs/phycore-imx8mm-fspi_defconfig
diff --git a/configs/phycore-imx8mm-fspi_defconfig b/configs/phycore-imx8mm-fspi_defconfig new file mode 100644 index 0000000000..79a2668254 --- /dev/null +++ b/configs/phycore-imx8mm-fspi_defconfig @@ -0,0 +1,158 @@ +CONFIG_ARM=y +CONFIG_ARCH_IMX8M=y +CONFIG_TEXT_BASE=0x40200000 +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SF_DEFAULT_SPEED=80000000 +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x3C0000 +CONFIG_IMX_CONFIG="board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg" +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-phyboard-polis-rdk" +CONFIG_SPL_TEXT_BASE=0x7E2000 +CONFIG_TARGET_PHYCORE_IMX8MM=y +CONFIG_DM_RESET=y +CONFIG_SYS_MONITOR_LEN=524288 +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x920000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 +CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x3E0000 +CONFIG_SYS_LOAD_ADDR=0x40480000 +CONFIG_PCI=y +# CONFIG_ANDROID_BOOT_IMAGE is not set +CONFIG_FIT=y +CONFIG_FIT_EXTERNAL_OFFSET=0x3000 +CONFIG_SPL_LOAD_FIT=y +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; then run mmcboot; else run netboot; fi; fi;" +CONFIG_DEFAULT_FDT_FILE="oftree" +CONFIG_SYS_CBSIZE=2048 +CONFIG_SYS_PBSIZE=2074 +CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_PAD_TO=0x0 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_SYS_MALLOC=y +CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y +CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x42200000 +CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 +CONFIG_SPL_I2C=y +CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SPL_POWER=y +CONFIG_SPL_SPI_FLASH_MTD=y +CONFIG_SPL_WATCHDOG=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="u-boot=> " +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_CRC32 is not set +CONFIG_CMD_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 +CONFIG_SYS_EEPROM_SIZE=4096 +CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5 +CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 +CONFIG_CMD_CLK=y +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_DEV=2 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_SPL_DM=y +CONFIG_SPL_CLK_COMPOSITE_CCF=y +CONFIG_CLK_COMPOSITE_CCF=y +CONFIG_SPL_CLK_IMX8MM=y +CONFIG_CLK_IMX8MM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_UUU_SUPPORT=y +CONFIG_MXC_GPIO=y +CONFIG_DM_I2C=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x51 +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_ES_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_FSL_USDHC=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_BUS=3 +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y +CONFIG_PHYLIB=y +CONFIG_PHY_TI_DP83867=y +CONFIG_PHY_GIGE=y +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_IMX=y +CONFIG_PHY_IMX8M_PCIE=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_IMX8M=y +CONFIG_POWER_DOMAIN=y +CONFIG_IMX8M_POWER_DOMAIN=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_SERIAL=y +CONFIG_MXC_UART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_NXP_FSPI=y +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_SYSRESET_PSCI=y +CONFIG_SYSRESET_WATCHDOG=y +CONFIG_DM_THERMAL=y +CONFIG_IMX_TMU=y +CONFIG_USB=y +CONFIG_SPL_USB_HOST=y +CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_GADGET=y +CONFIG_SPL_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y +CONFIG_SDP_LOADADDR=0x40400000 +CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_IMX_WATCHDOG=y +CONFIG_FSPI_CONF_HEADER=y +CONFIG_FSPI_CONF_FILE="fspi_header.bin"
Hi Lukasz,
On Thu, Aug 15, 2024 at 5:40 AM Lukasz Majewski lukma@denx.de wrote:
This configuration file provides support for booting phycore module (on e.g. polis-rdk base development board) from QSPI memory.
Moreover, the SDP SPL gadget is supported, so single flash.bin binary can be used with uuu (with uuu -v -b qspi ~/u-boot/flash.bin) to flash QSPI in the factory or during debricking.
This looks good.
I suggest adding an entry in doc/board/phytec/phycore-imx8mm.rst to explain how to build and flash U-Boot for booting via QSPI.
This can be a separate patch though.
Reviewed-by: Fabio Estevam festevam@gmail.com
Hi Fabio,
Hi Lukasz,
On Thu, Aug 15, 2024 at 5:40 AM Lukasz Majewski lukma@denx.de wrote:
This configuration file provides support for booting phycore module (on e.g. polis-rdk base development board) from QSPI memory.
Moreover, the SDP SPL gadget is supported, so single flash.bin binary can be used with uuu (with uuu -v -b qspi ~/u-boot/flash.bin) to flash QSPI in the factory or during debricking.
This looks good.
I suggest adding an entry in doc/board/phytec/phycore-imx8mm.rst to explain how to build and flash U-Boot for booting via QSPI.
This can be a separate patch though.
+1
Reviewed-by: Fabio Estevam festevam@gmail.com
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Erika Unter HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
Hello Lukasz,
Am Donnerstag, dem 15.08.2024 um 10:40 +0200 schrieb Lukasz Majewski:
This configuration file provides support for booting phycore module (on e.g. polis-rdk base development board) from QSPI memory.
Moreover, the SDP SPL gadget is supported, so single flash.bin binary can be used with uuu (with uuu -v -b qspi ~/u-boot/flash.bin) to flash QSPI in the factory or during debricking.
Signed-off-by: Lukasz Majewski lukma@denx.de
configs/phycore-imx8mm-fspi_defconfig | 158 ++++++++++++++++++++++++++ 1 file changed, 158 insertions(+) create mode 100644 configs/phycore-imx8mm-fspi_defconfig
diff --git a/configs/phycore-imx8mm-fspi_defconfig b/configs/phycore- imx8mm-fspi_defconfig new file mode 100644 index 0000000000..79a2668254 --- /dev/null +++ b/configs/phycore-imx8mm-fspi_defconfig @@ -0,0 +1,158 @@ +CONFIG_ARM=y +CONFIG_ARCH_IMX8M=y +CONFIG_TEXT_BASE=0x40200000 +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SF_DEFAULT_SPEED=80000000 +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x3C0000 +CONFIG_IMX_CONFIG="board/freescale/imx8mm_evk/imximage-8mm-lpddr4- fspi.cfg"
can you create a cfg in the board folder and not use the one from the evk?
+CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-phyboard-polis-rdk" +CONFIG_SPL_TEXT_BASE=0x7E2000 +CONFIG_TARGET_PHYCORE_IMX8MM=y +CONFIG_DM_RESET=y +CONFIG_SYS_MONITOR_LEN=524288 +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x920000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 +CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x3E0000 +CONFIG_SYS_LOAD_ADDR=0x40480000 +CONFIG_PCI=y +# CONFIG_ANDROID_BOOT_IMAGE is not set +CONFIG_FIT=y +CONFIG_FIT_EXTERNAL_OFFSET=0x3000 +CONFIG_SPL_LOAD_FIT=y +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; then run mmcboot; else run netboot; fi; fi;" +CONFIG_DEFAULT_FDT_FILE="oftree" +CONFIG_SYS_CBSIZE=2048 +CONFIG_SYS_PBSIZE=2074 +CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000
This line
+CONFIG_SPL_PAD_TO=0x0
and this one is not available in phycore-imx8mm_defconfig. Why have you added them here?
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_SYS_MALLOC=y +CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y +CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x42200000 +CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 +CONFIG_SPL_I2C=y +CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SPL_POWER=y +CONFIG_SPL_SPI_FLASH_MTD=y +CONFIG_SPL_WATCHDOG=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="u-boot=> " +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set
Here is
CONFIG_CMD_ERASEENV=y
missing. Which was added with 60e01c6d9f892bfa088a0453cd19d6a418b00add for phycore-imx8mm_defconfig. Why did you not add it?
+# CONFIG_CMD_CRC32 is not set +CONFIG_CMD_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 +CONFIG_SYS_EEPROM_SIZE=4096 +CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5 +CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
And I also miss
# CONFIG_CMD_BIND is not set CONFIG_FASTBOOT_BUF_SIZE=0x20000000
which you did set in your
"config: imx: Add support for Phytec's phycore imx8mm running SDP gadget"
patch for phycore-imx8mm_defconfig. Are they not required for fspi image?
Teresa
+CONFIG_CMD_CLK=y +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_DEV=2 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_SPL_DM=y +CONFIG_SPL_CLK_COMPOSITE_CCF=y +CONFIG_CLK_COMPOSITE_CCF=y +CONFIG_SPL_CLK_IMX8MM=y +CONFIG_CLK_IMX8MM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_UUU_SUPPORT=y +CONFIG_MXC_GPIO=y +CONFIG_DM_I2C=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x51 +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_ES_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_FSL_USDHC=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_BUS=3 +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y +CONFIG_PHYLIB=y +CONFIG_PHY_TI_DP83867=y +CONFIG_PHY_GIGE=y +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_IMX=y +CONFIG_PHY_IMX8M_PCIE=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_IMX8M=y +CONFIG_POWER_DOMAIN=y +CONFIG_IMX8M_POWER_DOMAIN=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_SERIAL=y +CONFIG_MXC_UART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_NXP_FSPI=y +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_SYSRESET_PSCI=y +CONFIG_SYSRESET_WATCHDOG=y +CONFIG_DM_THERMAL=y +CONFIG_IMX_TMU=y +CONFIG_USB=y +CONFIG_SPL_USB_HOST=y +CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_GADGET=y +CONFIG_SPL_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y +CONFIG_SDP_LOADADDR=0x40400000 +CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_IMX_WATCHDOG=y +CONFIG_FSPI_CONF_HEADER=y +CONFIG_FSPI_CONF_FILE="fspi_header.bin"
Hi Teresa,
Hello Lukasz,
Am Donnerstag, dem 15.08.2024 um 10:40 +0200 schrieb Lukasz Majewski:
This configuration file provides support for booting phycore module (on e.g. polis-rdk base development board) from QSPI memory.
Moreover, the SDP SPL gadget is supported, so single flash.bin binary can be used with uuu (with uuu -v -b qspi ~/u-boot/flash.bin) to flash QSPI in the factory or during debricking.
Signed-off-by: Lukasz Majewski lukma@denx.de
configs/phycore-imx8mm-fspi_defconfig | 158 ++++++++++++++++++++++++++ 1 file changed, 158 insertions(+) create mode 100644 configs/phycore-imx8mm-fspi_defconfig
diff --git a/configs/phycore-imx8mm-fspi_defconfig b/configs/phycore- imx8mm-fspi_defconfig new file mode 100644 index 0000000000..79a2668254 --- /dev/null +++ b/configs/phycore-imx8mm-fspi_defconfig @@ -0,0 +1,158 @@ +CONFIG_ARM=y +CONFIG_ARCH_IMX8M=y +CONFIG_TEXT_BASE=0x40200000 +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SF_DEFAULT_SPEED=80000000 +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x3C0000 +CONFIG_IMX_CONFIG="board/freescale/imx8mm_evk/imximage-8mm-lpddr4- fspi.cfg"
can you create a cfg in the board folder and not use the one from the evk?
I wanted to avoid code duplication - as the same file (from EVK) is used by other boards already...
+CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-phyboard-polis-rdk" +CONFIG_SPL_TEXT_BASE=0x7E2000 +CONFIG_TARGET_PHYCORE_IMX8MM=y +CONFIG_DM_RESET=y +CONFIG_SYS_MONITOR_LEN=524288 +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x920000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 +CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x3E0000 +CONFIG_SYS_LOAD_ADDR=0x40480000 +CONFIG_PCI=y +# CONFIG_ANDROID_BOOT_IMAGE is not set +CONFIG_FIT=y +CONFIG_FIT_EXTERNAL_OFFSET=0x3000 +CONFIG_SPL_LOAD_FIT=y +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; then run mmcboot; else run netboot; fi; fi;" +CONFIG_DEFAULT_FDT_FILE="oftree" +CONFIG_SYS_CBSIZE=2048 +CONFIG_SYS_PBSIZE=2074 +CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000
This line
+CONFIG_SPL_PAD_TO=0x0
and this one is not available in phycore-imx8mm_defconfig. Why have you added them here?
I think that I've followed ./configs/imx8mm_beacon_fspi_defconfig as a starting point.
I would need to check if removing them would make any harm.
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_SYS_MALLOC=y +CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y +CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x42200000 +CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 +CONFIG_SPL_I2C=y +CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SPL_POWER=y +CONFIG_SPL_SPI_FLASH_MTD=y +CONFIG_SPL_WATCHDOG=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="u-boot=> " +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set
Here is
CONFIG_CMD_ERASEENV=y
missing. Which was added with 60e01c6d9f892bfa088a0453cd19d6a418b00add for phycore-imx8mm_defconfig. Why did you not add it?
I might used either the older ./configs/phycore-imx8mm_defconfig or the above mentioned "beacon".
+# CONFIG_CMD_CRC32 is not set +CONFIG_CMD_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 +CONFIG_SYS_EEPROM_SIZE=4096 +CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5 +CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
And I also miss
# CONFIG_CMD_BIND is not set CONFIG_FASTBOOT_BUF_SIZE=0x20000000
which you did set in your
"config: imx: Add support for Phytec's phycore imx8mm running SDP gadget"
patch for phycore-imx8mm_defconfig. Are they not required for fspi image?
IIRC this value has default value set in drivers/fastboot/Kconfig
With QSPI setup I did not needed it so big, as the flash.bin was small enough.
With phycore-imx8mm_defconfig I've set it to larger value - as one my update with it SD/eMMC memory with fastboot gadget.
Teresa
+CONFIG_CMD_CLK=y +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_DEV=2 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_SPL_DM=y +CONFIG_SPL_CLK_COMPOSITE_CCF=y +CONFIG_CLK_COMPOSITE_CCF=y +CONFIG_SPL_CLK_IMX8MM=y +CONFIG_CLK_IMX8MM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_UUU_SUPPORT=y +CONFIG_MXC_GPIO=y +CONFIG_DM_I2C=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x51 +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_ES_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_FSL_USDHC=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_BUS=3 +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y +CONFIG_PHYLIB=y +CONFIG_PHY_TI_DP83867=y +CONFIG_PHY_GIGE=y +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_IMX=y +CONFIG_PHY_IMX8M_PCIE=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_IMX8M=y +CONFIG_POWER_DOMAIN=y +CONFIG_IMX8M_POWER_DOMAIN=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_SERIAL=y +CONFIG_MXC_UART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_NXP_FSPI=y +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_SYSRESET_PSCI=y +CONFIG_SYSRESET_WATCHDOG=y +CONFIG_DM_THERMAL=y +CONFIG_IMX_TMU=y +CONFIG_USB=y +CONFIG_SPL_USB_HOST=y +CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_GADGET=y +CONFIG_SPL_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y +CONFIG_SDP_LOADADDR=0x40400000 +CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_IMX_WATCHDOG=y +CONFIG_FSPI_CONF_HEADER=y +CONFIG_FSPI_CONF_FILE="fspi_header.bin"
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Erika Unter HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
Hello Lukasz,
Am Mittwoch, dem 21.08.2024 um 10:33 +0200 schrieb Lukasz Majewski:
Hi Teresa,
Hello Lukasz,
Am Donnerstag, dem 15.08.2024 um 10:40 +0200 schrieb Lukasz Majewski:
This configuration file provides support for booting phycore module (on e.g. polis-rdk base development board) from QSPI memory.
Moreover, the SDP SPL gadget is supported, so single flash.bin binary can be used with uuu (with uuu -v -b qspi ~/u- boot/flash.bin) to flash QSPI in the factory or during debricking.
Signed-off-by: Lukasz Majewski lukma@denx.de
configs/phycore-imx8mm-fspi_defconfig | 158 ++++++++++++++++++++++++++ 1 file changed, 158 insertions(+) create mode 100644 configs/phycore-imx8mm-fspi_defconfig
diff --git a/configs/phycore-imx8mm-fspi_defconfig b/configs/phycore- imx8mm-fspi_defconfig new file mode 100644 index 0000000000..79a2668254 --- /dev/null +++ b/configs/phycore-imx8mm-fspi_defconfig @@ -0,0 +1,158 @@ +CONFIG_ARM=y +CONFIG_ARCH_IMX8M=y +CONFIG_TEXT_BASE=0x40200000 +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SF_DEFAULT_SPEED=80000000 +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x3C0000 +CONFIG_IMX_CONFIG="board/freescale/imx8mm_evk/imximage-8mm- lpddr4- fspi.cfg"
can you create a cfg in the board folder and not use the one from the evk?
I wanted to avoid code duplication - as the same file (from EVK) is used by other boards already...
Okay, thanks haven't noticed that. What about moving this file to a more generic place then? To "arch/arm/mach-imx/imx8m/" for example. There are already other cfg files located.
+CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-phyboard-polis-rdk" +CONFIG_SPL_TEXT_BASE=0x7E2000 +CONFIG_TARGET_PHYCORE_IMX8MM=y +CONFIG_DM_RESET=y +CONFIG_SYS_MONITOR_LEN=524288 +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x920000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x910000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 +CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x3E0000 +CONFIG_SYS_LOAD_ADDR=0x40480000 +CONFIG_PCI=y +# CONFIG_ANDROID_BOOT_IMAGE is not set +CONFIG_FIT=y +CONFIG_FIT_EXTERNAL_OFFSET=0x3000 +CONFIG_SPL_LOAD_FIT=y +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; then run mmcboot; else run netboot; fi; fi;" +CONFIG_DEFAULT_FDT_FILE="oftree" +CONFIG_SYS_CBSIZE=2048 +CONFIG_SYS_PBSIZE=2074 +CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x25000
This line
+CONFIG_SPL_PAD_TO=0x0
and this one is not available in phycore-imx8mm_defconfig. Why have you added them here?
I think that I've followed ./configs/imx8mm_beacon_fspi_defconfig as a starting point.
I would need to check if removing them would make any harm.
I would prefer having it in snyc with phycore-imx8mm_defconfig makes it easier when trying to compare them in future.
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_SYS_MALLOC=y +CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y +CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x42200000 +CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 +CONFIG_SPL_I2C=y +CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SPL_POWER=y +CONFIG_SPL_SPI_FLASH_MTD=y +CONFIG_SPL_WATCHDOG=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="u-boot=> " +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set
Here is
CONFIG_CMD_ERASEENV=y
missing. Which was added with 60e01c6d9f892bfa088a0453cd19d6a418b00add for phycore-imx8mm_defconfig. Why did you not add it?
I might used either the older ./configs/phycore-imx8mm_defconfig or the above mentioned "beacon".
could you add it?
+# CONFIG_CMD_CRC32 is not set +CONFIG_CMD_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 +CONFIG_SYS_EEPROM_SIZE=4096 +CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5 +CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
And I also miss
# CONFIG_CMD_BIND is not set CONFIG_FASTBOOT_BUF_SIZE=0x20000000
which you did set in your
"config: imx: Add support for Phytec's phycore imx8mm running SDP gadget"
patch for phycore-imx8mm_defconfig. Are they not required for fspi image?
IIRC this value has default value set in drivers/fastboot/Kconfig
With QSPI setup I did not needed it so big, as the flash.bin was small enough.
With phycore-imx8mm_defconfig I've set it to larger value - as one my update with it SD/eMMC memory with fastboot gadget.
But would it hurt to increase the buffer here? I think it would be nice to be able flash a larger image to eMMC when booting from SPI flash, too. Even though I understand it is not required for your usecase.
Teresa
Teresa
+CONFIG_CMD_CLK=y +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_DEV=2 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_SPL_DM=y +CONFIG_SPL_CLK_COMPOSITE_CCF=y +CONFIG_CLK_COMPOSITE_CCF=y +CONFIG_SPL_CLK_IMX8MM=y +CONFIG_CLK_IMX8MM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_UUU_SUPPORT=y +CONFIG_MXC_GPIO=y +CONFIG_DM_I2C=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x51 +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_ES_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_FSL_USDHC=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_BUS=3 +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y +CONFIG_PHYLIB=y +CONFIG_PHY_TI_DP83867=y +CONFIG_PHY_GIGE=y +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_IMX=y +CONFIG_PHY_IMX8M_PCIE=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_IMX8M=y +CONFIG_POWER_DOMAIN=y +CONFIG_IMX8M_POWER_DOMAIN=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_SERIAL=y +CONFIG_MXC_UART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_NXP_FSPI=y +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_SYSRESET_PSCI=y +CONFIG_SYSRESET_WATCHDOG=y +CONFIG_DM_THERMAL=y +CONFIG_IMX_TMU=y +CONFIG_USB=y +CONFIG_SPL_USB_HOST=y +CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_GADGET=y +CONFIG_SPL_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y +CONFIG_SDP_LOADADDR=0x40400000 +CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_IMX_WATCHDOG=y +CONFIG_FSPI_CONF_HEADER=y +CONFIG_FSPI_CONF_FILE="fspi_header.bin"
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Erika Unter HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
participants (3)
-
Fabio Estevam -
Lukasz Majewski -
Teresa Remmet