During 83xx setup the "System I/O configuration register high" gets overwritten with user defined value if CFG_SICRH is defined.

Regarding to the MPC834x manual (Table 5-28 reve.1) bits 28+29 of SICRH must keep their reset value regardless of configuration.

On my board (using RGMII) those bits are set after reset - yet it's unclear where they come from.

The patch keeps both bits on MPC834x and MPC8313.

Signed-off-by: Andre Schwarz andre.schwarz@matrix-vision.de ---

MATRIX VISION GmbH, Talstraße 16, DE-71570 Oppenweiler - Registergericht: Amtsgericht Stuttgart, HRB 271090 Geschäftsführer: Gerhard Thullner, Werner Armingeon, Uwe Furtner

cpu/mpc83xx/cpu_init.c | 8 +++++++- 1 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c index fb184d8..3a9a302 100644 --- a/cpu/mpc83xx/cpu_init.c +++ b/cpu/mpc83xx/cpu_init.c @@ -59,6 +59,8 @@ static void config_qe_ioports(void) */ void cpu_init_f (volatile immap_t * im) { + u32 tmp_sicrh = 0; + /* Pointer is writable since we allocated a register for it */ gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);

@@ -181,7 +183,11 @@ void cpu_init_f (volatile immap_t * im)

/* System General Purpose Register */ #ifdef CFG_SICRH - im->sysconf.sicrh = CFG_SICRH; +#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC8313) + /* regarding to MPC34x manual rev.1 bits 28..29 must be preserved */ + tmp_sicrh = im->sysconf.sicrh & 0x0000000C; +#endif + im->sysconf.sicrh = CFG_SICRH | tmp_sicrh; #endif #ifdef CFG_SICRL im->sysconf.sicrl = CFG_SICRL;