[PATCH 0/2] add support for dll setup on ksz9131
Hi,
KSZ9131 has an internal DLL used to add proper delay on TX/RX lines to confirm with RGMII timings. The series add support for this. Along with this I included a typo patch.
Thank you, Claudiu Beznea
Claudiu Beznea (2): net: phy: micrel: add support for DLL setup on ksz9131 net: phy: micrel: fix typo
drivers/net/phy/micrel_ksz90x1.c | 65 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 63 insertions(+), 2 deletions(-)
Add support for DLL setup on KSZ9131.
Signed-off-by: Claudiu Beznea claudiu.beznea@microchip.com --- drivers/net/phy/micrel_ksz90x1.c | 63 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 62 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/micrel_ksz90x1.c b/drivers/net/phy/micrel_ksz90x1.c index f0032e8ce166..d6694c5cd88f 100644 --- a/drivers/net/phy/micrel_ksz90x1.c +++ b/drivers/net/phy/micrel_ksz90x1.c @@ -396,9 +396,70 @@ static struct phy_driver ksz9031_driver = { /* * KSZ9131 */ + +#define KSZ9131RN_MMD_COMMON_CTRL_REG 2 +#define KSZ9131RN_RXC_DLL_CTRL 76 +#define KSZ9131RN_TXC_DLL_CTRL 77 +#define KSZ9131RN_DLL_CTRL_BYPASS BIT_MASK(12) +#define KSZ9131RN_DLL_ENABLE_DELAY 0 +#define KSZ9131RN_DLL_DISABLE_DELAY BIT(12) + +static int ksz9131_config_rgmii_delay(struct phy_device *phydev) +{ + struct phy_driver *drv = phydev->drv; + u16 rxcdll_val, txcdll_val, val; + int ret; + + switch (phydev->interface) { + case PHY_INTERFACE_MODE_RGMII: + rxcdll_val = KSZ9131RN_DLL_DISABLE_DELAY; + txcdll_val = KSZ9131RN_DLL_DISABLE_DELAY; + break; + case PHY_INTERFACE_MODE_RGMII_ID: + rxcdll_val = KSZ9131RN_DLL_ENABLE_DELAY; + txcdll_val = KSZ9131RN_DLL_ENABLE_DELAY; + break; + case PHY_INTERFACE_MODE_RGMII_RXID: + rxcdll_val = KSZ9131RN_DLL_ENABLE_DELAY; + txcdll_val = KSZ9131RN_DLL_DISABLE_DELAY; + break; + case PHY_INTERFACE_MODE_RGMII_TXID: + rxcdll_val = KSZ9131RN_DLL_DISABLE_DELAY; + txcdll_val = KSZ9131RN_DLL_ENABLE_DELAY; + break; + default: + return 0; + } + + val = drv->readext(phydev, 0, KSZ9131RN_MMD_COMMON_CTRL_REG, + KSZ9131RN_RXC_DLL_CTRL); + val &= ~KSZ9131RN_DLL_CTRL_BYPASS; + val |= rxcdll_val; + ret = drv->writeext(phydev, 0, KSZ9131RN_MMD_COMMON_CTRL_REG, + KSZ9131RN_RXC_DLL_CTRL, val); + if (ret) + return ret; + + val = drv->readext(phydev, 0, KSZ9131RN_MMD_COMMON_CTRL_REG, + KSZ9131RN_TXC_DLL_CTRL); + + val &= ~KSZ9131RN_DLL_CTRL_BYPASS; + val |= txcdll_val; + ret = drv->writeext(phydev, 0, KSZ9131RN_MMD_COMMON_CTRL_REG, + KSZ9131RN_TXC_DLL_CTRL, val); + + return ret; +} + static int ksz9131_config(struct phy_device *phydev) { - /* TBD: Implement Skew values for dts */ + int ret; + + if (phy_interface_is_rgmii(phydev)) { + ret = ksz9131_config_rgmii_delay(phydev); + if (ret) + return ret; + }
/* add an option to disable the gigabit feature of this PHY */ if (env_get("disable_giga")) {
Fix typo.
Signed-off-by: Claudiu Beznea claudiu.beznea@microchip.com --- drivers/net/phy/micrel_ksz90x1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/phy/micrel_ksz90x1.c b/drivers/net/phy/micrel_ksz90x1.c index d6694c5cd88f..77fad4a8fc9e 100644 --- a/drivers/net/phy/micrel_ksz90x1.c +++ b/drivers/net/phy/micrel_ksz90x1.c @@ -491,7 +491,7 @@ static int ksz9131_config(struct phy_device *phydev) }
static struct phy_driver ksz9131_driver = { - .name = "Micrel ksz9031", + .name = "Micrel ksz9131", .uid = PHY_ID_KSZ9131, .mask = MII_KSZ9x31_SILICON_REV_MASK, .features = PHY_GBIT_FEATURES,
On 03.12.2020 11:18, Claudiu Beznea wrote:
Hi,
KSZ9131 has an internal DLL used to add proper delay on TX/RX lines to confirm with RGMII timings. The series add support for this. Along with this I included a typo patch.
Thank you, Claudiu Beznea
Claudiu Beznea (2): net: phy: micrel: add support for DLL setup on ksz9131 net: phy: micrel: fix typo
drivers/net/phy/micrel_ksz90x1.c | 65 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 63 insertions(+), 2 deletions(-)
Applied to u-boot-atmel/master , thanks !
participants (2)
-
Claudiu Beznea -
Eugen.Hristev＠microchip.com