[U-Boot] [PATCH] ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL
From: Tien Fong Chee tien.fong.chee@intel.com
This is minimum memory pool size required to get SPL booting to U-Boot, such as FPGA program and loading U-Boot image from FAT.
Signed-off-by: Tien Fong Chee tien.fong.chee@intel.com --- include/configs/socfpga_common.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index bd8f5c8..93273a8 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -258,7 +258,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) /* SPL memory allocation configuration, this is for FAT implementation */ #ifndef CONFIG_SYS_SPL_MALLOC_START -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00012000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_SIZE - \ CONFIG_SYS_SPL_MALLOC_SIZE + \ CONFIG_SYS_INIT_RAM_ADDR)
On 1/17/19 7:57 AM, tien.fong.chee@intel.com wrote:
From: Tien Fong Chee tien.fong.chee@intel.com
This is minimum memory pool size required to get SPL booting to U-Boot, such as FPGA program and loading U-Boot image from FAT.
Rather, this is the minimal size needed for FAT to work ? But then , maybe you should just set the malloc area size a bit bigger to have some headroom available.
How did you come to the number 0x12000 ? Did you do some measurements ?
Signed-off-by: Tien Fong Chee tien.fong.chee@intel.com
include/configs/socfpga_common.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index bd8f5c8..93273a8 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -258,7 +258,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) /* SPL memory allocation configuration, this is for FAT implementation */ #ifndef CONFIG_SYS_SPL_MALLOC_START -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00012000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_SIZE - \ CONFIG_SYS_SPL_MALLOC_SIZE + \ CONFIG_SYS_INIT_RAM_ADDR)
On Fri, 2019-01-18 at 07:23 +0100, Marek Vasut wrote:
On 1/17/19 7:57 AM, tien.fong.chee@intel.com wrote:
From: Tien Fong Chee tien.fong.chee@intel.com
This is minimum memory pool size required to get SPL booting to U- Boot, such as FPGA program and loading U-Boot image from FAT.
Rather, this is the minimal size needed for FAT to work ? But then , maybe you should just set the malloc area size a bit bigger to have some headroom available.
Yes, the is minimal size based on that series of FPGA program patches. How much you think we should increase?
How did you come to the number 0x12000 ? Did you do some measurements ?
Yup, after applying these patches: 1. https://www.mail-archive.com/u-boot@lists.denx.de/msg313259.html%C2%A0- Saving 84kIB max cluster block from excludng both fat write and EXT4 in SPL.
2. https://www.mail-archive.com/u-boot@lists.denx.de/msg312340.html Maximise reusable from memory pool, so the amount required for mmeory pool can be reduced to only (1 max cluster size[0x100000] + other than max cluster size[0x2000]), total is 0x12000.
Signed-off-by: Tien Fong Chee tien.fong.chee@intel.com
include/configs/socfpga_common.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index bd8f5c8..93273a8 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -258,7 +258,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) /* SPL memory allocation configuration, this is for FAT implementation */ #ifndef CONFIG_SYS_SPL_MALLOC_START -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00012000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_SI ZE - \ CONFIG_SYS_SPL_MALLOC_SIZ E + \ CONFIG_SYS_INIT_RAM_ADDR)
participants (3)
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Chee, Tien Fong -
Marek Vasut -
tien.fong.chee＠intel.com