[PATCH V2] net: fec: Get rid of FEC_ENET_ENABLE_[TR]XC_DELAY
The FEC_ENET_ENABLE_.XC_DELAY setting is only used by one system which supports OF control, correctly set the rgmii-id PHY mode in the DT and then determine whether or not to enable the FEC RXC/TXC internal delay based on the PHY mode.
Signed-off-by: Marek Vasut marex@denx.de Cc: Oleksandr Suvorov oleksandr.suvorov@toradex.com Cc: Stefano Babic sbabic@denx.de Cc: Ramon Fried rfried.dev@gmail.com --- V2: Add missing ifdef DM_ETH around the code using fec->interface --- arch/arm/dts/fsl-imx8qm-apalis.dts | 2 +- arch/arm/dts/fsl-imx8qxp-apalis.dts | 2 +- drivers/net/fec_mxc.c | 14 +++++++------- include/configs/apalis-imx8.h | 3 --- include/configs/apalis-imx8x.h | 3 --- 5 files changed, 9 insertions(+), 15 deletions(-)
diff --git a/arch/arm/dts/fsl-imx8qm-apalis.dts b/arch/arm/dts/fsl-imx8qm-apalis.dts index 5187b794527..0d8d3b3e8e8 100644 --- a/arch/arm/dts/fsl-imx8qm-apalis.dts +++ b/arch/arm/dts/fsl-imx8qm-apalis.dts @@ -503,7 +503,7 @@ pinctrl-0 = <&pinctrl_fec1>; fsl,magic-packet; phy-handle = <ðphy0>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-reset-duration = <10>; phy-reset-gpios = <&gpio1 11 1>; status = "okay"; diff --git a/arch/arm/dts/fsl-imx8qxp-apalis.dts b/arch/arm/dts/fsl-imx8qxp-apalis.dts index 6bd231b2834..9cb3d3a809b 100644 --- a/arch/arm/dts/fsl-imx8qxp-apalis.dts +++ b/arch/arm/dts/fsl-imx8qxp-apalis.dts @@ -229,7 +229,7 @@ pinctrl-0 = <&pinctrl_fec1>; fsl,magic-packet; phy-handle = <ðphy0>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-reset-duration = <10>; phy-reset-post-delay = <150>; phy-reset-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index bb55be9a267..4f02ba0ec5f 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -507,14 +507,14 @@ static int fec_open(struct eth_device *edev) writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_ETHER_EN, &fec->eth->ecntrl);
-#ifdef FEC_ENET_ENABLE_TXC_DELAY - writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_TXC_DLY, - &fec->eth->ecntrl); -#endif +#ifdef CONFIG_DM_ETH + if (fec->interface == PHY_INTERFACE_MODE_RGMII_ID || + fec->interface == PHY_INTERFACE_MODE_RGMII_TXID) + setbits_le32(&fec->eth->ecntrl, FEC_ECNTRL_TXC_DLY);
-#ifdef FEC_ENET_ENABLE_RXC_DELAY - writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_RXC_DLY, - &fec->eth->ecntrl); + if (fec->interface == PHY_INTERFACE_MODE_RGMII_ID || + fec->interface == PHY_INTERFACE_MODE_RGMII_RXID) + setbits_le32(&fec->eth->ecntrl, FEC_ECNTRL_RXC_DLY); #endif
#if defined(CONFIG_MX25) || defined(CONFIG_MX53) || defined(CONFIG_MX6SL) diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index db4e9011c0b..81441d7770f 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -21,9 +21,6 @@ #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
/* Networking */ -#define FEC_QUIRK_ENET_MAC -#define FEC_ENET_ENABLE_TXC_DELAY - #define CONFIG_TFTP_TSIZE
#define CONFIG_IPADDR 192.168.10.2 diff --git a/include/configs/apalis-imx8x.h b/include/configs/apalis-imx8x.h index db31c210f50..90bbeb926d3 100644 --- a/include/configs/apalis-imx8x.h +++ b/include/configs/apalis-imx8x.h @@ -25,9 +25,6 @@ #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_SERVERIP 192.168.10.1
-#define FEC_ENET_ENABLE_TXC_DELAY -#define FEC_ENET_ENABLE_RXC_DELAY - #define MEM_LAYOUT_ENV_SETTINGS \ "kernel_addr_r=0x80280000\0" \ "fdt_addr_r=0x83100000\0" \
Hi Marek,
Sorry for the late reply.
On Sun, Jan 24, 2021 at 4:51 PM Marek Vasut marex@denx.de wrote:
The FEC_ENET_ENABLE_.XC_DELAY setting is only used by one system which supports OF control, correctly set the rgmii-id PHY mode in the DT and then determine whether or not to enable the FEC RXC/TXC internal delay based on the PHY mode.
Signed-off-by: Marek Vasut marex@denx.de Cc: Oleksandr Suvorov oleksandr.suvorov@toradex.com Cc: Stefano Babic sbabic@denx.de Cc: Ramon Fried rfried.dev@gmail.com
V2: Add missing ifdef DM_ETH around the code using fec->interface
arch/arm/dts/fsl-imx8qm-apalis.dts | 2 +- arch/arm/dts/fsl-imx8qxp-apalis.dts | 2 +- drivers/net/fec_mxc.c | 14 +++++++------- include/configs/apalis-imx8.h | 3 --- include/configs/apalis-imx8x.h | 3 --- 5 files changed, 9 insertions(+), 15 deletions(-)
diff --git a/arch/arm/dts/fsl-imx8qm-apalis.dts b/arch/arm/dts/fsl-imx8qm-apalis.dts index 5187b794527..0d8d3b3e8e8 100644 --- a/arch/arm/dts/fsl-imx8qm-apalis.dts +++ b/arch/arm/dts/fsl-imx8qm-apalis.dts @@ -503,7 +503,7 @@ pinctrl-0 = <&pinctrl_fec1>; fsl,magic-packet; phy-handle = <ðphy0>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
The PHY on Apalis iMX8QM expects the delay on TXC line only. So "rgmii-txid" would be better there.
phy-reset-duration = <10>; phy-reset-gpios = <&gpio1 11 1>; status = "okay";diff --git a/arch/arm/dts/fsl-imx8qxp-apalis.dts b/arch/arm/dts/fsl-imx8qxp-apalis.dts index 6bd231b2834..9cb3d3a809b 100644 --- a/arch/arm/dts/fsl-imx8qxp-apalis.dts +++ b/arch/arm/dts/fsl-imx8qxp-apalis.dts @@ -229,7 +229,7 @@ pinctrl-0 = <&pinctrl_fec1>; fsl,magic-packet; phy-handle = <ðphy0>;
phy-mode = "rgmii";
phy-mode = "rgmii-id"; phy-reset-duration = <10>; phy-reset-post-delay = <150>; phy-reset-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>;diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index bb55be9a267..4f02ba0ec5f 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -507,14 +507,14 @@ static int fec_open(struct eth_device *edev) writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_ETHER_EN, &fec->eth->ecntrl);
-#ifdef FEC_ENET_ENABLE_TXC_DELAY
writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_TXC_DLY,&fec->eth->ecntrl);-#endif +#ifdef CONFIG_DM_ETH
if (fec->interface == PHY_INTERFACE_MODE_RGMII_ID ||fec->interface == PHY_INTERFACE_MODE_RGMII_TXID)setbits_le32(&fec->eth->ecntrl, FEC_ECNTRL_TXC_DLY);-#ifdef FEC_ENET_ENABLE_RXC_DELAY
writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_RXC_DLY,&fec->eth->ecntrl);
if (fec->interface == PHY_INTERFACE_MODE_RGMII_ID ||fec->interface == PHY_INTERFACE_MODE_RGMII_RXID)setbits_le32(&fec->eth->ecntrl, FEC_ECNTRL_RXC_DLY);#endif
#if defined(CONFIG_MX25) || defined(CONFIG_MX53) || defined(CONFIG_MX6SL) diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index db4e9011c0b..81441d7770f 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -21,9 +21,6 @@ #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
/* Networking */ -#define FEC_QUIRK_ENET_MAC
This quirk can't be dropped so far.
-#define FEC_ENET_ENABLE_TXC_DELAY
#define CONFIG_TFTP_TSIZE
#define CONFIG_IPADDR 192.168.10.2 diff --git a/include/configs/apalis-imx8x.h b/include/configs/apalis-imx8x.h index db31c210f50..90bbeb926d3 100644 --- a/include/configs/apalis-imx8x.h +++ b/include/configs/apalis-imx8x.h @@ -25,9 +25,6 @@ #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_SERVERIP 192.168.10.1
-#define FEC_ENET_ENABLE_TXC_DELAY -#define FEC_ENET_ENABLE_RXC_DELAY
#define MEM_LAYOUT_ENV_SETTINGS \ "kernel_addr_r=0x80280000\0" \ "fdt_addr_r=0x83100000\0" \ -- 2.29.2
On 1/29/21 5:19 PM, Oleksandr Suvorov wrote:
Hi Marek,
Hi,
[...]
+++ b/arch/arm/dts/fsl-imx8qm-apalis.dts @@ -503,7 +503,7 @@ pinctrl-0 = <&pinctrl_fec1>; fsl,magic-packet; phy-handle = <ðphy0>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";The PHY on Apalis iMX8QM expects the delay on TXC line only. So "rgmii-txid" would be better there.
Can you prepare me a tested diff for the apalis boards so I can squash it into V3 ? That would be easiest.
[...]
/* Networking */ -#define FEC_QUIRK_ENET_MAC
This quirk can't be dropped so far.
With the following patch applied, I believe it can: [PATCH] ARM: imx: Add missing FEC ethernet quirk for MX8M
[...]
participants (2)
-
Marek Vasut -
Oleksandr Suvorov