[U-Boot] [PATCH 0/6] am335x_evm: Enable UART{1,2,4,5}
To support serial ports other than UART0 on am335x based systems like the Beaglebone with the RS232 cape.
Patch 4 is not the proper way to do what I want to accomplish but should give the idea I was going after. If someone could give me some pointers on the best way to do this, I'd welcome it.
Thanks
Andrew Bradford (6): am33xx: Enable UART{1,2,4,5} clocks am33xx: Enable UART{1,2,4,5} pin-mux serial: Enable up to 6 eserial devices console & omap-common/spl: Enable use of eserial am33xx: Enable eserial device usage for ns16550 am335x_evm: Enable use of UART{1,2,4,5}
arch/arm/cpu/armv7/am33xx/board.c | 14 +++++++++ arch/arm/cpu/armv7/am33xx/clock.c | 28 +++++++++++++++++ arch/arm/cpu/armv7/omap-common/spl.c | 7 ++++- arch/arm/include/asm/arch-am33xx/sys_proto.h | 6 +++- board/ti/am335x/mux.c | 43 ++++++++++++++++++++++++++ boards.cfg | 4 +++ common/console.c | 24 +++++++++++--- common/serial.c | 6 ++++ drivers/serial/serial.c | 39 ++++++++++++++++++++--- include/common.h | 5 +++ include/configs/am335x_evm.h | 28 ++++++++++++++++- include/serial.h | 4 ++- 12 files changed, 196 insertions(+), 12 deletions(-)
If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the required clocks for the UART in use.
Signed-off-by: Andrew Bradford andrew@bradfordembedded.com --- arch/arm/cpu/armv7/am33xx/clock.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c index 2b19506..4eb9226 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6 +114,34 @@ static void enable_per_clocks(void) while (readl(&cmwkup->wkup_uart0ctrl) != PRCM_MOD_EN) ;
+ /* UART1 */ +#ifdef CONFIG_SERIAL2 + writel(PRCM_MOD_EN, &cmper->uart1clkctrl); + while (readl(&cmper->uart1clkctrl) != PRCM_MOD_EN) + ; +#endif /* CONFIG_SERIAL2 */ + + /* UART2 */ +#ifdef CONFIG_SERIAL3 + writel(PRCM_MOD_EN, &cmper->uart2clkctrl); + while (readl(&cmper->uart2clkctrl) != PRCM_MOD_EN) + ; +#endif /* CONFIG_SERIAL3 */ + + /* UART4 */ +#ifdef CONFIG_SERIAL5 + writel(PRCM_MOD_EN, &cmper->uart4clkctrl); + while (readl(&cmper->uart4clkctrl) != PRCM_MOD_EN) + ; +#endif /* CONFIG_SERIAL5 */ + + /* UART5 */ +#ifdef CONFIG_SERIAL6 + writel(PRCM_MOD_EN, &cmper->uart5clkctrl); + while (readl(&cmper->uart5clkctrl) != PRCM_MOD_EN) + ; +#endif /* CONFIG_SERIAL6 */ + /* MMC0*/ writel(PRCM_MOD_EN, &cmper->mmc0clkctrl); while (readl(&cmper->mmc0clkctrl) != PRCM_MOD_EN)
On Wed, Sep 26, 2012 at 04:04:14PM -0400, Andrew Bradford wrote:
If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the required clocks for the UART in use.
Signed-off-by: Andrew Bradford andrew@bradfordembedded.com
arch/arm/cpu/armv7/am33xx/clock.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c index 2b19506..4eb9226 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6 +114,34 @@ static void enable_per_clocks(void) while (readl(&cmwkup->wkup_uart0ctrl) != PRCM_MOD_EN) ;
- /* UART1 */
+#ifdef CONFIG_SERIAL2
- writel(PRCM_MOD_EN, &cmper->uart1clkctrl);
- while (readl(&cmper->uart1clkctrl) != PRCM_MOD_EN)
;+#endif /* CONFIG_SERIAL2 */
- /* UART2 */
+#ifdef CONFIG_SERIAL3
- writel(PRCM_MOD_EN, &cmper->uart2clkctrl);
- while (readl(&cmper->uart2clkctrl) != PRCM_MOD_EN)
;+#endif /* CONFIG_SERIAL3 */
Profile 5 on the AM335x EVM supports UART3. I know we discussed on IRC that BeagleBone doesn't have that uart pinned out, but I think since this is generic code *and* it can be tested on the full EVM, you should include support for it here.
- /* UART4 */
+#ifdef CONFIG_SERIAL5
- writel(PRCM_MOD_EN, &cmper->uart4clkctrl);
- while (readl(&cmper->uart4clkctrl) != PRCM_MOD_EN)
;+#endif /* CONFIG_SERIAL5 */
- /* UART5 */
+#ifdef CONFIG_SERIAL6
- writel(PRCM_MOD_EN, &cmper->uart5clkctrl);
- while (readl(&cmper->uart5clkctrl) != PRCM_MOD_EN)
;+#endif /* CONFIG_SERIAL6 */
- /* MMC0*/ writel(PRCM_MOD_EN, &cmper->mmc0clkctrl); while (readl(&cmper->mmc0clkctrl) != PRCM_MOD_EN)
-- 1.7.10
U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Dear Andrew Bradford,
If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the required clocks for the UART in use.
Signed-off-by: Andrew Bradford andrew@bradfordembedded.com
arch/arm/cpu/armv7/am33xx/clock.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c index 2b19506..4eb9226 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6 +114,34 @@ static void enable_per_clocks(void) while (readl(&cmwkup->wkup_uart0ctrl) != PRCM_MOD_EN) ;
- /* UART1 */
+#ifdef CONFIG_SERIAL2
- writel(PRCM_MOD_EN, &cmper->uart1clkctrl);
- while (readl(&cmper->uart1clkctrl) != PRCM_MOD_EN)
;
Call WATCHDOG_RESET() here, fix glboally
+#endif /* CONFIG_SERIAL2 */
- /* UART2 */
+#ifdef CONFIG_SERIAL3
- writel(PRCM_MOD_EN, &cmper->uart2clkctrl);
- while (readl(&cmper->uart2clkctrl) != PRCM_MOD_EN)
;+#endif /* CONFIG_SERIAL3 */
- /* UART4 */
+#ifdef CONFIG_SERIAL5
- writel(PRCM_MOD_EN, &cmper->uart4clkctrl);
- while (readl(&cmper->uart4clkctrl) != PRCM_MOD_EN)
;+#endif /* CONFIG_SERIAL5 */
- /* UART5 */
+#ifdef CONFIG_SERIAL6
- writel(PRCM_MOD_EN, &cmper->uart5clkctrl);
- while (readl(&cmper->uart5clkctrl) != PRCM_MOD_EN)
;+#endif /* CONFIG_SERIAL6 */
- /* MMC0*/ writel(PRCM_MOD_EN, &cmper->mmc0clkctrl); while (readl(&cmper->mmc0clkctrl) != PRCM_MOD_EN)
Best regards, Marek Vasut
On Thu, Sep 27, 2012 at 06:13:36PM +0200, Marek Vasut wrote:
Dear Andrew Bradford,
If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the required clocks for the UART in use.
Signed-off-by: Andrew Bradford andrew@bradfordembedded.com
arch/arm/cpu/armv7/am33xx/clock.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c index 2b19506..4eb9226 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6 +114,34 @@ static void enable_per_clocks(void) while (readl(&cmwkup->wkup_uart0ctrl) != PRCM_MOD_EN) ;
- /* UART1 */
+#ifdef CONFIG_SERIAL2
- writel(PRCM_MOD_EN, &cmper->uart1clkctrl);
- while (readl(&cmper->uart1clkctrl) != PRCM_MOD_EN)
;Call WATCHDOG_RESET() here, fix glboally
We don't have WATCHDOG_RESET...
Dear Tom Rini,
On Thu, Sep 27, 2012 at 06:13:36PM +0200, Marek Vasut wrote:
Dear Andrew Bradford,
If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the required clocks for the UART in use.
Signed-off-by: Andrew Bradford andrew@bradfordembedded.com
arch/arm/cpu/armv7/am33xx/clock.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c index 2b19506..4eb9226 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6 +114,34 @@ static void enable_per_clocks(void)
while (readl(&cmwkup->wkup_uart0ctrl) != PRCM_MOD_EN)
;
- /* UART1 */
+#ifdef CONFIG_SERIAL2
- writel(PRCM_MOD_EN, &cmper->uart1clkctrl);
- while (readl(&cmper->uart1clkctrl) != PRCM_MOD_EN)
;Call WATCHDOG_RESET() here, fix glboally
We don't have WATCHDOG_RESET...
You do, and it opts-out to udelay(1) is most cases.
Best regards, Marek Vasut
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1
On 09/27/12 09:45, Marek Vasut wrote:
Dear Tom Rini,
On Thu, Sep 27, 2012 at 06:13:36PM +0200, Marek Vasut wrote:
Dear Andrew Bradford,
If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the required clocks for the UART in use.
Signed-off-by: Andrew Bradford andrew@bradfordembedded.com
arch/arm/cpu/armv7/am33xx/clock.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c index 2b19506..4eb9226 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6 +114,34 @@ static void enable_per_clocks(void)
while (readl(&cmwkup->wkup_uart0ctrl) != PRCM_MOD_EN) ;
- /* UART1 */ +#ifdef CONFIG_SERIAL2 + writel(PRCM_MOD_EN,
&cmper->uart1clkctrl); + while (readl(&cmper->uart1clkctrl) != PRCM_MOD_EN) + ;
Call WATCHDOG_RESET() here, fix glboally
We don't have WATCHDOG_RESET...
You do, and it opts-out to udelay(1) is most cases.
It looks like it opts-out to {} in most cases, in <watchdog.h>
- -- Tom
Dear Tom Rini,
On 09/27/12 09:45, Marek Vasut wrote:
Dear Tom Rini,
On Thu, Sep 27, 2012 at 06:13:36PM +0200, Marek Vasut wrote:
Dear Andrew Bradford,
If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the required clocks for the UART in use.
Signed-off-by: Andrew Bradford andrew@bradfordembedded.com
arch/arm/cpu/armv7/am33xx/clock.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c index 2b19506..4eb9226 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6 +114,34 @@ static void enable_per_clocks(void)
while (readl(&cmwkup->wkup_uart0ctrl) != PRCM_MOD_EN) ;
- /* UART1 */ +#ifdef CONFIG_SERIAL2 + writel(PRCM_MOD_EN,
&cmper->uart1clkctrl); + while (readl(&cmper->uart1clkctrl) != PRCM_MOD_EN) + ;
Call WATCHDOG_RESET() here, fix glboally
We don't have WATCHDOG_RESET...
You do, and it opts-out to udelay(1) is most cases.
It looks like it opts-out to {} in most cases, in <watchdog.h>
Correct, we use it to retrigger watchdog timer if implemented.
Best regards, Marek Vasut
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1
On 09/27/12 10:11, Marek Vasut wrote:
Dear Tom Rini,
On 09/27/12 09:45, Marek Vasut wrote:
Dear Tom Rini,
On Thu, Sep 27, 2012 at 06:13:36PM +0200, Marek Vasut wrote:
Dear Andrew Bradford,
If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the required clocks for the UART in use.
Signed-off-by: Andrew Bradford andrew@bradfordembedded.com
arch/arm/cpu/armv7/am33xx/clock.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c index 2b19506..4eb9226 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6 +114,34 @@ static void enable_per_clocks(void)
while (readl(&cmwkup->wkup_uart0ctrl) != PRCM_MOD_EN) ;
- /* UART1 */ +#ifdef CONFIG_SERIAL2 + writel(PRCM_MOD_EN,
&cmper->uart1clkctrl); + while (readl(&cmper->uart1clkctrl) != PRCM_MOD_EN) + ;
Call WATCHDOG_RESET() here, fix glboally
We don't have WATCHDOG_RESET...
You do, and it opts-out to udelay(1) is most cases.
It looks like it opts-out to {} in most cases, in <watchdog.h>
Correct, we use it to retrigger watchdog timer if implemented.
Which the SoC support isn't doing and the rest of the code also isn't trying to use. Arguably the whole file should be doing udelay(1) in each of these instances and a clean up patch which this series depends on might be useful.
- -- Tom
Dear Tom Rini,
On 09/27/12 10:11, Marek Vasut wrote:
Dear Tom Rini,
On 09/27/12 09:45, Marek Vasut wrote:
Dear Tom Rini,
On Thu, Sep 27, 2012 at 06:13:36PM +0200, Marek Vasut wrote:
Dear Andrew Bradford,
> If configured to use UART{1,2,4,5}, such as on the Beaglebone > RS232 cape, enable the required clocks for the UART in use. > > Signed-off-by: Andrew Bradford andrew@bradfordembedded.com > --- > > arch/arm/cpu/armv7/am33xx/clock.c | 28 > ++++++++++++++++++++++++++++ 1 file changed, 28 > insertions(+) > > diff --git a/arch/arm/cpu/armv7/am33xx/clock.c > b/arch/arm/cpu/armv7/am33xx/clock.c index 2b19506..4eb9226 > 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ > b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6 +114,34 @@ > static void enable_per_clocks(void) > > while (readl(&cmwkup->wkup_uart0ctrl) != PRCM_MOD_EN) ; > > + /* UART1 */ +#ifdef CONFIG_SERIAL2 + writel(PRCM_MOD_EN, > &cmper->uart1clkctrl); + while (readl(&cmper->uart1clkctrl) > != PRCM_MOD_EN) + ;
Call WATCHDOG_RESET() here, fix glboally
We don't have WATCHDOG_RESET...
You do, and it opts-out to udelay(1) is most cases.
It looks like it opts-out to {} in most cases, in <watchdog.h>
Correct, we use it to retrigger watchdog timer if implemented.
Which the SoC support isn't doing and the rest of the code also isn't trying to use. Arguably the whole file should be doing udelay(1) in each of these instances and a clean up patch which this series depends on might be useful.
So we're changing the practice from doing WATCHDOG_RESET() to udelay(1) ? And we're doing so in generic code?
Best regards, Marek Vasut
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1
On 09/27/12 10:27, Marek Vasut wrote:
Dear Tom Rini,
On 09/27/12 10:11, Marek Vasut wrote:
Dear Tom Rini,
On 09/27/12 09:45, Marek Vasut wrote:
Dear Tom Rini,
On Thu, Sep 27, 2012 at 06:13:36PM +0200, Marek Vasut wrote: > Dear Andrew Bradford, > >> If configured to use UART{1,2,4,5}, such as on the >> Beaglebone RS232 cape, enable the required clocks >> for the UART in use. >> >> Signed-off-by: Andrew Bradford >> andrew@bradfordembedded.com --- >> >> arch/arm/cpu/armv7/am33xx/clock.c | 28 >> ++++++++++++++++++++++++++++ 1 file changed, 28 >> insertions(+) >> >> diff --git a/arch/arm/cpu/armv7/am33xx/clock.c >> b/arch/arm/cpu/armv7/am33xx/clock.c index >> 2b19506..4eb9226 100644 --- >> a/arch/arm/cpu/armv7/am33xx/clock.c +++ >> b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6 >> +114,34 @@ static void enable_per_clocks(void) >> >> while (readl(&cmwkup->wkup_uart0ctrl) != >> PRCM_MOD_EN) ; >> >> + /* UART1 */ +#ifdef CONFIG_SERIAL2 + >> writel(PRCM_MOD_EN, &cmper->uart1clkctrl); + while >> (readl(&cmper->uart1clkctrl) != PRCM_MOD_EN) + ; > > Call WATCHDOG_RESET() here, fix glboally
We don't have WATCHDOG_RESET...
You do, and it opts-out to udelay(1) is most cases.
It looks like it opts-out to {} in most cases, in <watchdog.h>
Correct, we use it to retrigger watchdog timer if implemented.
Which the SoC support isn't doing and the rest of the code also isn't trying to use. Arguably the whole file should be doing udelay(1) in each of these instances and a clean up patch which this series depends on might be useful.
So we're changing the practice from doing WATCHDOG_RESET() to udelay(1) ? And we're doing so in generic code?
I think we should use WATCHDOG_RESET where it makes sense and udelay where we're just delaying. I don't see WATCHDOG_RESET() being used for enable this-or-that clock. But maybe I'm just really missing something about how we use WATCHDOG_RESET in the case where it's not a nop.
- -- Tom
Tom & Marek,
On Thu, 27 Sep 2012 10:53:05 -0700 Tom Rini trini@ti.com wrote:
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1
On 09/27/12 10:27, Marek Vasut wrote:
Dear Tom Rini,
On 09/27/12 10:11, Marek Vasut wrote:
Dear Tom Rini,
On 09/27/12 09:45, Marek Vasut wrote:
Dear Tom Rini,
> On Thu, Sep 27, 2012 at 06:13:36PM +0200, Marek Vasut > wrote: >> Dear Andrew Bradford, >> >>> If configured to use UART{1,2,4,5}, such as on the >>> Beaglebone RS232 cape, enable the required clocks >>> for the UART in use. >>> >>> Signed-off-by: Andrew Bradford >>> andrew@bradfordembedded.com --- >>> >>> arch/arm/cpu/armv7/am33xx/clock.c | 28 >>> ++++++++++++++++++++++++++++ 1 file changed, 28 >>> insertions(+) >>> >>> diff --git a/arch/arm/cpu/armv7/am33xx/clock.c >>> b/arch/arm/cpu/armv7/am33xx/clock.c index >>> 2b19506..4eb9226 100644 --- >>> a/arch/arm/cpu/armv7/am33xx/clock.c +++ >>> b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6 >>> +114,34 @@ static void enable_per_clocks(void) >>> >>> while (readl(&cmwkup->wkup_uart0ctrl) != >>> PRCM_MOD_EN) ; >>> >>> + /* UART1 */ +#ifdef CONFIG_SERIAL2 + >>> writel(PRCM_MOD_EN, &cmper->uart1clkctrl); + while >>> (readl(&cmper->uart1clkctrl) != PRCM_MOD_EN) >>> + ; >> >> Call WATCHDOG_RESET() here, fix glboally > > We don't have WATCHDOG_RESET...
You do, and it opts-out to udelay(1) is most cases.
It looks like it opts-out to {} in most cases, in <watchdog.h>
Correct, we use it to retrigger watchdog timer if implemented.
Which the SoC support isn't doing and the rest of the code also isn't trying to use. Arguably the whole file should be doing udelay(1) in each of these instances and a clean up patch which this series depends on might be useful.
So we're changing the practice from doing WATCHDOG_RESET() to udelay(1) ? And we're doing so in generic code?
I think we should use WATCHDOG_RESET where it makes sense and udelay where we're just delaying. I don't see WATCHDOG_RESET() being used for enable this-or-that clock. But maybe I'm just really missing something about how we use WATCHDOG_RESET in the case where it's not a nop.
Is there a consensus on the use of WATCHDOG_RESET vs. udelay(1) in this instance?
Looking through the arch/arm/cpu/armv7/{omap-common,omap3}/clock files shows no use of either WATCHDOG_RESET or udelay(1) in the ways mentioned. In fact, I can't easily find a use of WATCHDOG_RESET at all within arch/arm/cpu/armv7 code.
What is the goal of using either udelay(1) or WATCHDOG_RESET as recommended here?
Thanks, Andrew
On Fri, Oct 19, 2012 at 08:25:46PM -0400, Andrew Bradford wrote:
Tom & Marek,
On Thu, 27 Sep 2012 10:53:05 -0700 Tom Rini trini@ti.com wrote:
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1
On 09/27/12 10:27, Marek Vasut wrote:
Dear Tom Rini,
On 09/27/12 10:11, Marek Vasut wrote:
Dear Tom Rini,
On 09/27/12 09:45, Marek Vasut wrote: > Dear Tom Rini, > >> On Thu, Sep 27, 2012 at 06:13:36PM +0200, Marek Vasut >> wrote: >>> Dear Andrew Bradford, >>> >>>> If configured to use UART{1,2,4,5}, such as on the >>>> Beaglebone RS232 cape, enable the required clocks >>>> for the UART in use. >>>> >>>> Signed-off-by: Andrew Bradford >>>> andrew@bradfordembedded.com --- >>>> >>>> arch/arm/cpu/armv7/am33xx/clock.c | 28 >>>> ++++++++++++++++++++++++++++ 1 file changed, 28 >>>> insertions(+) >>>> >>>> diff --git a/arch/arm/cpu/armv7/am33xx/clock.c >>>> b/arch/arm/cpu/armv7/am33xx/clock.c index >>>> 2b19506..4eb9226 100644 --- >>>> a/arch/arm/cpu/armv7/am33xx/clock.c +++ >>>> b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6 >>>> +114,34 @@ static void enable_per_clocks(void) >>>> >>>> while (readl(&cmwkup->wkup_uart0ctrl) != >>>> PRCM_MOD_EN) ; >>>> >>>> + /* UART1 */ +#ifdef CONFIG_SERIAL2 + >>>> writel(PRCM_MOD_EN, &cmper->uart1clkctrl); + while >>>> (readl(&cmper->uart1clkctrl) != PRCM_MOD_EN) >>>> + ; >>> >>> Call WATCHDOG_RESET() here, fix glboally >> >> We don't have WATCHDOG_RESET... > > You do, and it opts-out to udelay(1) is most cases.
It looks like it opts-out to {} in most cases, in <watchdog.h>
Correct, we use it to retrigger watchdog timer if implemented.
Which the SoC support isn't doing and the rest of the code also isn't trying to use. Arguably the whole file should be doing udelay(1) in each of these instances and a clean up patch which this series depends on might be useful.
So we're changing the practice from doing WATCHDOG_RESET() to udelay(1) ? And we're doing so in generic code?
I think we should use WATCHDOG_RESET where it makes sense and udelay where we're just delaying. I don't see WATCHDOG_RESET() being used for enable this-or-that clock. But maybe I'm just really missing something about how we use WATCHDOG_RESET in the case where it's not a nop.
Is there a consensus on the use of WATCHDOG_RESET vs. udelay(1) in this instance?
Looking through the arch/arm/cpu/armv7/{omap-common,omap3}/clock files shows no use of either WATCHDOG_RESET or udelay(1) in the ways mentioned. In fact, I can't easily find a use of WATCHDOG_RESET at all within arch/arm/cpu/armv7 code.
What is the goal of using either udelay(1) or WATCHDOG_RESET as recommended here?
Lets just match the rest of the SoC code and have the empty loop. We can have the discussion about what kind of delay or macro makes most sense another time.
Dear Tom Rini,
On Fri, Oct 19, 2012 at 08:25:46PM -0400, Andrew Bradford wrote:
Tom & Marek,
On Thu, 27 Sep 2012 10:53:05 -0700
Tom Rini trini@ti.com wrote:
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1
On 09/27/12 10:27, Marek Vasut wrote:
Dear Tom Rini,
On 09/27/12 10:11, Marek Vasut wrote:
Dear Tom Rini,
> On 09/27/12 09:45, Marek Vasut wrote: >> Dear Tom Rini, >> >>> On Thu, Sep 27, 2012 at 06:13:36PM +0200, Marek Vasut >>> >>> wrote: >>>> Dear Andrew Bradford, >>>> >>>>> If configured to use UART{1,2,4,5}, such as on the >>>>> Beaglebone RS232 cape, enable the required clocks >>>>> for the UART in use. >>>>> >>>>> Signed-off-by: Andrew Bradford >>>>> andrew@bradfordembedded.com --- >>>>> >>>>> arch/arm/cpu/armv7/am33xx/clock.c | 28 >>>>> ++++++++++++++++++++++++++++ 1 file changed, 28 >>>>> insertions(+) >>>>> >>>>> diff --git a/arch/arm/cpu/armv7/am33xx/clock.c >>>>> b/arch/arm/cpu/armv7/am33xx/clock.c index >>>>> 2b19506..4eb9226 100644 --- >>>>> a/arch/arm/cpu/armv7/am33xx/clock.c +++ >>>>> b/arch/arm/cpu/armv7/am33xx/clock.c @@ -114,6 >>>>> +114,34 @@ static void enable_per_clocks(void) >>>>> >>>>> while (readl(&cmwkup->wkup_uart0ctrl) != >>>>> PRCM_MOD_EN) ; >>>>> >>>>> + /* UART1 */ +#ifdef CONFIG_SERIAL2 + >>>>> writel(PRCM_MOD_EN, &cmper->uart1clkctrl); + while >>>>> (readl(&cmper->uart1clkctrl) != PRCM_MOD_EN) >>>>> + ; >>>> >>>> Call WATCHDOG_RESET() here, fix glboally >>> >>> We don't have WATCHDOG_RESET... >> >> You do, and it opts-out to udelay(1) is most cases. > > It looks like it opts-out to {} in most cases, in > <watchdog.h>
Correct, we use it to retrigger watchdog timer if implemented.
Which the SoC support isn't doing and the rest of the code also isn't trying to use. Arguably the whole file should be doing udelay(1) in each of these instances and a clean up patch which this series depends on might be useful.
So we're changing the practice from doing WATCHDOG_RESET() to udelay(1) ? And we're doing so in generic code?
I think we should use WATCHDOG_RESET where it makes sense and udelay where we're just delaying. I don't see WATCHDOG_RESET() being used for enable this-or-that clock. But maybe I'm just really missing something about how we use WATCHDOG_RESET in the case where it's not a nop.
Is there a consensus on the use of WATCHDOG_RESET vs. udelay(1) in this instance?
Looking through the arch/arm/cpu/armv7/{omap-common,omap3}/clock files shows no use of either WATCHDOG_RESET or udelay(1) in the ways mentioned. In fact, I can't easily find a use of WATCHDOG_RESET at all within arch/arm/cpu/armv7 code.
What is the goal of using either udelay(1) or WATCHDOG_RESET as recommended here?
Lets just match the rest of the SoC code and have the empty loop. We can have the discussion about what kind of delay or macro makes most sense another time.
WATCHDOG_RESET() shall obviously be called, just enable watchdog and your uboot will keep restarting in such loops.
Best regards, Marek Vasut
On Sat, Oct 20, 2012 at 11:57 AM, Marek Vasut marex@denx.de wrote:
Dear Tom Rini,
[snip]
Lets just match the rest of the SoC code and have the empty loop. We can have the discussion about what kind of delay or macro makes most sense another time.
WATCHDOG_RESET() shall obviously be called, just enable watchdog and your uboot will keep restarting in such loops.
The reason I want to have this discussion outside of Andrew's changes is that if the SoC isn't setting these flags when asked, you should just throw the board out, something fundamental is broken. The only real question is, would it make sense, or not, to enforce a real delay or just keep reading until it is set. I'll poke around a little tomorrow.
If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the proper pin-muxing as per the RS232 cape configuration.
Signed-off-by: Andrew Bradford andrew@bradfordembedded.com --- arch/arm/cpu/armv7/am33xx/board.c | 14 +++++++++ arch/arm/include/asm/arch-am33xx/sys_proto.h | 6 +++- board/ti/am335x/mux.c | 43 ++++++++++++++++++++++++++ 3 files changed, 62 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index ecc2671..32d1da4 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -152,7 +152,21 @@ void s_init(void) /* UART softreset */ u32 regVal;
+#ifdef CONFIG_SERIAL1 enable_uart0_pin_mux(); +#endif /* CONFIG_SERIAL1 */ +#ifdef CONFIG_SERIAL2 + enable_uart1_pin_mux(); +#endif /* CONFIG_SERIAL2 */ +#ifdef CONFIG_SERIAL3 + enable_uart2_pin_mux(); +#endif /* CONFIG_SERIAL3 */ +#ifdef CONFIG_SERIAL5 + enable_uart4_pin_mux(); +#endif /* CONFIG_SERIAL5 */ +#ifdef CONFIG_SERIAL6 + enable_uart5_pin_mux(); +#endif /* CONFIG_SERIAL6 */
regVal = readl(&uart_base->uartsyscfg); regVal |= UART_RESET; diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index 819ea65..4852127 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -53,11 +53,15 @@ void ddr_pll_config(unsigned int ddrpll_M);
/* * We have three pin mux functions that must exist. We must be able to enable - * uart0, for initial output and i2c0 to read the main EEPROM. We then have a + * a uart for initial output and i2c0 to read the main EEPROM. We then have a * main pinmux function that can be overridden to enable all other pinmux that * is required on the board. */ void enable_uart0_pin_mux(void); +void enable_uart1_pin_mux(void); +void enable_uart2_pin_mux(void); +void enable_uart4_pin_mux(void); +void enable_uart5_pin_mux(void); void enable_i2c0_pin_mux(void); void enable_board_pin_mux(struct am335x_baseboard_id *header); #endif diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c index 80becd5..db47d0e 100644 --- a/board/ti/am335x/mux.c +++ b/board/ti/am335x/mux.c @@ -259,6 +259,30 @@ static struct module_pin_mux uart0_pin_mux[] = { {-1}, };
+static struct module_pin_mux uart1_pin_mux[] = { + {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART1_RXD */ + {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */ + {-1}, +}; + +static struct module_pin_mux uart2_pin_mux[] = { + {OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART2_RXD */ + {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */ + {-1}, +}; + +static struct module_pin_mux uart4_pin_mux[] = { + {OFFSET(gpmc_wait0), (MODE(6) | PULLUP_EN | RXACTIVE)}, /* UART4_RXD */ + {OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */ + {-1}, +}; + +static struct module_pin_mux uart5_pin_mux[] = { + {OFFSET(lcd_data9), (MODE(4) | PULLUP_EN | RXACTIVE)}, /* UART5_RXD */ + {OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */ + {-1}, +}; + static struct module_pin_mux mmc0_pin_mux[] = { {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */ {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */ @@ -381,6 +405,25 @@ void enable_uart0_pin_mux(void) configure_module_pin_mux(uart0_pin_mux); }
+void enable_uart1_pin_mux(void) +{ + configure_module_pin_mux(uart1_pin_mux); +} + +void enable_uart2_pin_mux(void) +{ + configure_module_pin_mux(uart2_pin_mux); +} + +void enable_uart4_pin_mux(void) +{ + configure_module_pin_mux(uart4_pin_mux); +} + +void enable_uart5_pin_mux(void) +{ + configure_module_pin_mux(uart5_pin_mux); +}
void enable_i2c0_pin_mux(void) {
On Wed, Sep 26, 2012 at 04:04:15PM -0400, Andrew Bradford wrote:
If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232 cape, enable the proper pin-muxing as per the RS232 cape configuration.
Signed-off-by: Andrew Bradford andrew@bradfordembedded.com
arch/arm/cpu/armv7/am33xx/board.c | 14 +++++++++ arch/arm/include/asm/arch-am33xx/sys_proto.h | 6 +++- board/ti/am335x/mux.c | 43 ++++++++++++++++++++++++++ 3 files changed, 62 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index ecc2671..32d1da4 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -152,7 +152,21 @@ void s_init(void) /* UART softreset */ u32 regVal;
+#ifdef CONFIG_SERIAL1 enable_uart0_pin_mux(); +#endif /* CONFIG_SERIAL1 */ +#ifdef CONFIG_SERIAL2
- enable_uart1_pin_mux();
+#endif /* CONFIG_SERIAL2 */ +#ifdef CONFIG_SERIAL3
- enable_uart2_pin_mux();
+#endif /* CONFIG_SERIAL3 */
Same thing here about UART3
+#ifdef CONFIG_SERIAL5
- enable_uart4_pin_mux();
+#endif /* CONFIG_SERIAL5 */ +#ifdef CONFIG_SERIAL6
- enable_uart5_pin_mux();
+#endif /* CONFIG_SERIAL6 */
regVal = readl(&uart_base->uartsyscfg); regVal |= UART_RESET; diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index 819ea65..4852127 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -53,11 +53,15 @@ void ddr_pll_config(unsigned int ddrpll_M);
/*
- We have three pin mux functions that must exist. We must be able to enable
- uart0, for initial output and i2c0 to read the main EEPROM. We then have a
*/
- a uart for initial output and i2c0 to read the main EEPROM. We then have a
- main pinmux function that can be overridden to enable all other pinmux that
- is required on the board.
void enable_uart0_pin_mux(void); +void enable_uart1_pin_mux(void); +void enable_uart2_pin_mux(void); +void enable_uart4_pin_mux(void); +void enable_uart5_pin_mux(void); void enable_i2c0_pin_mux(void); void enable_board_pin_mux(struct am335x_baseboard_id *header); #endif diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c index 80becd5..db47d0e 100644 --- a/board/ti/am335x/mux.c +++ b/board/ti/am335x/mux.c @@ -259,6 +259,30 @@ static struct module_pin_mux uart0_pin_mux[] = { {-1}, };
+static struct module_pin_mux uart1_pin_mux[] = {
- {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART1_RXD */
- {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */
- {-1},
+};
+static struct module_pin_mux uart2_pin_mux[] = {
- {OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART2_RXD */
- {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */
- {-1},
+};
+static struct module_pin_mux uart4_pin_mux[] = {
- {OFFSET(gpmc_wait0), (MODE(6) | PULLUP_EN | RXACTIVE)}, /* UART4_RXD */
- {OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */
- {-1},
+};
+static struct module_pin_mux uart5_pin_mux[] = {
- {OFFSET(lcd_data9), (MODE(4) | PULLUP_EN | RXACTIVE)}, /* UART5_RXD */
- {OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */
- {-1},
+};
static struct module_pin_mux mmc0_pin_mux[] = { {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */ {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */ @@ -381,6 +405,25 @@ void enable_uart0_pin_mux(void) configure_module_pin_mux(uart0_pin_mux); }
+void enable_uart1_pin_mux(void) +{
- configure_module_pin_mux(uart1_pin_mux);
+}
+void enable_uart2_pin_mux(void) +{
- configure_module_pin_mux(uart2_pin_mux);
+}
+void enable_uart4_pin_mux(void) +{
- configure_module_pin_mux(uart4_pin_mux);
+}
+void enable_uart5_pin_mux(void) +{
- configure_module_pin_mux(uart5_pin_mux);
+}
void enable_i2c0_pin_mux(void) { -- 1.7.10
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Increase the number of possible eserial devices from 4 to 6.
Signed-off-by: Andrew Bradford andrew@bradfordembedded.com --- common/serial.c | 6 ++++++ drivers/serial/serial.c | 39 +++++++++++++++++++++++++++++++++++---- include/serial.h | 2 ++ 3 files changed, 43 insertions(+), 4 deletions(-)
diff --git a/common/serial.c b/common/serial.c index 75cc1bb..c237aee 100644 --- a/common/serial.c +++ b/common/serial.c @@ -70,6 +70,12 @@ void serial_initialize(void) #if defined(CONFIG_SYS_NS16550_COM4) serial_register(&eserial4_device); #endif +#if defined(CONFIG_SYS_NS16550_COM5) + serial_register(&eserial5_device); +#endif +#if defined(CONFIG_SYS_NS16550_COM6) + serial_register(&eserial6_device); +#endif #endif /* CONFIG_SYS_NS16550_SERIAL */ #if defined(CONFIG_FFUART) serial_register(&serial_ffuart_device); diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index b10bab7..ba05f7f 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -43,7 +43,7 @@ DECLARE_GLOBAL_DATA_PTR; #else #error "No console index specified." #endif /* CONFIG_SERIAL_MULTI */ -#elif (CONFIG_CONS_INDEX < 1) || (CONFIG_CONS_INDEX > 4) +#elif (CONFIG_CONS_INDEX < 1) || (CONFIG_CONS_INDEX > 6) #error "Invalid console index value." #endif
@@ -55,12 +55,16 @@ DECLARE_GLOBAL_DATA_PTR; #error "Console port 3 defined but not configured." #elif CONFIG_CONS_INDEX == 4 && !defined(CONFIG_SYS_NS16550_COM4) #error "Console port 4 defined but not configured." +#elif CONFIG_CONS_INDEX == 5 && !defined(CONFIG_SYS_NS16550_COM5) +#error "Console port 5 defined but not configured." +#elif CONFIG_CONS_INDEX == 6 && !defined(CONFIG_SYS_NS16550_COM6) +#error "Console port 6 defined but not configured." #endif
/* Note: The port number specified in the functions is 1 based. * the array is 0 based. */ -static NS16550_t serial_ports[4] = { +static NS16550_t serial_ports[6] = { #ifdef CONFIG_SYS_NS16550_COM1 (NS16550_t)CONFIG_SYS_NS16550_COM1, #else @@ -77,7 +81,17 @@ static NS16550_t serial_ports[4] = { NULL, #endif #ifdef CONFIG_SYS_NS16550_COM4 - (NS16550_t)CONFIG_SYS_NS16550_COM4 + (NS16550_t)CONFIG_SYS_NS16550_COM4, +#else + NULL, +#endif +#ifdef CONFIG_SYS_NS16550_COM5 + (NS16550_t)CONFIG_SYS_NS16550_COM5, +#else + NULL, +#endif +#ifdef CONFIG_SYS_NS16550_COM6 + (NS16550_t)CONFIG_SYS_NS16550_COM6 #else NULL #endif @@ -175,7 +189,14 @@ int serial_init (void) clock_divisor = calc_divisor(serial_ports[3]); NS16550_init(serial_ports[3], clock_divisor); #endif - +#ifdef CONFIG_SYS_NS16550_COM5 + clock_divisor = calc_divisor(serial_ports[4]); + NS16550_init(serial_ports[4], clock_divisor); +#endif +#ifdef CONFIG_SYS_NS16550_COM6 + clock_divisor = calc_divisor(serial_ports[5]); + NS16550_init(serial_ports[5], clock_divisor); +#endif return (0); } #endif @@ -323,6 +344,12 @@ struct serial_device eserial3_device = DECLARE_ESERIAL_FUNCTIONS(4); struct serial_device eserial4_device = INIT_ESERIAL_STRUCTURE(4, "eserial3"); +DECLARE_ESERIAL_FUNCTIONS(5); +struct serial_device eserial5_device = + INIT_ESERIAL_STRUCTURE(5, "eserial4"); +DECLARE_ESERIAL_FUNCTIONS(6); +struct serial_device eserial6_device = + INIT_ESERIAL_STRUCTURE(6, "eserial5");
__weak struct serial_device *default_serial_console(void) { @@ -334,6 +361,10 @@ __weak struct serial_device *default_serial_console(void) return &eserial3_device; #elif CONFIG_CONS_INDEX == 4 return &eserial4_device; +#elif CONFIG_CONS_INDEX == 5 + return &eserial5_device; +#elif CONFIG_CONS_INDEX == 6 + return &eserial6_device; #else #error "Bad CONFIG_CONS_INDEX." #endif diff --git a/include/serial.h b/include/serial.h index d76d6df..dcb2d97 100644 --- a/include/serial.h +++ b/include/serial.h @@ -40,6 +40,8 @@ extern struct serial_device eserial1_device; extern struct serial_device eserial2_device; extern struct serial_device eserial3_device; extern struct serial_device eserial4_device; +extern struct serial_device eserial5_device; +extern struct serial_device eserial6_device; #endif /* CONFIG_SYS_NS16550_SERIAL */
#endif
Enable use of eserial devices for common and omap-common/spl.
This probably isn't the right way to do this as the changes aren't needed for 'common' configurations, just for one case.
Signed-off-by: Andrew Bradford andrew@bradfordembedded.com --- arch/arm/cpu/armv7/omap-common/spl.c | 7 ++++++- common/console.c | 24 ++++++++++++++++++++---- include/common.h | 5 +++++ 3 files changed, 31 insertions(+), 5 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c index 4d1ac85..6258c0e 100644 --- a/arch/arm/cpu/armv7/omap-common/spl.c +++ b/arch/arm/cpu/armv7/omap-common/spl.c @@ -210,7 +210,12 @@ void preloader_console_init(void) gd->flags |= GD_FLG_RELOC; gd->baudrate = CONFIG_BAUDRATE;
- serial_init(); /* serial communications setup */ + /* serial communications setup */ +#ifdef CONFIG_SERIAL_MULTI + ESERIAL_FUNC(CONFIG_CONS_INDEX, init)(); +#else + serial_init(); +#endif /* CONFIG_SERIAL_MULTI */
gd->have_console = 1;
diff --git a/common/console.c b/common/console.c index 1177f7d..5670ce1 100644 --- a/common/console.c +++ b/common/console.c @@ -302,12 +302,16 @@ int getc(void) return 0;
if (gd->flags & GD_FLG_DEVINIT) { - /* Get from the standard input */ - return fgetc(stdin); + /* Get from the standard input */ + return fgetc(stdin); }
/* Send directly to the handler */ +#ifdef CONFIG_SERIAL_MULTI + return ESERIAL_FUNC(CONFIG_CONS_INDEX, getc)(); +#else return serial_getc(); +#endif /* CONFIG_SERIAL_MULTI */ }
int tstc(void) @@ -321,12 +325,16 @@ int tstc(void) return 0;
if (gd->flags & GD_FLG_DEVINIT) { - /* Test the standard input */ - return ftstc(stdin); + /* Test the standard input */ + return ftstc(stdin); }
/* Send directly to the handler */ +#ifdef CONFIG_SERIAL_MULTI + return ESERIAL_FUNC(CONFIG_CONS_INDEX, tstc)(); +#else return serial_tstc(); +#endif /* CONFIG_SERIAL_MULTI */ }
#ifdef CONFIG_PRE_CONSOLE_BUFFER @@ -382,7 +390,11 @@ void putc(const char c) fputc(stdout, c); } else { /* Send directly to the handler */ +#ifdef CONFIG_SERIAL_MULTI + ESERIAL_FUNC(CONFIG_CONS_INDEX, putc)(c); +#else serial_putc(c); +#endif /* CONFIG_SERIAL_MULTI */ } }
@@ -406,7 +418,11 @@ void puts(const char *s) fputs(stdout, s); } else { /* Send directly to the handler */ +#ifdef CONFIG_SERIAL_MULTI + ESERIAL_FUNC(CONFIG_CONS_INDEX, puts)(s); +#else serial_puts(s); +#endif /* CONFIG_SERIAL_MULTI */ } }
diff --git a/include/common.h b/include/common.h index 55025c0..b4ebbfb 100644 --- a/include/common.h +++ b/include/common.h @@ -206,6 +206,11 @@ typedef void (interrupt_handler_t)(void *);
#endif /* CONFIG_SERIAL_MULTI */
+#ifdef CONFIG_SERIAL_MULTI +#define EXPAND_ESERIAL(x, func) eserial ## x ## _ ## func +#define ESERIAL_FUNC(x, func) EXPAND_ESERIAL(x, func) +#endif /* CONFIG_SERIAL_MULTI */ + /* * General Purpose Utilities */
Dear Andrew Bradford,
Enable use of eserial devices for common and omap-common/spl.
This probably isn't the right way to do this as the changes aren't needed for 'common' configurations, just for one case.
Signed-off-by: Andrew Bradford andrew@bradfordembedded.com
arch/arm/cpu/armv7/omap-common/spl.c | 7 ++++++- common/console.c | 24 ++++++++++++++++++++---- include/common.h | 5 +++++ 3 files changed, 31 insertions(+), 5 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c index 4d1ac85..6258c0e 100644 --- a/arch/arm/cpu/armv7/omap-common/spl.c +++ b/arch/arm/cpu/armv7/omap-common/spl.c @@ -210,7 +210,12 @@ void preloader_console_init(void) gd->flags |= GD_FLG_RELOC; gd->baudrate = CONFIG_BAUDRATE;
- serial_init(); /* serial communications setup */
- /* serial communications setup */
+#ifdef CONFIG_SERIAL_MULTI
- ESERIAL_FUNC(CONFIG_CONS_INDEX, init)();
Uh, if you implement default_serial_console properly(), you won't need this. Actually, I'm in the process of rolling out V2 of my serial patchset, which will make your life much more easier. Can you rebase the patchset on my series? I'll poke you about it.
+#else
- serial_init();
+#endif /* CONFIG_SERIAL_MULTI */
gd->have_console = 1;
diff --git a/common/console.c b/common/console.c index 1177f7d..5670ce1 100644 --- a/common/console.c +++ b/common/console.c @@ -302,12 +302,16 @@ int getc(void) return 0;
if (gd->flags & GD_FLG_DEVINIT) {
/* Get from the standard input */return fgetc(stdin);
- /* Get from the standard input */
- return fgetc(stdin);
NAK for this formating issue
[...]
Best regards, Marek Vasut
Signed-off-by: Andrew Bradford andrew@bradfordembedded.com --- include/serial.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/serial.h b/include/serial.h index dcb2d97..079655f 100644 --- a/include/serial.h +++ b/include/serial.h @@ -32,7 +32,7 @@ extern struct serial_device *default_serial_console(void); defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \ defined(CONFIG_MPC86xx) || defined(CONFIG_SYS_SC520) || \ defined(CONFIG_TEGRA20) || defined(CONFIG_SYS_COREBOOT) || \ - defined(CONFIG_MICROBLAZE) + defined(CONFIG_MICROBLAZE) || defined(CONFIG_AM33XX) extern struct serial_device serial0_device; extern struct serial_device serial1_device; #if defined(CONFIG_SYS_NS16550_SERIAL)
Add targets of am335x_evm_uart{1,2,4,5} to have serial input/output on UART{1,2,4,5} for use with the Beaglebone RS232 cape and other custom configurations.
Signed-off-by: Andrew Bradford andrew@bradfordembedded.com --- boards.cfg | 4 ++++ include/configs/am335x_evm.h | 28 +++++++++++++++++++++++++++- 2 files changed, 31 insertions(+), 1 deletion(-)
diff --git a/boards.cfg b/boards.cfg index f789539..342de03 100644 --- a/boards.cfg +++ b/boards.cfg @@ -220,6 +220,10 @@ integratorap_cm946es arm arm946es integrator armltd integratorcp_cm946es arm arm946es integrator armltd - integratorcp:CM946ES ca9x4_ct_vxp arm armv7 vexpress armltd am335x_evm arm armv7 am335x ti am33xx +am335x_evm_uart1 arm armv7 am335x ti am33xx am335x_evm:AM33XX_UART_SELECT=1 +am335x_evm_uart2 arm armv7 am335x ti am33xx am335x_evm:AM33XX_UART_SELECT=2 +am335x_evm_uart4 arm armv7 am335x ti am33xx am335x_evm:AM33XX_UART_SELECT=4 +am335x_evm_uart5 arm armv7 am335x ti am33xx am335x_evm:AM33XX_UART_SELECT=5 highbank arm armv7 highbank - highbank mx51_efikamx arm armv7 mx51_efikamx genesi mx5 mx51_efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKAMX,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_mx.cfg mx51_efikasb arm armv7 mx51_efikamx genesi mx5 mx51_efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKASB,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_sb.cfg diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index a3752bc..efb11d8 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -158,9 +158,14 @@ /* NS16550 Configuration */ #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SERIAL_MULTI #define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK (48000000) #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ +#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ +#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ +#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ +#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
/* I2C Configuration */ #define CONFIG_I2C @@ -182,11 +187,32 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \ 4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
+#define CONFIG_ENV_OVERWRITE 1 + /* - * select serial console configuration + * select serial console configuration, uart0 always enabled */ #define CONFIG_SERIAL1 1 +#ifndef CONFIG_AM33XX_UART_SELECT #define CONFIG_CONS_INDEX 1 +#endif /* CONFIG_AM33XX_UART_SELECT */ + +#if CONFIG_AM33XX_UART_SELECT == 1 +#define CONFIG_SERIAL2 1 +#define CONFIG_CONS_INDEX 2 +#endif /* CONFIG_AM33XX_UART_SELECT == 1 */ +#if CONFIG_AM33XX_UART_SELECT == 2 +#define CONFIG_SERIAL3 1 +#define CONFIG_CONS_INDEX 3 +#endif /* CONFIG_AM33XX_UART_SELECT == 2 */ +#if CONFIG_AM33XX_UART_SELECT == 4 +#define CONFIG_SERIAL5 1 +#define CONFIG_CONS_INDEX 5 +#endif /* CONFIG_AM33XX_UART_SELECT == 4 */ +#if CONFIG_AM33XX_UART_SELECT == 5 +#define CONFIG_SERIAL6 1 +#define CONFIG_CONS_INDEX 6 +#endif /* CONFIG_AM33XX_UART_SELECT == 5 */ #define CONFIG_SYS_CONSOLE_INFO_QUIET
#define CONFIG_ENV_IS_NOWHERE
On Wed, Sep 26, 2012 at 04:04:19PM -0400, Andrew Bradford wrote:
Add targets of am335x_evm_uart{1,2,4,5} to have serial input/output on UART{1,2,4,5} for use with the Beaglebone RS232 cape and other custom configurations.
Add the UART3 target and I'll blow the dust off my EVM and try to test it. :)
-Matt
Signed-off-by: Andrew Bradford andrew@bradfordembedded.com
boards.cfg | 4 ++++ include/configs/am335x_evm.h | 28 +++++++++++++++++++++++++++- 2 files changed, 31 insertions(+), 1 deletion(-)
diff --git a/boards.cfg b/boards.cfg index f789539..342de03 100644 --- a/boards.cfg +++ b/boards.cfg @@ -220,6 +220,10 @@ integratorap_cm946es arm arm946es integrator armltd integratorcp_cm946es arm arm946es integrator armltd - integratorcp:CM946ES ca9x4_ct_vxp arm armv7 vexpress armltd am335x_evm arm armv7 am335x ti am33xx +am335x_evm_uart1 arm armv7 am335x ti am33xx am335x_evm:AM33XX_UART_SELECT=1 +am335x_evm_uart2 arm armv7 am335x ti am33xx am335x_evm:AM33XX_UART_SELECT=2 +am335x_evm_uart4 arm armv7 am335x ti am33xx am335x_evm:AM33XX_UART_SELECT=4 +am335x_evm_uart5 arm armv7 am335x ti am33xx am335x_evm:AM33XX_UART_SELECT=5 highbank arm armv7 highbank - highbank mx51_efikamx arm armv7 mx51_efikamx genesi mx5 mx51_efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKAMX,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_mx.cfg mx51_efikasb arm armv7 mx51_efikamx genesi mx5 mx51_efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKASB,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_sb.cfg diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index a3752bc..efb11d8 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -158,9 +158,14 @@ /* NS16550 Configuration */ #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SERIAL_MULTI #define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK (48000000) #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ +#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ +#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ +#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ +#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
/* I2C Configuration */ #define CONFIG_I2C @@ -182,11 +187,32 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \ 4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
+#define CONFIG_ENV_OVERWRITE 1
/*
- select serial console configuration
*/
- select serial console configuration, uart0 always enabled
#define CONFIG_SERIAL1 1 +#ifndef CONFIG_AM33XX_UART_SELECT #define CONFIG_CONS_INDEX 1 +#endif /* CONFIG_AM33XX_UART_SELECT */
+#if CONFIG_AM33XX_UART_SELECT == 1 +#define CONFIG_SERIAL2 1 +#define CONFIG_CONS_INDEX 2 +#endif /* CONFIG_AM33XX_UART_SELECT == 1 */ +#if CONFIG_AM33XX_UART_SELECT == 2 +#define CONFIG_SERIAL3 1 +#define CONFIG_CONS_INDEX 3 +#endif /* CONFIG_AM33XX_UART_SELECT == 2 */ +#if CONFIG_AM33XX_UART_SELECT == 4 +#define CONFIG_SERIAL5 1 +#define CONFIG_CONS_INDEX 5 +#endif /* CONFIG_AM33XX_UART_SELECT == 4 */ +#if CONFIG_AM33XX_UART_SELECT == 5 +#define CONFIG_SERIAL6 1 +#define CONFIG_CONS_INDEX 6 +#endif /* CONFIG_AM33XX_UART_SELECT == 5 */ #define CONFIG_SYS_CONSOLE_INFO_QUIET
#define CONFIG_ENV_IS_NOWHERE
1.7.10
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