[U-Boot] [PATCH 1/3] omap4: panda: disable uart2 pads during boot

If uart2 is enabled during boot, spurious wifi chip transmission will hang the module and it is impossible to recover from this situation without hard reset. This will prevent any l4_per domain idle transitions.
Signed-off-by: Tero Kristo t-kristo@ti.com --- board/ti/panda/panda_mux_data.h | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/board/ti/panda/panda_mux_data.h b/board/ti/panda/panda_mux_data.h index 3efc22a..dc8b388 100644 --- a/board/ti/panda/panda_mux_data.h +++ b/board/ti/panda/panda_mux_data.h @@ -168,10 +168,10 @@ const struct pad_conf_entry core_padconf_array_non_essential[] = { {ABE_DMIC_DIN1, (IEN | M0)}, /* abe_dmic_din1 */ {ABE_DMIC_DIN2, (PTU | IEN | M3)}, /* gpio_121 */ {ABE_DMIC_DIN3, (IEN | M0)}, /* abe_dmic_din3 */ - {UART2_CTS, (PTU | IEN | M0)}, /* uart2_cts */ - {UART2_RTS, (M0)}, /* uart2_rts */ - {UART2_RX, (PTU | IEN | M0)}, /* uart2_rx */ - {UART2_TX, (M0)}, /* uart2_tx */ + {UART2_CTS, (PTU | IEN | M7)}, /* uart2_cts */ + {UART2_RTS, (M7)}, /* uart2_rts */ + {UART2_RX, (PTU | IEN | M7)}, /* uart2_rx */ + {UART2_TX, (M7)}, /* uart2_tx */ {HDQ_SIO, (M3)}, /* gpio_127 */ {MCSPI1_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_clk */ {MCSPI1_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_somi */

If this is done in the bootloader, the FS-USB will later be stuck into intransition state, which will prevent the device from entering idle.
Signed-off-by: Tero Kristo t-kristo@ti.com --- arch/arm/cpu/armv7/omap4/clocks.c | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap4/clocks.c b/arch/arm/cpu/armv7/omap4/clocks.c index dd694c4..c29531b 100644 --- a/arch/arm/cpu/armv7/omap4/clocks.c +++ b/arch/arm/cpu/armv7/omap4/clocks.c @@ -378,7 +378,6 @@ void enable_basic_clocks(void) &prcm->cm_l4per_gptimer2_clkctrl, &prcm->cm_wkup_wdtimer2_clkctrl, &prcm->cm_l4per_uart3_clkctrl, - &prcm->cm_l3init_fsusb_clkctrl, &prcm->cm_l3init_hsusbhost_clkctrl, 0 }; @@ -505,7 +504,6 @@ void enable_non_essential_clocks(void) &prcm->cm_dss_dss_clkctrl, &prcm->cm_sgx_sgx_clkctrl, &prcm->cm_l3init_hsusbhost_clkctrl, - &prcm->cm_l3init_fsusb_clkctrl, 0 };

Hi Tero, [snip]
@@ -378,7 +378,6 @@ void enable_basic_clocks(void) &prcm->cm_l4per_gptimer2_clkctrl, &prcm->cm_wkup_wdtimer2_clkctrl, &prcm->cm_l4per_uart3_clkctrl,
- &prcm->cm_l3init_fsusb_clkctrl,
&prcm->cm_l3init_hsusbhost_clkctrl, 0 };
It should not have been in both places. Removing here is fine.
@@ -505,7 +504,6 @@ void enable_non_essential_clocks(void) &prcm->cm_dss_dss_clkctrl, &prcm->cm_sgx_sgx_clkctrl, &prcm->cm_l3init_hsusbhost_clkctrl,
- &prcm->cm_l3init_fsusb_clkctrl,
0 };
But instead of removing this here,how about removing the macro CONFIG_SYS_CLOCKS_ENABLE_ALL in omap4_common.h. This will get rid of all non essential clocks which are currently enabled.
One problem might be non-essential dplls should still be enabled in u-boot because kernel expects all the dplls to be in locked state during boot without which it would start throwing slew of warnings.
I will send a patch to clean this first.
Thanks, Sricharan

Hi Tero, Sorry my mailer thrashed my earlier email. resending it again.
On Wed, Apr 25, 2012 at 9:35 PM, Tero Kristo t-kristo@ti.com wrote:
If this is done in the bootloader, the FS-USB will later be stuck into intransition state, which will prevent the device from entering idle.
Signed-off-by: Tero Kristo t-kristo@ti.com
arch/arm/cpu/armv7/omap4/clocks.c | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap4/clocks.c b/arch/arm/cpu/armv7/omap4/clocks.c index dd694c4..c29531b 100644 --- a/arch/arm/cpu/armv7/omap4/clocks.c +++ b/arch/arm/cpu/armv7/omap4/clocks.c @@ -378,7 +378,6 @@ void enable_basic_clocks(void) &prcm->cm_l4per_gptimer2_clkctrl, &prcm->cm_wkup_wdtimer2_clkctrl, &prcm->cm_l4per_uart3_clkctrl,
- &prcm->cm_l3init_fsusb_clkctrl,
&prcm->cm_l3init_hsusbhost_clkctrl, 0 };
It should not have been in both places. Removing here is fine.
@@ -505,7 +504,6 @@ void enable_non_essential_clocks(void) &prcm->cm_dss_dss_clkctrl, &prcm->cm_sgx_sgx_clkctrl, &prcm->cm_l3init_hsusbhost_clkctrl,
- &prcm->cm_l3init_fsusb_clkctrl,
0 };
But instead of removing this here,how about removing the macro CONFIG_SYS_CLOCKS_ENABLE_ALL in omap4_common.h. This will get rid of all non essential clocks which are currently enabled.
One problem might be non-essential dplls should still be enabled in u-boot because kernel expects all the dplls to be in locked state during boot without which it would start throwing slew of warnings.
This way we can get rid of your patch3 as well.
I will send a patch to clean this first.
Thanks, Sricharan

Booting up these cores (dsp / ivahd / cortex-m3) is bad without firmware running on them, and they will hang preventing any kind of sleep transitions later on with the kernel.
Signed-off-by: Tero Kristo t-kristo@ti.com --- arch/arm/cpu/armv7/omap4/clocks.c | 4 ---- 1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap4/clocks.c b/arch/arm/cpu/armv7/omap4/clocks.c index c29531b..316fdf9 100644 --- a/arch/arm/cpu/armv7/omap4/clocks.c +++ b/arch/arm/cpu/armv7/omap4/clocks.c @@ -454,10 +454,6 @@ void enable_non_essential_clocks(void) };
u32 *const clk_modules_hw_auto_non_essential[] = { - &prcm->cm_mpu_m3_mpu_m3_clkctrl, - &prcm->cm_ivahd_ivahd_clkctrl, - &prcm->cm_ivahd_sl2_clkctrl, - &prcm->cm_dsp_dsp_clkctrl, &prcm->cm_l3_2_gpmc_clkctrl, &prcm->cm_l3instr_l3_3_clkctrl, &prcm->cm_l3instr_l3_instr_clkctrl,

Hi Tero,
[snip]
u32 *const clk_modules_hw_auto_non_essential[] = {
- &prcm->cm_mpu_m3_mpu_m3_clkctrl,
- &prcm->cm_ivahd_ivahd_clkctrl,
- &prcm->cm_ivahd_sl2_clkctrl,
- &prcm->cm_dsp_dsp_clkctrl,
&prcm->cm_l3_2_gpmc_clkctrl, &prcm->cm_l3instr_l3_3_clkctrl, &prcm->cm_l3instr_l3_instr_clkctrl,
Looks fine. Acked-by: R Sricharan r.sricharan@ti.com
Thanks, Sricharan

Hi Tero,
On Wed, Apr 25, 2012 at 9:35 PM, Tero Kristo t-kristo@ti.com wrote:
If uart2 is enabled during boot, spurious wifi chip transmission will hang the module and it is impossible to recover from this situation without hard reset. This will prevent any l4_per domain idle transitions.
Signed-off-by: Tero Kristo t-kristo@ti.com
board/ti/panda/panda_mux_data.h | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/board/ti/panda/panda_mux_data.h b/board/ti/panda/panda_mux_data.h index 3efc22a..dc8b388 100644 --- a/board/ti/panda/panda_mux_data.h +++ b/board/ti/panda/panda_mux_data.h @@ -168,10 +168,10 @@ const struct pad_conf_entry core_padconf_array_non_essential[] = { {ABE_DMIC_DIN1, (IEN | M0)}, /* abe_dmic_din1 */ {ABE_DMIC_DIN2, (PTU | IEN | M3)}, /* gpio_121 */ {ABE_DMIC_DIN3, (IEN | M0)}, /* abe_dmic_din3 */
- {UART2_CTS, (PTU | IEN | M0)}, /* uart2_cts */
- {UART2_RTS, (M0)}, /* uart2_rts */
- {UART2_RX, (PTU | IEN | M0)}, /* uart2_rx */
- {UART2_TX, (M0)}, /* uart2_tx */
- {UART2_CTS, (PTU | IEN | M7)}, /* uart2_cts */
- {UART2_RTS, (M7)}, /* uart2_rts */
- {UART2_RX, (PTU | IEN | M7)}, /* uart2_rx */
- {UART2_TX, (M7)}, /* uart2_tx */
{HDQ_SIO, (M3)}, /* gpio_127 */ {MCSPI1_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_clk */ {MCSPI1_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_somi */ --
How about not muxing and keeping the pads at reset modes ( safe mode). If this works , then better to remove these pads from the table.
Thanks, Sricharan

On Sat, 2012-05-05 at 15:04 +0530, R, Sricharan wrote:
Hi Tero,
On Wed, Apr 25, 2012 at 9:35 PM, Tero Kristo t-kristo@ti.com wrote:
If uart2 is enabled during boot, spurious wifi chip transmission will hang the module and it is impossible to recover from this situation without hard reset. This will prevent any l4_per domain idle transitions.
Signed-off-by: Tero Kristo t-kristo@ti.com
board/ti/panda/panda_mux_data.h | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/board/ti/panda/panda_mux_data.h b/board/ti/panda/panda_mux_data.h index 3efc22a..dc8b388 100644 --- a/board/ti/panda/panda_mux_data.h +++ b/board/ti/panda/panda_mux_data.h @@ -168,10 +168,10 @@ const struct pad_conf_entry core_padconf_array_non_essential[] = { {ABE_DMIC_DIN1, (IEN | M0)}, /* abe_dmic_din1 */ {ABE_DMIC_DIN2, (PTU | IEN | M3)}, /* gpio_121 */ {ABE_DMIC_DIN3, (IEN | M0)}, /* abe_dmic_din3 */
{UART2_CTS, (PTU | IEN | M0)}, /* uart2_cts */
{UART2_RTS, (M0)}, /* uart2_rts */
{UART2_RX, (PTU | IEN | M0)}, /* uart2_rx */
{UART2_TX, (M0)}, /* uart2_tx */
{UART2_CTS, (PTU | IEN | M7)}, /* uart2_cts */
{UART2_RTS, (M7)}, /* uart2_rts */
{UART2_RX, (PTU | IEN | M7)}, /* uart2_rx */
{UART2_TX, (M7)}, /* uart2_tx */ {HDQ_SIO, (M3)}, /* gpio_127 */ {MCSPI1_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_clk */ {MCSPI1_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_somi */
--
How about not muxing and keeping the pads at reset modes ( safe mode). If this works , then better to remove these pads from the table.
This works also, just tried it out to double check.
-Tero

Tero, [snip]
- {UART2_CTS, (PTU | IEN | M0)}, /* uart2_cts */
- {UART2_RTS, (M0)}, /* uart2_rts */
- {UART2_RX, (PTU | IEN | M0)}, /* uart2_rx */
- {UART2_TX, (M0)}, /* uart2_tx */
- {UART2_CTS, (PTU | IEN | M7)}, /* uart2_cts */
- {UART2_RTS, (M7)}, /* uart2_rts */
- {UART2_RX, (PTU | IEN | M7)}, /* uart2_rx */
- {UART2_TX, (M7)}, /* uart2_tx */
{HDQ_SIO, (M3)}, /* gpio_127 */ {MCSPI1_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_clk */ {MCSPI1_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_somi */ --
How about not muxing and keeping the pads at reset modes ( safe mode). If this works , then better to remove these pads from the table.
This works also, just tried it out to double check.
Thanks. Then better to just remove these entries.
Thanks, Sricharan

On Wed, Apr 25, 2012 at 07:05:19PM +0300, Tero Kristo wrote:
If uart2 is enabled during boot, spurious wifi chip transmission will hang the module and it is impossible to recover from this situation without hard reset. This will prevent any l4_per domain idle transitions.
Signed-off-by: Tero Kristo t-kristo@ti.com
(along with parts 2 and 3 of the series) applied to u-boot-ti/master, thanks.
participants (3)
-
R, Sricharan
-
Tero Kristo
-
Tom Rini