[U-Boot] [PATCH 00/12] tegra: nyan-big: Support chainloading and add documentation
Every now and then someone wants to chain-load U-Boot on a Chromebook. The procedure is not very complicated but there are some oddities.
This series updates a few things with allow U-Boot to start on nyan-big in this way and adds documentation on how to do it. This provides a central place where the procedure on different devices can be documented.
Simon Glass (12): arm: arm720t: Support CONFIG_SKIP_LOWLEVEL_INIT_ONLY tegra: Init clocks even when SPL did not run tegra: dts: Add cros-ec SPI settings arm: Rename HCTR to HTCR arm: Don't try to support CONFIG_ARMV7_LPAE on ARMv4T arm: Disable LPAE if not enabled tegra: spi: Wait a little after setting the clocks tegra: nyan-big: Enable the dhrystone benchmark tegra: video: Don't power up the SOR twice tegra: Enable CP15 init tegra: clock: Avoid a divide-by-zero error README: Add instructions for chain-loading U-Boot
arch/arm/cpu/arm720t/start.S | 6 +- arch/arm/dts/tegra124-nyan-big-u-boot.dtsi | 9 ++ arch/arm/include/asm/arch-tegra/clock.h | 3 + arch/arm/lib/cache-cp15.c | 13 +- arch/arm/mach-tegra/board2.c | 3 + arch/arm/mach-tegra/clock.c | 10 +- arch/arm/mach-tegra/tegra124/clock.c | 18 +++ configs/nyan-big_defconfig | 2 + doc/README.chromium | 222 +++++++++++++++++++++++++++ doc/chromium/devkeys/kernel.keyblock | Bin 0 -> 1208 bytes doc/chromium/devkeys/kernel_data_key.vbprivk | Bin 0 -> 1199 bytes drivers/spi/tegra114_spi.c | 1 + drivers/video/tegra124/sor.c | 9 ++ include/configs/tegra-common-post.h | 2 +- 14 files changed, 292 insertions(+), 6 deletions(-) create mode 100644 doc/README.chromium create mode 100644 doc/chromium/devkeys/kernel.keyblock create mode 100644 doc/chromium/devkeys/kernel_data_key.vbprivk
This option allows skipping the call to lowlevel() while still performing CP15 init. Support this on ARM720T so it can be used with Tegra.
Signed-off-by: Simon Glass sjg@chromium.org ---
arch/arm/cpu/arm720t/start.S | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 0bb3441fb8..365d8f08cb 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -38,7 +38,8 @@ reset: * we do sys-critical inits only at reboot, * not when booting from ram! */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT +#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && \ + !defined(CONFIG_SKIP_LOWLEVEL_INIT_ONLY) bl cpu_init_crit #endif
@@ -62,7 +63,8 @@ c_runtime_cpu_setup: ************************************************************************* */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT +#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && \ + !defined(CONFIG_SKIP_LOWLEVEL_INIT_ONLY) cpu_init_crit:
mov ip, lr
On Mon, May 22, 2017 at 05:17:21AM -0600, Simon Glass wrote:
This option allows skipping the call to lowlevel() while still performing CP15 init. Support this on ARM720T so it can be used with Tegra.
Signed-off-by: Simon Glass sjg@chromium.org
Reviewed-by: Tom Rini trini@konsulko.com
At present early clock init happens in SPL. If SPL did not run (because for example U-Boot is chain-loaded from another boot loader) then the clocks are not set as U-Boot expects.
Add a function to detect this and call the early clock init in U-Boot proper.
Signed-off-by: Simon Glass sjg@chromium.org ---
arch/arm/include/asm/arch-tegra/clock.h | 3 +++ arch/arm/mach-tegra/board2.c | 3 +++ arch/arm/mach-tegra/clock.c | 5 +++++ arch/arm/mach-tegra/tegra124/clock.c | 18 ++++++++++++++++++ 4 files changed, 29 insertions(+)
diff --git a/arch/arm/include/asm/arch-tegra/clock.h b/arch/arm/include/asm/arch-tegra/clock.h index 301de4a899..92180db321 100644 --- a/arch/arm/include/asm/arch-tegra/clock.h +++ b/arch/arm/include/asm/arch-tegra/clock.h @@ -288,6 +288,9 @@ void clock_init(void); /* Initialize the PLLs */ void clock_early_init(void);
+/* @return true if hardware indicates that clock_early_init() was called */ +bool clock_early_init_done(void); + /* Returns a pointer to the clock source register for a peripheral */ u32 *get_periph_source_reg(enum periph_id periph_id);
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index e0a39e1a32..bd137969f0 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -181,6 +181,9 @@ void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
int board_early_init_f(void) { + if (!clock_early_init_done()) + clock_early_init(); + #if defined(CONFIG_TEGRA_DISCONNECT_UDC_ON_BOOT) #define USBCMD_FS2 (1 << 15) { diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c index 090dba629c..ce68c7d0cc 100644 --- a/arch/arm/mach-tegra/clock.c +++ b/arch/arm/mach-tegra/clock.c @@ -824,3 +824,8 @@ int clock_external_output(int clk_id)
return 0; } + +__weak bool clock_early_init_done(void) +{ + return true; +} diff --git a/arch/arm/mach-tegra/tegra124/clock.c b/arch/arm/mach-tegra/tegra124/clock.c index 5e4406102f..5ae718b342 100644 --- a/arch/arm/mach-tegra/tegra124/clock.c +++ b/arch/arm/mach-tegra/tegra124/clock.c @@ -891,6 +891,24 @@ void clock_early_init(void) udelay(2); }
+/* + * clock_early_init_done - Check if clock_early_init() has been called + * + * Check a register that we set up to see if clock_early_init() has already + * been called. + * + * @return true if clock_early_init() was called, false if not + */ +bool clock_early_init_done(void) +{ + struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; + u32 val; + + val = readl(&clkrst->crc_sclk_brst_pol); + + return val == 0x20002222; +} + void arch_timer_init(void) { struct sysctr_ctlr *sysctr = (struct sysctr_ctlr *)NV_PA_TSC_BASE;
At present the interrupt does not work and the SPI bus runs much less quickly than it should. Add settings to fix this.
Signed-off-by: Simon Glass sjg@chromium.org ---
arch/arm/dts/tegra124-nyan-big-u-boot.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/arch/arm/dts/tegra124-nyan-big-u-boot.dtsi b/arch/arm/dts/tegra124-nyan-big-u-boot.dtsi index fff1d78169..65c3851aff 100644 --- a/arch/arm/dts/tegra124-nyan-big-u-boot.dtsi +++ b/arch/arm/dts/tegra124-nyan-big-u-boot.dtsi @@ -12,4 +12,13 @@ u-boot,dm-pre-reloc; }; }; + + spi@7000d400 { + spi-deactivate-delay = <200>; + spi-max-frequency = <3000000>; + + cros_ec: cros-ec@0 { + ec-interrupt = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; + }; + }; };
This appears to be a typo. Fix it.
Signed-off-by: Simon Glass sjg@chromium.org ---
arch/arm/lib/cache-cp15.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index e9bbcf5122..0f7020a315 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -147,7 +147,7 @@ static inline void mmu_setup(void) #endif
if (is_hyp()) { - /* Set HCTR to enable LPAE */ + /* Set HTCR to enable LPAE */ asm volatile("mcr p15, 4, %0, c2, c0, 2" : : "r" (reg) : "memory"); /* Set HTTBR0 */
On Mon, May 22, 2017 at 05:17:24AM -0600, Simon Glass wrote:
This appears to be a typo. Fix it.
Signed-off-by: Simon Glass sjg@chromium.org
Reviewed-by: Tom Rini trini@konsulko.com
At present if CONFIG_ARMV7_LPAE is defined then mmu_setup() will use instructions which are invalid on ARMv4T. This happens on Tegra since it has an ARMv4T boot CPU. Add a check for the architecture version to allow the code to be built. It will not actually be executed by the boot CPU, but needs to compile.
Signed-off-by: Simon Glass sjg@chromium.org ---
arch/arm/lib/cache-cp15.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index 0f7020a315..f293573601 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -129,7 +129,7 @@ static inline void mmu_setup(void) dram_bank_mmu_setup(i); }
-#ifdef CONFIG_ARMV7_LPAE +#if defined(CONFIG_ARMV7_LPAE) && __LINUX_ARM_ARCH__ != 4 /* Set up 4 PTE entries pointing to our 4 1GB page tables */ for (i = 0; i < 4; i++) { u64 *page_table = (u64 *)(gd->arch.tlb_addr + (4096 * 4));
On Mon, May 22, 2017 at 05:17:25AM -0600, Simon Glass wrote:
At present if CONFIG_ARMV7_LPAE is defined then mmu_setup() will use instructions which are invalid on ARMv4T. This happens on Tegra since it has an ARMv4T boot CPU. Add a check for the architecture version to allow the code to be built. It will not actually be executed by the boot CPU, but needs to compile.
Signed-off-by: Simon Glass sjg@chromium.org
arch/arm/lib/cache-cp15.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index 0f7020a315..f293573601 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -129,7 +129,7 @@ static inline void mmu_setup(void) dram_bank_mmu_setup(i); }
-#ifdef CONFIG_ARMV7_LPAE +#if defined(CONFIG_ARMV7_LPAE) && __LINUX_ARM_ARCH__ != 4 /* Set up 4 PTE entries pointing to our 4 1GB page tables */ for (i = 0; i < 4; i++) { u64 *page_table = (u64 *)(gd->arch.tlb_addr + (4096 * 4));
Wait, how do we get to this situation again, and how does it end up being OK? SPL gets built for ARMv4T and U-Boot proper is built for v7, and we end up doing LPAE enable in full U-Boot?
Hi Tom.
On 22 May 2017 at 19:15, Tom Rini trini@konsulko.com wrote:
On Mon, May 22, 2017 at 05:17:25AM -0600, Simon Glass wrote:
At present if CONFIG_ARMV7_LPAE is defined then mmu_setup() will use instructions which are invalid on ARMv4T. This happens on Tegra since it has an ARMv4T boot CPU. Add a check for the architecture version to allow the code to be built. It will not actually be executed by the boot CPU, but needs to compile.
Signed-off-by: Simon Glass sjg@chromium.org
arch/arm/lib/cache-cp15.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index 0f7020a315..f293573601 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -129,7 +129,7 @@ static inline void mmu_setup(void) dram_bank_mmu_setup(i); }
-#ifdef CONFIG_ARMV7_LPAE +#if defined(CONFIG_ARMV7_LPAE) && __LINUX_ARM_ARCH__ != 4 /* Set up 4 PTE entries pointing to our 4 1GB page tables */ for (i = 0; i < 4; i++) { u64 *page_table = (u64 *)(gd->arch.tlb_addr + (4096 * 4));
Wait, how do we get to this situation again, and how does it end up being OK? SPL gets built for ARMv4T and U-Boot proper is built for v7, and we end up doing LPAE enable in full U-Boot?
Eek sorry I missed this question. The problem is that with ARMv4T this code does not currently build. On Tegra, if we enable CONFIG_ARMV7_LPAE, this code runs on ARMv7, but it still compiled by the ARMv7 boot CPU. So the change here is to make sure it is not compiled for ARMv4T.
Another way of thinking about this is that ARMv4T does not support LPAE but we have no way to enable the option only for ARMv7. Both CPUs compile the same code. The __LINUX_ARM_ARCH__ option helps with this.
Regards, Simon
On Thu, Jun 08, 2017 at 09:00:17PM -0600, Simon Glass wrote:
Hi Tom.
On 22 May 2017 at 19:15, Tom Rini trini@konsulko.com wrote:
On Mon, May 22, 2017 at 05:17:25AM -0600, Simon Glass wrote:
At present if CONFIG_ARMV7_LPAE is defined then mmu_setup() will use instructions which are invalid on ARMv4T. This happens on Tegra since it has an ARMv4T boot CPU. Add a check for the architecture version to allow the code to be built. It will not actually be executed by the boot CPU, but needs to compile.
Signed-off-by: Simon Glass sjg@chromium.org
arch/arm/lib/cache-cp15.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index 0f7020a315..f293573601 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -129,7 +129,7 @@ static inline void mmu_setup(void) dram_bank_mmu_setup(i); }
-#ifdef CONFIG_ARMV7_LPAE +#if defined(CONFIG_ARMV7_LPAE) && __LINUX_ARM_ARCH__ != 4 /* Set up 4 PTE entries pointing to our 4 1GB page tables */ for (i = 0; i < 4; i++) { u64 *page_table = (u64 *)(gd->arch.tlb_addr + (4096 * 4));
Wait, how do we get to this situation again, and how does it end up being OK? SPL gets built for ARMv4T and U-Boot proper is built for v7, and we end up doing LPAE enable in full U-Boot?
Eek sorry I missed this question. The problem is that with ARMv4T this code does not currently build. On Tegra, if we enable CONFIG_ARMV7_LPAE, this code runs on ARMv7, but it still compiled by the ARMv7 boot CPU. So the change here is to make sure it is not compiled for ARMv4T.
Another way of thinking about this is that ARMv4T does not support LPAE but we have no way to enable the option only for ARMv7. Both CPUs compile the same code. The __LINUX_ARM_ARCH__ option helps with this.
Ah, right. Thanks.
Reviewed-by: Tom Rini trini@konsulko.com
If CONFIG_ARMV7_LPAE is not defined we should make sure that the feature is disabled. This can happen if U-Boot is chain-loaded from another boot loader which does enable LPAE.
Signed-off-by: Simon Glass sjg@chromium.org ---
arch/arm/lib/cache-cp15.c | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index f293573601..cf852c061b 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -172,6 +172,15 @@ static inline void mmu_setup(void) : : "r" (MEMORY_ATTRIBUTES) : "memory"); } #elif defined(CONFIG_CPU_V7) + if (is_hyp()) { + /* Set HTCR to disable LPAE */ + asm volatile("mcr p15, 4, %0, c2, c0, 2" + : : "r" (0) : "memory"); + } else { + /* Set TTBCR to disable LPAE */ + asm volatile("mcr p15, 0, %0, c2, c0, 2" + : : "r" (0) : "memory"); + } /* Set TTBR0 */ reg = gd->arch.tlb_addr & TTBR0_BASE_ADDR_MASK; #if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
On Mon, May 22, 2017 at 05:17:26AM -0600, Simon Glass wrote:
If CONFIG_ARMV7_LPAE is not defined we should make sure that the feature is disabled. This can happen if U-Boot is chain-loaded from another boot loader which does enable LPAE.
Signed-off-by: Simon Glass sjg@chromium.org
Reviewed-by: Tom Rini trini@konsulko.com
For devices that need a delay between SPI transactions we seem to need an additional delay before the first one if the CPU is running at full speed. Add this, under control of the existing setting. At present it will only be enabled with the Chrome OS EC.
Signed-off-by: Simon Glass sjg@chromium.org ---
drivers/spi/tegra114_spi.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/spi/tegra114_spi.c b/drivers/spi/tegra114_spi.c index 013bc82380..04b4fce061 100644 --- a/drivers/spi/tegra114_spi.c +++ b/drivers/spi/tegra114_spi.c @@ -149,6 +149,7 @@ static int tegra114_spi_probe(struct udevice *bus) bus->name, priv->freq, rate); } } + udelay(plat->deactivate_delay_us);
/* Clear stale status here */ setbits_le32(®s->fifo_status,
Enable this so we can roughly measure CPU performance. Also enable the cache command to allow for timing.
Signed-off-by: Simon Glass sjg@chromium.org ---
configs/nyan-big_defconfig | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index e53cf66168..e2b2babd4c 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set CONFIG_CMD_BMP=y +CONFIG_CMD_CACHE=y CONFIG_CMD_BOOTSTAGE=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y @@ -76,5 +77,6 @@ CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_TEGRA124=y CONFIG_VIDEO_BRIDGE=y +CONFIG_CMD_DHRYSTONE=y CONFIG_TPM=y CONFIG_ERRNO_STR=y
If U-Boot is the secondary boot loader, or has been run from itself, the SOR may already be powered up. Powering it up again causes a hang, so detect this situation and skip it.
Signed-off-by: Simon Glass sjg@chromium.org ---
drivers/video/tegra124/sor.c | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/drivers/video/tegra124/sor.c b/drivers/video/tegra124/sor.c index 1f5e572bda..700ab25d46 100644 --- a/drivers/video/tegra124/sor.c +++ b/drivers/video/tegra124/sor.c @@ -466,11 +466,20 @@ void tegra_dc_sor_set_lane_count(struct udevice *dev, u8 lane_count) static int tegra_dc_sor_power_up(struct udevice *dev, int is_lvds) { struct tegra_dc_sor_data *sor = dev_get_priv(dev); + u32 reg; int ret;
if (sor->power_is_up) return 0;
+ /* + * If for some reason it is already powered up, don't do it again. + * This can happen if U-Boot is the secondary boot loader. + */ + reg = tegra_sor_readl(sor, DP_PADCTL(sor->portnum)); + if (reg & DP_PADCTL_PD_TXD_0_NO) + return 0; + /* Set link bw */ tegra_dc_sor_set_link_bandwidth(dev, is_lvds ? CLK_CNTRL_DP_LINK_SPEED_LVDS :
Hi Simon,
On Mon, 22 May 2017 05:17:29 -0600 Simon Glass sjg@chromium.org wrote:
If U-Boot is the secondary boot loader, or has been run from itself, the SOR may already be powered up. Powering it up again causes a hang, so detect this situation and skip it.
Signed-off-by: Simon Glass sjg@chromium.org
Acked-by: Anatolij Gustschin agust@denx.de
At present CP15 init is disabled on tegra. Use the correct option so that this init is performed on boot. This enables the instruction cache, for example, which is critical to the machine running at full speed.
Signed-off-by: Simon Glass sjg@chromium.org ---
include/configs/tegra-common-post.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 1a4a7e2320..846b09aadc 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -105,7 +105,7 @@ /* overrides for SPL build here */ #ifdef CONFIG_SPL_BUILD
-#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
/* remove I2C support */ #ifdef CONFIG_SYS_I2C_TEGRA
The clock fix-up for tegra is still present in the code. It causes a divide-by-zero bug after relocation when chain-loading U-Boot from coreboot. Fix this by adding a check.
Signed-off-by: Simon Glass sjg@chromium.org Fixes: 7468676 (ARM: tegra: fix clock_get_periph_rate() for UART clocks) ---
arch/arm/mach-tegra/clock.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c index ce68c7d0cc..dc58b3027d 100644 --- a/arch/arm/mach-tegra/clock.c +++ b/arch/arm/mach-tegra/clock.c @@ -339,8 +339,11 @@ unsigned long clock_get_periph_rate(enum periph_id periph_id, * return value doesn't help. In summary this clock driver is * quite broken but I'm afraid I have no idea how to fix it * without completely replacing it. + * + * Be careful to avoid a divide by zero error. */ - div -= 2; + if (div >= 1) + div -= 2; break; #endif default:
Most Chromebooks support chain-loading U-Boot but instructions are somewhat scattered. Add a README to hold this information within the U-Boot tree. Also add the standard developer keys to simplify the instructions, since they are small.
For now this only supports nyan-big.
Signed-off-by: Simon Glass sjg@chromium.org ---
doc/README.chromium | 222 +++++++++++++++++++++++++++ doc/chromium/devkeys/kernel.keyblock | Bin 0 -> 1208 bytes doc/chromium/devkeys/kernel_data_key.vbprivk | Bin 0 -> 1199 bytes 3 files changed, 222 insertions(+) create mode 100644 doc/README.chromium create mode 100644 doc/chromium/devkeys/kernel.keyblock create mode 100644 doc/chromium/devkeys/kernel_data_key.vbprivk
diff --git a/doc/README.chromium b/doc/README.chromium new file mode 100644 index 0000000000..1dd111c65d --- /dev/null +++ b/doc/README.chromium @@ -0,0 +1,222 @@ +Running U-Boot from coreboot on Chromebooks +=========================================== + +U-Boot can be used as a secondary boot loader in a few situations such as from +UEFI and coreboot (see README.x86). Recent Chromebooks use coreboot even on +ARM platforms to start up the machine. + +This document aims to provide a guide to booting U-Boot on a Chromebook. It +is only a starting point, and there are many guides on the interwebs. But +placing this information in the U-Boot tree should make it easier to find for +those who use U-Boot habitually. + +Most of these platforms are supported by U-Boot natively, but it is risky to +replace the ROM unless you have a servo board and cable to restore it with. + + +For all of these the standard U-Boot build instructions apply. For example on +ARM: + + sudo apt install gcc-arm-linux-gnueabi + mkdir b + make O=b/nyan_big CROSS_COMPILE=arm-linux-gnueabi- nyan-big_defconfig all + +You can obtain the vbutil_kernel utility here: + + https://drive.google.com/open?id=0B7WYZbZ9zd-3dHlVVXo4VXE2T0U + + +Snow (Samsung ARM Chromebook) +----------------------------- + +See here: + +https://www.chromium.org/chromium-os/firmware-porting-guide/using-nv-u-boot-... + + +Nyan-big +-------- + +Compiled based on information here: +https://lists.denx.de/pipermail/u-boot/2015-March/209530.html +https://git.collabora.com/cgit/user/tomeu/u-boot.git/commit/?h=nyan-big +https://lists.denx.de/pipermail/u-boot/2017-May/289491.html +https://github.com/chromeos-nvidia-androidtv/gnu-linux-on-acer-chromebook-13... + +1. Patch U-Boot + +Open include/configs/tegra124-common.h + +Change: + +#define CONFIG_SYS_TEXT_BASE 0x80110000 + +to: + +#define CONFIG_SYS_TEXT_BASE 0x81000100 + + +2. Build U-Boot + + mkdir b + make -j8 O=b/nyan-big CROSS_COMPILE=arm-linux-gnueabi- nyan-big_defconfig all + + +3. Create a file called u-boot.its as follows: + +/dts-v1/; + +/ { + description = "U-Boot mainline"; + #address-cells = <1>; + + images { + kernel@1 { + description = "U-Boot mainline"; + type = "kernel_noload"; + arch = "arm"; + os = "linux"; + data = /incbin/("./b/nyan-big/u-boot.bin"); + compression = "none"; + load = <0>; + entry = <0>; + hash@2 { + algo = "sha1"; + }; + }; + + fdt@1{ + description = "tegra124-nyan-big.dtb"; + data = /incbin/("./b/nyan-big/u-boot.dtb"); + type = "flat_dt"; + arch = "arm"; + compression = "none"; + hash@1{ + algo = "sha1"; + }; + }; + }; + + configurations { + default = "config@1"; + config@1 { + description = "Boot U-Boot"; + kernel = "kernel@1"; + fdt = "fdt@1"; + }; + }; +}; + + +Note that the device tree node is required, even though it is not actually +used by U-Boot. This is because the Chromebook expects to pass it to the +kernel, and crashes if it is not present. + + +4. Build and sign an image + + ./b/nyan-big/tools/mkimage -f u-boot.its u-boot-chromium.fit + vbutil_kernel --arch arm --keyblock doc/chromium/devkeys/kernel.keyblock \ + --signprivate doc/chromium/devkeys/kernel_data_key.vbprivk \ + --version 1 --config dummy.txt --vmlinuz u-boot-chromium.fit \ + --bootloader dummy.txt --pack u-boot.kpart + + +5. Prepare an SD card + + DISK=/dev/sdc # Replace with your actual SD card device + sudo cgpt create $DISK + sudo cgpt add -b 34 -s 32768 -P 1 -S 1 -t kernel $DISK + sudo cgpt add -b 32802 -s 2000000 -t rootfs $DISK + sudo gdisk $DISK # + + +6. Write U-Boot to the SD card + + sudo dd if=u-boot.kpart of=/dev/sdc1; sync + + +7. Start it up + +Reboot the device in dev mode. Make sure that you have USB booting enabled. To +do this, login as root (via Ctrl-Alt-forward_arrow) and type +'enable_dev_usb_boot'. You only need to do this once. + +Reboot the device with the SD card inserted. Press Clrl-U at the developer +mode screen. It should show something like the following on the display: + + U-Boot 2017.07-00637-g242eb42-dirty (May 22 2017 - 06:14:21 -0600) + + Model: Acer Chromebook 13 CB5-311 + Board: Google/NVIDIA Nyan-big, ID: 1 + + Net: No ethernet found. + Hit any key to stop autoboot: 0 + Tegra124 (Nyan-big) # + + +8. Known problems + +On the serial console the word MMC is chopped at the start of the line: + +C: sdhci@700b0000: 2, sdhci@700b0400: 1, sdhci@700b0600: 0 + +This is likely due to some problem with change-over of the serial driver +during relocation (or perhaps updating the clock setup in board_init()). + + +9. Notes + +To check that you copied the u-boot.its file correctly, use these commands. +You should see that the data at 0x100 in u-boot-chromium.fit is the first few +bytes of U-Boot: + + hd u-boot-chromium.fit |head -20 + ... + 00000100 b8 00 00 ea 14 f0 9f e5 14 f0 9f e5 14 f0 9f e5 |................| + + hd b/nyan-big/u-boot.bin |head + 00000000 b8 00 00 ea 14 f0 9f e5 14 f0 9f e5 14 f0 9f e5 |................| + + +The 'data' property of the FIT is set up to start at offset 0x100 bytes into +the file. The change to CONFIG_SYS_TEXT_BASE is also an offset of 0x100 bytes +from the load address. If this changes, you either need to modify U-Boot to be +fully relocatable, or expect it to hang. + + +Other notes +=========== + +flashrom +-------- + + Used to make a backup of your firmware, or to replace it. + + See: https://www.chromium.org/chromium-os/packages/cros-flashrom + + +coreboot +-------- + +Coreboot itself is not designed to actually boot an OS. Instead, a program +called Depthcharge is used. This originally came out of U-Boot and was then +heavily hacked and modified such that is is almost unrecognisable. It does +include a very small part of the U-Boot command-line interface but is not +usable as a general-purpose boot loader. + +In addition, it has a very unusual design in that it does not do device init +itself, but instead relies on coreboot. This is similar to (in U-Boot) having +a SPI driver with an empty probe() method, relying on whatever was set up +beforehand. It can be quite hard to figure out between these two code bases +what settings are actually used. When chain-loading into U-Boot we must be +careful to reinit anything that U-Boot expects. If not, some peripherals (or +the whole machine) may not work. This makes the process of chainloading more +complicated than it could be on some platforms. + +Finally, it supports only a subset of the U-Boot's FIT format. In particular +it uses a fixed address to load the FIT and does not support load/exec +addresses. This means that U-Boot must be able to boot from whatever +address Depthcharge happens to use (it is the CONFIG_KERNEL_START setting +in Depthcharge). In practice this means that the data in the kernel@1 FIT node +(see above) must start at the same address as U-Boot's CONFIG_SYS_TEXT_BASE. diff --git a/doc/chromium/devkeys/kernel.keyblock b/doc/chromium/devkeys/kernel.keyblock new file mode 100644 index 0000000000000000000000000000000000000000..9740be4e60070658d01e96c13acba8e726f68a59 GIT binary patch literal 1208 zcmZ?v2=e!J^$%uZU|?Vb;vFnN0tgm>1V8{vS3qeGDD422WMF`avqSj`P?`g(4r(0O zY><=#5T9mpaFo?;<IfE~b7uK$=~H)<jvTToS}LUYuR?YXb1Ki2UAED2GsL>quTPJ1 z>(Ke2mAdzM<e7q(jDEE}&U!MrMWX936wcpb_1vZDVsrQ0oRpdCZ+D%!c&&Nal2<Dm zW#>yr_58T4rnsp(c+!WgqdkJV>YPu@g)hvz`magDHh1sz4KIGncd$uw9qpf%>5=KE z6?A>OaYc9j^yRg8E@<CuOh0MAa*G@{N60b8V+zlXamI5UWn#^Cm?o(3bWw+S*5zBb zZk5SAvDNvP+BRd+3eQ?KR}mJ0#}?jcb7FK}++@3Qn01OwwQ^^htkG`e3ED;1Cj<ux z2wgbzsHm~PW}~{(oBi4$*G?zC+Hz&Zz0db;FN)u5>-@4%BktA~cgfj@&UwB{zU3s- zDziH0`k}uj(pLo+xood$O=RA6CFP-K`=n=gET_!b^*&-ApV^G-mwZGDr&O$Od#?ZT zr-JXlTi5M74@R!rn=pI&k~D_h)fYTl^Q#$E4tqR0o;YL9)5+~DoK}-U<hM3xiaxFX zcW3?Ohe=1a-PV`l_#DD!buO;6@V<3SPj>T49@c>B7EXz@mWOo-*Y50>Src>Tna{ih zUXcd>Cr*%4)C`ze_E$eDJ&PgRLH+q&@n`Y#o@75@omYE$!b_Vul_%YQMC`HOxb%Jc z2c?At#%3F0-oEm?r@|9`!*}1BEFr^Xaq%qMA{JiMTx>iiWn-W9ul1%=s+N2`Juh9l z*YuP?X78(tL*J4Q2!8yQR-iZS!=7q6F|~V->koX%vEdGS#D1@!dwt7PX}77Ftdm}u zEj<-*+w+9WyBbdi6V}gc@-k;ClBDN8^0#A|w(G+2MOLf6A6|DL`_zfZ2@hPWy%YAY z6IH#iNPlXUp1F!>CZAQVgW|W6m}T=HFek7?78ERS`*NSlTV!=R&#IK!O{Ww$6#eQp z|C(@pyI)b9uyS!r&c)uMMWWq-785ci-0V&@NW2}`5OMeL2TkKUmXr3YKRe#^?bUh3 zOA9QR!h^ovWuN(&^ZMF(a?d}<6)iY6*RgF{Q;C~A>m^oIP4%>gt7F){ta*On$FsO@ z$<RYH`<Cma@n|J(nBh2?HDto7eWGg7<ux0AaAa)Tapmrf75;a>O@6wtL%NE!@#qW_ z*^cDU^|Kb9_Fmt%+4a_vElUNe0<xao%I`lQJ9XnkkKn^k<@s1kR~^4$b|E*w<I1zW z7j&nK>uz>iEy?#}&ELtZd3@IHkC0xac9!?n`qQsBNXEFy&)%>@C}+9fj^*+~*+2Gq zuVmTs)9lR6s}tAMy%auBf9m?3eJeLy(-7CccAqcXL-1PQ@!a-r9NTj;zhBb`s4H1J zEsN(=_QsF*7RM`p)p8N!U;JIgOxpNa-A%rw-3xYfx4ygZB-8oW&v^BvCljsv)+d!a zZBvhbJFRW=dm}?<z3TPRk4l@0)>_9-Iw-p8w<7z?RYx9OpV^#KWSMWOF!#ZYAGeEC Tp7v_~RjJ<N@pAW}mg74Ct|TeM
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On Mon, May 22, 2017 at 12:17 PM, Simon Glass sjg@chromium.org wrote:
Most Chromebooks support chain-loading U-Boot but instructions are somewhat scattered. Add a README to hold this information within the U-Boot tree. Also add the standard developer keys to simplify the instructions, since they are small.
For now this only supports nyan-big.
Signed-off-by: Simon Glass sjg@chromium.org
doc/README.chromium | 222 +++++++++++++++++++++++++++ doc/chromium/devkeys/kernel.keyblock | Bin 0 -> 1208 bytes doc/chromium/devkeys/kernel_data_key.vbprivk | Bin 0 -> 1199 bytes 3 files changed, 222 insertions(+) create mode 100644 doc/README.chromium create mode 100644 doc/chromium/devkeys/kernel.keyblock create mode 100644 doc/chromium/devkeys/kernel_data_key.vbprivk
diff --git a/doc/README.chromium b/doc/README.chromium new file mode 100644 index 0000000000..1dd111c65d --- /dev/null +++ b/doc/README.chromium @@ -0,0 +1,222 @@ +Running U-Boot from coreboot on Chromebooks +===========================================
+U-Boot can be used as a secondary boot loader in a few situations such as from +UEFI and coreboot (see README.x86). Recent Chromebooks use coreboot even on +ARM platforms to start up the machine.
+This document aims to provide a guide to booting U-Boot on a Chromebook. It +is only a starting point, and there are many guides on the interwebs. But +placing this information in the U-Boot tree should make it easier to find for +those who use U-Boot habitually.
+Most of these platforms are supported by U-Boot natively, but it is risky to +replace the ROM unless you have a servo board and cable to restore it with.
+For all of these the standard U-Boot build instructions apply. For example on +ARM:
- sudo apt install gcc-arm-linux-gnueabi
- mkdir b
- make O=b/nyan_big CROSS_COMPILE=arm-linux-gnueabi- nyan-big_defconfig all
+You can obtain the vbutil_kernel utility here:
+Snow (Samsung ARM Chromebook) +-----------------------------
+See here:
+https://www.chromium.org/chromium-os/firmware-porting-guide/using-nv-u-boot-...
+Nyan-big +--------
+Compiled based on information here: +https://lists.denx.de/pipermail/u-boot/2015-March/209530.html +https://git.collabora.com/cgit/user/tomeu/u-boot.git/commit/?h=nyan-big +https://lists.denx.de/pipermail/u-boot/2017-May/289491.html +https://github.com/chromeos-nvidia-androidtv/gnu-linux-on-acer-chromebook-13...
+1. Patch U-Boot
+Open include/configs/tegra124-common.h
+Change:
+#define CONFIG_SYS_TEXT_BASE 0x80110000
+to:
+#define CONFIG_SYS_TEXT_BASE 0x81000100
One query on this one, is it possible to define or override that in configs/nyan-big_defconfig rather than in the include file. This would be useful from a distro PoV where we build numerous u-boot binaries from a single source tree.
Peter
Hi Peter,
On 29 May 2017 at 07:29, Peter Robinson pbrobinson@gmail.com wrote:
On Mon, May 22, 2017 at 12:17 PM, Simon Glass sjg@chromium.org wrote:
Most Chromebooks support chain-loading U-Boot but instructions are somewhat scattered. Add a README to hold this information within the U-Boot tree. Also add the standard developer keys to simplify the instructions, since they are small.
For now this only supports nyan-big.
Signed-off-by: Simon Glass sjg@chromium.org
doc/README.chromium | 222 +++++++++++++++++++++++++++ doc/chromium/devkeys/kernel.keyblock | Bin 0 -> 1208 bytes doc/chromium/devkeys/kernel_data_key.vbprivk | Bin 0 -> 1199 bytes 3 files changed, 222 insertions(+) create mode 100644 doc/README.chromium create mode 100644 doc/chromium/devkeys/kernel.keyblock create mode 100644 doc/chromium/devkeys/kernel_data_key.vbprivk
diff --git a/doc/README.chromium b/doc/README.chromium new file mode 100644 index 0000000000..1dd111c65d --- /dev/null +++ b/doc/README.chromium @@ -0,0 +1,222 @@ +Running U-Boot from coreboot on Chromebooks +===========================================
+U-Boot can be used as a secondary boot loader in a few situations such as from +UEFI and coreboot (see README.x86). Recent Chromebooks use coreboot even on +ARM platforms to start up the machine.
+This document aims to provide a guide to booting U-Boot on a Chromebook. It +is only a starting point, and there are many guides on the interwebs. But +placing this information in the U-Boot tree should make it easier to find for +those who use U-Boot habitually.
+Most of these platforms are supported by U-Boot natively, but it is risky to +replace the ROM unless you have a servo board and cable to restore it with.
+For all of these the standard U-Boot build instructions apply. For example on +ARM:
- sudo apt install gcc-arm-linux-gnueabi
- mkdir b
- make O=b/nyan_big CROSS_COMPILE=arm-linux-gnueabi- nyan-big_defconfig all
+You can obtain the vbutil_kernel utility here:
+Snow (Samsung ARM Chromebook) +-----------------------------
+See here:
+https://www.chromium.org/chromium-os/firmware-porting-guide/using-nv-u-boot-...
+Nyan-big +--------
+Compiled based on information here: +https://lists.denx.de/pipermail/u-boot/2015-March/209530.html +https://git.collabora.com/cgit/user/tomeu/u-boot.git/commit/?h=nyan-big +https://lists.denx.de/pipermail/u-boot/2017-May/289491.html +https://github.com/chromeos-nvidia-androidtv/gnu-linux-on-acer-chromebook-13...
+1. Patch U-Boot
+Open include/configs/tegra124-common.h
+Change:
+#define CONFIG_SYS_TEXT_BASE 0x80110000
+to:
+#define CONFIG_SYS_TEXT_BASE 0x81000100
One query on this one, is it possible to define or override that in configs/nyan-big_defconfig rather than in the include file. This would be useful from a distro PoV where we build numerous u-boot binaries from a single source tree.
Yes I think so. I will have a think about it.
Regards, Simon
On Mon, May 22, 2017 at 7:17 AM, Simon Glass sjg@chromium.org wrote:
Every now and then someone wants to chain-load U-Boot on a Chromebook. The procedure is not very complicated but there are some oddities.
This series updates a few things with allow U-Boot to start on nyan-big in this way and adds documentation on how to do it. This provides a central place where the procedure on different devices can be documented.
Simon Glass (12): arm: arm720t: Support CONFIG_SKIP_LOWLEVEL_INIT_ONLY tegra: Init clocks even when SPL did not run tegra: dts: Add cros-ec SPI settings arm: Rename HCTR to HTCR arm: Don't try to support CONFIG_ARMV7_LPAE on ARMv4T arm: Disable LPAE if not enabled tegra: spi: Wait a little after setting the clocks tegra: nyan-big: Enable the dhrystone benchmark tegra: video: Don't power up the SOR twice tegra: Enable CP15 init tegra: clock: Avoid a divide-by-zero error README: Add instructions for chain-loading U-Boot
arch/arm/cpu/arm720t/start.S | 6 +- arch/arm/dts/tegra124-nyan-big-u-boot.dtsi | 9 ++ arch/arm/include/asm/arch-tegra/clock.h | 3 + arch/arm/lib/cache-cp15.c | 13 +- arch/arm/mach-tegra/board2.c | 3 + arch/arm/mach-tegra/clock.c | 10 +- arch/arm/mach-tegra/tegra124/clock.c | 18 +++ configs/nyan-big_defconfig | 2 + doc/README.chromium | 222 +++++++++++++++++++++++++++ doc/chromium/devkeys/kernel.keyblock | Bin 0 -> 1208 bytes doc/chromium/devkeys/kernel_data_key.vbprivk | Bin 0 -> 1199 bytes drivers/spi/tegra114_spi.c | 1 + drivers/video/tegra124/sor.c | 9 ++ include/configs/tegra-common-post.h | 2 +- 14 files changed, 292 insertions(+), 6 deletions(-) create mode 100644 doc/README.chromium create mode 100644 doc/chromium/devkeys/kernel.keyblock create mode 100644 doc/chromium/devkeys/kernel_data_key.vbprivk
Thank You for this Simon! Very much appreciated! I am going to give this
a try later tonight and report back my personal results...
-- 2.13.0.303.g4ebf302169-goog
On Wed, May 31, 2017 at 2:28 PM, Matthew Gorski matt.gorski@gmail.com wrote:
On Mon, May 22, 2017 at 7:17 AM, Simon Glass sjg@chromium.org wrote:
Every now and then someone wants to chain-load U-Boot on a Chromebook. The procedure is not very complicated but there are some oddities.
This series updates a few things with allow U-Boot to start on nyan-big in this way and adds documentation on how to do it. This provides a central place where the procedure on different devices can be documented.
Simon Glass (12): arm: arm720t: Support CONFIG_SKIP_LOWLEVEL_INIT_ONLY tegra: Init clocks even when SPL did not run tegra: dts: Add cros-ec SPI settings arm: Rename HCTR to HTCR arm: Don't try to support CONFIG_ARMV7_LPAE on ARMv4T arm: Disable LPAE if not enabled tegra: spi: Wait a little after setting the clocks tegra: nyan-big: Enable the dhrystone benchmark tegra: video: Don't power up the SOR twice tegra: Enable CP15 init tegra: clock: Avoid a divide-by-zero error README: Add instructions for chain-loading U-Boot
arch/arm/cpu/arm720t/start.S | 6 +- arch/arm/dts/tegra124-nyan-big-u-boot.dtsi | 9 ++ arch/arm/include/asm/arch-tegra/clock.h | 3 + arch/arm/lib/cache-cp15.c | 13 +- arch/arm/mach-tegra/board2.c | 3 + arch/arm/mach-tegra/clock.c | 10 +- arch/arm/mach-tegra/tegra124/clock.c | 18 +++ configs/nyan-big_defconfig | 2 + doc/README.chromium | 222 +++++++++++++++++++++++++++ doc/chromium/devkeys/kernel.keyblock | Bin 0 -> 1208 bytes doc/chromium/devkeys/kernel_data_key.vbprivk | Bin 0 -> 1199 bytes drivers/spi/tegra114_spi.c | 1 + drivers/video/tegra124/sor.c | 9 ++ include/configs/tegra-common-post.h | 2 +- 14 files changed, 292 insertions(+), 6 deletions(-) create mode 100644 doc/README.chromium create mode 100644 doc/chromium/devkeys/kernel.keyblock create mode 100644 doc/chromium/devkeys/kernel_data_key.vbprivk
Thank You for this Simon! Very much appreciated! I am going to give
this a try later tonight and report back my personal results...
-- 2.13.0.303.g4ebf302169-goog
Simon could you please link the u-boot tree this was committed to? I
checked master and didn't see the doc/README.chromium
Hi Matthew,
On 31 May 2017 at 12:40, Matthew Gorski matt.gorski@gmail.com wrote:
On Wed, May 31, 2017 at 2:28 PM, Matthew Gorski matt.gorski@gmail.com wrote:
On Mon, May 22, 2017 at 7:17 AM, Simon Glass sjg@chromium.org wrote:
Every now and then someone wants to chain-load U-Boot on a Chromebook. The procedure is not very complicated but there are some oddities.
This series updates a few things with allow U-Boot to start on nyan-big in this way and adds documentation on how to do it. This provides a central place where the procedure on different devices can be documented.
Simon Glass (12): arm: arm720t: Support CONFIG_SKIP_LOWLEVEL_INIT_ONLY tegra: Init clocks even when SPL did not run tegra: dts: Add cros-ec SPI settings arm: Rename HCTR to HTCR arm: Don't try to support CONFIG_ARMV7_LPAE on ARMv4T arm: Disable LPAE if not enabled tegra: spi: Wait a little after setting the clocks tegra: nyan-big: Enable the dhrystone benchmark tegra: video: Don't power up the SOR twice tegra: Enable CP15 init tegra: clock: Avoid a divide-by-zero error README: Add instructions for chain-loading U-Boot
arch/arm/cpu/arm720t/start.S | 6 +- arch/arm/dts/tegra124-nyan-big-u-boot.dtsi | 9 ++ arch/arm/include/asm/arch-tegra/clock.h | 3 + arch/arm/lib/cache-cp15.c | 13 +- arch/arm/mach-tegra/board2.c | 3 + arch/arm/mach-tegra/clock.c | 10 +- arch/arm/mach-tegra/tegra124/clock.c | 18 +++ configs/nyan-big_defconfig | 2 + doc/README.chromium | 222 +++++++++++++++++++++++++++ doc/chromium/devkeys/kernel.keyblock | Bin 0 -> 1208 bytes doc/chromium/devkeys/kernel_data_key.vbprivk | Bin 0 -> 1199 bytes drivers/spi/tegra114_spi.c | 1 + drivers/video/tegra124/sor.c | 9 ++ include/configs/tegra-common-post.h | 2 +- 14 files changed, 292 insertions(+), 6 deletions(-) create mode 100644 doc/README.chromium create mode 100644 doc/chromium/devkeys/kernel.keyblock create mode 100644 doc/chromium/devkeys/kernel_data_key.vbprivk
Thank You for this Simon! Very much appreciated! I am going to give this a try later tonight and report back my personal results...
-- 2.13.0.303.g4ebf302169-goog
Simon could you please link the u-boot tree this was committed to? I checked master and didn't see the doc/README.chromium
Yes you can find it at u-boot-dm/chain-working
Regards, Simon
On Wed, May 31, 2017 at 2:28 PM, Matthew Gorski matt.gorski@gmail.com wrote:
On Mon, May 22, 2017 at 7:17 AM, Simon Glass sjg@chromium.org wrote:
Every now and then someone wants to chain-load U-Boot on a Chromebook. The procedure is not very complicated but there are some oddities.
This series updates a few things with allow U-Boot to start on nyan-big in this way and adds documentation on how to do it. This provides a central place where the procedure on different devices can be documented.
Simon Glass (12): arm: arm720t: Support CONFIG_SKIP_LOWLEVEL_INIT_ONLY tegra: Init clocks even when SPL did not run tegra: dts: Add cros-ec SPI settings arm: Rename HCTR to HTCR arm: Don't try to support CONFIG_ARMV7_LPAE on ARMv4T arm: Disable LPAE if not enabled tegra: spi: Wait a little after setting the clocks tegra: nyan-big: Enable the dhrystone benchmark tegra: video: Don't power up the SOR twice tegra: Enable CP15 init tegra: clock: Avoid a divide-by-zero error README: Add instructions for chain-loading U-Boot
arch/arm/cpu/arm720t/start.S | 6 +- arch/arm/dts/tegra124-nyan-big-u-boot.dtsi | 9 ++ arch/arm/include/asm/arch-tegra/clock.h | 3 + arch/arm/lib/cache-cp15.c | 13 +- arch/arm/mach-tegra/board2.c | 3 + arch/arm/mach-tegra/clock.c | 10 +- arch/arm/mach-tegra/tegra124/clock.c | 18 +++ configs/nyan-big_defconfig | 2 + doc/README.chromium | 222 +++++++++++++++++++++++++++ doc/chromium/devkeys/kernel.keyblock | Bin 0 -> 1208 bytes doc/chromium/devkeys/kernel_data_key.vbprivk | Bin 0 -> 1199 bytes drivers/spi/tegra114_spi.c | 1 + drivers/video/tegra124/sor.c | 9 ++ include/configs/tegra-common-post.h | 2 +- 14 files changed, 292 insertions(+), 6 deletions(-) create mode 100644 doc/README.chromium create mode 100644 doc/chromium/devkeys/kernel.keyblock create mode 100644 doc/chromium/devkeys/kernel_data_key.vbprivk
Thank You for this Simon! Very much appreciated! I am going to give
this a try later tonight and report back my personal results...
-- 2.13.0.303.g4ebf302169-goog
Confirmed! Chain-loading working on my nyan_big. I appreciate this very
much Simon and all who contributed.
Hi,
On 1 June 2017 at 07:52, Matthew Gorski matt.gorski@gmail.com wrote:
On Wed, May 31, 2017 at 2:28 PM, Matthew Gorski matt.gorski@gmail.com wrote:
On Mon, May 22, 2017 at 7:17 AM, Simon Glass sjg@chromium.org wrote:
Every now and then someone wants to chain-load U-Boot on a Chromebook. The procedure is not very complicated but there are some oddities.
This series updates a few things with allow U-Boot to start on nyan-big in this way and adds documentation on how to do it. This provides a central place where the procedure on different devices can be documented.
Simon Glass (12): arm: arm720t: Support CONFIG_SKIP_LOWLEVEL_INIT_ONLY tegra: Init clocks even when SPL did not run tegra: dts: Add cros-ec SPI settings arm: Rename HCTR to HTCR arm: Don't try to support CONFIG_ARMV7_LPAE on ARMv4T arm: Disable LPAE if not enabled tegra: spi: Wait a little after setting the clocks tegra: nyan-big: Enable the dhrystone benchmark tegra: video: Don't power up the SOR twice tegra: Enable CP15 init tegra: clock: Avoid a divide-by-zero error README: Add instructions for chain-loading U-Boot
arch/arm/cpu/arm720t/start.S | 6 +- arch/arm/dts/tegra124-nyan-big-u-boot.dtsi | 9 ++ arch/arm/include/asm/arch-tegra/clock.h | 3 + arch/arm/lib/cache-cp15.c | 13 +- arch/arm/mach-tegra/board2.c | 3 + arch/arm/mach-tegra/clock.c | 10 +- arch/arm/mach-tegra/tegra124/clock.c | 18 +++ configs/nyan-big_defconfig | 2 + doc/README.chromium | 222 +++++++++++++++++++++++++++ doc/chromium/devkeys/kernel.keyblock | Bin 0 -> 1208 bytes doc/chromium/devkeys/kernel_data_key.vbprivk | Bin 0 -> 1199 bytes drivers/spi/tegra114_spi.c | 1 + drivers/video/tegra124/sor.c | 9 ++ include/configs/tegra-common-post.h | 2 +- 14 files changed, 292 insertions(+), 6 deletions(-) create mode 100644 doc/README.chromium create mode 100644 doc/chromium/devkeys/kernel.keyblock create mode 100644 doc/chromium/devkeys/kernel_data_key.vbprivk
Thank You for this Simon! Very much appreciated! I am going to give this a try later tonight and report back my personal results...
-- 2.13.0.303.g4ebf302169-goog
Confirmed! Chain-loading working on my nyan_big. I appreciate this very much Simon and all who contributed.
I'd like to pull in this series. Are there any comments / reviews? If affects both tegra and rockchip.
Regards, Simon
Simon,
-----Original Message----- From: sjg@google.com [mailto:sjg@google.com] On Behalf Of Simon Glass Sent: Wednesday, June 07, 2017 4:59 AM To: Matthew Gorski matt.gorski@gmail.com Cc: U-Boot Mailing List u-boot@lists.denx.de; Sjoerd Simons sjoerd.simons@collabora.co.uk; Tomeu Vizoso tomeu.vizoso@collabora.com; Riley Baird riley@openmailbox.org; Heiko Schocher hs@denx.de; Patrick Delaunay patrick.delaunay@st.com; Masahiro Yamada yamada.masahiro@socionext.com; Tom Warren TWarren@nvidia.com; Anatolij Gustschin agust@denx.de; Jagannadha Sutradharudu Teki jagannadh.teki@gmail.com; Keerthy j-keerthy@ti.com; Stephen Warren swarren@wwwdotorg.org; Jagan Teki jagan@openedev.com; Marek Vasut marex@denx.de; Albert Aribaud albert.u.boot@aribaud.net; Stefan Agner stefan.agner@toradex.com; Allen Martin AMartin@nvidia.com; Alexander Graf agraf@suse.de; Jaehoon Chung jh80.chung@samsung.com; Stephen Warren swarren@nvidia.com Subject: Re: [PATCH 00/12] tegra: nyan-big: Support chainloading and add documentation
Hi,
On 1 June 2017 at 07:52, Matthew Gorski matt.gorski@gmail.com wrote:
On Wed, May 31, 2017 at 2:28 PM, Matthew Gorski matt.gorski@gmail.com wrote:
On Mon, May 22, 2017 at 7:17 AM, Simon Glass sjg@chromium.org
wrote:
Every now and then someone wants to chain-load U-Boot on a
Chromebook.
The procedure is not very complicated but there are some oddities.
This series updates a few things with allow U-Boot to start on nyan-big in this way and adds documentation on how to do it. This provides a central place where the procedure on different devices can be
documented.
Simon Glass (12): arm: arm720t: Support CONFIG_SKIP_LOWLEVEL_INIT_ONLY tegra: Init clocks even when SPL did not run tegra: dts: Add cros-ec SPI settings arm: Rename HCTR to HTCR arm: Don't try to support CONFIG_ARMV7_LPAE on ARMv4T arm: Disable LPAE if not enabled tegra: spi: Wait a little after setting the clocks tegra: nyan-big: Enable the dhrystone benchmark tegra: video: Don't power up the SOR twice tegra: Enable CP15 init tegra: clock: Avoid a divide-by-zero error README: Add instructions for chain-loading U-Boot
arch/arm/cpu/arm720t/start.S | 6 +- arch/arm/dts/tegra124-nyan-big-u-boot.dtsi | 9 ++ arch/arm/include/asm/arch-tegra/clock.h | 3 + arch/arm/lib/cache-cp15.c | 13 +- arch/arm/mach-tegra/board2.c | 3 + arch/arm/mach-tegra/clock.c | 10 +- arch/arm/mach-tegra/tegra124/clock.c | 18 +++ configs/nyan-big_defconfig | 2 + doc/README.chromium | 222 +++++++++++++++++++++++++++ doc/chromium/devkeys/kernel.keyblock | Bin 0 -> 1208 bytes doc/chromium/devkeys/kernel_data_key.vbprivk | Bin 0 -> 1199 bytes drivers/spi/tegra114_spi.c | 1 + drivers/video/tegra124/sor.c | 9 ++ include/configs/tegra-common-post.h | 2 +- 14 files changed, 292 insertions(+), 6 deletions(-) create mode 100644 doc/README.chromium create mode 100644 doc/chromium/devkeys/kernel.keyblock create mode 100644 doc/chromium/devkeys/kernel_data_key.vbprivk
Thank You for this Simon! Very much appreciated! I am going to give this a try later tonight and report back my personal results...
-- 2.13.0.303.g4ebf302169-goog
Confirmed! Chain-loading working on my nyan_big. I appreciate this very much Simon and all who contributed.
I'd like to pull in this series. Are there any comments / reviews? If affects both tegra and rockchip.
I'm fine with it - I assume you'll pull it in to one of your repos and post a PR to get it into mainstream U-Boot? I don't have the HW to test on (my nyan-big has been shelved), but trust in Matthew's testing, and that Stephen's U-Boot test scripts will catch any problems, so LGTM.
Tom
Regards, Simon
-- nvpublic
On 06/07/2017 09:32 AM, Tom Warren wrote:
Simon,
From: Simon Glass
...
On 1 June 2017 at 07:52, Matthew Gorski matt.gorski@gmail.com wrote:
On Wed, May 31, 2017 at 2:28 PM, Matthew Gorski matt.gorski@gmail.com wrote:
On Mon, May 22, 2017 at 7:17 AM, Simon Glass sjg@chromium.org> wrote:
Every now and then someone wants to chain-load U-Boot on a Chromebook. The procedure is not very complicated but there are some oddities.
This series updates a few things with allow U-Boot to start on nyan-big in this way and adds documentation on how to do it. This provides a central place where the procedure on different devices can be documented.
...
Thank You for this Simon! Very much appreciated! I am going to give this a try later tonight and report back my personal results...
...
Confirmed! Chain-loading working on my nyan_big. I appreciate this very much Simon and all who contributed.
I'd like to pull in this series. Are there any comments / reviews? If affects both tegra and rockchip.
I'm fine with it - I assume you'll pull it in to one of your repos and post a PR to get it into mainstream U-Boot? I don't have the HW to test on (my nyan-big has been shelved), but trust in Matthew's testing, and that Stephen's U-Boot test scripts will catch any problems, so LGTM.
Yes, my testing should catch most issues with any patches, although there are still some coverage holes:
1) I don't test cold boot; U-boot is always loaded over USB RCM which may hide bugs specific to cold booting.
2) I only test on a few HW platforms (beaver, dalmore, Jetson TK1, p2371-0000, Jetson TX1)
3) Obviously I don't test the new features introduced by this patch; chain-loading.
Hi Stephen,
On 7 June 2017 at 09:41, Stephen Warren swarren@wwwdotorg.org wrote:
On 06/07/2017 09:32 AM, Tom Warren wrote:
Simon,
From: Simon Glass
...
On 1 June 2017 at 07:52, Matthew Gorski matt.gorski@gmail.com wrote:
On Wed, May 31, 2017 at 2:28 PM, Matthew Gorski matt.gorski@gmail.com wrote:
On Mon, May 22, 2017 at 7:17 AM, Simon Glass sjg@chromium.org> wrote:
Every now and then someone wants to chain-load U-Boot on a Chromebook. The procedure is not very complicated but there are some oddities.
This series updates a few things with allow U-Boot to start on nyan-big in this way and adds documentation on how to do it. This provides a central place where the procedure on different devices can be documented.
...
Thank You for this Simon! Very much appreciated! I am going to give this a try later tonight and report back my personal results...
...
Confirmed! Chain-loading working on my nyan_big. I appreciate this very much Simon and all who contributed.
I'd like to pull in this series. Are there any comments / reviews? If affects both tegra and rockchip.
I'm fine with it - I assume you'll pull it in to one of your repos and post a PR to get it into mainstream U-Boot? I don't have the HW to test on (my nyan-big has been shelved), but trust in Matthew's testing, and that Stephen's U-Boot test scripts will catch any problems, so LGTM.
Thanks for looking at this.
Yes, my testing should catch most issues with any patches, although there are still some coverage holes:
- I don't test cold boot; U-boot is always loaded over USB RCM which may
hide bugs specific to cold booting.
I tested cold bold on Nyan, but I use USB RCM also so don't normally test cold boot.
- I only test on a few HW platforms (beaver, dalmore, Jetson TK1,
p2371-0000, Jetson TX1)
That's plenty :-)
- Obviously I don't test the new features introduced by this patch;
chain-loading.
It's OK I can rely on others for that so long as the changes are acceptable to the normal boot case.
Regards, Simon
Thanks a bunch Simon (and everyone else who contributed)!
I followed the instructions and was able to get uboot to boot successfully. :D
Now I just got to figure out how to get the kernel to boot in HYP mode.
Cheers,
Thomas
On Fri, Jun 9, 2017 at 5:27 AM, Simon Glass sjg@chromium.org wrote:
Hi Stephen,
On 7 June 2017 at 09:41, Stephen Warren swarren@wwwdotorg.org wrote:
On 06/07/2017 09:32 AM, Tom Warren wrote:
Simon,
From: Simon Glass
...
On 1 June 2017 at 07:52, Matthew Gorski matt.gorski@gmail.com wrote:
On Wed, May 31, 2017 at 2:28 PM, Matthew Gorski matt.gorski@gmail.com wrote:
On Mon, May 22, 2017 at 7:17 AM, Simon Glass sjg@chromium.org>
wrote:
> > > Every now and then someone wants to chain-load U-Boot on a
Chromebook.
> The procedure is not very complicated but there are some oddities. > > This series updates a few things with allow U-Boot to start on > nyan-big in this way and adds documentation on how to do it. This > provides a central place where the procedure on different devices
can
> be documented.
...
Thank You for this Simon! Very much appreciated! I am going to give this a try later tonight and report back my personal results...
...
Confirmed! Chain-loading working on my nyan_big. I appreciate this very much Simon and all who contributed.
I'd like to pull in this series. Are there any comments / reviews? If affects both tegra and rockchip.
I'm fine with it - I assume you'll pull it in to one of your repos and post a PR to get it into mainstream U-Boot? I don't have the HW to test on (my nyan-big has been shelved), but trust in Matthew's testing, and that Stephen's U-Boot test scripts will catch
any
problems, so LGTM.
Thanks for looking at this.
Yes, my testing should catch most issues with any patches, although there are still some coverage holes:
- I don't test cold boot; U-boot is always loaded over USB RCM which may
hide bugs specific to cold booting.
I tested cold bold on Nyan, but I use USB RCM also so don't normally test cold boot.
- I only test on a few HW platforms (beaver, dalmore, Jetson TK1,
p2371-0000, Jetson TX1)
That's plenty :-)
- Obviously I don't test the new features introduced by this patch;
chain-loading.
It's OK I can rely on others for that so long as the changes are acceptable to the normal boot case.
Regards, Simon _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Hi Tom,
On 27 June 2017 at 14:09, Thomas Hoff thomashoffltd@gmail.com wrote:
Thanks a bunch Simon (and everyone else who contributed)!
I followed the instructions and was able to get uboot to boot successfully. :D
Now I just got to figure out how to get the kernel to boot in HYP mode.
Cheers,
Thomas
On Fri, Jun 9, 2017 at 5:27 AM, Simon Glass sjg@chromium.org wrote:
Hi Stephen,
On 7 June 2017 at 09:41, Stephen Warren swarren@wwwdotorg.org wrote:
On 06/07/2017 09:32 AM, Tom Warren wrote:
Simon,
From: Simon Glass
...
On 1 June 2017 at 07:52, Matthew Gorski matt.gorski@gmail.com wrote:
On Wed, May 31, 2017 at 2:28 PM, Matthew Gorski matt.gorski@gmail.com wrote: > > On Mon, May 22, 2017 at 7:17 AM, Simon Glass sjg@chromium.org> > wrote: >> >> >> Every now and then someone wants to chain-load U-Boot on a >> Chromebook. >> The procedure is not very complicated but there are some oddities. >> >> This series updates a few things with allow U-Boot to start on >> nyan-big in this way and adds documentation on how to do it. This >> provides a central place where the procedure on different devices >> can >> be documented.
...
> > Thank You for this Simon! Very much appreciated! I am going to > give > this a try later tonight and report back my personal results...
...
Confirmed! Chain-loading working on my nyan_big. I appreciate this very much Simon and all who contributed.
I'd like to pull in this series. Are there any comments / reviews? If affects both tegra and rockchip.
I'm fine with it - I assume you'll pull it in to one of your repos and post a PR to get it into mainstream U-Boot? I don't have the HW to test on (my nyan-big has been shelved), but trust in Matthew's testing, and that Stephen's U-Boot test scripts will catch any problems, so LGTM.
Thanks for looking at this.
Yes, my testing should catch most issues with any patches, although there are still some coverage holes:
- I don't test cold boot; U-boot is always loaded over USB RCM which
may hide bugs specific to cold booting.
I tested cold bold on Nyan, but I use USB RCM also so don't normally test cold boot.
- I only test on a few HW platforms (beaver, dalmore, Jetson TK1,
p2371-0000, Jetson TX1)
That's plenty :-)
- Obviously I don't test the new features introduced by this patch;
chain-loading.
It's OK I can rely on others for that so long as the changes are acceptable to the normal boot case.
Is this ready to be applied at some point?
Regards, Simon
Are you asking me or Tom Warren?
On Thu, Jul 6, 2017 at 8:58 PM, Simon Glass sjg@chromium.org wrote:
Hi Tom,
On 27 June 2017 at 14:09, Thomas Hoff thomashoffltd@gmail.com wrote:
Thanks a bunch Simon (and everyone else who contributed)!
I followed the instructions and was able to get uboot to boot
successfully.
:D
Now I just got to figure out how to get the kernel to boot in HYP mode.
Cheers,
Thomas
On Fri, Jun 9, 2017 at 5:27 AM, Simon Glass sjg@chromium.org wrote:
Hi Stephen,
On 7 June 2017 at 09:41, Stephen Warren swarren@wwwdotorg.org wrote:
On 06/07/2017 09:32 AM, Tom Warren wrote:
Simon,
From: Simon Glass
...
On 1 June 2017 at 07:52, Matthew Gorski matt.gorski@gmail.com
wrote:
> > > On Wed, May 31, 2017 at 2:28 PM, Matthew Gorski > matt.gorski@gmail.com wrote: >> >> On Mon, May 22, 2017 at 7:17 AM, Simon Glass sjg@chromium.org> >> wrote: >>> >>> >>> Every now and then someone wants to chain-load U-Boot on a >>> Chromebook. >>> The procedure is not very complicated but there are some
oddities.
>>> >>> This series updates a few things with allow U-Boot to start on >>> nyan-big in this way and adds documentation on how to do it. This >>> provides a central place where the procedure on different devices >>> can >>> be documented.
...
>> >> Thank You for this Simon! Very much appreciated! I am going to >> give >> this a try later tonight and report back my personal results...
...
> Confirmed! Chain-loading working on my nyan_big. I appreciate this > very much Simon and all who contributed.
I'd like to pull in this series. Are there any comments / reviews?
If
affects both tegra and rockchip.
I'm fine with it - I assume you'll pull it in to one of your repos
and
post a PR to get it into mainstream U-Boot? I don't have the HW to test on (my nyan-big has been shelved), but trust in Matthew's testing, and that Stephen's U-Boot test scripts will
catch
any problems, so LGTM.
Thanks for looking at this.
Yes, my testing should catch most issues with any patches, although there are still some coverage holes:
- I don't test cold boot; U-boot is always loaded over USB RCM which
may hide bugs specific to cold booting.
I tested cold bold on Nyan, but I use USB RCM also so don't normally test cold boot.
- I only test on a few HW platforms (beaver, dalmore, Jetson TK1,
p2371-0000, Jetson TX1)
That's plenty :-)
- Obviously I don't test the new features introduced by this patch;
chain-loading.
It's OK I can rely on others for that so long as the changes are acceptable to the normal boot case.
Is this ready to be applied at some point?
Regards, Simon
Hi,
On 7 July 2017 at 01:27, Thomas Hoff thomashoffltd@gmail.com wrote:
Are you asking me or Tom Warren?
On Thu, Jul 6, 2017 at 8:58 PM, Simon Glass sjg@chromium.org wrote:
Hi Tom,
On 27 June 2017 at 14:09, Thomas Hoff thomashoffltd@gmail.com wrote:
Thanks a bunch Simon (and everyone else who contributed)!
I followed the instructions and was able to get uboot to boot successfully. :D
Now I just got to figure out how to get the kernel to boot in HYP mode.
Cheers,
Thomas
On Fri, Jun 9, 2017 at 5:27 AM, Simon Glass sjg@chromium.org wrote:
Hi Stephen,
On 7 June 2017 at 09:41, Stephen Warren swarren@wwwdotorg.org wrote:
On 06/07/2017 09:32 AM, Tom Warren wrote:
Simon,
> From: Simon Glass
...
> > On 1 June 2017 at 07:52, Matthew Gorski matt.gorski@gmail.com > wrote: >> >> >> On Wed, May 31, 2017 at 2:28 PM, Matthew Gorski >> matt.gorski@gmail.com wrote: >>> >>> On Mon, May 22, 2017 at 7:17 AM, Simon Glass sjg@chromium.org> >>> wrote: >>>> >>>> >>>> Every now and then someone wants to chain-load U-Boot on a >>>> Chromebook. >>>> The procedure is not very complicated but there are some >>>> oddities. >>>> >>>> This series updates a few things with allow U-Boot to start on >>>> nyan-big in this way and adds documentation on how to do it. >>>> This >>>> provides a central place where the procedure on different >>>> devices >>>> can >>>> be documented.
...
>>> >>> Thank You for this Simon! Very much appreciated! I am going to >>> give >>> this a try later tonight and report back my personal results...
...
>> Confirmed! Chain-loading working on my nyan_big. I appreciate >> this >> very much Simon and all who contributed. > > > I'd like to pull in this series. Are there any comments / reviews? > If > affects both > tegra and rockchip.
I'm fine with it - I assume you'll pull it in to one of your repos and post a PR to get it into mainstream U-Boot? I don't have the HW to test on (my nyan-big has been shelved), but trust in Matthew's testing, and that Stephen's U-Boot test scripts will catch any problems, so LGTM.
Thanks for looking at this.
Yes, my testing should catch most issues with any patches, although there are still some coverage holes:
- I don't test cold boot; U-boot is always loaded over USB RCM which
may hide bugs specific to cold booting.
I tested cold bold on Nyan, but I use USB RCM also so don't normally test cold boot.
- I only test on a few HW platforms (beaver, dalmore, Jetson TK1,
p2371-0000, Jetson TX1)
That's plenty :-)
- Obviously I don't test the new features introduced by this patch;
chain-loading.
It's OK I can rely on others for that so long as the changes are acceptable to the normal boot case.
Is this ready to be applied at some point?
Tom Warren - he is the Tegra maintainer.
Regards, Simon
Regards, Simon
I'm on vacation until Monday, 17 July. I can look at it then.
-- nvpublic
-----Original Message----- From: sjg@google.com [mailto:sjg@google.com] On Behalf Of Simon Glass Sent: Saturday, July 08, 2017 9:09 AM To: Thomas Hoff thomashoffltd@gmail.com Cc: Stephen Warren swarren@wwwdotorg.org; Marek Vasut marex@denx.de; Stephen Warren swarren@nvidia.com; Stefan Agner stefan.agner@toradex.com; Jagan Teki jagan@openedev.com; U-Boot Mailing List u-boot@lists.denx.de; Tom Warren TWarren@nvidia.com; Riley Baird riley@openmailbox.org Subject: Re: [U-Boot] [PATCH 00/12] tegra: nyan-big: Support chainloading and add documentation
Hi,
On 7 July 2017 at 01:27, Thomas Hoff thomashoffltd@gmail.com wrote:
Are you asking me or Tom Warren?
On Thu, Jul 6, 2017 at 8:58 PM, Simon Glass sjg@chromium.org wrote:
Hi Tom,
On 27 June 2017 at 14:09, Thomas Hoff thomashoffltd@gmail.com wrote:
Thanks a bunch Simon (and everyone else who contributed)!
I followed the instructions and was able to get uboot to boot successfully. :D
Now I just got to figure out how to get the kernel to boot in HYP mode.
Cheers,
Thomas
On Fri, Jun 9, 2017 at 5:27 AM, Simon Glass sjg@chromium.org wrote:
Hi Stephen,
On 7 June 2017 at 09:41, Stephen Warren swarren@wwwdotorg.org
wrote:
On 06/07/2017 09:32 AM, Tom Warren wrote: > > Simon, > >> From: Simon Glass
... >> >> On 1 June 2017 at 07:52, Matthew Gorski >> matt.gorski@gmail.com >> wrote: >>> >>> >>> On Wed, May 31, 2017 at 2:28 PM, Matthew Gorski >>> matt.gorski@gmail.com wrote: >>>> >>>> On Mon, May 22, 2017 at 7:17 AM, Simon Glass >>>> sjg@chromium.org> >>>> wrote: >>>>> >>>>> >>>>> Every now and then someone wants to chain-load U-Boot on a >>>>> Chromebook. >>>>> The procedure is not very complicated but there are some >>>>> oddities. >>>>> >>>>> This series updates a few things with allow U-Boot to start >>>>> on nyan-big in this way and adds documentation on how to do it. >>>>> This >>>>> provides a central place where the procedure on different >>>>> devices can be documented.
... >>>> >>>> Thank You for this Simon! Very much appreciated! I am >>>> going to give this a try later tonight and report back my >>>> personal results...
...
>>> Confirmed! Chain-loading working on my nyan_big. I >>> appreciate this very much Simon and all who contributed. >> >> >> I'd like to pull in this series. Are there any comments / reviews? >> If >> affects both >> tegra and rockchip. > > I'm fine with it - I assume you'll pull it in to one of your repos > and > post a PR to get it into mainstream U-Boot? > I don't have the HW to test on (my nyan-big has been shelved), but > trust > in Matthew's testing, and that Stephen's U-Boot test scripts will > catch > any > problems, so LGTM.
Thanks for looking at this.
Yes, my testing should catch most issues with any patches, although there are still some coverage holes:
- I don't test cold boot; U-boot is always loaded over USB RCM which
may hide bugs specific to cold booting.
I tested cold bold on Nyan, but I use USB RCM also so don't normally test cold boot.
- I only test on a few HW platforms (beaver, dalmore, Jetson TK1,
p2371-0000, Jetson TX1)
That's plenty :-)
- Obviously I don't test the new features introduced by this patch;
chain-loading.
It's OK I can rely on others for that so long as the changes are acceptable to the normal boot case.
Is this ready to be applied at some point?
Tom Warren - he is the Tegra maintainer.
Regards, Simon
Regards, Simon
participants (8)
-
Anatolij Gustschin -
Matthew Gorski -
Peter Robinson -
Simon Glass -
Stephen Warren -
Thomas Hoff -
Tom Rini -
Tom Warren