[U-Boot] [PATCH 0/3] arm64: minor fixes of cache operation routine
Masahiro Yamada (3): arm64: optimize __asm_{flush,invalidate}_dcache_all arm64: fix comment "flush & invalidate" arm64: rename __asm_flush_dcache_level to __asm_dcache_level
arch/arm/cpu/armv8/cache.S | 26 ++++++++++---------------- 1 file changed, 10 insertions(+), 16 deletions(-)
__asm_dcache_all can directly return to the caller of __asm_{flush,invalidate}_dcache_all.
We do not have to waste x16 register here.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
arch/arm/cpu/armv8/cache.S | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S index a9f4fec..1c71a2f 100644 --- a/arch/arm/cpu/armv8/cache.S +++ b/arch/arm/cpu/armv8/cache.S @@ -104,19 +104,13 @@ finished: ENDPROC(__asm_dcache_all)
ENTRY(__asm_flush_dcache_all) - mov x16, lr mov x0, #0 - bl __asm_dcache_all - mov lr, x16 - ret + b __asm_dcache_all ENDPROC(__asm_flush_dcache_all)
ENTRY(__asm_invalidate_dcache_all) - mov x16, lr mov x0, #0x1 - bl __asm_dcache_all - mov lr, x16 - ret + b __asm_dcache_all ENDPROC(__asm_invalidate_dcache_all)
/*
On 05/17/2016 12:37 AM, Masahiro Yamada wrote:
__asm_dcache_all can directly return to the caller of __asm_{flush,invalidate}_dcache_all.
We do not have to waste x16 register here.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com
arch/arm/cpu/armv8/cache.S | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S index a9f4fec..1c71a2f 100644 --- a/arch/arm/cpu/armv8/cache.S +++ b/arch/arm/cpu/armv8/cache.S @@ -104,19 +104,13 @@ finished: ENDPROC(__asm_dcache_all)
ENTRY(__asm_flush_dcache_all)
- mov x16, lr mov x0, #0
- bl __asm_dcache_all
- mov lr, x16
- ret
- b __asm_dcache_all
ENDPROC(__asm_flush_dcache_all)
ENTRY(__asm_invalidate_dcache_all)
- mov x16, lr mov x0, #0x1
- bl __asm_dcache_all
- mov lr, x16
- ret
- b __asm_dcache_all
ENDPROC(__asm_invalidate_dcache_all)
/*
It is a smart solution. Reviewed-by: York Sun york.sun@nxp.com
On Tue, May 17, 2016 at 04:38:06PM +0900, Masahiro Yamada wrote:
__asm_dcache_all can directly return to the caller of __asm_{flush,invalidate}_dcache_all.
We do not have to waste x16 register here.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com Reviewed-by: York Sun york.sun@nxp.com
Applied to u-boot/master, thanks!
We should say "clean & invalidate", or simply "flush".
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
arch/arm/cpu/armv8/cache.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S index 1c71a2f..6aaecf3 100644 --- a/arch/arm/cpu/armv8/cache.S +++ b/arch/arm/cpu/armv8/cache.S @@ -19,7 +19,7 @@ * clean and invalidate one level cache. * * x0: cache level - * x1: 0 flush & invalidate, 1 invalidate only + * x1: 0 clean & invalidate, 1 invalidate only * x2~x9: clobbered */ ENTRY(__asm_flush_dcache_level) @@ -62,7 +62,7 @@ ENDPROC(__asm_flush_dcache_level) /* * void __asm_flush_dcache_all(int invalidate_only) * - * x0: 0 flush & invalidate, 1 invalidate only + * x0: 0 clean & invalidate, 1 invalidate only * * clean and invalidate all data cache by SET/WAY. */
On Tue, May 17, 2016 at 04:38:07PM +0900, Masahiro Yamada wrote:
We should say "clean & invalidate", or simply "flush".
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com
Applied to u-boot/master, thanks!
Since 1e6ad55c0582 ("armv8/cache: Change cache invalidate and flush function"), this routine can be used for both cache flushing and cache invalidation. So, it is better to not include "flush" in this routine name.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
arch/arm/cpu/armv8/cache.S | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S index 6aaecf3..46f25e6 100644 --- a/arch/arm/cpu/armv8/cache.S +++ b/arch/arm/cpu/armv8/cache.S @@ -14,15 +14,15 @@ #include <linux/linkage.h>
/* - * void __asm_flush_dcache_level(level) + * void __asm_dcache_level(level) * - * clean and invalidate one level cache. + * flush or invalidate one level cache. * * x0: cache level * x1: 0 clean & invalidate, 1 invalidate only * x2~x9: clobbered */ -ENTRY(__asm_flush_dcache_level) +ENTRY(__asm_dcache_level) lsl x12, x0, #1 msr csselr_el1, x12 /* select cache level */ isb /* sync change of cssidr_el1 */ @@ -57,14 +57,14 @@ loop_way: b.ge loop_set
ret -ENDPROC(__asm_flush_dcache_level) +ENDPROC(__asm_dcache_level)
/* * void __asm_flush_dcache_all(int invalidate_only) * * x0: 0 clean & invalidate, 1 invalidate only * - * clean and invalidate all data cache by SET/WAY. + * flush or invalidate all data cache by SET/WAY. */ ENTRY(__asm_dcache_all) mov x1, x0 @@ -87,7 +87,7 @@ loop_level: and x12, x12, #7 /* x12 <- cache type */ cmp x12, #2 b.lt skip /* skip if no cache or icache */ - bl __asm_flush_dcache_level /* x1 = 0 flush, 1 invalidate */ + bl __asm_dcache_level /* x1 = 0 flush, 1 invalidate */ skip: add x0, x0, #1 /* increment cache level */ cmp x11, x0
On Tue, May 17, 2016 at 04:38:08PM +0900, Masahiro Yamada wrote:
Since 1e6ad55c0582 ("armv8/cache: Change cache invalidate and flush function"), this routine can be used for both cache flushing and cache invalidation. So, it is better to not include "flush" in this routine name.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com
Applied to u-boot/master, thanks!
participants (3)
-
Masahiro Yamada -
Tom Rini -
York Sun