This patch support the driver mode for exynos dwmmc controller. To support the legacy model, maintained the existing code.

Signed-off-by: Jaehoon Chung jh80.chung@samsung.com --- drivers/mmc/exynos_dw_mmc.c | 72 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+)

diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index ab0df46..283befc 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -23,8 +23,21 @@ #define DWMMC_MMC0_SDR_TIMING_VAL 0x03030001 #define DWMMC_MMC2_SDR_TIMING_VAL 0x03020001

+#ifdef CONFIG_DM_MMC +#include <dm.h> +DECLARE_GLOBAL_DATA_PTR; + +struct exynos_mmc_plat { + struct mmc_config cfg; + struct mmc mmc; +}; +#endif + /* Exynos implmentation specific drver private data */ struct dwmci_exynos_priv_data { +#ifdef CONFIG_DM_MMC + struct dwmci_host host; +#endif u32 sdr_timing; };

@@ -105,11 +118,15 @@ static int exynos_dwmci_core_init(struct dwmci_host *host) host->caps = MMC_MODE_DDR_52MHz; host->clksel = exynos_dwmci_clksel; host->get_mmc_clk = exynos_dwmci_get_clk; + +#ifndef CONFIG_DM_MMC /* Add the mmc channel to be registered with mmc core */ if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) { printf("DWMMC%d registration failed\n", host->dev_index); return -1; } +#endif + return 0; }

@@ -237,3 +254,58 @@ int exynos_dwmmc_init(const void *blob)

return err; } + +#ifdef CONFIG_DM_MMC +static int exynos_dwmmc_probe(struct udevice *dev) +{ + struct exynos_mmc_plat *plat = dev_get_platdata(dev); + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct dwmci_exynos_priv_data *priv = dev_get_priv(dev); + struct dwmci_host *host = &priv->host; + int err; + + err = exynos_dwmci_get_config(gd->fdt_blob, dev->of_offset, host); + if (err) + return err; + err = do_dwmci_init(host); + if (err) + return err; + + dwmci_setup_cfg(&plat->cfg, host->name, host->buswidth, host->caps, + DWMMC_MAX_FREQ, DWMMC_MIN_FREQ); + host->mmc = &plat->mmc; + host->mmc->priv = &priv->host; + host->priv = dev; + upriv->mmc = host->mmc; + + return dwmci_probe(dev); +} + +static int exynos_dwmmc_bind(struct udevice *dev) +{ + struct exynos_mmc_plat *plat = dev_get_platdata(dev); + int ret; + + ret = dwmci_bind(dev, &plat->mmc, &plat->cfg); + if (ret) + return ret; + + return 0; +} + +static const struct udevice_id exynos_dwmmc_ids[] = { + { .compatible = "samsung,exynos4412-dw-mshc" }, + { } +}; + +U_BOOT_DRIVER(exynos_dwmmc_drv) = { + .name = "exynos_dwmmc", + .id = UCLASS_MMC, + .of_match = exynos_dwmmc_ids, + .bind = exynos_dwmmc_bind, + .ops = &dm_dwmci_ops, + .probe = exynos_dwmmc_probe, + .priv_auto_alloc_size = sizeof(struct dwmci_exynos_priv_data), + .platdata_auto_alloc_size = sizeof(struct exynos_mmc_plat), +}; +#endif