Sometimes the Makefile rules or source code refers to Kconfig options which don't exist. Update the moveconfig tool to check this and produce a series of reports about inconsistencies.

This can then be used to generate patches to correct the problems.

Signed-off-by: Simon Glass sjg@chromium.org ---

Changes in v3: - Update to support lower case CONFIG options - Drop efi_loader change

tools/moveconfig.py | 334 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 334 insertions(+)

diff --git a/tools/moveconfig.py b/tools/moveconfig.py index 8f084a6070a..c4d72ede368 100755 --- a/tools/moveconfig.py +++ b/tools/moveconfig.py @@ -93,6 +93,18 @@ SIZES = {

RE_REMOVE_DEFCONFIG = re.compile(r'(.*)_defconfig')

+# CONFIG symbols present in the build system (from Linux) but not actually used +# in U-Boot; KCONFIG symbols +IGNORE_SYMS = ['DEBUG_SECTION_MISMATCH', 'FTRACE_MCOUNT_RECORD', 'GCOV_KERNEL', + 'GCOV_PROFILE_ALL', 'KALLSYMS', 'KASAN', 'MODVERSIONS', 'SHELL', + 'TPL_BUILD', 'VPL_BUILD', 'IS_ENABLED', 'FOO', 'IF_ENABLED_INT', + 'IS_ENABLED_', 'IS_ENABLED_1', 'IS_ENABLED_2', 'IS_ENABLED_3', + 'SPL_', 'TPL_', 'SPL_FOO', 'TPL_FOO', 'TOOLS_FOO', + 'ACME', 'SPL_ACME', 'TPL_ACME', 'TRACE_BRANCH_PROFILING', + 'VAL', '_UNDEFINED', 'SPL_BUILD', ] + +SPL_PREFIXES = ['SPL_', 'TPL_', 'VPL_', 'TOOLS_'] + ### helper functions ### def check_top_directory(): """Exit if we are not at the top of source directory.""" @@ -536,6 +548,7 @@ class KconfigScanner: os.environ['srctree'] = os.getcwd() os.environ['UBOOTVERSION'] = 'dummy' os.environ['KCONFIG_OBJDIR'] = '' + os.environ['CC'] = 'gcc' self.conf = kconfiglib.Kconfig()

@@ -1593,6 +1606,319 @@ def prefix_config(cfg): return op + cfg

+RE_MK_CONFIGS = re.compile('CONFIG_($(SPL_(?:TPL_)?))?([A-Za-z0-9_]*)') +RE_IFDEF = re.compile('(ifdef|ifndef)') +RE_C_CONFIGS = re.compile('CONFIG_([A-Za-z0-9_]*)') +RE_CONFIG_IS = re.compile('CONFIG_IS_ENABLED(([A-Za-z0-9_]*))') + +class ConfigUse: + def __init__(self, cfg, is_spl, fname, rest): + self.cfg = cfg + self.is_spl = is_spl + self.fname = fname + self.rest = rest + + def __hash__(self): + return hash((self.cfg, self.is_spl)) + +def scan_makefiles(fnames): + """Scan Makefiles looking for Kconfig options + + Looks for uses of CONFIG options in Makefiles + + Args: + fnames (list of tuple): + str: Makefile filename where the option was found + str: Line of the Makefile + + Returns: + tuple: + dict: all_uses + key (ConfigUse): object + value (list of str): matching lines + dict: Uses by filename + key (str): filename + value (set of ConfigUse): uses in that filename + + >>> RE_MK_CONFIGS.search('CONFIG_FRED').groups() + (None, 'FRED') + >>> RE_MK_CONFIGS.search('CONFIG_$(SPL_)MARY').groups() + ('$(SPL_)', 'MARY') + >>> RE_MK_CONFIGS.search('CONFIG_$(SPL_TPL_)MARY').groups() + ('$(SPL_TPL_)', 'MARY') + """ + all_uses = collections.defaultdict(list) + fname_uses = {} + for fname, rest in fnames: + m_iter = RE_MK_CONFIGS.finditer(rest) + found = False + for m in m_iter: + found = True + real_opt = m.group(2) + if real_opt == '': + continue + is_spl = False + if m.group(1): + is_spl = True + use = ConfigUse(real_opt, is_spl, fname, rest) + if fname not in fname_uses: + fname_uses[fname] = set() + fname_uses[fname].add(use) + all_uses[use].append(rest) + return all_uses, fname_uses + + +def scan_src_files(fnames): + """Scan source files (other than Makefiles) looking for Kconfig options + + Looks for uses of CONFIG options + + Args: + fnames (list of tuple): + str: Makefile filename where the option was found + str: Line of the Makefile + + Returns: + tuple: + dict: all_uses + key (ConfigUse): object + value (list of str): matching lines + dict: Uses by filename + key (str): filename + value (set of ConfigUse): uses in that filename + + >>> RE_C_CONFIGS.search('CONFIG_FRED').groups() + ('FRED',) + >>> RE_CONFIG_IS.search('CONFIG_IS_ENABLED(MARY)').groups() + ('MARY',) + >>> RE_CONFIG_IS.search('#if CONFIG_IS_ENABLED(OF_PLATDATA)').groups() + ('OF_PLATDATA',) + """ + def add_uses(m_iter, is_spl): + for m in m_iter: + found = True + real_opt = m.group(1) + if real_opt == '': + continue + use = ConfigUse(real_opt, is_spl, fname, rest) + if fname not in fname_uses: + fname_uses[fname] = set() + fname_uses[fname].add(use) + all_uses[use].append(rest) + + all_uses = collections.defaultdict(list) + fname_uses = {} + for fname, rest in fnames: + m_iter = RE_C_CONFIGS.finditer(rest) + add_uses(m_iter, False) + + m_iter2 = RE_CONFIG_IS.finditer(rest) + add_uses(m_iter2, True) + + return all_uses, fname_uses + + +MODE_NORMAL, MODE_SPL, MODE_PROPER = range(3) + +def do_scan_source(path, do_update): + """Scan the source tree for Kconfig inconsistencies + + Args: + path (str): Path to source tree + do_update (bool) : True to write to scripts/kconf_... files + """ + def is_not_proper(name): + for prefix in SPL_PREFIXES: + if name.startswith(prefix): + return name[len(prefix):] + return False + + def check_not_found(all_uses, spl_mode): + """Check for Kconfig options mentioned in the source but not in Kconfig + + Args: + all_uses (dict): + key (ConfigUse): object + value (list of str): matching lines + spl_mode (int): If MODE_SPL, look at source code which implies + an SPL_ option, but for which there is none; + for MOD_PROPER, look at source code which implies a Proper + option (i.e. use of CONFIG_IS_ENABLED() or $(SPL_) or + $(SPL_TPL_) but for which there none; + if MODE_NORMAL, ignore SPL + + Returns: + dict: + key (str): CONFIG name (without 'CONFIG_' prefix + value (list of ConfigUse): List of uses of this CONFIG + """ + # Make sure we know about all the options + not_found = collections.defaultdict(list) + for use, rest in all_uses.items(): + name = use.cfg + if name in IGNORE_SYMS: + continue + check = True + + if spl_mode == MODE_SPL: + check = use.is_spl + + # If it is an SPL symbol, try prepending all SPL_ prefixes to + # find at least one SPL symbol + if use.is_spl: + add_to_dict = False + for prefix in SPL_PREFIXES: + try_name = prefix + name + sym = kconf.syms.get(try_name) + if sym: + break + if not sym: + not_found[f'SPL_{name}'].append(use) + continue + elif spl_mode == MODE_PROPER: + # Try to find the Proper version of this symbol, i.e. without + # the SPL_ prefix + proper_name = is_not_proper(name) + if proper_name: + name = proper_name + elif not use.is_spl: + check = False + else: # MODE_NORMAL + debug = False + sym = kconf.syms.get(name) + if not sym: + proper_name = is_not_proper(name) + if proper_name: + name = proper_name + sym = kconf.syms.get(name) + if not sym: + for prefix in SPL_PREFIXES: + try_name = prefix + name + sym = kconf.syms.get(try_name) + if sym: + break + if not sym: + not_found[name].append(use) + continue + + sym = kconf.syms.get(name) + if not sym and check: + not_found[name].append(use) + return not_found + + def show_uses(uses): + """Show a list of uses along with their filename and code snippet + + Args: + uses (dict): + key (str): CONFIG name (without 'CONFIG_' prefix + value (list of ConfigUse): List of uses of this CONFIG + """ + for name in sorted(uses): + print(f'{name}: ', end='') + for i, use in enumerate(uses[name]): + print(f'{" " if i else ""}{use.fname}: {use.rest.strip()}') + + + print('Scanning Kconfig') + kconf = KconfigScanner().conf + print(f'Scanning source in {path}') + args = ['git', 'grep', '-E', r'IS_ENABLED|\bCONFIG'] + with subprocess.Popen(args, stdout=subprocess.PIPE) as proc: + out, err = proc.communicate() + lines = out.splitlines() + re_fname = re.compile('^([^:]*):(.*)') + src_list = [] + mk_list = [] + for line in lines: + linestr = line.decode('utf-8') + m_fname = re_fname.search(linestr) + if not m_fname: + continue + fname, rest = m_fname.groups() + dirname, leaf = os.path.split(fname) + root, ext = os.path.splitext(leaf) + if ext == '.autoconf': + pass + elif ext in ['.c', '.h', '.S', '.lds', '.dts', '.dtsi', '.asl', '.cfg', + '.env', '.tmpl']: + src_list.append([fname, rest]) + elif 'Makefile' in root or ext == '.mk': + mk_list.append([fname, rest]) + elif ext in ['.yml', '.sh', '.py', '.awk', '.pl', '.rst', '', '.sed']: + pass + elif 'Kconfig' in root or 'Kbuild' in root: + pass + elif 'README' in root: + pass + elif dirname in ['configs']: + pass + elif dirname.startswith('doc') or dirname.startswith('scripts/kconfig'): + pass + else: + print(f'Not sure how to handle file {fname}') + + # Scan the Makefiles + all_uses, fname_uses = scan_makefiles(mk_list) + + spl_not_found = set() + proper_not_found = set() + + # Make sure we know about all the options + print('\nCONFIG options present in Makefiles but not Kconfig:') + not_found = check_not_found(all_uses, MODE_NORMAL) + show_uses(not_found) + + print('\nCONFIG options present in Makefiles but not Kconfig (SPL):') + not_found = check_not_found(all_uses, MODE_SPL) + show_uses(not_found) + spl_not_found |= set([is_not_proper(key) or key for key in not_found.keys()]) + + print('\nCONFIG options used as Proper in Makefiles but without a non-SPL_ variant:') + not_found = check_not_found(all_uses, MODE_PROPER) + show_uses(not_found) + proper_not_found |= set([key for key in not_found.keys()]) + + # Scan the source code + all_uses, fname_uses = scan_src_files(src_list) + + # Make sure we know about all the options + print('\nCONFIG options present in source but not Kconfig:') + not_found = check_not_found(all_uses, MODE_NORMAL) + show_uses(not_found) + + print('\nCONFIG options present in source but not Kconfig (SPL):') + not_found = check_not_found(all_uses, MODE_SPL) + show_uses(not_found) + spl_not_found |= set([is_not_proper(key) or key for key in not_found.keys()]) + + print('\nCONFIG options used as Proper in source but without a non-SPL_ variant:') + not_found = check_not_found(all_uses, MODE_PROPER) + show_uses(not_found) + proper_not_found |= set([key for key in not_found.keys()]) + + print('\nCONFIG options used as SPL but without an SPL_ variant:') + for item in sorted(spl_not_found): + print(f' {item}') + + print('\nCONFIG options used as Proper but without a non-SPL_ variant:') + for item in sorted(proper_not_found): + print(f' {item}') + + # Write out the updated information + if do_update: + with open(os.path.join(path, 'scripts', 'conf_nospl'), 'w') as out: + print('# These options should not be enabled in SPL builds\n', + file=out) + for item in sorted(spl_not_found): + print(item, file=out) + with open(os.path.join(path, 'scripts', 'conf_noproper'), 'w') as out: + print('# These options should not be enabled in Proper builds\n', + file=out) + for item in sorted(proper_not_found): + print(item, file=out) + + def main(): try: cpu_count = multiprocessing.cpu_count() @@ -1642,10 +1968,14 @@ doc/develop/moveconfig.rst for documentation.''' help='force sync by savedefconfig') parser.add_argument('-S', '--spl', action='store_true', default=False, help='parse config options defined for SPL build') + parser.add_argument('--scan-source', action='store_true', default=False, + help='scan source for uses of CONFIG options') parser.add_argument('-t', '--test', action='store_true', default=False, help='run unit tests') parser.add_argument('-y', '--yes', action='store_true', default=False, help="respond 'yes' to any prompts") + parser.add_argument('-u', '--update', action='store_true', default=False, + help="update scripts/ files (use with --scan-source)") parser.add_argument('-v', '--verbose', action='store_true', default=False, help='show any build errors as boards are built') parser.add_argument('configs', nargs='*') @@ -1660,6 +1990,10 @@ doc/develop/moveconfig.rst for documentation.''' return 1 unittest.main()

+ if args.scan_source: + do_scan_source(os.getcwd(), args.update) + return + if not any((len(configs), args.force_sync, args.build_db, args.imply, args.find)): parser.print_usage()

This is not used anymore. Drop it.

Signed-off-by: Simon Glass sjg@chromium.org Reviewed-by: Michael Trimarchi michael@amarulasolutions.com ---

(no changes since v1)

drivers/mtd/nand/raw/Makefile | 1 - 1 file changed, 1 deletion(-)

diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile index 7320d581e2f..4c59903aa8c 100644 --- a/drivers/mtd/nand/raw/Makefile +++ b/drivers/mtd/nand/raw/Makefile @@ -70,7 +70,6 @@ obj-$(CONFIG_NAND_MXS_DT) += mxs_nand_dt.o obj-$(CONFIG_NAND_OCTEONTX) += octeontx_nand.o obj-$(CONFIG_NAND_OCTEONTX_HW_ECC) += octeontx_bch.o obj-$(CONFIG_NAND_PXA3XX) += pxa3xx_nand.o -obj-$(CONFIG_NAND_SPEAR) += spr_nand.o obj-$(CONFIG_TEGRA_NAND) += tegra_nand.o obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o

Drop this unused driver.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

drivers/gpio/Makefile | 1 - drivers/gpio/adi_gpio2.c | 425 --------------------------------------- 2 files changed, 426 deletions(-) delete mode 100644 drivers/gpio/adi_gpio2.c

diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 7235714fcc0..57603645c1c 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -47,7 +47,6 @@ obj-$(CONFIG_SH_GPIO_PFC) += sh_pfc.o obj-$(CONFIG_OMAP_GPIO) += omap_gpio.o obj-$(CONFIG_BCM2835_GPIO) += bcm2835_gpio.o obj-$(CONFIG_XILINX_GPIO) += xilinx_gpio.o -obj-$(CONFIG_ADI_GPIO2) += adi_gpio2.o obj-$(CONFIG_TCA642X) += tca642x.o obj-$(CONFIG_SUNXI_GPIO) += sunxi_gpio.o obj-$(CONFIG_LPC32XX_GPIO) += lpc32xx_gpio.o diff --git a/drivers/gpio/adi_gpio2.c b/drivers/gpio/adi_gpio2.c deleted file mode 100644 index d0849c85c3b..00000000000 --- a/drivers/gpio/adi_gpio2.c +++ /dev/null @@ -1,425 +0,0 @@ -/* - * ADI GPIO2 Abstraction Layer - * Support BF54x, BF60x and future processors. - * - * Copyright 2008-2013 Analog Devices Inc. - * - * Licensed under the GPL-2 or later - */ - -#include <common.h> -#include <malloc.h> -#include <linux/bug.h> -#include <linux/errno.h> -#include <asm/gpio.h> - -#define RESOURCE_LABEL_SIZE 16 - -static struct str_ident { - char name[RESOURCE_LABEL_SIZE]; -} str_ident[MAX_RESOURCES]; - -static void gpio_error(unsigned gpio) -{ - printf("adi_gpio2: GPIO %d wasn't requested!\n", gpio); -} - -static void set_label(unsigned short ident, const char *label) -{ - if (label) { - strncpy(str_ident[ident].name, label, - RESOURCE_LABEL_SIZE); - str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0; - } -} - -static char *get_label(unsigned short ident) -{ - return *str_ident[ident].name ? str_ident[ident].name : "UNKNOWN"; -} - -static int cmp_label(unsigned short ident, const char *label) -{ - if (label == NULL) - printf("adi_gpio2: please provide none-null label\n"); - - if (label) - return strcmp(str_ident[ident].name, label); - else - return -EINVAL; -} - -#define map_entry(m, i) reserved_##m##_map[gpio_bank(i)] -#define is_reserved(m, i, e) (map_entry(m, i) & gpio_bit(i)) -#define reserve(m, i) (map_entry(m, i) |= gpio_bit(i)) -#define unreserve(m, i) (map_entry(m, i) &= ~gpio_bit(i)) -#define DECLARE_RESERVED_MAP(m, c) unsigned short reserved_##m##_map[c] - -static DECLARE_RESERVED_MAP(gpio, GPIO_BANK_NUM); -static DECLARE_RESERVED_MAP(peri, gpio_bank(MAX_RESOURCES)); - -inline int check_gpio(unsigned gpio) -{ -#if defined(CONFIG_BF54x) - if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15 || - gpio == GPIO_PH14 || gpio == GPIO_PH15 || - gpio == GPIO_PJ14 || gpio == GPIO_PJ15) - return -EINVAL; -#endif - if (gpio >= MAX_GPIOS) - return -EINVAL; - return 0; -} - -static void port_setup(unsigned gpio, unsigned short usage) -{ -#if defined(CONFIG_BF54x) - if (usage == GPIO_USAGE) - gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio); - else - gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio); -#else - if (usage == GPIO_USAGE) - gpio_array[gpio_bank(gpio)]->port_fer_clear = gpio_bit(gpio); - else - gpio_array[gpio_bank(gpio)]->port_fer_set = gpio_bit(gpio); -#endif -} - -inline void portmux_setup(unsigned short per) -{ - u32 pmux; - u16 ident = P_IDENT(per); - u16 function = P_FUNCT2MUX(per); - - pmux = gpio_array[gpio_bank(ident)]->port_mux; - - pmux &= ~(0x3 << (2 * gpio_sub_n(ident))); - pmux |= (function & 0x3) << (2 * gpio_sub_n(ident)); - - gpio_array[gpio_bank(ident)]->port_mux = pmux; -} - -inline u16 get_portmux(unsigned short per) -{ - u32 pmux; - u16 ident = P_IDENT(per); - - pmux = gpio_array[gpio_bank(ident)]->port_mux; - - return pmux >> (2 * gpio_sub_n(ident)) & 0x3; -} - -unsigned short get_gpio_dir(unsigned gpio) -{ - return 0x01 & - (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio)); -} - -/*********************************************************** -* -* FUNCTIONS: Peripheral Resource Allocation -* and PortMux Setup -* -* INPUTS/OUTPUTS: -* per Peripheral Identifier -* label String -* -* DESCRIPTION: Peripheral Resource Allocation and Setup API -**************************************************************/ - -int peripheral_request(unsigned short per, const char *label) -{ - unsigned short ident = P_IDENT(per); - - /* - * Don't cares are pins with only one dedicated function - */ - - if (per & P_DONTCARE) - return 0; - - if (!(per & P_DEFINED)) - return -EINVAL; - - BUG_ON(ident >= MAX_RESOURCES); - - /* If a pin can be muxed as either GPIO or peripheral, make - * sure it is not already a GPIO pin when we request it. - */ - if (unlikely(!check_gpio(ident) && is_reserved(gpio, ident, 1))) { - printf("%s: Peripheral %d is already reserved as GPIO by %s!\n", - __func__, ident, get_label(ident)); - return -EBUSY; - } - - if (unlikely(is_reserved(peri, ident, 1))) { - /* - * Pin functions like AMC address strobes my - * be requested and used by several drivers - */ - - if (!((per & P_MAYSHARE) && - get_portmux(per) == P_FUNCT2MUX(per))) { - /* - * Allow that the identical pin function can - * be requested from the same driver twice - */ - - if (cmp_label(ident, label) == 0) - goto anyway; - - printf("%s: Peripheral %d function %d is already " - "reserved by %s!\n", __func__, ident, - P_FUNCT2MUX(per), get_label(ident)); - return -EBUSY; - } - } - - anyway: - reserve(peri, ident); - - portmux_setup(per); - port_setup(ident, PERIPHERAL_USAGE); - - set_label(ident, label); - - return 0; -} - -int peripheral_request_list(const unsigned short per[], const char *label) -{ - u16 cnt; - int ret; - - for (cnt = 0; per[cnt] != 0; cnt++) { - ret = peripheral_request(per[cnt], label); - - if (ret < 0) { - for (; cnt > 0; cnt--) - peripheral_free(per[cnt - 1]); - - return ret; - } - } - - return 0; -} - -void peripheral_free(unsigned short per) -{ - unsigned short ident = P_IDENT(per); - - if (per & P_DONTCARE) - return; - - if (!(per & P_DEFINED)) - return; - - if (unlikely(!is_reserved(peri, ident, 0))) - return; - - if (!(per & P_MAYSHARE)) - port_setup(ident, GPIO_USAGE); - - unreserve(peri, ident); - - set_label(ident, "free"); -} - -void peripheral_free_list(const unsigned short per[]) -{ - u16 cnt; - for (cnt = 0; per[cnt] != 0; cnt++) - peripheral_free(per[cnt]); -} - -/*********************************************************** -* -* FUNCTIONS: GPIO Driver -* -* INPUTS/OUTPUTS: -* gpio PIO Number between 0 and MAX_GPIOS -* label String -* -* DESCRIPTION: GPIO Driver API -**************************************************************/ - -int gpio_request(unsigned gpio, const char *label) -{ - if (check_gpio(gpio) < 0) - return -EINVAL; - - /* - * Allow that the identical GPIO can - * be requested from the same driver twice - * Do nothing and return - - */ - - if (cmp_label(gpio, label) == 0) - return 0; - - if (unlikely(is_reserved(gpio, gpio, 1))) { - printf("adi_gpio2: GPIO %d is already reserved by %s!\n", - gpio, get_label(gpio)); - return -EBUSY; - } - if (unlikely(is_reserved(peri, gpio, 1))) { - printf("adi_gpio2: GPIO %d is already reserved as Peripheral " - "by %s!\n", gpio, get_label(gpio)); - return -EBUSY; - } - - reserve(gpio, gpio); - set_label(gpio, label); - - port_setup(gpio, GPIO_USAGE); - - return 0; -} - -int gpio_free(unsigned gpio) -{ - if (check_gpio(gpio) < 0) - return -1; - - if (unlikely(!is_reserved(gpio, gpio, 0))) { - gpio_error(gpio); - return -1; - } - - unreserve(gpio, gpio); - - set_label(gpio, "free"); - - return 0; -} - -#ifdef ADI_SPECIAL_GPIO_BANKS -static DECLARE_RESERVED_MAP(special_gpio, gpio_bank(MAX_RESOURCES)); - -int special_gpio_request(unsigned gpio, const char *label) -{ - /* - * Allow that the identical GPIO can - * be requested from the same driver twice - * Do nothing and return - - */ - - if (cmp_label(gpio, label) == 0) - return 0; - - if (unlikely(is_reserved(special_gpio, gpio, 1))) { - printf("adi_gpio2: GPIO %d is already reserved by %s!\n", - gpio, get_label(gpio)); - return -EBUSY; - } - if (unlikely(is_reserved(peri, gpio, 1))) { - printf("adi_gpio2: GPIO %d is already reserved as Peripheral " - "by %s!\n", gpio, get_label(gpio)); - - return -EBUSY; - } - - reserve(special_gpio, gpio); - reserve(peri, gpio); - - set_label(gpio, label); - port_setup(gpio, GPIO_USAGE); - - return 0; -} - -void special_gpio_free(unsigned gpio) -{ - if (unlikely(!is_reserved(special_gpio, gpio, 0))) { - gpio_error(gpio); - return; - } - - unreserve(special_gpio, gpio); - unreserve(peri, gpio); - set_label(gpio, "free"); -} -#endif - -static inline void __gpio_direction_input(unsigned gpio) -{ - gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio); -#if defined(CONFIG_BF54x) - gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio); -#else - gpio_array[gpio_bank(gpio)]->inen_set = gpio_bit(gpio); -#endif -} - -int gpio_direction_input(unsigned gpio) -{ - unsigned long flags; - - if (!is_reserved(gpio, gpio, 0)) { - gpio_error(gpio); - return -EINVAL; - } - - local_irq_save(flags); - __gpio_direction_input(gpio); - local_irq_restore(flags); - - return 0; -} - -int gpio_set_value(unsigned gpio, int arg) -{ - if (arg) - gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio); - else - gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio); - - return 0; -} - -int gpio_direction_output(unsigned gpio, int value) -{ - unsigned long flags; - - if (!is_reserved(gpio, gpio, 0)) { - gpio_error(gpio); - return -EINVAL; - } - - local_irq_save(flags); - -#if defined(CONFIG_BF54x) - gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio); -#else - gpio_array[gpio_bank(gpio)]->inen_clear = gpio_bit(gpio); -#endif - gpio_set_value(gpio, value); - gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio); - - local_irq_restore(flags); - - return 0; -} - -int gpio_get_value(unsigned gpio) -{ - return 1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio)); -} - -void gpio_labels(void) -{ - int c, gpio; - - for (c = 0; c < MAX_RESOURCES; c++) { - gpio = is_reserved(gpio, c, 1); - if (!check_gpio(c) && gpio) - printf("GPIO_%d:\t%s\tGPIO %s\n", c, get_label(c), - get_gpio_dir(c) ? "OUTPUT" : "INPUT"); - else if (is_reserved(peri, c, 1)) - printf("GPIO_%d:\t%s\tPeripheral\n", c, get_label(c)); - else - continue; - } -}

Drop this unused driver.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

drivers/misc/Makefile | 1 - drivers/misc/ali512x.c | 401 ----------------------------------------- 2 files changed, 402 deletions(-) delete mode 100644 drivers/misc/ali512x.c

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index d494639cd95..2de510329d8 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -29,7 +29,6 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SANDBOX) += spltest_sandbox.o endif endif -obj-$(CONFIG_ALI152X) += ali512x.o obj-$(CONFIG_ALTERA_SYSID) += altera_sysid.o obj-$(CONFIG_ATSHA204A) += atsha204a-i2c.o obj-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o diff --git a/drivers/misc/ali512x.c b/drivers/misc/ali512x.c deleted file mode 100644 index e714e28bdc3..00000000000 --- a/drivers/misc/ali512x.c +++ /dev/null @@ -1,401 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2002 - * Daniel Engström, Omicron Ceti AB daniel@omicron.se. - */ - -/* - * Based on sc520cdp.c from rolo 1.6: - *---------------------------------------------------------------------- - * (C) Copyright 2000 - * Sysgo Real-Time Solutions GmbH - * Klein-Winternheim, Germany - *---------------------------------------------------------------------- - */ - -#include <config.h> - -#include <common.h> -#include <asm/io.h> -#include <ali512x.h> - - -/* ALI M5123 Logical device numbers: - * 0 FDC - * 1 unused? - * 2 unused? - * 3 lpt - * 4 UART1 - * 5 UART2 - * 6 RTC - * 7 mouse/kbd - * 8 CIO - */ - -/* - ************************************************************ - * Some access primitives for the ALi chip: * - ************************************************************ - */ - -static void ali_write(u8 index, u8 value) -{ - /* write an arbirary register */ - outb(index, ALI_INDEX); - outb(value, ALI_DATA); -} - -#if 0 -static int ali_read(u8 index) -{ - outb(index, ALI_INDEX); - return inb(ALI_DATA); -} -#endif - -#define ALI_OPEN() \ - outb(0x51, ALI_INDEX); \ - outb(0x23, ALI_INDEX) - - -#define ALI_CLOSE() \ - outb(0xbb, ALI_INDEX) - -/* Select a logical device */ -#define ALI_SELDEV(dev) \ - ali_write(0x07, dev) - - -void ali512x_init(void) -{ - ALI_OPEN(); - - ali_write(0x02, 0x01); /* soft reset */ - ali_write(0x03, 0x03); /* disable access to CIOs */ - ali_write(0x22, 0x00); /* disable direct powerdown */ - ali_write(0x23, 0x00); /* disable auto powerdown */ - ali_write(0x24, 0x00); /* IR 8 is active hi, pin26 is PDIR */ - - ALI_CLOSE(); -} - -void ali512x_set_fdc(int enabled, u16 io, u8 irq, u8 dma_channel) -{ - ALI_OPEN(); - ALI_SELDEV(0); - - ali_write(0x30, enabled?1:0); - if (enabled) { - ali_write(0x60, io >> 8); - ali_write(0x61, io & 0xff); - ali_write(0x70, irq); - ali_write(0x74, dma_channel); - - /* AT mode, no drive swap */ - ali_write(0xf0, 0x08); - ali_write(0xf1, 0x00); - ali_write(0xf2, 0xff); - ali_write(0xf4, 0x00); - } - ALI_CLOSE(); -} - - -void ali512x_set_pp(int enabled, u16 io, u8 irq, u8 dma_channel) -{ - ALI_OPEN(); - ALI_SELDEV(3); - - ali_write(0x30, enabled?1:0); - if (enabled) { - ali_write(0x60, io >> 8); - ali_write(0x61, io & 0xff); - ali_write(0x70, irq); - ali_write(0x74, dma_channel); - - /* mode: EPP 1.9, ECP FIFO threshold = 7, IRQ active low */ - ali_write(0xf0, 0xbc); - /* 12 MHz, Burst DMA in ECP */ - ali_write(0xf1, 0x05); - } - ALI_CLOSE(); - -} - -void ali512x_set_uart(int enabled, int index, u16 io, u8 irq) -{ - ALI_OPEN(); - ALI_SELDEV(index?5:4); - - ali_write(0x30, enabled?1:0); - if (enabled) { - ali_write(0x60, io >> 8); - ali_write(0x61, io & 0xff); - ali_write(0x70, irq); - - ali_write(0xf0, 0x00); - ali_write(0xf1, 0x00); - - /* huh? write 0xf2 twice - a typo in rolo - * or some secret ali errata? Who knows? - */ - if (index) { - ali_write(0xf2, 0x00); - } - ali_write(0xf2, 0x0c); - } - ALI_CLOSE(); - -} - -void ali512x_set_uart2_irda(int enabled) -{ - ALI_OPEN(); - ALI_SELDEV(5); - - ali_write(0xf1, enabled?0x48:0x00); /* fullduplex IrDa */ - ALI_CLOSE(); - -} - -void ali512x_set_rtc(int enabled, u16 io, u8 irq) -{ - ALI_OPEN(); - ALI_SELDEV(6); - - ali_write(0x30, enabled?1:0); - if (enabled) { - ali_write(0x60, io >> 8); - ali_write(0x61, io & 0xff); - ali_write(0x70, irq); - - ali_write(0xf0, 0x00); - } - ALI_CLOSE(); -} - -void ali512x_set_kbc(int enabled, u8 kbc_irq, u8 mouse_irq) -{ - ALI_OPEN(); - ALI_SELDEV(7); - - ali_write(0x30, enabled?1:0); - if (enabled) { - ali_write(0x70, kbc_irq); - ali_write(0x72, mouse_irq); - - ali_write(0xf0, 0x00); - } - ALI_CLOSE(); -} - - -/* Common I/O - * - * (This descripotsion is base on several incompete sources - * since I have not been able to obtain any datasheet for the device - * there may be some mis-understandings burried in here. - * -- Daniel daniel@omicron.se) - * - * There are 22 CIO pins numbered - * 10-17 - * 20-25 - * 30-37 - * - * 20-24 are dedicated CIO pins, the other 17 are muliplexed with - * other functions. - * - * Secondary - * CIO Pin Function Decription - * ======================================================= - * CIO10 IRQIN1 Interrupt input 1? - * CIO11 IRQIN2 Interrupt input 2? - * CIO12 IRRX IrDa Receive - * CIO13 IRTX IrDa Transmit - * CIO14 P21 KBC P21 fucntion - * CIO15 P20 KBC P21 fucntion - * CIO16 I2C_CLK I2C Clock - * CIO17 I2C_DAT I2C Data - * - * CIO20 - - * CIO21 - - * CIO22 - - * CIO23 - - * CIO24 - - * CIO25 LOCK Keylock - * - * CIO30 KBC_CLK Keybaord Clock - * CIO31 CS0J General Chip Select decoder CS0J - * CIO32 CS1J General Chip Select decoder CS1J - * CIO33 ALT_KCLK Alternative Keyboard Clock - * CIO34 ALT_KDAT Alternative Keyboard Data - * CIO35 ALT_MCLK Alternative Mouse Clock - * CIO36 ALT_MDAT Alternative Mouse Data - * CIO37 ALT_KBC Alternative KBC select - * - * The CIO use an indirect address scheme. - * - * Reigster 3 in the SIO is used to select the index and data - * port addresses where the CIO I/O registers show up. - * The function selection registers are accessible under - * function SIO 8. - * - * SIO reigster 3 (CIO Address Selection) bit definitions: - * bit 7 CIO index and data registers enabled - * bit 1-0 CIO indirect registers port address select - * 0 index = 0xE0 data = 0xE1 - * 1 index = 0xE2 data = 0xE3 - * 2 index = 0xE4 data = 0xE5 - * 3 index = 0xEA data = 0xEB - * - * There are three CIO I/O register accessed via CIO index port and CIO data port - * 0x01 CIO 10-17 data - * 0x02 CIO 20-25 data (bits 7-6 unused) - * 0x03 CIO 30-37 data - * - * - * The pin function is accessed through normal - * SIO registers, each register have the same format: - * - * Bit Function Value - * 0 Input/output 1=input - * 1 Polarity of signal 1=inverted - * 2 Unused ?? - * 3 Function (normal or special) 1=special - * 7-4 Unused - * - * SIO REG - * 0xe0 CIO 10 Config - * 0xe1 CIO 11 Config - * 0xe2 CIO 12 Config - * 0xe3 CIO 13 Config - * 0xe4 CIO 14 Config - * 0xe5 CIO 15 Config - * 0xe6 CIO 16 Config - * 0xe7 CIO 16 Config - * - * 0xe8 CIO 20 Config - * 0xe9 CIO 21 Config - * 0xea CIO 22 Config - * 0xeb CIO 23 Config - * 0xec CIO 24 Config - * 0xed CIO 25 Config - * - * 0xf5 CIO 30 Config - * 0xf6 CIO 31 Config - * 0xf7 CIO 32 Config - * 0xf8 CIO 33 Config - * 0xf9 CIO 34 Config - * 0xfa CIO 35 Config - * 0xfb CIO 36 Config - * 0xfc CIO 37 Config - * - */ - -#define ALI_CIO_PORT_SEL 0x83 -#define ALI_CIO_INDEX 0xea -#define ALI_CIO_DATA 0xeb - -void ali512x_set_cio(int enabled) -{ - int i; - - ALI_OPEN(); - - if (enabled) { - ali_write(0x3, ALI_CIO_PORT_SEL); /* Enable CIO data register */ - } else { - ali_write(0x3, ALI_CIO_PORT_SEL & ~0x80); - } - - ALI_SELDEV(8); - - ali_write(0x30, enabled?1:0); - - /* set all pins to input to start with */ - for (i=0xe0;i<0xee;i++) { - ali_write(i, 1); - } - - for (i=0xf5;i<0xfe;i++) { - ali_write(i, 1); - } - - ALI_CLOSE(); -} - - -void ali512x_cio_function(int pin, int special, int inv, int input) -{ - u8 data; - u8 addr; - - /* valid pins are 10-17, 20-25 and 30-37 */ - if (pin >= 10 && pin <= 17) { - addr = 0xe0+(pin&7); - } else if (pin >= 20 && pin <= 25) { - addr = 0xe8+(pin&7); - } else if (pin >= 30 && pin <= 37) { - addr = 0xf5+(pin&7); - } else { - return; - } - - ALI_OPEN(); - - ALI_SELDEV(8); - - - data=0xf4; - if (special) { - data |= 0x08; - } else { - if (inv) { - data |= 0x02; - } - if (input) { - data |= 0x01; - } - } - - ali_write(addr, data); - - ALI_CLOSE(); -} - -void ali512x_cio_out(int pin, int value) -{ - u8 reg; - u8 data; - u8 bit; - - reg = pin/10; - bit = 1 << (pin%10); - - - outb(reg, ALI_CIO_INDEX); /* select I/O register */ - data = inb(ALI_CIO_DATA); - if (value) { - data |= bit; - } else { - data &= ~bit; - } - outb(data, ALI_CIO_DATA); -} - -int ali512x_cio_in(int pin) -{ - u8 reg; - u8 data; - u8 bit; - - /* valid pins are 10-17, 20-25 and 30-37 */ - reg = pin/10; - bit = 1 << (pin%10); - - - outb(reg, ALI_CIO_INDEX); /* select I/O register */ - data = inb(ALI_CIO_DATA); - - return data & bit; -}

Drop this as it is not referenced anywhere else in the code.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v2)

Changes in v2: - Just drop the reference

arch/arm/mach-mvebu/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile index a23511b113b..28d3e5e1052 100644 --- a/arch/arm/mach-mvebu/Makefile +++ b/arch/arm/mach-mvebu/Makefile @@ -35,7 +35,7 @@ endif

extra-y += kwbimage.cfg

-ifneq ($(CONFIG_ARMADA_370)$(CONFIG_ARMADA_XP),) +ifneq ($(CONFIG_ARMADA_XP),) KWB_REPLACE += CPU KWB_CFG_CPU = SHEEVA else ifneq ($(CONFIG_ARMADA_375)$(CONFIG_ARMADA_38X)$(CONFIG_ARMADA_39X),)

Drop this unused driver.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

arch/powerpc/lib/Makefile | 1 - arch/powerpc/lib/bat_rw.c | 244 -------------------------------------- 2 files changed, 245 deletions(-) delete mode 100644 arch/powerpc/lib/bat_rw.c

diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index 066d7f408e0..bb819dcbb6c 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -34,7 +34,6 @@ obj-y += ticks.o endif obj-y += reloc.o

-obj-$(CONFIG_BAT_RW) += bat_rw.o obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-y += cache.o obj-y += extable.o diff --git a/arch/powerpc/lib/bat_rw.c b/arch/powerpc/lib/bat_rw.c deleted file mode 100644 index 24dd30615bd..00000000000 --- a/arch/powerpc/lib/bat_rw.c +++ /dev/null @@ -1,244 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2002 - * Rich Ireland, Enterasys Networks, rireland@enterasys.com. - */ - -#include <common.h> -#include <asm/global_data.h> -#include <asm/processor.h> -#include <asm/mmu.h> -#include <asm/io.h> -#include <linux/compiler.h> - -#ifdef CONFIG_ADDR_MAP -#include <addr_map.h> -#endif - -DECLARE_GLOBAL_DATA_PTR; - -int write_bat (ppc_bat_t bat, unsigned long upper, unsigned long lower) -{ - __maybe_unused int batn = -1; - - sync(); - - switch (bat) { - case DBAT0: - mtspr (DBAT0L, lower); - mtspr (DBAT0U, upper); - batn = 0; - break; - case IBAT0: - mtspr (IBAT0L, lower); - mtspr (IBAT0U, upper); - break; - case DBAT1: - mtspr (DBAT1L, lower); - mtspr (DBAT1U, upper); - batn = 1; - break; - case IBAT1: - mtspr (IBAT1L, lower); - mtspr (IBAT1U, upper); - break; - case DBAT2: - mtspr (DBAT2L, lower); - mtspr (DBAT2U, upper); - batn = 2; - break; - case IBAT2: - mtspr (IBAT2L, lower); - mtspr (IBAT2U, upper); - break; - case DBAT3: - mtspr (DBAT3L, lower); - mtspr (DBAT3U, upper); - batn = 3; - break; - case IBAT3: - mtspr (IBAT3L, lower); - mtspr (IBAT3U, upper); - break; -#ifdef CONFIG_HIGH_BATS - case DBAT4: - mtspr (DBAT4L, lower); - mtspr (DBAT4U, upper); - batn = 4; - break; - case IBAT4: - mtspr (IBAT4L, lower); - mtspr (IBAT4U, upper); - break; - case DBAT5: - mtspr (DBAT5L, lower); - mtspr (DBAT5U, upper); - batn = 5; - break; - case IBAT5: - mtspr (IBAT5L, lower); - mtspr (IBAT5U, upper); - break; - case DBAT6: - mtspr (DBAT6L, lower); - mtspr (DBAT6U, upper); - batn = 6; - break; - case IBAT6: - mtspr (IBAT6L, lower); - mtspr (IBAT6U, upper); - break; - case DBAT7: - mtspr (DBAT7L, lower); - mtspr (DBAT7U, upper); - batn = 7; - break; - case IBAT7: - mtspr (IBAT7L, lower); - mtspr (IBAT7U, upper); - break; -#endif - default: - return (-1); - } - -#ifdef CONFIG_ADDR_MAP - if ((gd->flags & GD_FLG_RELOC) && (batn >= 0)) { - phys_size_t size; - if (!BATU_VALID(upper)) - size = 0; - else - size = BATU_SIZE(upper); - addrmap_set_entry(BATU_VADDR(upper), BATL_PADDR(lower), - size, batn); - } -#endif - - sync(); - isync(); - - return (0); -} - -int read_bat (ppc_bat_t bat, unsigned long *upper, unsigned long *lower) -{ - unsigned long register u; - unsigned long register l; - - switch (bat) { - case DBAT0: - l = mfspr (DBAT0L); - u = mfspr (DBAT0U); - break; - case IBAT0: - l = mfspr (IBAT0L); - u = mfspr (IBAT0U); - break; - case DBAT1: - l = mfspr (DBAT1L); - u = mfspr (DBAT1U); - break; - case IBAT1: - l = mfspr (IBAT1L); - u = mfspr (IBAT1U); - break; - case DBAT2: - l = mfspr (DBAT2L); - u = mfspr (DBAT2U); - break; - case IBAT2: - l = mfspr (IBAT2L); - u = mfspr (IBAT2U); - break; - case DBAT3: - l = mfspr (DBAT3L); - u = mfspr (DBAT3U); - break; - case IBAT3: - l = mfspr (IBAT3L); - u = mfspr (IBAT3U); - break; -#ifdef CONFIG_HIGH_BATS - case DBAT4: - l = mfspr (DBAT4L); - u = mfspr (DBAT4U); - break; - case IBAT4: - l = mfspr (IBAT4L); - u = mfspr (IBAT4U); - break; - case DBAT5: - l = mfspr (DBAT5L); - u = mfspr (DBAT5U); - break; - case IBAT5: - l = mfspr (IBAT5L); - u = mfspr (IBAT5U); - break; - case DBAT6: - l = mfspr (DBAT6L); - u = mfspr (DBAT6U); - break; - case IBAT6: - l = mfspr (IBAT6L); - u = mfspr (IBAT6U); - break; - case DBAT7: - l = mfspr (DBAT7L); - u = mfspr (DBAT7U); - break; - case IBAT7: - l = mfspr (IBAT7L); - u = mfspr (IBAT7U); - break; -#endif - default: - return (-1); - } - - *upper = u; - *lower = l; - - return (0); -} - -void print_bats(void) -{ - printf("BAT registers:\n"); - - printf ("\tIBAT0L = 0x%08X ", mfspr (IBAT0L)); - printf ("\tIBAT0U = 0x%08X\n", mfspr (IBAT0U)); - printf ("\tDBAT0L = 0x%08X ", mfspr (DBAT0L)); - printf ("\tDBAT0U = 0x%08X\n", mfspr (DBAT0U)); - printf ("\tIBAT1L = 0x%08X ", mfspr (IBAT1L)); - printf ("\tIBAT1U = 0x%08X\n", mfspr (IBAT1U)); - printf ("\tDBAT1L = 0x%08X ", mfspr (DBAT1L)); - printf ("\tDBAT1U = 0x%08X\n", mfspr (DBAT1U)); - printf ("\tIBAT2L = 0x%08X ", mfspr (IBAT2L)); - printf ("\tIBAT2U = 0x%08X\n", mfspr (IBAT2U)); - printf ("\tDBAT2L = 0x%08X ", mfspr (DBAT2L)); - printf ("\tDBAT2U = 0x%08X\n", mfspr (DBAT2U)); - printf ("\tIBAT3L = 0x%08X ", mfspr (IBAT3L)); - printf ("\tIBAT3U = 0x%08X\n", mfspr (IBAT3U)); - printf ("\tDBAT3L = 0x%08X ", mfspr (DBAT3L)); - printf ("\tDBAT3U = 0x%08X\n", mfspr (DBAT3U)); - -#ifdef CONFIG_HIGH_BATS - printf ("\tIBAT4L = 0x%08X ", mfspr (IBAT4L)); - printf ("\tIBAT4U = 0x%08X\n", mfspr (IBAT4U)); - printf ("\tDBAT4L = 0x%08X ", mfspr (DBAT4L)); - printf ("\tDBAT4U = 0x%08X\n", mfspr (DBAT4U)); - printf ("\tIBAT5L = 0x%08X ", mfspr (IBAT5L)); - printf ("\tIBAT5U = 0x%08X\n", mfspr (IBAT5U)); - printf ("\tDBAT5L = 0x%08X ", mfspr (DBAT5L)); - printf ("\tDBAT5U = 0x%08X\n", mfspr (DBAT5U)); - printf ("\tIBAT6L = 0x%08X ", mfspr (IBAT6L)); - printf ("\tIBAT6U = 0x%08X\n", mfspr (IBAT6U)); - printf ("\tDBAT6L = 0x%08X ", mfspr (DBAT6L)); - printf ("\tDBAT6U = 0x%08X\n", mfspr (DBAT6U)); - printf ("\tIBAT7L = 0x%08X ", mfspr (IBAT7L)); - printf ("\tIBAT7U = 0x%08X\n", mfspr (IBAT7U)); - printf ("\tDBAT7L = 0x%08X ", mfspr (DBAT7L)); - printf ("\tDBAT7U = 0x%08X\n", mfspr (DBAT7U)); -#endif -}

This command has no Kconfig option at present, but seems useful enough to keep around. Add one.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

cmd/Kconfig | 7 +++++++ 1 file changed, 7 insertions(+)

diff --git a/cmd/Kconfig b/cmd/Kconfig index 4fe2c75de25..b697469a4cb 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -2015,6 +2015,13 @@ config CMD_LED with led on/off/togle/blink. Any LED drivers can be controlled with this command, e.g. led_gpio.

+config CMD_INI + bool "ini" + help + Enable the 'ini' command which allows a .ini file to be parsed and + placed into environment variables. Please check the source code for + this as there is no documentation. + config CMD_DATE bool "date" default y if DM_RTC

This option does not exist but presumably means to point to CONFIG_TARGET_CONTROLCENTERDC. Fix it.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

board/gdsys/common/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/gdsys/common/Makefile b/board/gdsys/common/Makefile index dd6d5e69de5..553e2ca50ed 100644 --- a/board/gdsys/common/Makefile +++ b/board/gdsys/common/Makefile @@ -5,7 +5,7 @@

obj-$(CONFIG_SYS_FPGA_COMMON) += fpga.o obj-$(CONFIG_CMD_IOLOOP) += cmd_ioloop.o -obj-$(CONFIG_CONTROLCENTERD) += dp501.o +obj-$(CONFIG_TARGET_CONTROLCENTERDC) += dp501.o obj-$(CONFIG_TARGET_GAZERBEAM) += osd.o ihs_mdio.o ioep-fpga.o

ifdef CONFIG_OSD

This appears in a comment but is not a real option. Drop it.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile index c9d6d67310d..2648fd5d8f9 100644 --- a/Makefile +++ b/Makefile @@ -1082,7 +1082,7 @@ expect = $(foreach cfg,$(1),y)

# Show a deprecation message # Args: -# 1: List of CONFIG_DM_... to migrate to (e.g. "CONFIG_DM_MMC CONFIG_BLK") +# 1: List of options to migrate to (e.g. "CONFIG_DM_MMC CONFIG_BLK") # 2: Name of component (e.g . "Ethernet drivers") # 3: Release deadline (e.g. "v202.07") # 4: Condition to require before checking (e.g. "$(CONFIG_NET)")

This is not defined anywhere. Drop it.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

drivers/video/exynos/Makefile | 1 - 1 file changed, 1 deletion(-)

diff --git a/drivers/video/exynos/Makefile b/drivers/video/exynos/Makefile index 0f58954e49c..45067f562cb 100644 --- a/drivers/video/exynos/Makefile +++ b/drivers/video/exynos/Makefile @@ -7,4 +7,3 @@ obj-$(CONFIG_EXYNOS_DP) += exynos_dp.o exynos_dp_lowlevel.o obj-$(CONFIG_EXYNOS_FB) += exynos_fb.o obj-$(CONFIG_EXYNOS_MIPI_DSIM) += exynos_mipi_dsi.o exynos_mipi_dsi_common.o \ exynos_mipi_dsi_lowlevel.o -obj-$(CONFIG_EXYNOS_PWM_BL) += exynos_pwm_bl.o

There is no Kconfig option for this code, but it seems to be useful. Add one.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

drivers/fpga/Kconfig | 6 ++++++ 1 file changed, 6 insertions(+)

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index 4113de230cd..2034d0ebd9c 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -54,6 +54,12 @@ config FPGA_INTEL_SDM_MAILBOX Enable FPGA driver for writing full bitstream into Intel FPGA devices through SDM (Secure Device Manager) Mailbox.

+config FPGA_LATTICE + bool "Enable Lattice FPGA driver" + help + This is used for the lattice FPGAs. Please check the source code as + there is no documentation for this at present. + config FPGA_XILINX bool "Enable Xilinx FPGA drivers" select FPGA

Drop this unused driver.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

drivers/misc/Makefile | 1 - drivers/misc/mc9sdz60.c | 34 ---------------------------------- 2 files changed, 35 deletions(-) delete mode 100644 drivers/misc/mc9sdz60.c

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 2de510329d8..3b792f2a14c 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -36,7 +36,6 @@ obj-$(CONFIG_DS4510) += ds4510.o obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o obj-$(CONFIG_FSL_IFC) += fsl_ifc.o obj-$(CONFIG_FSL_IIM) += fsl_iim.o -obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o obj-$(CONFIG_FSL_SEC_MON) += fsl_sec_mon.o obj-$(CONFIG_$(SPL_)FS_LOADER) += fs_loader.o obj-$(CONFIG_GATEWORKS_SC) += gsc.o diff --git a/drivers/misc/mc9sdz60.c b/drivers/misc/mc9sdz60.c deleted file mode 100644 index e68a056a559..00000000000 --- a/drivers/misc/mc9sdz60.c +++ /dev/null @@ -1,34 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2010 Stefano Babic sbabic@denx.de - */ - - -#include <config.h> -#include <common.h> -#include <linux/errno.h> -#include <linux/types.h> -#include <i2c.h> -#include <mc9sdz60.h> - -#ifndef CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR -#error "You have to configure I2C address for MC9SDZ60" -#endif - - -u8 mc9sdz60_reg_read(enum mc9sdz60_reg reg) -{ - u8 val; - - if (i2c_read(CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR, reg, 1, &val, 1)) { - puts("Error reading MC9SDZ60 register\n"); - return -1; - } - - return val; -} - -void mc9sdz60_reg_write(enum mc9sdz60_reg reg, u8 val) -{ - i2c_write(CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR, reg, 1, &val, 1); -}

Drop this unused code.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

drivers/power/Makefile | 1 - drivers/power/ftpmu010.c | 87 -------------- include/faraday/ftpmu010.h | 234 ------------------------------------- 3 files changed, 322 deletions(-) delete mode 100644 drivers/power/ftpmu010.c delete mode 100644 include/faraday/ftpmu010.h

diff --git a/drivers/power/Makefile b/drivers/power/Makefile index f805027784d..34a84808a9c 100644 --- a/drivers/power/Makefile +++ b/drivers/power/Makefile @@ -18,7 +18,6 @@ obj-$(CONFIG_AXP305_POWER) += axp305.o obj-$(CONFIG_AXP809_POWER) += axp809.o obj-$(CONFIG_AXP818_POWER) += axp818.o obj-$(CONFIG_EXYNOS_TMU) += exynos-tmu.o -obj-$(CONFIG_FTPMU010_POWER) += ftpmu010.o obj-$(CONFIG_SY8106A_POWER) += sy8106a.o obj-$(CONFIG_TPS6586X_POWER) += tps6586x.o obj-$(CONFIG_TWL4030_POWER) += twl4030.o diff --git a/drivers/power/ftpmu010.c b/drivers/power/ftpmu010.c deleted file mode 100644 index 9a48b36554d..00000000000 --- a/drivers/power/ftpmu010.c +++ /dev/null @@ -1,87 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2009 Faraday Technology - * Po-Yu Chuang ratbert@faraday-tech.com - * - * Copyright (C) 2010 Andes Technology Corporation - * Shawn Lin, Andes Technology Corporation nobuhiro@andestech.com - * Macpaul Lin, Andes Technology Corporation macpaul@andestech.com - */ - -#include <common.h> -#include <asm/io.h> -#include <faraday/ftpmu010.h> - -/* OSCC: OSC Control Register */ -void ftpmu010_32768osc_enable(void) -{ - static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; - unsigned int oscc; - - /* enable the 32768Hz oscillator */ - oscc = readl(&pmu->OSCC); - oscc &= ~(FTPMU010_OSCC_OSCL_OFF | FTPMU010_OSCC_OSCL_TRI); - writel(oscc, &pmu->OSCC); - - /* wait until ready */ - while (!(readl(&pmu->OSCC) & FTPMU010_OSCC_OSCL_STABLE)) - ; - - /* select 32768Hz oscillator */ - oscc = readl(&pmu->OSCC); - oscc |= FTPMU010_OSCC_OSCL_RTCLSEL; - writel(oscc, &pmu->OSCC); -} - -/* MFPSR: Multi-Function Port Setting Register */ -void ftpmu010_mfpsr_select_dev(unsigned int dev) -{ - static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; - unsigned int mfpsr; - - mfpsr = readl(&pmu->MFPSR); - mfpsr |= dev; - writel(mfpsr, &pmu->MFPSR); -} - -void ftpmu010_mfpsr_diselect_dev(unsigned int dev) -{ - static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; - unsigned int mfpsr; - - mfpsr = readl(&pmu->MFPSR); - mfpsr &= ~dev; - writel(mfpsr, &pmu->MFPSR); -} - -/* PDLLCR0: PLL/DLL Control Register 0 */ -void ftpmu010_dlldis_disable(void) -{ - static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; - unsigned int pdllcr0; - - pdllcr0 = readl(&pmu->PDLLCR0); - pdllcr0 |= FTPMU010_PDLLCR0_DLLDIS; - writel(pdllcr0, &pmu->PDLLCR0); -} - -void ftpmu010_sdram_clk_disable(unsigned int cr0) -{ - static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; - unsigned int pdllcr0; - - pdllcr0 = readl(&pmu->PDLLCR0); - pdllcr0 |= FTPMU010_PDLLCR0_HCLKOUTDIS(cr0); - writel(pdllcr0, &pmu->PDLLCR0); -} - -/* SDRAMHTC: SDRAM Signal Hold Time Control */ -void ftpmu010_sdramhtc_set(unsigned int val) -{ - static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; - unsigned int sdramhtc; - - sdramhtc = readl(&pmu->SDRAMHTC); - sdramhtc |= val; - writel(sdramhtc, &pmu->SDRAMHTC); -} diff --git a/include/faraday/ftpmu010.h b/include/faraday/ftpmu010.h deleted file mode 100644 index ccb7805375e..00000000000 --- a/include/faraday/ftpmu010.h +++ /dev/null @@ -1,234 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2009 Faraday Technology - * Po-Yu Chuang ratbert@faraday-tech.com - */ - -/* - * Power Management Unit - */ -#ifndef __FTPMU010_H -#define __FTPMU010_H - -#ifndef __ASSEMBLY__ -struct ftpmu010 { - unsigned int IDNMBR0; /* 0x00 */ - unsigned int reserved0; /* 0x04 */ - unsigned int OSCC; /* 0x08 */ - unsigned int PMODE; /* 0x0C */ - unsigned int PMCR; /* 0x10 */ - unsigned int PED; /* 0x14 */ - unsigned int PEDSR; /* 0x18 */ - unsigned int reserved1; /* 0x1C */ - unsigned int PMSR; /* 0x20 */ - unsigned int PGSR; /* 0x24 */ - unsigned int MFPSR; /* 0x28 */ - unsigned int MISC; /* 0x2C */ - unsigned int PDLLCR0; /* 0x30 */ - unsigned int PDLLCR1; /* 0x34 */ - unsigned int AHBMCLKOFF; /* 0x38 */ - unsigned int APBMCLKOFF; /* 0x3C */ - unsigned int DCSRCR0; /* 0x40 */ - unsigned int DCSRCR1; /* 0x44 */ - unsigned int DCSRCR2; /* 0x48 */ - unsigned int SDRAMHTC; /* 0x4C */ - unsigned int PSPR0; /* 0x50 */ - unsigned int PSPR1; /* 0x54 */ - unsigned int PSPR2; /* 0x58 */ - unsigned int PSPR3; /* 0x5C */ - unsigned int PSPR4; /* 0x60 */ - unsigned int PSPR5; /* 0x64 */ - unsigned int PSPR6; /* 0x68 */ - unsigned int PSPR7; /* 0x6C */ - unsigned int PSPR8; /* 0x70 */ - unsigned int PSPR9; /* 0x74 */ - unsigned int PSPR10; /* 0x78 */ - unsigned int PSPR11; /* 0x7C */ - unsigned int PSPR12; /* 0x80 */ - unsigned int PSPR13; /* 0x84 */ - unsigned int PSPR14; /* 0x88 */ - unsigned int PSPR15; /* 0x8C */ - unsigned int AHBDMA_RACCS; /* 0x90 */ - unsigned int reserved2; /* 0x94 */ - unsigned int reserved3; /* 0x98 */ - unsigned int JSS; /* 0x9C */ - unsigned int CFC_RACC; /* 0xA0 */ - unsigned int SSP1_RACC; /* 0xA4 */ - unsigned int UART1TX_RACC; /* 0xA8 */ - unsigned int UART1RX_RACC; /* 0xAC */ - unsigned int UART2TX_RACC; /* 0xB0 */ - unsigned int UART2RX_RACC; /* 0xB4 */ - unsigned int SDC_RACC; /* 0xB8 */ - unsigned int I2SAC97_RACC; /* 0xBC */ - unsigned int IRDATX_RACC; /* 0xC0 */ - unsigned int reserved4; /* 0xC4 */ - unsigned int USBD_RACC; /* 0xC8 */ - unsigned int IRDARX_RACC; /* 0xCC */ - unsigned int IRDA_RACC; /* 0xD0 */ - unsigned int ED0_RACC; /* 0xD4 */ - unsigned int ED1_RACC; /* 0xD8 */ -}; -#endif /* __ASSEMBLY__ */ - -/* - * ID Number 0 Register - */ -#define FTPMU010_ID_A320A 0x03200000 -#define FTPMU010_ID_A320C 0x03200010 -#define FTPMU010_ID_A320D 0x03200030 - -/* - * OSC Control Register - */ -#define FTPMU010_OSCC_OSCH_TRI (1 << 11) -#define FTPMU010_OSCC_OSCH_STABLE (1 << 9) -#define FTPMU010_OSCC_OSCH_OFF (1 << 8) - -#define FTPMU010_OSCC_OSCL_TRI (1 << 3) -#define FTPMU010_OSCC_OSCL_RTCLSEL (1 << 2) -#define FTPMU010_OSCC_OSCL_STABLE (1 << 1) -#define FTPMU010_OSCC_OSCL_OFF (1 << 0) - -/* - * Power Mode Register - */ -#define FTPMU010_PMODE_DIVAHBCLK_MASK (0x7 << 4) -#define FTPMU010_PMODE_DIVAHBCLK_2 (0x0 << 4) -#define FTPMU010_PMODE_DIVAHBCLK_3 (0x1 << 4) -#define FTPMU010_PMODE_DIVAHBCLK_4 (0x2 << 4) -#define FTPMU010_PMODE_DIVAHBCLK_6 (0x3 << 4) -#define FTPMU010_PMODE_DIVAHBCLK_8 (0x4 << 4) -#define FTPMU010_PMODE_DIVAHBCLK(pmode) (((pmode) >> 4) & 0x7) -#define FTPMU010_PMODE_FCS (1 << 2) -#define FTPMU010_PMODE_TURBO (1 << 1) -#define FTPMU010_PMODE_SLEEP (1 << 0) - -/* - * Power Manager Status Register - */ -#define FTPMU010_PMSR_SMR (1 << 10) - -#define FTPMU010_PMSR_RDH (1 << 2) -#define FTPMU010_PMSR_PH (1 << 1) -#define FTPMU010_PMSR_CKEHLOW (1 << 0) - -/* - * Multi-Function Port Setting Register - */ -#define FTPMU010_MFPSR_DEBUGSEL (1 << 17) -#define FTPMU010_MFPSR_DMA0PINSEL (1 << 16) -#define FTPMU010_MFPSR_DMA1PINSEL (1 << 15) -#define FTPMU010_MFPSR_MODEMPINSEL (1 << 14) -#define FTPMU010_MFPSR_AC97CLKOUTSEL (1 << 13) -#define FTPMU010_MFPSR_PWM1PINSEL (1 << 11) -#define FTPMU010_MFPSR_PWM0PINSEL (1 << 10) -#define FTPMU010_MFPSR_IRDACLKSEL (1 << 9) -#define FTPMU010_MFPSR_UARTCLKSEL (1 << 8) -#define FTPMU010_MFPSR_SSPCLKSEL (1 << 6) -#define FTPMU010_MFPSR_I2SCLKSEL (1 << 5) -#define FTPMU010_MFPSR_AC97CLKSEL (1 << 4) -#define FTPMU010_MFPSR_AC97PINSEL (1 << 3) -#define FTPMU010_MFPSR_TRIAHBDIS (1 << 1) -#define FTPMU010_MFPSR_TRIAHBDBG (1 << 0) - -/* - * PLL/DLL Control Register 0 - * Note: - * 1. FTPMU010_PDLLCR0_HCLKOUTDIS: - * Datasheet indicated it starts at bit #21 which was wrong. - * 2. FTPMU010_PDLLCR0_DLLFRAG: - * Datasheet indicated it has 2 bit which was wrong. - */ -#define FTPMU010_PDLLCR0_HCLKOUTDIS(cr0) (((cr0) & 0xf) << 20) -#define FTPMU010_PDLLCR0_DLLFRAG(cr0) (1 << 19) -#define FTPMU010_PDLLCR0_DLLSTSEL (1 << 18) -#define FTPMU010_PDLLCR0_DLLSTABLE (1 << 17) -#define FTPMU010_PDLLCR0_DLLDIS (1 << 16) -#define FTPMU010_PDLLCR0_PLL1FRANG(cr0) (((cr0) & 0x3) << 12) -#define FTPMU010_PDLLCR0_PLL1NS(cr0) (((cr0) & 0x1ff) << 3) -#define FTPMU010_PDLLCR0_PLL1STSEL (1 << 2) -#define FTPMU010_PDLLCR0_PLL1STABLE (1 << 1) -#define FTPMU010_PDLLCR0_PLL1DIS (1 << 0) - -/* - * SDRAM Signal Hold Time Control Register - */ -#define FTPMU010_SDRAMHTC_RCLK_DLY(x) (((x) & 0xf) << 28) -#define FTPMU010_SDRAMHTC_CTL_WCLK_DLY(x) (((x) & 0xf) << 24) -#define FTPMU010_SDRAMHTC_DAT_WCLK_DLY(x) (((x) & 0xf) << 20) -#define FTPMU010_SDRAMHTC_EBICTRL_DCSR (1 << 18) -#define FTPMU010_SDRAMHTC_EBIDATA_DCSR (1 << 17) -#define FTPMU010_SDRAMHTC_SDRAMCS_DCSR (1 << 16) -#define FTPMU010_SDRAMHTC_SDRAMCTL_DCSR (1 << 15) -#define FTPMU010_SDRAMHTC_CKE_DCSR (1 << 14) -#define FTPMU010_SDRAMHTC_DQM_DCSR (1 << 13) -#define FTPMU010_SDRAMHTC_SDCLK_DCSR (1 << 12) - -#ifndef __ASSEMBLY__ -void ftpmu010_32768osc_enable(void); -void ftpmu010_dlldis_disable(void); -void ftpmu010_mfpsr_diselect_dev(unsigned int dev); -void ftpmu010_mfpsr_select_dev(unsigned int dev); -void ftpmu010_sdram_clk_disable(unsigned int cr0); -void ftpmu010_sdramhtc_set(unsigned int val); -#endif - -#ifdef __ASSEMBLY__ -#define FTPMU010_IDNMBR0 0x00 -#define FTPMU010_reserved0 0x04 -#define FTPMU010_OSCC 0x08 -#define FTPMU010_PMODE 0x0C -#define FTPMU010_PMCR 0x10 -#define FTPMU010_PED 0x14 -#define FTPMU010_PEDSR 0x18 -#define FTPMU010_reserved1 0x1C -#define FTPMU010_PMSR 0x20 -#define FTPMU010_PGSR 0x24 -#define FTPMU010_MFPSR 0x28 -#define FTPMU010_MISC 0x2C -#define FTPMU010_PDLLCR0 0x30 -#define FTPMU010_PDLLCR1 0x34 -#define FTPMU010_AHBMCLKOFF 0x38 -#define FTPMU010_APBMCLKOFF 0x3C -#define FTPMU010_DCSRCR0 0x40 -#define FTPMU010_DCSRCR1 0x44 -#define FTPMU010_DCSRCR2 0x48 -#define FTPMU010_SDRAMHTC 0x4C -#define FTPMU010_PSPR0 0x50 -#define FTPMU010_PSPR1 0x54 -#define FTPMU010_PSPR2 0x58 -#define FTPMU010_PSPR3 0x5C -#define FTPMU010_PSPR4 0x60 -#define FTPMU010_PSPR5 0x64 -#define FTPMU010_PSPR6 0x68 -#define FTPMU010_PSPR7 0x6C -#define FTPMU010_PSPR8 0x70 -#define FTPMU010_PSPR9 0x74 -#define FTPMU010_PSPR10 0x78 -#define FTPMU010_PSPR11 0x7C -#define FTPMU010_PSPR12 0x80 -#define FTPMU010_PSPR13 0x84 -#define FTPMU010_PSPR14 0x88 -#define FTPMU010_PSPR15 0x8C -#define FTPMU010_AHBDMA_RACCS 0x90 -#define FTPMU010_reserved2 0x94 -#define FTPMU010_reserved3 0x98 -#define FTPMU010_JSS 0x9C -#define FTPMU010_CFC_RACC 0xA0 -#define FTPMU010_SSP1_RACC 0xA4 -#define FTPMU010_UART1TX_RACC 0xA8 -#define FTPMU010_UART1RX_RACC 0xAC -#define FTPMU010_UART2TX_RACC 0xB0 -#define FTPMU010_UART2RX_RACC 0xB4 -#define FTPMU010_SDC_RACC 0xB8 -#define FTPMU010_I2SAC97_RACC 0xBC -#define FTPMU010_IRDATX_RACC 0xC0 -#define FTPMU010_reserved4 0xC4 -#define FTPMU010_USBD_RACC 0xC8 -#define FTPMU010_IRDARX_RACC 0xCC -#define FTPMU010_IRDA_RACC 0xD0 -#define FTPMU010_ED0_RACC 0xD4 -#define FTPMU010_ED1_RACC 0xD8 -#endif /* __ASSEMBLY__ */ - -#endif /* __FTPMU010_H */

This option does not exist, so the Makefile rule does nothing. Drop it.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

arch/arm/cpu/arm920t/Makefile | 2 -- 1 file changed, 2 deletions(-)

diff --git a/arch/arm/cpu/arm920t/Makefile b/arch/arm/cpu/arm920t/Makefile index b70822c67ab..5ac3740621c 100644 --- a/arch/arm/cpu/arm920t/Makefile +++ b/arch/arm/cpu/arm920t/Makefile @@ -7,8 +7,6 @@ extra-y = start.o

obj-y += cpu.o

-obj-$(CONFIG_IMX) += imx/ - # some files can only build in ARM mode

ifdef CONFIG_$(SPL_)SYS_THUMB_BUILD

This is not used since this commit:

3cf02f5ffa4 imx6: remove not longer supported aristainetos boards

Drop the driver and Kconfig option.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

drivers/video/Makefile | 1 - drivers/video/lg4573.c | 331 ----------------------------------------- 2 files changed, 332 deletions(-) delete mode 100644 drivers/video/lg4573.c

diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 40a871d638e..12b68cdd068 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -30,7 +30,6 @@ obj-${CONFIG_VIDEO_TEGRA124} += tegra124/ obj-$(CONFIG_ATMEL_HLCD) += atmel_hlcdfb.o obj-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o obj-$(CONFIG_IHS_VIDEO_OUT) += ihs_video_out.o -obj-$(CONFIG_LG4573) += lg4573.o obj-$(CONFIG_LOGICORE_DP_TX) += logicore_dp_tx.o obj-$(CONFIG_NXP_TDA19988) += tda19988.o obj-$(CONFIG_OSD) += video_osd-uclass.o diff --git a/drivers/video/lg4573.c b/drivers/video/lg4573.c deleted file mode 100644 index dd87fc461b9..00000000000 --- a/drivers/video/lg4573.c +++ /dev/null @@ -1,331 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * LCD: LG4573, TFT 4.3", 480x800, RGB24 - * LCD initialization via SPI - * - */ -#include <common.h> -#include <backlight.h> -#include <command.h> -#include <display.h> -#include <dm.h> -#include <log.h> -#include <dm/read.h> -#include <dm/uclass-internal.h> -#include <errno.h> -#include <spi.h> -#include <asm/gpio.h> -#include <linux/delay.h> - -#define PWR_ON_DELAY_MSECS 120 - -static int lb043wv_spi_write_u16(struct spi_slave *slave, u16 val) -{ - unsigned short buf16 = htons(val); - int ret = 0; - - ret = spi_xfer(slave, 16, &buf16, NULL, - SPI_XFER_BEGIN | SPI_XFER_END); - if (ret) - debug("%s: Failed to send: %d\n", __func__, ret); - - return ret; -} - -static void lb043wv_spi_write_u16_array(struct spi_slave *slave, u16 *buff, - int size) -{ - int i; - - for (i = 0; i < size; i++) - lb043wv_spi_write_u16(slave, buff[i]); -} - -static void lb043wv_display_mode_settings(struct spi_slave *slave) -{ - static u16 display_mode_settings[] = { - 0x703A, - 0x7270, - 0x70B1, - 0x7208, - 0x723B, - 0x720F, - 0x70B2, - 0x7200, - 0x72C8, - 0x70B3, - 0x7200, - 0x70B4, - 0x7200, - 0x70B5, - 0x7242, - 0x7210, - 0x7210, - 0x7200, - 0x7220, - 0x70B6, - 0x720B, - 0x720F, - 0x723C, - 0x7213, - 0x7213, - 0x72E8, - 0x70B7, - 0x7246, - 0x7206, - 0x720C, - 0x7200, - 0x7200, - }; - - debug("transfer display mode settings\n"); - lb043wv_spi_write_u16_array(slave, display_mode_settings, - ARRAY_SIZE(display_mode_settings)); -} - -static void lb043wv_power_settings(struct spi_slave *slave) -{ - static u16 power_settings[] = { - 0x70C0, - 0x7201, - 0x7211, - 0x70C3, - 0x7207, - 0x7203, - 0x7204, - 0x7204, - 0x7204, - 0x70C4, - 0x7212, - 0x7224, - 0x7218, - 0x7218, - 0x7202, - 0x7249, - 0x70C5, - 0x726F, - 0x70C6, - 0x7241, - 0x7263, - }; - - debug("transfer power settings\n"); - lb043wv_spi_write_u16_array(slave, power_settings, - ARRAY_SIZE(power_settings)); -} - -static void lb043wv_gamma_settings(struct spi_slave *slave) -{ - static u16 gamma_settings[] = { - 0x70D0, - 0x7203, - 0x7207, - 0x7273, - 0x7235, - 0x7200, - 0x7201, - 0x7220, - 0x7200, - 0x7203, - 0x70D1, - 0x7203, - 0x7207, - 0x7273, - 0x7235, - 0x7200, - 0x7201, - 0x7220, - 0x7200, - 0x7203, - 0x70D2, - 0x7203, - 0x7207, - 0x7273, - 0x7235, - 0x7200, - 0x7201, - 0x7220, - 0x7200, - 0x7203, - 0x70D3, - 0x7203, - 0x7207, - 0x7273, - 0x7235, - 0x7200, - 0x7201, - 0x7220, - 0x7200, - 0x7203, - 0x70D4, - 0x7203, - 0x7207, - 0x7273, - 0x7235, - 0x7200, - 0x7201, - 0x7220, - 0x7200, - 0x7203, - 0x70D5, - 0x7203, - 0x7207, - 0x7273, - 0x7235, - 0x7200, - 0x7201, - 0x7220, - 0x7200, - 0x7203, - }; - - debug("transfer gamma settings\n"); - lb043wv_spi_write_u16_array(slave, gamma_settings, - ARRAY_SIZE(gamma_settings)); -} - -static void lb043wv_display_on(struct spi_slave *slave) -{ - static u16 sleep_out = 0x7011; - static u16 display_on = 0x7029; - - lb043wv_spi_write_u16(slave, sleep_out); - mdelay(PWR_ON_DELAY_MSECS); - lb043wv_spi_write_u16(slave, display_on); -} - -static int lg4573_spi_startup(struct spi_slave *slave) -{ - int ret; - - ret = spi_claim_bus(slave); - if (ret) - return ret; - - lb043wv_display_mode_settings(slave); - lb043wv_power_settings(slave); - lb043wv_gamma_settings(slave); - lb043wv_display_on(slave); - - spi_release_bus(slave); - return 0; -} - -static int do_lgset(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) -{ - struct spi_slave *slave; - struct udevice *dev; - int ret; - - ret = uclass_get_device_by_driver(UCLASS_DISPLAY, - DM_DRIVER_GET(lg4573_lcd), &dev); - if (ret) { - printf("%s: Could not get lg4573 device\n", __func__); - return ret; - } - slave = dev_get_parent_priv(dev); - if (!slave) { - printf("%s: No slave data\n", __func__); - return -ENODEV; - } - lg4573_spi_startup(slave); - - return 0; -} - -U_BOOT_CMD( - lgset, 2, 1, do_lgset, - "set lgdisplay", - "" -); - -static int lg4573_bind(struct udevice *dev) -{ - return 0; -} - -static int lg4573_probe(struct udevice *dev) -{ - return 0; -} - -static const struct udevice_id lg4573_ids[] = { - { .compatible = "lg,lg4573" }, - { } -}; - -struct lg4573_lcd_priv { - struct display_timing timing; - struct udevice *backlight; - struct gpio_desc enable; - int panel_bpp; - u32 power_on_delay; -}; - -static int lg4573_lcd_read_timing(struct udevice *dev, - struct display_timing *timing) -{ - struct lg4573_lcd_priv *priv = dev_get_priv(dev); - - memcpy(timing, &priv->timing, sizeof(struct display_timing)); - - return 0; -} - -static int lg4573_lcd_enable(struct udevice *dev, int bpp, - const struct display_timing *edid) -{ - struct spi_slave *slave = dev_get_parent_priv(dev); - struct lg4573_lcd_priv *priv = dev_get_priv(dev); - int ret = 0; - - dm_gpio_set_value(&priv->enable, 1); - ret = backlight_enable(priv->backlight); - - mdelay(priv->power_on_delay); - lg4573_spi_startup(slave); - - return ret; -}; - -static const struct dm_display_ops lg4573_lcd_ops = { - .read_timing = lg4573_lcd_read_timing, - .enable = lg4573_lcd_enable, -}; - -static int lg4573_of_to_plat(struct udevice *dev) -{ - struct lg4573_lcd_priv *priv = dev_get_priv(dev); - int ret; - - ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev, - "backlight", &priv->backlight); - if (ret) { - debug("%s: Cannot get backlight: ret=%d\n", __func__, ret); - return log_ret(ret); - } - ret = gpio_request_by_name(dev, "enable-gpios", 0, &priv->enable, - GPIOD_IS_OUT); - if (ret) { - debug("%s: Warning: cannot get enable GPIO: ret=%d\n", - __func__, ret); - if (ret != -ENOENT) - return log_ret(ret); - } - - priv->power_on_delay = dev_read_u32_default(dev, "power-on-delay", 10); - - return 0; -} - -U_BOOT_DRIVER(lg4573_lcd) = { - .name = "lg4573", - .id = UCLASS_DISPLAY, - .ops = &lg4573_lcd_ops, - .of_to_plat = lg4573_of_to_plat, - .of_match = lg4573_ids, - .bind = lg4573_bind, - .probe = lg4573_probe, - .priv_auto = sizeof(struct lg4573_lcd_priv), -};

This option does not exist, so the Makefile rule does nothing. Drop it.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

board/davinci/da8xxevm/Makefile | 1 - 1 file changed, 1 deletion(-)

diff --git a/board/davinci/da8xxevm/Makefile b/board/davinci/da8xxevm/Makefile index 8187c8db22e..fe043d517f2 100644 --- a/board/davinci/da8xxevm/Makefile +++ b/board/davinci/da8xxevm/Makefile @@ -5,6 +5,5 @@ # # Copyright (C) 2007 Sergey Kubushyn ksi@koi8.net

-obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += da830evm.o obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += da850evm.o obj-$(CONFIG_TARGET_OMAPL138_LCDK) += omapl138_lcdk.o

This option is set in the Makefile but has no effect in the assembly code, i.e. the #ifdef branch is never used. Drop it.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

arch/arc/config.mk | 4 ---- arch/arc/lib/ints_low.S | 5 ----- 2 files changed, 9 deletions(-)

diff --git a/arch/arc/config.mk b/arch/arc/config.mk index b713fa3054c..b110f7deaf6 100644 --- a/arch/arc/config.mk +++ b/arch/arc/config.mk @@ -12,10 +12,6 @@ KBUILD_LDFLAGS += -EB PLATFORM_CPPFLAGS += -mbig-endian endif

-ifdef CONFIG_ARC_MMU_VER -CONFIG_MMU = 1 -endif - PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2 -mno-sdata PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections -fno-common

diff --git a/arch/arc/lib/ints_low.S b/arch/arc/lib/ints_low.S index 38c45c60a95..fb283f239ea 100644 --- a/arch/arc/lib/ints_low.S +++ b/arch/arc/lib/ints_low.S @@ -76,13 +76,8 @@ .endm

.macro SAVE_EXCEPTION_SOURCE -#ifdef CONFIG_MMU - /* If MMU exists exception faulting address is loaded in EFA reg */ - lr %r0, [%efa] -#else /* Otherwise in ERET (exception return) reg */ lr %r0, [%eret] -#endif .endm

ENTRY(memory_error)

This is not a Kconfig option so we should not be setting it in the Makefile. Rename it to use a CFS_ prefix, since this is still used in mxsimage.c

In general tools should support all the features without reference to CONFIG options, but this is left to the maintainer to look at.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

tools/Makefile | 4 ++-- tools/mxsimage.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/Makefile b/tools/Makefile index edfa40903d9..2ee43dff542 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -158,9 +158,9 @@ fit_check_sign-objs := $(dumpimage-mkimage-objs) fit_check_sign.o file2include-objs := file2include.o

ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_TOOLS_LIBCRYPTO),) -# Add CONFIG_MXS into host CFLAGS, so we can check whether or not register +# Add CFG_MXS into host CFLAGS, so we can check whether or not register # the mxsimage support within tools/mxsimage.c . -HOSTCFLAGS_mxsimage.o += -DCONFIG_MXS +HOSTCFLAGS_mxsimage.o += -DCFG_MXS endif

ifdef CONFIG_TOOLS_LIBCRYPTO diff --git a/tools/mxsimage.c b/tools/mxsimage.c index fee022aab46..fbe46c47fae 100644 --- a/tools/mxsimage.c +++ b/tools/mxsimage.c @@ -5,7 +5,7 @@ * Copyright (C) 2012-2013 Marek Vasut marex@denx.de */

-#ifdef CONFIG_MXS +#ifdef CFG_MXS

#include <errno.h> #include <fcntl.h>

This is not used since this commit:

8d1e3cb1400 powerpc: mpc83xx: remove MPC8360ERDK, EMPC8360EMDS support

Drop the driver and Kconfig option.

Signed-off-by: Simon Glass sjg@chromium.org Reviewed-By: Michael Trimarchi michael@amarulasolutions.com ---

(no changes since v1)

drivers/mtd/nand/raw/Makefile | 1 - drivers/mtd/nand/raw/fsl_upm.c | 187 --------------------------------- include/linux/mtd/fsl_upm.h | 44 -------- 3 files changed, 232 deletions(-) delete mode 100644 drivers/mtd/nand/raw/fsl_upm.c delete mode 100644 include/linux/mtd/fsl_upm.h

diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile index 4c59903aa8c..e8764cf358b 100644 --- a/drivers/mtd/nand/raw/Makefile +++ b/drivers/mtd/nand/raw/Makefile @@ -56,7 +56,6 @@ obj-$(CONFIG_NAND_DENALI) += denali.o obj-$(CONFIG_NAND_DENALI_DT) += denali_dt.o obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o -obj-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o obj-$(CONFIG_NAND_FSMC) += fsmc_nand.o obj-$(CONFIG_NAND_KB9202) += kb9202_nand.o obj-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o diff --git a/drivers/mtd/nand/raw/fsl_upm.c b/drivers/mtd/nand/raw/fsl_upm.c deleted file mode 100644 index 91cc1339537..00000000000 --- a/drivers/mtd/nand/raw/fsl_upm.c +++ /dev/null @@ -1,187 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * FSL UPM NAND driver - * - * Copyright (C) 2007 MontaVista Software, Inc. - * Anton Vorontsov avorontsov@ru.mvista.com - */ - -#include <config.h> -#include <common.h> -#include <log.h> -#include <asm/io.h> -#include <linux/delay.h> -#include <linux/errno.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/rawnand.h> -#include <linux/mtd/fsl_upm.h> -#include <nand.h> - -static void fsl_upm_start_pattern(struct fsl_upm *upm, u32 pat_offset) -{ - clrsetbits_be32(upm->mxmr, MxMR_MAD_MSK, MxMR_OP_RUNP | pat_offset); - (void)in_be32(upm->mxmr); -} - -static void fsl_upm_end_pattern(struct fsl_upm *upm) -{ - clrbits_be32(upm->mxmr, MxMR_OP_RUNP); - - while (in_be32(upm->mxmr) & MxMR_OP_RUNP) - eieio(); -} - -static void fsl_upm_run_pattern(struct fsl_upm *upm, int width, - void __iomem *io_addr, u32 mar) -{ - out_be32(upm->mar, mar); - (void)in_be32(upm->mar); - switch (width) { - case 8: - out_8(io_addr, 0x0); - break; - case 16: - out_be16(io_addr, 0x0); - break; - case 32: - out_be32(io_addr, 0x0); - break; - } -} - -static void fun_wait(struct fsl_upm_nand *fun) -{ - if (fun->dev_ready) { - while (!fun->dev_ready(fun->chip_nr)) - debug("unexpected busy state\n"); - } else { - /* - * If the R/B pin is not connected, - * a short delay is necessary. - */ - udelay(1); - } -} - -#if CONFIG_SYS_NAND_MAX_CHIPS > 1 -static void fun_select_chip(struct mtd_info *mtd, int chip_nr) -{ - struct nand_chip *chip = mtd_to_nand(mtd); - struct fsl_upm_nand *fun = nand_get_controller_data(chip); - - if (chip_nr >= 0) { - fun->chip_nr = chip_nr; - chip->IO_ADDR_R = chip->IO_ADDR_W = - fun->upm.io_addr + fun->chip_offset * chip_nr; - } else if (chip_nr == -1) { - chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); - } -} -#endif - -static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) -{ - struct nand_chip *chip = mtd_to_nand(mtd); - struct fsl_upm_nand *fun = nand_get_controller_data(chip); - void __iomem *io_addr; - u32 mar; - - if (!(ctrl & fun->last_ctrl)) { - fsl_upm_end_pattern(&fun->upm); - - if (cmd == NAND_CMD_NONE) - return; - - fun->last_ctrl = ctrl & (NAND_ALE | NAND_CLE); - } - - if (ctrl & NAND_CTRL_CHANGE) { - if (ctrl & NAND_ALE) - fsl_upm_start_pattern(&fun->upm, fun->upm_addr_offset); - else if (ctrl & NAND_CLE) - fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset); - } - - mar = cmd << (32 - fun->width); - io_addr = fun->upm.io_addr; -#if CONFIG_SYS_NAND_MAX_CHIPS > 1 - if (fun->chip_nr > 0) { - io_addr += fun->chip_offset * fun->chip_nr; - if (fun->upm_mar_chip_offset) - mar |= fun->upm_mar_chip_offset * fun->chip_nr; - } -#endif - fsl_upm_run_pattern(&fun->upm, fun->width, io_addr, mar); - - /* - * Some boards/chips needs this. At least the MPC8360E-RDK - * needs it. Probably weird chip, because I don't see any - * need for this on MPC8555E + Samsung K9F1G08U0A. Usually - * here are 0-2 unexpected busy states per block read. - */ - if (fun->wait_flags & FSL_UPM_WAIT_RUN_PATTERN) - fun_wait(fun); -} - -static u8 upm_nand_read_byte(struct mtd_info *mtd) -{ - struct nand_chip *chip = mtd_to_nand(mtd); - - return in_8(chip->IO_ADDR_R); -} - -static void upm_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) -{ - int i; - struct nand_chip *chip = mtd_to_nand(mtd); - struct fsl_upm_nand *fun = nand_get_controller_data(chip); - - for (i = 0; i < len; i++) { - out_8(chip->IO_ADDR_W, buf[i]); - if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BYTE) - fun_wait(fun); - } - - if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BUFFER) - fun_wait(fun); -} - -static void upm_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) -{ - int i; - struct nand_chip *chip = mtd_to_nand(mtd); - - for (i = 0; i < len; i++) - buf[i] = in_8(chip->IO_ADDR_R); -} - -static int nand_dev_ready(struct mtd_info *mtd) -{ - struct nand_chip *chip = mtd_to_nand(mtd); - struct fsl_upm_nand *fun = nand_get_controller_data(chip); - - return fun->dev_ready(fun->chip_nr); -} - -int fsl_upm_nand_init(struct nand_chip *chip, struct fsl_upm_nand *fun) -{ - if (fun->width != 8 && fun->width != 16 && fun->width != 32) - return -ENOSYS; - - fun->last_ctrl = NAND_CLE; - - nand_set_controller_data(chip, fun); - chip->chip_delay = fun->chip_delay; - chip->ecc.mode = NAND_ECC_SOFT; - chip->cmd_ctrl = fun_cmd_ctrl; -#if CONFIG_SYS_NAND_MAX_CHIPS > 1 - chip->select_chip = fun_select_chip; -#endif - chip->read_byte = upm_nand_read_byte; - chip->read_buf = upm_nand_read_buf; - chip->write_buf = upm_nand_write_buf; - if (fun->dev_ready) - chip->dev_ready = nand_dev_ready; - - return 0; -} diff --git a/include/linux/mtd/fsl_upm.h b/include/linux/mtd/fsl_upm.h deleted file mode 100644 index 9999993543b..00000000000 --- a/include/linux/mtd/fsl_upm.h +++ /dev/null @@ -1,44 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * FSL UPM NAND driver - * - * Copyright (C) 2007 MontaVista Software, Inc. - * Anton Vorontsov avorontsov@ru.mvista.com - */ - -#ifndef __LINUX_MTD_NAND_FSL_UPM -#define __LINUX_MTD_NAND_FSL_UPM - -#include <linux/mtd/rawnand.h> - -#define FSL_UPM_WAIT_RUN_PATTERN 0x1 -#define FSL_UPM_WAIT_WRITE_BYTE 0x2 -#define FSL_UPM_WAIT_WRITE_BUFFER 0x4 - -struct fsl_upm { - void __iomem *mdr; - void __iomem *mxmr; - void __iomem *mar; - void __iomem *io_addr; -}; - -struct fsl_upm_nand { - struct fsl_upm upm; - - int width; - int upm_cmd_offset; - int upm_addr_offset; - int upm_mar_chip_offset; - int wait_flags; - int (*dev_ready)(int chip_nr); - int chip_delay; - int chip_offset; - int chip_nr; - - /* no need to fill */ - int last_ctrl; -}; - -extern int fsl_upm_nand_init(struct nand_chip *chip, struct fsl_upm_nand *fun); - -#endif

This is not used since this commit:

936478e797a SPARC: Remove

Drop the driver and Kconfig option.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

drivers/mtd/nand/raw/Makefile | 1 - drivers/mtd/nand/raw/nand_plat.c | 65 -------------------------------- 2 files changed, 66 deletions(-) delete mode 100644 drivers/mtd/nand/raw/nand_plat.c

diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile index c25acb11804..add2b4cf655 100644 --- a/drivers/mtd/nand/raw/Makefile +++ b/drivers/mtd/nand/raw/Makefile @@ -70,7 +70,6 @@ obj-$(CONFIG_NAND_PXA3XX) += pxa3xx_nand.o obj-$(CONFIG_TEGRA_NAND) += tegra_nand.o obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o -obj-$(CONFIG_NAND_PLAT) += nand_plat.o obj-$(CONFIG_NAND_SUNXI) += sunxi_nand.o obj-$(CONFIG_NAND_MXIC) += mxic_nand.o obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o diff --git a/drivers/mtd/nand/raw/nand_plat.c b/drivers/mtd/nand/raw/nand_plat.c deleted file mode 100644 index 81e7aa218d5..00000000000 --- a/drivers/mtd/nand/raw/nand_plat.c +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Genericish driver for memory mapped NAND devices - * - * Copyright (c) 2006-2009 Analog Devices Inc. - * Licensed under the GPL-2 or later. - */ - -/* Your board must implement the following macros: - * NAND_PLAT_WRITE_CMD(chip, cmd) - * NAND_PLAT_WRITE_ADR(chip, cmd) - * NAND_PLAT_INIT() - * - * It may also implement the following: - * NAND_PLAT_DEV_READY(chip) - */ - -#include <common.h> -#include <linux/mtd/rawnand.h> -#include <asm/io.h> -#ifdef NAND_PLAT_GPIO_DEV_READY -# include <asm/gpio.h> -# define NAND_PLAT_DEV_READY(chip) gpio_get_value(NAND_PLAT_GPIO_DEV_READY) -#endif - -#include <nand.h> - -static void plat_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) -{ - struct nand_chip *this = mtd_to_nand(mtd); - - if (cmd == NAND_CMD_NONE) - return; - - if (ctrl & NAND_CLE) - NAND_PLAT_WRITE_CMD(this, cmd); - else - NAND_PLAT_WRITE_ADR(this, cmd); -} - -#ifdef NAND_PLAT_DEV_READY -static int plat_dev_ready(struct mtd_info *mtd) -{ - return NAND_PLAT_DEV_READY((struct nand_chip *)mtd_to_nand(mtd)); -} -#else -# define plat_dev_ready NULL -#endif - -int board_nand_init(struct nand_chip *nand) -{ -#ifdef NAND_PLAT_GPIO_DEV_READY - gpio_request(NAND_PLAT_GPIO_DEV_READY, "nand-plat"); - gpio_direction_input(NAND_PLAT_GPIO_DEV_READY); -#endif - -#ifdef NAND_PLAT_INIT - NAND_PLAT_INIT(); -#endif - - nand->cmd_ctrl = plat_cmd_ctrl; - nand->dev_ready = plat_dev_ready; - nand->ecc.mode = NAND_ECC_SOFT; - - return 0; -}

This option does not exist, so the Makefile rule does nothing. Drop it.

Signed-off-by: Simon Glass sjg@chromium.org Reviewed-by: Tom Rini trini@konsulko.com ---

(no changes since v1)

drivers/Makefile | 1 - 1 file changed, 1 deletion(-)

diff --git a/drivers/Makefile b/drivers/Makefile index 83b14ef1fd3..15d19d0c8a3 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -59,7 +59,6 @@ obj-$(CONFIG_SPL_USB_GADGET) += usb/common/ obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/udc/ obj-$(CONFIG_SPL_WATCHDOG) += watchdog/ obj-$(CONFIG_SPL_USB_HOST) += usb/host/ -obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/ obj-$(CONFIG_SPL_SATA) += ata/ scsi/ obj-$(CONFIG_SPL_LEGACY_BLOCK) += block/ obj-$(CONFIG_SPL_THERMAL) += thermal/

This is not used. Drop the driver and Kconfig option.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

arch/mips/mach-octeon/octeon_fdt.c | 43 +--------- board/gdsys/a38x/hre.c | 1 - drivers/gpio/Makefile | 1 - drivers/gpio/pca9698.c | 127 ----------------------------- include/pca9698.h | 17 ---- 5 files changed, 1 insertion(+), 188 deletions(-) delete mode 100644 drivers/gpio/pca9698.c delete mode 100644 include/pca9698.h

diff --git a/arch/mips/mach-octeon/octeon_fdt.c b/arch/mips/mach-octeon/octeon_fdt.c index 0ccfe149dcc..c74fe9d9fb8 100644 --- a/arch/mips/mach-octeon/octeon_fdt.c +++ b/arch/mips/mach-octeon/octeon_fdt.c @@ -30,9 +30,6 @@ #ifdef CONFIG_PCF857X #include <pcf857x.h> #endif -#ifdef CONFIG_PCA9698 -#include <pca9698.h> -#endif #ifdef CONFIG_PCA9554 #include <pca9554.h> #endif @@ -59,13 +56,6 @@ static const char * const pca9555_gpio_list[] = { }; #endif

-#ifdef CONFIG_PCA9698 -/** List of compatible strings supported by pca9698 driver */ -static const char * const pca9698_gpio_list[] = { - "nxp,pca9505", "pca9505", "nxp,pca9698", "pca9698", NULL, -}; -#endif - #ifdef CONFIG_PCA953X /** List of compatible strings supported by pca953x driver */ static const char * const pca953x_gpio_list[] = { @@ -807,19 +797,6 @@ int octeon_fdt_read_gpio(const void *fdt, int phandle, int pin) } value = (value >> pin) & 1; break; -#endif -#ifdef CONFIG_PCA9698 - case CVMX_GPIO_PIN_PCA9698: - node = fdt_node_offset_by_phandle(fdt, phandle); - if (octeon_fdt_get_i2c_bus_addr(fdt, node, &bus, &addr)) { - printf("%s: Could not get gpio bus and/or address\n", __func__); - return -1; - } - old_bus = i2c_get_bus_num(); - i2c_set_bus_num(bus); - value = pca9698_get_value(addr, pin); - i2c_set_bus_num(old_bus); - break; #endif case CVMX_GPIO_PIN_OCTEON: value = gpio_get_value(pin); @@ -880,18 +857,6 @@ int octeon_fdt_set_gpio(const void *fdt, int phandle, int pin, int val) return -1; } return pcf957x_set_val(bus, addr, 1 << pin, val << pin); -#endif -#ifdef CONFIG_PCA9698 - case CVMX_GPIO_PIN_PCA9698: - if (octeon_fdt_get_i2c_bus_addr(fdt, node, &bus, &addr)) { - printf("%s: Could not get gpio bus and/or address\n", __func__); - return -1; - } - old_bus = i2c_get_bus_num(); - i2c_set_bus_num(bus); - rc = pca9698_set_value(addr, pin, val); - i2c_set_bus_num(old_bus); - return rc; #endif case CVMX_GPIO_PIN_OCTEON: return gpio_set_value(pin, val); @@ -951,13 +916,7 @@ int octeon_fdt_get_gpio_info(int fdt_node, enum octeon_gpio_type *type, *type = GPIO_TYPE_PCA953X; } #endif -#ifdef CONFIG_PCA9698 - if (!octeon_fdt_node_check_compatible(fdt, fdt_node, pca9698_gpio_list)) { - debug("%s: Found PCA9698 compatible GPIO", __func__); - *type = GPIO_TYPE_PCA9698; - } -#endif -#if defined(CONFIG_PCA953X) || defined(CONFIG_PCA9698) || \ +#if defined(CONFIG_PCA953X) || \ defined(CONFIG_PCA9555) || defined(CONFIG_PCA9554) if (!i2c_addr || !i2c_bus) { printf("%s: Error: i2c_addr or i2c_bus is NULL\n", __func__); diff --git a/board/gdsys/a38x/hre.c b/board/gdsys/a38x/hre.c index 2f16a4d3e11..d16233ed78e 100644 --- a/board/gdsys/a38x/hre.c +++ b/board/gdsys/a38x/hre.c @@ -15,7 +15,6 @@ #include <u-boot/sha1.h> #include <asm/byteorder.h> #include <asm/unaligned.h> -#include <pca9698.h>

#include "hre.h"

diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 889a88dc885..fcd136367ac 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -28,7 +28,6 @@ obj-$(CONFIG_MXC_GPIO) += mxc_gpio.o obj-$(CONFIG_MXS_GPIO) += mxs_gpio.o obj-$(CONFIG_NPCM_GPIO) += npcm_gpio.o obj-$(CONFIG_PCA953X) += pca953x.o -obj-$(CONFIG_PCA9698) += pca9698.o obj-$(CONFIG_ROCKCHIP_GPIO) += rk_gpio.o obj-$(CONFIG_RCAR_GPIO) += gpio-rcar.o obj-$(CONFIG_RZA1_GPIO) += gpio-rza1.o diff --git a/drivers/gpio/pca9698.c b/drivers/gpio/pca9698.c deleted file mode 100644 index 11274c78101..00000000000 --- a/drivers/gpio/pca9698.c +++ /dev/null @@ -1,127 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2011 - * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc - */ - -/* - * Driver for NXP's pca9698 40 bit I2C gpio expander - */ - -#include <common.h> -#include <i2c.h> -#include <malloc.h> -#include <linux/errno.h> -#include <pca9698.h> - -/* - * The pca9698 registers - */ - -#define PCA9698_REG_INPUT 0x00 -#define PCA9698_REG_OUTPUT 0x08 -#define PCA9698_REG_POLARITY 0x10 -#define PCA9698_REG_CONFIG 0x18 - -#define PCA9698_BUFFER_SIZE 5 -#define PCA9698_GPIO_COUNT 40 - -static int pca9698_read40(u8 addr, u8 offset, u8 *buffer) -{ - u8 command = offset | 0x80; /* autoincrement */ - - return i2c_read(addr, command, 1, buffer, PCA9698_BUFFER_SIZE); -} - -static int pca9698_write40(u8 addr, u8 offset, u8 *buffer) -{ - u8 command = offset | 0x80; /* autoincrement */ - - return i2c_write(addr, command, 1, buffer, PCA9698_BUFFER_SIZE); -} - -static void pca9698_set_bit(unsigned gpio, u8 *buffer, unsigned value) -{ - unsigned byte = gpio / 8; - unsigned bit = gpio % 8; - - if (value) - buffer[byte] |= (1 << bit); - else - buffer[byte] &= ~(1 << bit); -} - -int pca9698_request(unsigned gpio, const char *label) -{ - if (gpio >= PCA9698_GPIO_COUNT) - return -EINVAL; - - return 0; -} - -void pca9698_free(unsigned gpio) -{ -} - -int pca9698_direction_input(u8 addr, unsigned gpio) -{ - u8 data[PCA9698_BUFFER_SIZE]; - int res; - - res = pca9698_read40(addr, PCA9698_REG_CONFIG, data); - if (res) - return res; - - pca9698_set_bit(gpio, data, 1); - - return pca9698_write40(addr, PCA9698_REG_CONFIG, data); -} - -int pca9698_direction_output(u8 addr, unsigned gpio, int value) -{ - u8 data[PCA9698_BUFFER_SIZE]; - int res; - - res = pca9698_set_value(addr, gpio, value); - if (res) - return res; - - res = pca9698_read40(addr, PCA9698_REG_CONFIG, data); - if (res) - return res; - - pca9698_set_bit(gpio, data, 0); - - return pca9698_write40(addr, PCA9698_REG_CONFIG, data); -} - -int pca9698_get_value(u8 addr, unsigned gpio) -{ - unsigned config_byte = gpio / 8; - unsigned config_bit = gpio % 8; - unsigned value; - u8 data[PCA9698_BUFFER_SIZE]; - int res; - - res = pca9698_read40(addr, PCA9698_REG_INPUT, data); - if (res) - return -1; - - value = data[config_byte] & (1 << config_bit); - - return !!value; -} - -int pca9698_set_value(u8 addr, unsigned gpio, int value) -{ - u8 data[PCA9698_BUFFER_SIZE]; - int res; - - res = pca9698_read40(addr, PCA9698_REG_OUTPUT, data); - if (res) - return res; - - pca9698_set_bit(gpio, data, value); - - return pca9698_write40(addr, PCA9698_REG_OUTPUT, data); -} diff --git a/include/pca9698.h b/include/pca9698.h deleted file mode 100644 index 48a5f756e28..00000000000 --- a/include/pca9698.h +++ /dev/null @@ -1,17 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2011 - * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc - */ - -#ifndef __PCA9698_H_ -#define __PCA9698_H_ - -int pca9698_request(unsigned gpio, const char *label); -void pca9698_free(unsigned gpio); -int pca9698_direction_input(u8 addr, unsigned gpio); -int pca9698_direction_output(u8 addr, unsigned gpio, int value); -int pca9698_get_value(u8 addr, unsigned gpio); -int pca9698_set_value(u8 addr, unsigned gpio, int value); - -#endif /* __PCA9698_H_ */

This driver is not used. Drop it and the entire fuel_gauge directory, since there is nothing left.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

drivers/power/Makefile | 1 - drivers/power/fuel_gauge/Makefile | 6 - drivers/power/fuel_gauge/fg_max17042.c | 287 ------------------------- include/power/fg_battery_cell_params.h | 73 ------- 4 files changed, 367 deletions(-) delete mode 100644 drivers/power/fuel_gauge/Makefile delete mode 100644 drivers/power/fuel_gauge/fg_max17042.c delete mode 100644 include/power/fg_battery_cell_params.h

diff --git a/drivers/power/Makefile b/drivers/power/Makefile index efdae3655ac..93003e97e01 100644 --- a/drivers/power/Makefile +++ b/drivers/power/Makefile @@ -5,7 +5,6 @@

obj-$(CONFIG_$(SPL_TPL_)ACPI_PMC) += acpi_pmc/ obj-$(CONFIG_$(SPL_TPL_)POWER_DOMAIN) += domain/ -obj-y += fuel_gauge/ obj-y += mfd/ obj-y += pmic/ obj-y += regulator/ diff --git a/drivers/power/fuel_gauge/Makefile b/drivers/power/fuel_gauge/Makefile deleted file mode 100644 index ca2df947585..00000000000 --- a/drivers/power/fuel_gauge/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2012 Samsung Electronics -# Lukasz Majewski l.majewski@samsung.com - -obj-$(CONFIG_POWER_FG_MAX17042) += fg_max17042.o diff --git a/drivers/power/fuel_gauge/fg_max17042.c b/drivers/power/fuel_gauge/fg_max17042.c deleted file mode 100644 index a395d587a86..00000000000 --- a/drivers/power/fuel_gauge/fg_max17042.c +++ /dev/null @@ -1,287 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2012 Samsung Electronics - * Lukasz Majewski l.majewski@samsung.com - */ - -#include <common.h> -#include <log.h> -#include <linux/delay.h> -#include <power/pmic.h> -#include <power/max17042_fg.h> -#include <i2c.h> -#include <power/max8997_pmic.h> -#include <power/power_chrg.h> -#include <power/battery.h> -#include <power/fg_battery_cell_params.h> -#include <errno.h> - -static int fg_write_regs(struct pmic *p, u8 addr, u16 *data, int num) -{ - int ret = 0; - int i; - - for (i = 0; i < num; i++, addr++) { - ret = pmic_reg_write(p, addr, *(data + i)); - if (ret) - return ret; - } - - return 0; -} - -static int fg_read_regs(struct pmic *p, u8 addr, u16 *data, int num) -{ - unsigned int dat; - int ret = 0; - int i; - - for (i = 0; i < num; i++, addr++) { - ret = pmic_reg_read(p, addr, &dat); - if (ret) - return ret; - - *(data + i) = (u16)dat; - } - - return 0; -} - -static int fg_write_and_verify(struct pmic *p, u8 addr, u16 data) -{ - unsigned int val = data; - int ret = 0; - - ret |= pmic_reg_write(p, addr, val); - ret |= pmic_reg_read(p, addr, &val); - - if (ret) - return ret; - - if (((u16) val) == data) - return 0; - - return -1; -} - -static void por_fuelgauge_init(struct pmic *p) -{ - u16 r_data0[16], r_data1[16], r_data2[16]; - u32 rewrite_count = 5; - u32 check_count; - u32 lock_count; - u32 i = 0; - u32 val; - s32 ret = 0; - char *status_msg; - - /* Delay 500 ms */ - mdelay(500); - /* Initilize Configuration */ - pmic_reg_write(p, MAX17042_CONFIG, 0x2310); - -rewrite_model: - check_count = 5; - lock_count = 5; - - if (!rewrite_count--) { - status_msg = "init failed!"; - goto error; - } - - /* Unlock Model Access */ - pmic_reg_write(p, MAX17042_MLOCKReg1, MODEL_UNLOCK1); - pmic_reg_write(p, MAX17042_MLOCKReg2, MODEL_UNLOCK2); - - /* Write/Read/Verify the Custom Model */ - ret = fg_write_regs(p, MAX17042_MODEL1, cell_character0, - ARRAY_SIZE(cell_character0)); - if (ret) - goto rewrite_model; - - ret = fg_write_regs(p, MAX17042_MODEL2, cell_character1, - ARRAY_SIZE(cell_character1)); - if (ret) - goto rewrite_model; - - ret = fg_write_regs(p, MAX17042_MODEL3, cell_character2, - ARRAY_SIZE(cell_character2)); - if (ret) - goto rewrite_model; - -check_model: - if (!check_count--) { - if (rewrite_count) - goto rewrite_model; - else - status_msg = "check failed!"; - - goto error; - } - - ret = fg_read_regs(p, MAX17042_MODEL1, r_data0, ARRAY_SIZE(r_data0)); - if (ret) - goto check_model; - - ret = fg_read_regs(p, MAX17042_MODEL2, r_data1, ARRAY_SIZE(r_data1)); - if (ret) - goto check_model; - - ret = fg_read_regs(p, MAX17042_MODEL3, r_data2, ARRAY_SIZE(r_data2)); - if (ret) - goto check_model; - - for (i = 0; i < 16; i++) { - if ((cell_character0[i] != r_data0[i]) - || (cell_character1[i] != r_data1[i]) - || (cell_character2[i] != r_data2[i])) - goto rewrite_model; - } - -lock_model: - if (!lock_count--) { - if (rewrite_count) - goto rewrite_model; - else - status_msg = "lock failed!"; - - goto error; - } - - /* Lock model access */ - pmic_reg_write(p, MAX17042_MLOCKReg1, MODEL_LOCK1); - pmic_reg_write(p, MAX17042_MLOCKReg2, MODEL_LOCK2); - - /* Verify the model access is locked */ - ret = fg_read_regs(p, MAX17042_MODEL1, r_data0, ARRAY_SIZE(r_data0)); - if (ret) - goto lock_model; - - ret = fg_read_regs(p, MAX17042_MODEL2, r_data1, ARRAY_SIZE(r_data1)); - if (ret) - goto lock_model; - - ret = fg_read_regs(p, MAX17042_MODEL3, r_data2, ARRAY_SIZE(r_data2)); - if (ret) - goto lock_model; - - for (i = 0; i < ARRAY_SIZE(r_data0); i++) { - /* Check if model locked */ - if (r_data0[i] || r_data1[i] || r_data2[i]) - goto lock_model; - } - - /* Write Custom Parameters */ - fg_write_and_verify(p, MAX17042_RCOMP0, RCOMP0); - fg_write_and_verify(p, MAX17042_TEMPCO, TempCo); - - /* Delay at least 350mS */ - mdelay(350); - - /* Initialization Complete */ - pmic_reg_read(p, MAX17042_STATUS, &val); - /* Write and Verify Status with POR bit Cleared */ - fg_write_and_verify(p, MAX17042_STATUS, val & ~MAX17042_POR); - - /* Delay at least 350 ms */ - mdelay(350); - - status_msg = "OK!"; -error: - debug("%s: model init status: %s\n", p->name, status_msg); - return; -} - -static int power_update_battery(struct pmic *p, struct pmic *bat) -{ - struct power_battery *pb = bat->pbat; - unsigned int val; - int ret = 0; - - if (pmic_probe(p)) { - puts("Can't find max17042 fuel gauge\n"); - return -ENODEV; - } - - ret |= pmic_reg_read(p, MAX17042_VFSOC, &val); - pb->bat->state_of_chrg = (val >> 8); - - pmic_reg_read(p, MAX17042_VCELL, &val); - debug("vfsoc: 0x%x\n", val); - pb->bat->voltage_uV = ((val & 0xFFUL) >> 3) + ((val & 0xFF00) >> 3); - pb->bat->voltage_uV = (pb->bat->voltage_uV * 625); - - pmic_reg_read(p, 0x05, &val); - pb->bat->capacity = val >> 2; - - return ret; -} - -static int power_check_battery(struct pmic *p, struct pmic *bat) -{ - struct power_battery *pb = bat->pbat; - unsigned int val; - int ret = 0; - - if (pmic_probe(p)) { - puts("Can't find max17042 fuel gauge\n"); - return -ENODEV; - } - - ret |= pmic_reg_read(p, MAX17042_STATUS, &val); - debug("fg status: 0x%x\n", val); - - if (val & MAX17042_POR) - por_fuelgauge_init(p); - - ret |= pmic_reg_read(p, MAX17042_VERSION, &val); - pb->bat->version = val; - - power_update_battery(p, bat); - debug("fg ver: 0x%x\n", pb->bat->version); - printf("BAT: state_of_charge(SOC):%d%%\n", - pb->bat->state_of_chrg); - - printf(" voltage: %d.%6.6d [V] (expected to be %d [mAh])\n", - pb->bat->voltage_uV / 1000000, - pb->bat->voltage_uV % 1000000, - pb->bat->capacity); - - if (pb->bat->voltage_uV > 3850000) - pb->bat->state = EXT_SOURCE; - else if (pb->bat->voltage_uV < 3600000 || pb->bat->state_of_chrg < 5) - pb->bat->state = CHARGE; - else - pb->bat->state = NORMAL; - - return ret; -} - -static struct power_fg power_fg_ops = { - .fg_battery_check = power_check_battery, - .fg_battery_update = power_update_battery, -}; - -int power_fg_init(unsigned char bus) -{ - static const char name[] = "MAX17042_FG"; - struct pmic *p = pmic_alloc(); - - if (!p) { - printf("%s: POWER allocation error!\n", __func__); - return -ENOMEM; - } - - debug("Board Fuel Gauge init\n"); - - p->name = name; - p->interface = PMIC_I2C; - p->number_of_regs = FG_NUM_OF_REGS; - p->hw.i2c.addr = MAX17042_I2C_ADDR; - p->hw.i2c.tx_num = 2; - p->sensor_byte_order = PMIC_SENSOR_BYTE_ORDER_BIG; - p->bus = bus; - - p->fg = &power_fg_ops; - return 0; -} diff --git a/include/power/fg_battery_cell_params.h b/include/power/fg_battery_cell_params.h deleted file mode 100644 index 500c8ea7174..00000000000 --- a/include/power/fg_battery_cell_params.h +++ /dev/null @@ -1,73 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2012 Samsung Electronics - * Lukasz Majewski l.majewski@samsung.com - */ - -#ifndef __FG_BATTERY_CELL_PARAMS_H_ -#define __FG_BATTERY_CELL_PARAMS_H_ - -#if defined(CONFIG_POWER_FG_MAX17042) && defined(CONFIG_TARGET_TRATS) - -/* Cell characteristics - Exynos4 TRATS development board */ -/* Shall be written to addr 0x80h */ -u16 cell_character0[16] = { - 0xA2A0, - 0xB6E0, - 0xB850, - 0xBAD0, - 0xBB20, - 0xBB70, - 0xBBC0, - 0xBC20, - 0xBC80, - 0xBCE0, - 0xBD80, - 0xBE20, - 0xC090, - 0xC420, - 0xC910, - 0xD070 -}; - -/* Shall be written to addr 0x90h */ -u16 cell_character1[16] = { - 0x0090, - 0x1A50, - 0x02F0, - 0x2060, - 0x2060, - 0x2E60, - 0x26A0, - 0x2DB0, - 0x2DB0, - 0x1870, - 0x2A20, - 0x16F0, - 0x08F0, - 0x0D40, - 0x08C0, - 0x08C0 -}; - -/* Shall be written to addr 0xA0h */ -u16 cell_character2[16] = { - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100 -}; -#endif -#endif /* __FG_BATTERY_CELL_PARAMS_H_ */

This is not used. Drop the driver and Kconfig option.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

drivers/power/pmic/Makefile | 1 - drivers/power/pmic/muic_max8997.c | 74 ------------------------------- 2 files changed, 75 deletions(-) delete mode 100644 drivers/power/pmic/muic_max8997.c

diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile index c3180c58208..0b3b3d62d0e 100644 --- a/drivers/power/pmic/Makefile +++ b/drivers/power/pmic/Makefile @@ -37,7 +37,6 @@ obj-$(CONFIG_POWER_TPS65218) += pmic_tps65218.o

ifeq ($(CONFIG_$(SPL_)POWER_LEGACY),y) obj-$(CONFIG_POWER_LTC3676) += pmic_ltc3676.o -obj-$(CONFIG_POWER_MUIC_MAX8997) += muic_max8997.o obj-$(CONFIG_POWER_PCA9450) += pmic_pca9450.o obj-$(CONFIG_POWER_PFUZE100) += pmic_pfuze100.o obj-$(CONFIG_POWER_PFUZE3000) += pmic_pfuze3000.o diff --git a/drivers/power/pmic/muic_max8997.c b/drivers/power/pmic/muic_max8997.c deleted file mode 100644 index 969ce902395..00000000000 --- a/drivers/power/pmic/muic_max8997.c +++ /dev/null @@ -1,74 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2012 Samsung Electronics - * Lukasz Majewski l.majewski@samsung.com - */ - -#include <common.h> -#include <log.h> -#include <power/pmic.h> -#include <power/power_chrg.h> -#include <power/max8997_muic.h> -#include <i2c.h> -#include <errno.h> - -static int power_chrg_get_type(struct pmic *p) -{ - unsigned int val; - unsigned char charge_type, charger; - - if (pmic_probe(p)) - return CHARGER_NO; - - pmic_reg_read(p, MAX8997_MUIC_STATUS2, &val); - charge_type = val & MAX8997_MUIC_CHG_MASK; - - switch (charge_type) { - case MAX8997_MUIC_CHG_NO: - charger = CHARGER_NO; - break; - case MAX8997_MUIC_CHG_USB: - case MAX8997_MUIC_CHG_USB_D: - charger = CHARGER_USB; - break; - case MAX8997_MUIC_CHG_TA: - case MAX8997_MUIC_CHG_TA_1A: - charger = CHARGER_TA; - break; - case MAX8997_MUIC_CHG_TA_500: - charger = CHARGER_TA_500; - break; - default: - charger = CHARGER_UNKNOWN; - break; - } - - return charger; -} - -static struct power_chrg power_chrg_muic_ops = { - .chrg_type = power_chrg_get_type, -}; - -int power_muic_init(unsigned int bus) -{ - static const char name[] = "MAX8997_MUIC"; - struct pmic *p = pmic_alloc(); - - if (!p) { - printf("%s: POWER allocation error!\n", __func__); - return -ENOMEM; - } - - debug("Board Micro USB Interface Controller init\n"); - - p->name = name; - p->interface = PMIC_I2C; - p->number_of_regs = MUIC_NUM_OF_REGS; - p->hw.i2c.addr = MAX8997_MUIC_I2C_ADDR; - p->hw.i2c.tx_num = 1; - p->bus = bus; - - p->chrg = &power_chrg_muic_ops; - return 0; -}

This has been renamed to CONFIG_ARCH_RMOBILE but this one was left behind. It doesn't point to a directory that exists, so just drop it.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

arch/arm/cpu/armv7/Makefile | 1 - 1 file changed, 1 deletion(-)

diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 7d7907601ec..653eef8ad79 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -37,7 +37,6 @@ obj-$(if $(filter bcm281xx,$(SOC)),y) += bcm281xx/ obj-$(if $(filter bcmcygnus,$(SOC)),y) += bcmcygnus/ obj-$(if $(filter bcmnsp,$(SOC)),y) += bcmnsp/ obj-$(if $(filter ls102xa,$(SOC)),y) += ls102xa/ -obj-$(CONFIG_RMOBILE) += rmobile/ obj-$(if $(filter stv0991,$(SOC)),y) += stv0991/ obj-$(CONFIG_ARCH_SUNXI) += sunxi/ obj-$(CONFIG_VF610) += vf610/

This option does not exist, so the Makefile rule does nothing. Drop it.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

arch/arm/cpu/armv8/Makefile | 1 - 1 file changed, 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile index 2e4bf9e038c..bba4f570dbb 100644 --- a/arch/arm/cpu/armv8/Makefile +++ b/arch/arm/cpu/armv8/Makefile @@ -39,7 +39,6 @@ obj-$(CONFIG_SPL_RECOVER_DATA_SECTION) += spl_data.o endif

obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/ -obj-$(CONFIG_S32V234) += s32v234/ obj-$(CONFIG_TARGET_HIKEY) += hisilicon/ obj-$(CONFIG_ARMV8_PSCI) += psci.o obj-$(CONFIG_TARGET_BCMNS3) += bcmns3/

This option does not exist, so the code attached to it is not used. Drop it.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

arch/arm/mach-rmobile/Makefile | 1 - arch/arm/mach-rmobile/cpu_info-sh73a0.c | 43 - arch/arm/mach-rmobile/cpu_info.c | 1 - arch/arm/mach-rmobile/include/mach/gpio.h | 5 +- arch/arm/mach-rmobile/include/mach/rmobile.h | 5 +- .../mach-rmobile/include/mach/sh73a0-gpio.h | 553 ---- arch/arm/mach-rmobile/include/mach/sh73a0.h | 289 -- arch/arm/mach-rmobile/pfc-sh73a0.c | 2807 ----------------- drivers/i2c/sh_i2c.c | 5 - drivers/serial/serial_sh.h | 10 +- 10 files changed, 4 insertions(+), 3715 deletions(-) delete mode 100644 arch/arm/mach-rmobile/cpu_info-sh73a0.c delete mode 100644 arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h delete mode 100644 arch/arm/mach-rmobile/include/mach/sh73a0.h delete mode 100644 arch/arm/mach-rmobile/pfc-sh73a0.c

diff --git a/arch/arm/mach-rmobile/Makefile b/arch/arm/mach-rmobile/Makefile index 3f77760e50d..5b86221bc25 100644 --- a/arch/arm/mach-rmobile/Makefile +++ b/arch/arm/mach-rmobile/Makefile @@ -8,7 +8,6 @@ obj-y += emac.o

obj-$(CONFIG_DISPLAY_BOARDINFO) += board.o obj-$(CONFIG_TMU_TIMER) += ../../sh/lib/time.o -obj-$(CONFIG_SH73A0) += lowlevel_init.o cpu_info-sh73a0.o pfc-sh73a0.o obj-$(CONFIG_R8A7740) += lowlevel_init.o cpu_info-r8a7740.o pfc-r8a7740.o obj-$(CONFIG_RCAR_GEN2) += lowlevel_init_ca15.o cpu_info-rcar.o obj-$(CONFIG_RCAR_GEN3) += lowlevel_init_gen3.o cpu_info-rcar.o memmap-gen3.o diff --git a/arch/arm/mach-rmobile/cpu_info-sh73a0.c b/arch/arm/mach-rmobile/cpu_info-sh73a0.c deleted file mode 100644 index 0c7ee8acf5a..00000000000 --- a/arch/arm/mach-rmobile/cpu_info-sh73a0.c +++ /dev/null @@ -1,43 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2012 Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com - * (C) Copyright 2012 Renesas Solutions Corp. - */ -#include <common.h> -#include <asm/io.h> - -u32 rmobile_get_cpu_type(void) -{ - u32 id; - u32 type; - struct sh73a0_hpb *hpb = (struct sh73a0_hpb *)HPB_BASE; - - id = readl(&hpb->cccr); - type = (id >> 8) & 0xFF; - - return type; -} - -u32 rmobile_get_cpu_rev_integer(void) -{ - u32 id; - u32 rev; - struct sh73a0_hpb *hpb = (struct sh73a0_hpb *)HPB_BASE; - - id = readl(&hpb->cccr); - rev = ((id >> 4) & 0xF) + 1; - - return rev; -} - -u32 rmobile_get_cpu_rev_fraction(void) -{ - u32 id; - u32 rev; - struct sh73a0_hpb *hpb = (struct sh73a0_hpb *)HPB_BASE; - - id = readl(&hpb->cccr); - rev = id & 0xF; - - return rev; -} diff --git a/arch/arm/mach-rmobile/cpu_info.c b/arch/arm/mach-rmobile/cpu_info.c index bd9e71707f5..246029ac294 100644 --- a/arch/arm/mach-rmobile/cpu_info.c +++ b/arch/arm/mach-rmobile/cpu_info.c @@ -62,7 +62,6 @@ static const struct { u16 cpu_type; u8 cpu_name[10]; } rmobile_cpuinfo[] = { - { RMOBILE_CPU_TYPE_SH73A0, "SH73A0" }, { RMOBILE_CPU_TYPE_R8A7740, "R8A7740" }, { RMOBILE_CPU_TYPE_R8A7790, "R8A7790" }, { RMOBILE_CPU_TYPE_R8A7791, "R8A7791" }, diff --git a/arch/arm/mach-rmobile/include/mach/gpio.h b/arch/arm/mach-rmobile/include/mach/gpio.h index 6b5e4ed4eb5..150aa46034d 100644 --- a/arch/arm/mach-rmobile/include/mach/gpio.h +++ b/arch/arm/mach-rmobile/include/mach/gpio.h @@ -1,10 +1,7 @@ #ifndef __ASM_ARCH_GPIO_H #define __ASM_ARCH_GPIO_H

-#if defined(CONFIG_SH73A0) -#include "sh73a0-gpio.h" -void sh73a0_pinmux_init(void); -#elif defined(CONFIG_R8A7740) +#if defined(CONFIG_R8A7740) #include "r8a7740-gpio.h" void r8a7740_pinmux_init(void); #endif diff --git a/arch/arm/mach-rmobile/include/mach/rmobile.h b/arch/arm/mach-rmobile/include/mach/rmobile.h index dc6f87631bc..53f9a80ecfe 100644 --- a/arch/arm/mach-rmobile/include/mach/rmobile.h +++ b/arch/arm/mach-rmobile/include/mach/rmobile.h @@ -2,9 +2,7 @@ #define __ASM_ARCH_RMOBILE_H

#if defined(CONFIG_ARCH_RMOBILE) -#if defined(CONFIG_SH73A0) -#include <asm/arch/sh73a0.h> -#elif defined(CONFIG_R8A7740) +#if defined(CONFIG_R8A7740) #include <asm/arch/r8a7740.h> #elif defined(CONFIG_R8A7790) #include <asm/arch/r8a7790.h> @@ -25,7 +23,6 @@ #endif /* CONFIG_ARCH_RMOBILE */

/* PRR CPU IDs */ -#define RMOBILE_CPU_TYPE_SH73A0 0x37 #define RMOBILE_CPU_TYPE_R8A7740 0x40 #define RMOBILE_CPU_TYPE_R8A7790 0x45 #define RMOBILE_CPU_TYPE_R8A7791 0x47 diff --git a/arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h b/arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h deleted file mode 100644 index 398e2c10913..00000000000 --- a/arch/arm/mach-rmobile/include/mach/sh73a0-gpio.h +++ /dev/null @@ -1,553 +0,0 @@ -#ifndef __ASM_SH73A0_H__ -#define __ASM_SH73A0_H__ - -/* Pin Function Controller: - * GPIO_FN_xx - GPIO used to select pin function and MSEL switch - * GPIO_PORTxx - GPIO mapped to real I/O pin on CPU - */ -enum { - /* Hardware manual Table 25-1 (GPIO) */ - GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4, - GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9, - - GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14, - GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19, - - GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24, - GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29, - - GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34, - GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39, - - GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44, - GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49, - - GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54, - GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59, - - GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64, - GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69, - - GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74, - GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79, - - GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84, - GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89, - - GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94, - GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99, - - GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104, - GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109, - - GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114, - GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, - - GPIO_PORT128, GPIO_PORT129, - - GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134, - GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139, - - GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144, - GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149, - - GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154, - GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159, - - GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164, - - GPIO_PORT192, GPIO_PORT193, GPIO_PORT194, - GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199, - - GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204, - GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209, - - GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214, - GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219, - - GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224, - GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229, - - GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234, - GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239, - - GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244, - GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249, - - GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254, - GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259, - - GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264, - GPIO_PORT265, GPIO_PORT266, GPIO_PORT267, GPIO_PORT268, GPIO_PORT269, - - GPIO_PORT270, GPIO_PORT271, GPIO_PORT272, GPIO_PORT273, GPIO_PORT274, - GPIO_PORT275, GPIO_PORT276, GPIO_PORT277, GPIO_PORT278, GPIO_PORT279, - - GPIO_PORT280, GPIO_PORT281, GPIO_PORT282, - - GPIO_PORT288, GPIO_PORT289, - - GPIO_PORT290, GPIO_PORT291, GPIO_PORT292, GPIO_PORT293, GPIO_PORT294, - GPIO_PORT295, GPIO_PORT296, GPIO_PORT297, GPIO_PORT298, GPIO_PORT299, - - GPIO_PORT300, GPIO_PORT301, GPIO_PORT302, GPIO_PORT303, GPIO_PORT304, - GPIO_PORT305, GPIO_PORT306, GPIO_PORT307, GPIO_PORT308, GPIO_PORT309, - - /* Table 25-1 (Function 0-7) */ - GPIO_FN_VBUS_0, - GPIO_FN_GPI0, - GPIO_FN_GPI1, - GPIO_FN_GPI2, - GPIO_FN_GPI3, - GPIO_FN_GPI4, - GPIO_FN_GPI5, - GPIO_FN_GPI6, - GPIO_FN_GPI7, - GPIO_FN_SCIFA7_RXD, - GPIO_FN_SCIFA7_CTS_, - GPIO_FN_GPO7, GPIO_FN_MFG0_OUT2, - GPIO_FN_GPO6, GPIO_FN_MFG1_OUT2, - GPIO_FN_GPO5, GPIO_FN_SCIFA0_SCK, GPIO_FN_FSICOSLDT3, \ - GPIO_FN_PORT16_VIO_CKOR, - GPIO_FN_SCIFA0_TXD, - GPIO_FN_SCIFA7_TXD, - GPIO_FN_SCIFA7_RTS_, GPIO_FN_PORT19_VIO_CKO2, - GPIO_FN_GPO0, - GPIO_FN_GPO1, - GPIO_FN_GPO2, GPIO_FN_STATUS0, - GPIO_FN_GPO3, GPIO_FN_STATUS1, - GPIO_FN_GPO4, GPIO_FN_STATUS2, - GPIO_FN_VINT, - GPIO_FN_TCKON, - GPIO_FN_XDVFS1, GPIO_FN_PORT27_I2C_SCL2, GPIO_FN_PORT27_I2C_SCL3, \ - GPIO_FN_MFG0_OUT1, GPIO_FN_PORT27_IROUT, - GPIO_FN_XDVFS2, GPIO_FN_PORT28_I2C_SDA2, GPIO_FN_PORT28_I2C_SDA3, \ - GPIO_FN_PORT28_TPU1TO1, - GPIO_FN_SIM_RST, GPIO_FN_PORT29_TPU1TO1, - GPIO_FN_SIM_CLK, GPIO_FN_PORT30_VIO_CKOR, - GPIO_FN_SIM_D, GPIO_FN_PORT31_IROUT, - GPIO_FN_SCIFA4_TXD, - GPIO_FN_SCIFA4_RXD, GPIO_FN_XWUP, - GPIO_FN_SCIFA4_RTS_, - GPIO_FN_SCIFA4_CTS_, - GPIO_FN_FSIBOBT, GPIO_FN_FSIBIBT, - GPIO_FN_FSIBOLR, GPIO_FN_FSIBILR, - GPIO_FN_FSIBOSLD, - GPIO_FN_FSIBISLD, - GPIO_FN_VACK, - GPIO_FN_XTAL1L, - GPIO_FN_SCIFA0_RTS_, GPIO_FN_FSICOSLDT2, - GPIO_FN_SCIFA0_RXD, - GPIO_FN_SCIFA0_CTS_, GPIO_FN_FSICOSLDT1, - GPIO_FN_FSICOBT, GPIO_FN_FSICIBT, GPIO_FN_FSIDOBT, GPIO_FN_FSIDIBT, - GPIO_FN_FSICOLR, GPIO_FN_FSICILR, GPIO_FN_FSIDOLR, GPIO_FN_FSIDILR, - GPIO_FN_FSICOSLD, GPIO_FN_PORT47_FSICSPDIF, - GPIO_FN_FSICISLD, GPIO_FN_FSIDISLD, - GPIO_FN_FSIACK, GPIO_FN_PORT49_IRDA_OUT, GPIO_FN_PORT49_IROUT, \ - GPIO_FN_FSIAOMC, - GPIO_FN_FSIAOLR, GPIO_FN_BBIF2_TSYNC2, GPIO_FN_TPU2TO2, GPIO_FN_FSIAILR, - - GPIO_FN_FSIAOBT, GPIO_FN_BBIF2_TSCK2, GPIO_FN_TPU2TO3, GPIO_FN_FSIAIBT, - GPIO_FN_FSIAOSLD, GPIO_FN_BBIF2_TXD2, - GPIO_FN_FSIASPDIF, GPIO_FN_PORT53_IRDA_IN, GPIO_FN_TPU3TO3, \ - GPIO_FN_FSIBSPDIF, GPIO_FN_PORT53_FSICSPDIF, - GPIO_FN_FSIBCK, GPIO_FN_PORT54_IRDA_FIRSEL, GPIO_FN_TPU3TO2, \ - GPIO_FN_FSIBOMC, GPIO_FN_FSICCK, GPIO_FN_FSICOMC, - GPIO_FN_FSIAISLD, GPIO_FN_TPU0TO0, - GPIO_FN_A0, GPIO_FN_BS_, - GPIO_FN_A12, GPIO_FN_PORT58_KEYOUT7, GPIO_FN_TPU4TO2, - GPIO_FN_A13, GPIO_FN_PORT59_KEYOUT6, GPIO_FN_TPU0TO1, - GPIO_FN_A14, GPIO_FN_KEYOUT5, - GPIO_FN_A15, GPIO_FN_KEYOUT4, - GPIO_FN_A16, GPIO_FN_KEYOUT3, GPIO_FN_MSIOF0_SS1, - GPIO_FN_A17, GPIO_FN_KEYOUT2, GPIO_FN_MSIOF0_TSYNC, - GPIO_FN_A18, GPIO_FN_KEYOUT1, GPIO_FN_MSIOF0_TSCK, - GPIO_FN_A19, GPIO_FN_KEYOUT0, GPIO_FN_MSIOF0_TXD, - GPIO_FN_A20, GPIO_FN_KEYIN0, GPIO_FN_MSIOF0_RSCK, - GPIO_FN_A21, GPIO_FN_KEYIN1, GPIO_FN_MSIOF0_RSYNC, - GPIO_FN_A22, GPIO_FN_KEYIN2, GPIO_FN_MSIOF0_MCK0, - GPIO_FN_A23, GPIO_FN_KEYIN3, GPIO_FN_MSIOF0_MCK1, - GPIO_FN_A24, GPIO_FN_KEYIN4, GPIO_FN_MSIOF0_RXD, - GPIO_FN_A25, GPIO_FN_KEYIN5, GPIO_FN_MSIOF0_SS2, - GPIO_FN_A26, GPIO_FN_KEYIN6, - GPIO_FN_KEYIN7, - GPIO_FN_D0_NAF0, - GPIO_FN_D1_NAF1, - GPIO_FN_D2_NAF2, - GPIO_FN_D3_NAF3, - GPIO_FN_D4_NAF4, - GPIO_FN_D5_NAF5, - GPIO_FN_D6_NAF6, - GPIO_FN_D7_NAF7, - GPIO_FN_D8_NAF8, - GPIO_FN_D9_NAF9, - GPIO_FN_D10_NAF10, - GPIO_FN_D11_NAF11, - GPIO_FN_D12_NAF12, - GPIO_FN_D13_NAF13, - GPIO_FN_D14_NAF14, - GPIO_FN_D15_NAF15, - GPIO_FN_CS4_, - GPIO_FN_CS5A_, GPIO_FN_PORT91_RDWR, - GPIO_FN_CS5B_, GPIO_FN_FCE1_, - GPIO_FN_CS6B_, GPIO_FN_DACK0, - GPIO_FN_FCE0_, GPIO_FN_CS6A_, - GPIO_FN_WAIT_, GPIO_FN_DREQ0, - GPIO_FN_RD__FSC, - GPIO_FN_WE0__FWE, GPIO_FN_RDWR_FWE, - GPIO_FN_WE1_, - GPIO_FN_FRB, - GPIO_FN_CKO, - GPIO_FN_NBRSTOUT_, - GPIO_FN_NBRST_, - GPIO_FN_BBIF2_TXD, - GPIO_FN_BBIF2_RXD, - GPIO_FN_BBIF2_SYNC, - GPIO_FN_BBIF2_SCK, - GPIO_FN_SCIFA3_CTS_, GPIO_FN_MFG3_IN2, - GPIO_FN_SCIFA3_RXD, GPIO_FN_MFG3_IN1, - GPIO_FN_BBIF1_SS2, GPIO_FN_SCIFA3_RTS_, GPIO_FN_MFG3_OUT1, - GPIO_FN_SCIFA3_TXD, - GPIO_FN_HSI_RX_DATA, GPIO_FN_BBIF1_RXD, - GPIO_FN_HSI_TX_WAKE, GPIO_FN_BBIF1_TSCK, - GPIO_FN_HSI_TX_DATA, GPIO_FN_BBIF1_TSYNC, - GPIO_FN_HSI_TX_READY, GPIO_FN_BBIF1_TXD, - GPIO_FN_HSI_RX_READY, GPIO_FN_BBIF1_RSCK, GPIO_FN_PORT115_I2C_SCL2, \ - GPIO_FN_PORT115_I2C_SCL3, - GPIO_FN_HSI_RX_WAKE, GPIO_FN_BBIF1_RSYNC, GPIO_FN_PORT116_I2C_SDA2, \ - GPIO_FN_PORT116_I2C_SDA3, - GPIO_FN_HSI_RX_FLAG, GPIO_FN_BBIF1_SS1, GPIO_FN_BBIF1_FLOW, - GPIO_FN_HSI_TX_FLAG, - GPIO_FN_VIO_VD, GPIO_FN_PORT128_LCD2VSYN, GPIO_FN_VIO2_VD, \ - GPIO_FN_LCD2D0, - - GPIO_FN_VIO_HD, GPIO_FN_PORT129_LCD2HSYN, GPIO_FN_PORT129_LCD2CS_, \ - GPIO_FN_VIO2_HD, GPIO_FN_LCD2D1, - GPIO_FN_VIO_D0, GPIO_FN_PORT130_MSIOF2_RXD, GPIO_FN_LCD2D10, - GPIO_FN_VIO_D1, GPIO_FN_PORT131_KEYOUT6, GPIO_FN_PORT131_MSIOF2_SS1, \ - GPIO_FN_PORT131_KEYOUT11, GPIO_FN_LCD2D11, - GPIO_FN_VIO_D2, GPIO_FN_PORT132_KEYOUT7, GPIO_FN_PORT132_MSIOF2_SS2, \ - GPIO_FN_PORT132_KEYOUT10, GPIO_FN_LCD2D12, - GPIO_FN_VIO_D3, GPIO_FN_MSIOF2_TSYNC, GPIO_FN_LCD2D13, - GPIO_FN_VIO_D4, GPIO_FN_MSIOF2_TXD, GPIO_FN_LCD2D14, - GPIO_FN_VIO_D5, GPIO_FN_MSIOF2_TSCK, GPIO_FN_LCD2D15, - GPIO_FN_VIO_D6, GPIO_FN_PORT136_KEYOUT8, GPIO_FN_LCD2D16, - GPIO_FN_VIO_D7, GPIO_FN_PORT137_KEYOUT9, GPIO_FN_LCD2D17, - GPIO_FN_VIO_D8, GPIO_FN_PORT138_KEYOUT8, GPIO_FN_VIO2_D0, \ - GPIO_FN_LCD2D6, - GPIO_FN_VIO_D9, GPIO_FN_PORT139_KEYOUT9, GPIO_FN_VIO2_D1, \ - GPIO_FN_LCD2D7, - GPIO_FN_VIO_D10, GPIO_FN_TPU0TO2, GPIO_FN_VIO2_D2, GPIO_FN_LCD2D8, - GPIO_FN_VIO_D11, GPIO_FN_TPU0TO3, GPIO_FN_VIO2_D3, GPIO_FN_LCD2D9, - GPIO_FN_VIO_D12, GPIO_FN_PORT142_KEYOUT10, GPIO_FN_VIO2_D4, \ - GPIO_FN_LCD2D2, - GPIO_FN_VIO_D13, GPIO_FN_PORT143_KEYOUT11, GPIO_FN_PORT143_KEYOUT6, \ - GPIO_FN_VIO2_D5, GPIO_FN_LCD2D3, - GPIO_FN_VIO_D14, GPIO_FN_PORT144_KEYOUT7, GPIO_FN_VIO2_D6, \ - GPIO_FN_LCD2D4, - GPIO_FN_VIO_D15, GPIO_FN_TPU1TO3, GPIO_FN_PORT145_LCD2DISP, \ - GPIO_FN_PORT145_LCD2RS, GPIO_FN_VIO2_D7, GPIO_FN_LCD2D5, - GPIO_FN_VIO_CLK, GPIO_FN_LCD2DCK, GPIO_FN_PORT146_LCD2WR_, \ - GPIO_FN_VIO2_CLK, GPIO_FN_LCD2D18, - GPIO_FN_VIO_FIELD, GPIO_FN_LCD2RD_, GPIO_FN_VIO2_FIELD, GPIO_FN_LCD2D19, - GPIO_FN_VIO_CKO, - GPIO_FN_A27, GPIO_FN_PORT149_RDWR, GPIO_FN_MFG0_IN1, \ - GPIO_FN_PORT149_KEYOUT9, - GPIO_FN_MFG0_IN2, - GPIO_FN_TS_SPSYNC3, GPIO_FN_MSIOF2_RSCK, - GPIO_FN_TS_SDAT3, GPIO_FN_MSIOF2_RSYNC, - GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT153_MSIOF2_SS1, - GPIO_FN_SCIFA2_TXD1, GPIO_FN_MSIOF2_MCK0, - GPIO_FN_SCIFA2_RXD1, GPIO_FN_MSIOF2_MCK1, - GPIO_FN_SCIFA2_RTS1_, GPIO_FN_PORT156_MSIOF2_SS2, - GPIO_FN_SCIFA2_CTS1_, GPIO_FN_PORT157_MSIOF2_RXD, - GPIO_FN_DINT_, GPIO_FN_SCIFA2_SCK1, GPIO_FN_TS_SCK3, - GPIO_FN_PORT159_SCIFB_SCK, GPIO_FN_PORT159_SCIFA5_SCK, GPIO_FN_NMI, - GPIO_FN_PORT160_SCIFB_TXD, GPIO_FN_PORT160_SCIFA5_TXD, - GPIO_FN_PORT161_SCIFB_CTS_, GPIO_FN_PORT161_SCIFA5_CTS_, - GPIO_FN_PORT162_SCIFB_RXD, GPIO_FN_PORT162_SCIFA5_RXD, - GPIO_FN_PORT163_SCIFB_RTS_, GPIO_FN_PORT163_SCIFA5_RTS_, \ - GPIO_FN_TPU3TO0, - GPIO_FN_LCDD0, - GPIO_FN_LCDD1, GPIO_FN_PORT193_SCIFA5_CTS_, GPIO_FN_BBIF2_TSYNC1, - GPIO_FN_LCDD2, GPIO_FN_PORT194_SCIFA5_RTS_, GPIO_FN_BBIF2_TSCK1, - GPIO_FN_LCDD3, GPIO_FN_PORT195_SCIFA5_RXD, GPIO_FN_BBIF2_TXD1, - GPIO_FN_LCDD4, GPIO_FN_PORT196_SCIFA5_TXD, - GPIO_FN_LCDD5, GPIO_FN_PORT197_SCIFA5_SCK, GPIO_FN_MFG2_OUT2, \ - GPIO_FN_TPU2TO1, - GPIO_FN_LCDD6, - GPIO_FN_LCDD7, GPIO_FN_TPU4TO1, GPIO_FN_MFG4_OUT2, - GPIO_FN_LCDD8, GPIO_FN_D16, - GPIO_FN_LCDD9, GPIO_FN_D17, - GPIO_FN_LCDD10, GPIO_FN_D18, - GPIO_FN_LCDD11, GPIO_FN_D19, - GPIO_FN_LCDD12, GPIO_FN_D20, - GPIO_FN_LCDD13, GPIO_FN_D21, - GPIO_FN_LCDD14, GPIO_FN_D22, - GPIO_FN_LCDD15, GPIO_FN_PORT207_MSIOF0L_SS1, GPIO_FN_D23, - GPIO_FN_LCDD16, GPIO_FN_PORT208_MSIOF0L_SS2, GPIO_FN_D24, - GPIO_FN_LCDD17, GPIO_FN_D25, - GPIO_FN_LCDD18, GPIO_FN_DREQ2, GPIO_FN_PORT210_MSIOF0L_SS1, GPIO_FN_D26, - GPIO_FN_LCDD19, GPIO_FN_PORT211_MSIOF0L_SS2, GPIO_FN_D27, - GPIO_FN_LCDD20, GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, GPIO_FN_D28, - GPIO_FN_LCDD21, GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, GPIO_FN_D29, - GPIO_FN_LCDD22, GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_RSCK, GPIO_FN_D30, - GPIO_FN_LCDD23, GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_RSYNC, GPIO_FN_D31, - GPIO_FN_LCDDCK, GPIO_FN_LCDWR_, - GPIO_FN_LCDRD_, GPIO_FN_DACK2, GPIO_FN_PORT217_LCD2RS, \ - GPIO_FN_MSIOF0L_TSYNC, GPIO_FN_VIO2_FIELD3, GPIO_FN_PORT217_LCD2DISP, - GPIO_FN_LCDHSYN, GPIO_FN_LCDCS_, GPIO_FN_LCDCS2_, GPIO_FN_DACK3, \ - GPIO_FN_PORT218_VIO_CKOR, - GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_PORT219_LCD2WR_, \ - GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_TSCK, GPIO_FN_VIO2_CLK3, \ - GPIO_FN_LCD2DCK_2, - GPIO_FN_LCDVSYN, GPIO_FN_LCDVSYN2, - GPIO_FN_LCDLCLK, GPIO_FN_DREQ1, GPIO_FN_PORT221_LCD2CS_, \ - GPIO_FN_PWEN, GPIO_FN_MSIOF0L_RXD, GPIO_FN_VIO2_HD3, \ - GPIO_FN_PORT221_LCD2HSYN, - GPIO_FN_LCDDON, GPIO_FN_LCDDON2, GPIO_FN_DACK1, GPIO_FN_OVCN, \ - GPIO_FN_MSIOF0L_TXD, GPIO_FN_VIO2_VD3, GPIO_FN_PORT222_LCD2VSYN, - - GPIO_FN_SCIFA1_TXD, GPIO_FN_OVCN2, - GPIO_FN_EXTLP, GPIO_FN_SCIFA1_SCK, GPIO_FN_PORT226_VIO_CKO2, - GPIO_FN_SCIFA1_RTS_, GPIO_FN_IDIN, - GPIO_FN_SCIFA1_RXD, - GPIO_FN_SCIFA1_CTS_, GPIO_FN_MFG1_IN1, - GPIO_FN_MSIOF1_TXD, GPIO_FN_SCIFA2_TXD2, - GPIO_FN_MSIOF1_TSYNC, GPIO_FN_SCIFA2_CTS2_, - GPIO_FN_MSIOF1_TSCK, GPIO_FN_SCIFA2_SCK2, - GPIO_FN_MSIOF1_RXD, GPIO_FN_SCIFA2_RXD2, - GPIO_FN_MSIOF1_RSCK, GPIO_FN_SCIFA2_RTS2_, GPIO_FN_VIO2_CLK2, \ - GPIO_FN_LCD2D20, - GPIO_FN_MSIOF1_RSYNC, GPIO_FN_MFG1_IN2, GPIO_FN_VIO2_VD2, \ - GPIO_FN_LCD2D21, - GPIO_FN_MSIOF1_MCK0, GPIO_FN_PORT236_I2C_SDA2, - GPIO_FN_MSIOF1_MCK1, GPIO_FN_PORT237_I2C_SCL2, - GPIO_FN_MSIOF1_SS1, GPIO_FN_VIO2_FIELD2, GPIO_FN_LCD2D22, - GPIO_FN_MSIOF1_SS2, GPIO_FN_VIO2_HD2, GPIO_FN_LCD2D23, - GPIO_FN_SCIFA6_TXD, - GPIO_FN_PORT241_IRDA_OUT, GPIO_FN_PORT241_IROUT, GPIO_FN_MFG4_OUT1, \ - GPIO_FN_TPU4TO0, - GPIO_FN_PORT242_IRDA_IN, GPIO_FN_MFG4_IN2, - GPIO_FN_PORT243_IRDA_FIRSEL, GPIO_FN_PORT243_VIO_CKO2, - GPIO_FN_PORT244_SCIFA5_CTS_, GPIO_FN_MFG2_IN1, \ - GPIO_FN_PORT244_SCIFB_CTS_, GPIO_FN_MSIOF2R_RXD, - GPIO_FN_PORT245_SCIFA5_RTS_, GPIO_FN_MFG2_IN2, \ - GPIO_FN_PORT245_SCIFB_RTS_, GPIO_FN_MSIOF2R_TXD, - GPIO_FN_PORT246_SCIFA5_RXD, GPIO_FN_MFG1_OUT1, \ - GPIO_FN_PORT246_SCIFB_RXD, GPIO_FN_TPU1TO0, - GPIO_FN_PORT247_SCIFA5_TXD, GPIO_FN_MFG3_OUT2, \ - GPIO_FN_PORT247_SCIFB_TXD, GPIO_FN_TPU3TO1, - GPIO_FN_PORT248_SCIFA5_SCK, GPIO_FN_MFG2_OUT1, \ - GPIO_FN_PORT248_SCIFB_SCK, GPIO_FN_TPU2TO0, \ - GPIO_FN_PORT248_I2C_SCL3, GPIO_FN_MSIOF2R_TSCK, - GPIO_FN_PORT249_IROUT, GPIO_FN_MFG4_IN1, \ - GPIO_FN_PORT249_I2C_SDA3, GPIO_FN_MSIOF2R_TSYNC, - GPIO_FN_SDHICLK0, - GPIO_FN_SDHICD0, - GPIO_FN_SDHID0_0, - GPIO_FN_SDHID0_1, - GPIO_FN_SDHID0_2, - GPIO_FN_SDHID0_3, - GPIO_FN_SDHICMD0, - GPIO_FN_SDHIWP0, - GPIO_FN_SDHICLK1, - GPIO_FN_SDHID1_0, GPIO_FN_TS_SPSYNC2, - GPIO_FN_SDHID1_1, GPIO_FN_TS_SDAT2, - GPIO_FN_SDHID1_2, GPIO_FN_TS_SDEN2, - GPIO_FN_SDHID1_3, GPIO_FN_TS_SCK2, - GPIO_FN_SDHICMD1, - GPIO_FN_SDHICLK2, - GPIO_FN_SDHID2_0, GPIO_FN_TS_SPSYNC4, - GPIO_FN_SDHID2_1, GPIO_FN_TS_SDAT4, - GPIO_FN_SDHID2_2, GPIO_FN_TS_SDEN4, - GPIO_FN_SDHID2_3, GPIO_FN_TS_SCK4, - GPIO_FN_SDHICMD2, - GPIO_FN_MMCCLK0, - GPIO_FN_MMCD0_0, - GPIO_FN_MMCD0_1, - GPIO_FN_MMCD0_2, - GPIO_FN_MMCD0_3, - GPIO_FN_MMCD0_4, GPIO_FN_TS_SPSYNC5, - GPIO_FN_MMCD0_5, GPIO_FN_TS_SDAT5, - GPIO_FN_MMCD0_6, GPIO_FN_TS_SDEN5, - GPIO_FN_MMCD0_7, GPIO_FN_TS_SCK5, - GPIO_FN_MMCCMD0, - GPIO_FN_RESETOUTS_, GPIO_FN_EXTAL2OUT, - GPIO_FN_MCP_WAIT__MCP_FRB, - GPIO_FN_MCP_CKO, GPIO_FN_MMCCLK1, - GPIO_FN_MCP_D15_MCP_NAF15, - GPIO_FN_MCP_D14_MCP_NAF14, - GPIO_FN_MCP_D13_MCP_NAF13, - GPIO_FN_MCP_D12_MCP_NAF12, - GPIO_FN_MCP_D11_MCP_NAF11, - GPIO_FN_MCP_D10_MCP_NAF10, - GPIO_FN_MCP_D9_MCP_NAF9, - GPIO_FN_MCP_D8_MCP_NAF8, GPIO_FN_MMCCMD1, - GPIO_FN_MCP_D7_MCP_NAF7, GPIO_FN_MMCD1_7, - - GPIO_FN_MCP_D6_MCP_NAF6, GPIO_FN_MMCD1_6, - GPIO_FN_MCP_D5_MCP_NAF5, GPIO_FN_MMCD1_5, - GPIO_FN_MCP_D4_MCP_NAF4, GPIO_FN_MMCD1_4, - GPIO_FN_MCP_D3_MCP_NAF3, GPIO_FN_MMCD1_3, - GPIO_FN_MCP_D2_MCP_NAF2, GPIO_FN_MMCD1_2, - GPIO_FN_MCP_D1_MCP_NAF1, GPIO_FN_MMCD1_1, - GPIO_FN_MCP_D0_MCP_NAF0, GPIO_FN_MMCD1_0, - GPIO_FN_MCP_NBRSTOUT_, - GPIO_FN_MCP_WE0__MCP_FWE, GPIO_FN_MCP_RDWR_MCP_FWE, - - /* MSEL2 special case */ - GPIO_FN_TSIF2_TS_XX1, - GPIO_FN_TSIF2_TS_XX2, - GPIO_FN_TSIF2_TS_XX3, - GPIO_FN_TSIF2_TS_XX4, - GPIO_FN_TSIF2_TS_XX5, - GPIO_FN_TSIF1_TS_XX1, - GPIO_FN_TSIF1_TS_XX2, - GPIO_FN_TSIF1_TS_XX3, - GPIO_FN_TSIF1_TS_XX4, - GPIO_FN_TSIF1_TS_XX5, - GPIO_FN_TSIF0_TS_XX1, - GPIO_FN_TSIF0_TS_XX2, - GPIO_FN_TSIF0_TS_XX3, - GPIO_FN_TSIF0_TS_XX4, - GPIO_FN_TSIF0_TS_XX5, - GPIO_FN_MST1_TS_XX1, - GPIO_FN_MST1_TS_XX2, - GPIO_FN_MST1_TS_XX3, - GPIO_FN_MST1_TS_XX4, - GPIO_FN_MST1_TS_XX5, - GPIO_FN_MST0_TS_XX1, - GPIO_FN_MST0_TS_XX2, - GPIO_FN_MST0_TS_XX3, - GPIO_FN_MST0_TS_XX4, - GPIO_FN_MST0_TS_XX5, - - /* MSEL3 special cases */ - GPIO_FN_SDHI0_VCCQ_MC0_ON, - GPIO_FN_SDHI0_VCCQ_MC0_OFF, - GPIO_FN_DEBUG_MON_VIO, - GPIO_FN_DEBUG_MON_LCDD, - GPIO_FN_LCDC_LCDC0, - GPIO_FN_LCDC_LCDC1, - - /* MSEL4 special cases */ - GPIO_FN_IRQ9_MEM_INT, - GPIO_FN_IRQ9_MCP_INT, - GPIO_FN_A11, - GPIO_FN_KEYOUT8, - GPIO_FN_TPU4TO3, - GPIO_FN_RESETA_N_PU_ON, - GPIO_FN_RESETA_N_PU_OFF, - GPIO_FN_EDBGREQ_PD, - GPIO_FN_EDBGREQ_PU, - - /* Functions with pull-ups */ - GPIO_FN_KEYIN0_PU, - GPIO_FN_KEYIN1_PU, - GPIO_FN_KEYIN2_PU, - GPIO_FN_KEYIN3_PU, - GPIO_FN_KEYIN4_PU, - GPIO_FN_KEYIN5_PU, - GPIO_FN_KEYIN6_PU, - GPIO_FN_KEYIN7_PU, - GPIO_FN_SDHICD0_PU, - GPIO_FN_SDHID0_0_PU, - GPIO_FN_SDHID0_1_PU, - GPIO_FN_SDHID0_2_PU, - GPIO_FN_SDHID0_3_PU, - GPIO_FN_SDHICMD0_PU, - GPIO_FN_SDHIWP0_PU, - GPIO_FN_SDHID1_0_PU, - GPIO_FN_SDHID1_1_PU, - GPIO_FN_SDHID1_2_PU, - GPIO_FN_SDHID1_3_PU, - GPIO_FN_SDHICMD1_PU, - GPIO_FN_SDHID2_0_PU, - GPIO_FN_SDHID2_1_PU, - GPIO_FN_SDHID2_2_PU, - GPIO_FN_SDHID2_3_PU, - GPIO_FN_SDHICMD2_PU, - GPIO_FN_MMCCMD0_PU, - GPIO_FN_MMCCMD1_PU, - GPIO_FN_MMCD0_0_PU, - GPIO_FN_MMCD0_1_PU, - GPIO_FN_MMCD0_2_PU, - GPIO_FN_MMCD0_3_PU, - GPIO_FN_MMCD0_4_PU, - GPIO_FN_MMCD0_5_PU, - GPIO_FN_MMCD0_6_PU, - GPIO_FN_MMCD0_7_PU, - GPIO_FN_FSIACK_PU, - GPIO_FN_FSIAILR_PU, - GPIO_FN_FSIAIBT_PU, - GPIO_FN_FSIAISLD_PU, - - /* end of GPIO */ - GPIO_NR, -}; - -/* DMA slave IDs */ -enum { - SHDMA_SLAVE_INVALID, - SHDMA_SLAVE_SCIF0_TX, - SHDMA_SLAVE_SCIF0_RX, - SHDMA_SLAVE_SCIF1_TX, - SHDMA_SLAVE_SCIF1_RX, - SHDMA_SLAVE_SCIF2_TX, - SHDMA_SLAVE_SCIF2_RX, - SHDMA_SLAVE_SCIF3_TX, - SHDMA_SLAVE_SCIF3_RX, - SHDMA_SLAVE_SCIF4_TX, - SHDMA_SLAVE_SCIF4_RX, - SHDMA_SLAVE_SCIF5_TX, - SHDMA_SLAVE_SCIF5_RX, - SHDMA_SLAVE_SCIF6_TX, - SHDMA_SLAVE_SCIF6_RX, - SHDMA_SLAVE_SCIF7_TX, - SHDMA_SLAVE_SCIF7_RX, - SHDMA_SLAVE_SCIF8_TX, - SHDMA_SLAVE_SCIF8_RX, - SHDMA_SLAVE_SDHI0_TX, - SHDMA_SLAVE_SDHI0_RX, - SHDMA_SLAVE_SDHI1_TX, - SHDMA_SLAVE_SDHI1_RX, - SHDMA_SLAVE_SDHI2_TX, - SHDMA_SLAVE_SDHI2_RX, - SHDMA_SLAVE_MMCIF_TX, - SHDMA_SLAVE_MMCIF_RX, -}; - -/* - * SH73A0 IRQ LOCATION TABLE - * - * 416 ----------------------------------------- - * IRQ0-IRQ15 - * 431 ----------------------------------------- - * ... - * 448 ----------------------------------------- - * sh73a0-intcs - * sh73a0-intca-irq-pins - * 680 ----------------------------------------- - * ... - * 700 ----------------------------------------- - * sh73a0-pint0 - * 731 ----------------------------------------- - * 732 ----------------------------------------- - * sh73a0-pint1 - * 739 ----------------------------------------- - * ... - * 800 ----------------------------------------- - * IRQ16-IRQ31 - * 815 ----------------------------------------- - * ... - * 928 ----------------------------------------- - * sh73a0-intca-irq-pins - * 943 ----------------------------------------- - */ - -/* PINT interrupts are located at Linux IRQ 700 and up */ -#define SH73A0_PINT0_IRQ(irq) ((irq) + 700) -#define SH73A0_PINT1_IRQ(irq) ((irq) + 732) - -#endif /* __ASM_SH73A0_H__ */ diff --git a/arch/arm/mach-rmobile/include/mach/sh73a0.h b/arch/arm/mach-rmobile/include/mach/sh73a0.h deleted file mode 100644 index bdbb4086421..00000000000 --- a/arch/arm/mach-rmobile/include/mach/sh73a0.h +++ /dev/null @@ -1,289 +0,0 @@ -#ifndef __ASM_ARCH_RMOBILE_SH73A0_H -#define __ASM_ARCH_RMOBILE_SH73A0_H - -/* Global Timer */ -#define GLOBAL_TIMER_BASE_ADDR (0xF0000200) -#define MERAM_BASE (0xE5580000) - -/* GIC */ -#define GIC_BASE (0xF0000100) -#define ICCICR GIC_BASE - -/* Secure control register */ -#define LIFEC_SEC_SRC (0xE6110008) - -/* RWDT */ -#define RWDT_BASE (0xE6020000) - -/* HPB Semaphore Control Registers */ -#define HPB_BASE (0xE6001010) - -/* Bus Semaphore Control Registers */ -#define HPBSCR_BASE (0xE6001600) - -/* SBSC1 */ -#define SBSC1_BASE (0xFE400000) -#define SDMRA1A (SBSC1_BASE + 0x100000) -#define SDMRA2A (SBSC1_BASE + 0x1C0000) -#define SDMRA3A (SBSC1_BASE + 0x104000) - -/* SBSC2 */ -#define SBSC2_BASE (0xFB400000) -#define SDMRA1B (SBSC2_BASE + 0x100000) -#define SDMRA2B (SBSC2_BASE + 0x1C0000) -#define SDMRA3B (SBSC2_BASE + 0x104000) - -/* CPG */ -#define CPG_BASE (0xE6150000) -#define CPG_SRCR_BASE (CPG_BASE + 0x80A0) -#define WUPCR (CPG_BASE + 0x1010) -#define SRESCR (CPG_BASE + 0x1018) -#define PCLKCR (CPG_BASE + 0x1020) - -/* SYSC */ -#define SYSC_BASE (0xE6180000) -#define RESCNT2 (SYSC_BASE + 0x8020) - -/* BSC */ -#define BSC_BASE (0xFEC10000) - -/* SCIF */ -#define SCIF0_BASE (0xE6C40000) -#define SCIF1_BASE (0xE6C50000) -#define SCIF2_BASE (0xE6C60000) -#define SCIF3_BASE (0xE6C70000) -#define SCIF4_BASE (0xE6C80000) -#define SCIF5_BASE (0xE6CB0000) -#define SCIF6_BASE (0xE6CC0000) -#define SCIF7_BASE (0xE6CD0000) - -#ifndef __ASSEMBLY__ -#include <asm/types.h> - -/* RWDT */ -struct sh73a0_rwdt { - u16 rwtcnt0; /* 0x00 */ - u16 dummy0; /* 0x02 */ - u16 rwtcsra0; /* 0x04 */ - u16 dummy1; /* 0x06 */ - u16 rwtcsrb0; /* 0x08 */ -}; - -/* HPB Semaphore Control Registers */ -struct sh73a0_hpb { - u32 hpbctrl0; - u32 hpbctrl1; - u32 hpbctrl2; - u32 cccr; - u32 dummy0; /* 0x20 */ - u32 hpbctrl4; - u32 hpbctrl5; - u32 dummy1; /* 0x2C */ - u32 hpbctrl6; -}; - -/* Bus Semaphore Control Registers */ -struct sh73a0_hpb_bscr { - u32 mpsrc; /* 0x00 */ - u32 mpacctl; /* 0x04 */ - u32 dummy0[6]; - u32 smgpiosrc; /* 0x20 */ - u32 smgpioerr; - u32 smgpiotime; - u32 smgpiocnt; - u32 dummy1[4]; /* 0x30 .. 0x3C */ - u32 smcmt2src; - u32 smcmt2err; - u32 smcmt2time; - u32 smcmt2cnt; - u32 smcpgsrc; - u32 smcpgerr; - u32 smcpgtime; - u32 smcpgcnt; - u32 dummy2[4]; /* 0x60 - 0x6C */ - u32 smsyscsrc; - u32 smsyscerr; - u32 smsysctime; - u32 smsysccnt; -}; - -/* SBSC */ -struct sh73a0_sbsc { - u32 dummy0[2]; /* 0x00, 0x04 */ - u32 sdcr0; - u32 sdcr1; - u32 sdpcr; - u32 dummy1; /* 0x14 */ - u32 sdcr0s; - u32 sdcr1s; - u32 rtcsr; - u32 dummy2; /* 0x24 */ - u32 rtcor; - u32 rtcorh; - u32 rtcors; - u32 rtcorsh; - u32 dummy3[2]; /* 0x38, 0x3C */ - u32 sdwcrc0; - u32 sdwcrc1; - u32 sdwcr00; - u32 sdwcr01; - u32 sdwcr10; - u32 sdwcr11; - u32 sdpdcr0; - u32 dummy4; /* 0x5C */ - u32 sdwcr2; - u32 sdwcrc2; - u32 zqccr; - u32 dummy5[6]; /* 0x6C .. 0x80 */ - u32 sdmracr0; - u32 dummy6; /* 0x88 */ - u32 sdmrtmpcr; - u32 dummy7; /* 0x90 */ - u32 sdmrtmpmsk; - u32 dummy8; /* 0x98 */ - u32 sdgencnt; - u32 dphycnt0; - u32 dphycnt1; - u32 dphycnt2; - u32 dummy9[2]; /* 0xAC .. 0xB0 */ - u32 sddrvcr0; - u32 dummy10[14]; /* 0xB8 .. 0xEC */ - u32 dptdivcr0; - u32 dptdivcr1; - u32 dptdivcr2; - u32 dummy11; /* 0xFC */ - u32 sdptcr0; - u32 sdptcr1; - u32 sdptcr2; - u32 sdptcr3; /* 0x10C */ - u32 dummy12[145]; /* 0x110 .. 0x350 */ - u32 dllcnt0; /* 0x354 */ - u32 sbscmon0; -}; - -/* CPG */ -struct sh73a0_sbsc_cpg { - u32 frqcra; /* 0x00 */ - u32 frqcrb; - u32 vclkcr1; - u32 vclkcr2; - u32 zbckcr; - u32 flckcr; - u32 fsiackcr; - u32 vclkcr3; - u32 rtstbcr; - u32 systbcr; - u32 pll1cr; - u32 pll2cr; - u32 mstpsr0; - u32 dummy0; /* 0x34 */ - u32 mstpsr1; - u32 mstpsr5; - u32 mstpsr2; - u32 dummy1; /* 0x44 */ - u32 mstpsr3; - u32 mstpsr4; - u32 dummy2; /* 0x50 */ - u32 astat; - u32 dvfscr0; - u32 dvfscr1; - u32 dsitckcr; - u32 dsi0pckcr; - u32 dsi1pckcr; - u32 dsi0phycr; - u32 dsi1phycr; - u32 sd0ckcr; - u32 sd1ckcr; - u32 sd2ckcr; - u32 subckcr; - u32 spuackcr; - u32 msuckcr; - u32 hsickcr; - u32 fsibckcr; - u32 spuvckcr; - u32 mfck1cr; - u32 mfck2cr; - u32 dummy3[8]; /* 0xA0 .. 0xBC */ - u32 ckscr; - u32 dummy4; /* 0xC4 */ - u32 pll1stpcr; - u32 mpmode; - u32 pllecr; - u32 dummy5; /* 0xD4 */ - u32 pll0cr; - u32 pll3cr; - u32 dummy6; /* 0xE0 */ - u32 frqcrd; - u32 dummyi7; /* 0xE8 */ - u32 vrefcr; - u32 pll0stpcr; - u32 dummy8; /* 0xF4 */ - u32 pll2stpcr; - u32 pll3stpcr; - u32 dummy9[4]; /* 0x100 .. 0x10c */ - u32 rmstpcr0; - u32 rmstpcr1; - u32 rmstpcr2; - u32 rmstpcr3; - u32 rmstpcr4; - u32 rmstpcr5; - u32 dummy10[2]; /* 0x128 .. 0x12c */ - u32 smstpcr0; - u32 smstpcr1; - u32 smstpcr2; - u32 smstpcr3; - u32 smstpcr4; - u32 smstpcr5; - u32 dummy11[2]; /* 0x148 .. 0x14c */ - u32 cpgxxcs4; - u32 dummy12[7]; /* 0x154 .. 0x16c */ - u32 dvfscr2; - u32 dvfscr3; - u32 dvfscr4; - u32 dvfscr5; /* 0x17C */ -}; - -/* CPG SRCR part OK */ -struct sh73a0_sbsc_cpg_srcr { - u32 srcr0; - u32 dummy0; /* 0xA4 */ - u32 srcr1; - u32 dummy1; /* 0xAC */ - u32 srcr2; - u32 dummy2; /* 0xB4 */ - u32 srcr3; - u32 srcr4; - u32 dummy3; /* 0xC0 */ - u32 srcr5; -}; - -/* BSC */ -struct sh73a0_bsc { - u32 cmncr; - u32 cs0bcr; - u32 cs2bcr; - u32 dummy0; /* 0x0C */ - u32 cs4bcr; - u32 cs5abcr; - u32 cs5bbcr; - u32 cs6abcr; - u32 cs6bbcr; - u32 cs0wcr; - u32 cs2wcr; - u32 dummy1; /* 0x2C */ - u32 cs4wcr; - u32 cs5awcr; - u32 cs5bwcr; - u32 cs6awcr; - u32 cs6bwcr; - u32 rbwtcnt; - u32 busycr; - u32 dummy2; /* 0x5c */ - u32 cs7abcr; - u32 cs7awcr; - u32 dummy3[2]; /* 0x68, 0x6C */ - u32 bromtimcr; -}; -#endif /* __ASSEMBLY__ */ - -#endif /* __ASM_ARCH_RMOBILE_SH73A0_H */ diff --git a/arch/arm/mach-rmobile/pfc-sh73a0.c b/arch/arm/mach-rmobile/pfc-sh73a0.c deleted file mode 100644 index 55dab7c1389..00000000000 --- a/arch/arm/mach-rmobile/pfc-sh73a0.c +++ /dev/null @@ -1,2807 +0,0 @@ -/* - * sh73a0 processor support - PFC hardware block - * - * Copyright (C) 2010 Renesas Solutions Corp. - * Copyright (C) 2010 NISHIMOTO Hiroki - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the - * License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <common.h> -#include <sh_pfc.h> -#include <asm/arch/sh73a0-gpio.h> - -#define CPU_ALL_PORT(fn, pfx, sfx) \ - PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ - PORT_10(fn, pfx##2, sfx), PORT_10(fn, pfx##3, sfx), \ - PORT_10(fn, pfx##4, sfx), PORT_10(fn, pfx##5, sfx), \ - PORT_10(fn, pfx##6, sfx), PORT_10(fn, pfx##7, sfx), \ - PORT_10(fn, pfx##8, sfx), PORT_10(fn, pfx##9, sfx), \ - PORT_10(fn, pfx##10, sfx), \ - PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx), \ - PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx), \ - PORT_1(fn, pfx##114, sfx), PORT_1(fn, pfx##115, sfx), \ - PORT_1(fn, pfx##116, sfx), PORT_1(fn, pfx##117, sfx), \ - PORT_1(fn, pfx##118, sfx), \ - PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx), \ - PORT_10(fn, pfx##13, sfx), PORT_10(fn, pfx##14, sfx), \ - PORT_10(fn, pfx##15, sfx), \ - PORT_1(fn, pfx##160, sfx), PORT_1(fn, pfx##161, sfx), \ - PORT_1(fn, pfx##162, sfx), PORT_1(fn, pfx##163, sfx), \ - PORT_1(fn, pfx##164, sfx), \ - PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx), \ - PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx), \ - PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx), \ - PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx), \ - PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \ - PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \ - PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \ - PORT_10(fn, pfx##26, sfx), PORT_10(fn, pfx##27, sfx), \ - PORT_1(fn, pfx##280, sfx), PORT_1(fn, pfx##281, sfx), \ - PORT_1(fn, pfx##282, sfx), \ - PORT_1(fn, pfx##288, sfx), PORT_1(fn, pfx##289, sfx), \ - PORT_10(fn, pfx##29, sfx), PORT_10(fn, pfx##30, sfx) - -enum { - PINMUX_RESERVED = 0, - - PINMUX_DATA_BEGIN, - PORT_ALL(DATA), /* PORT0_DATA -> PORT309_DATA */ - PINMUX_DATA_END, - - PINMUX_INPUT_BEGIN, - PORT_ALL(IN), /* PORT0_IN -> PORT309_IN */ - PINMUX_INPUT_END, - - PINMUX_INPUT_PULLUP_BEGIN, - PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT309_IN_PU */ - PINMUX_INPUT_PULLUP_END, - - PINMUX_INPUT_PULLDOWN_BEGIN, - PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT309_IN_PD */ - PINMUX_INPUT_PULLDOWN_END, - - PINMUX_OUTPUT_BEGIN, - PORT_ALL(OUT), /* PORT0_OUT -> PORT309_OUT */ - PINMUX_OUTPUT_END, - - PINMUX_FUNCTION_BEGIN, - PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT309_FN_IN */ - PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT309_FN_OUT */ - PORT_ALL(FN0), /* PORT0_FN0 -> PORT309_FN0 */ - PORT_ALL(FN1), /* PORT0_FN1 -> PORT309_FN1 */ - PORT_ALL(FN2), /* PORT0_FN2 -> PORT309_FN2 */ - PORT_ALL(FN3), /* PORT0_FN3 -> PORT309_FN3 */ - PORT_ALL(FN4), /* PORT0_FN4 -> PORT309_FN4 */ - PORT_ALL(FN5), /* PORT0_FN5 -> PORT309_FN5 */ - PORT_ALL(FN6), /* PORT0_FN6 -> PORT309_FN6 */ - PORT_ALL(FN7), /* PORT0_FN7 -> PORT309_FN7 */ - - MSEL2CR_MSEL19_0, MSEL2CR_MSEL19_1, - MSEL2CR_MSEL18_0, MSEL2CR_MSEL18_1, - MSEL2CR_MSEL17_0, MSEL2CR_MSEL17_1, - MSEL2CR_MSEL16_0, MSEL2CR_MSEL16_1, - MSEL2CR_MSEL14_0, MSEL2CR_MSEL14_1, - MSEL2CR_MSEL13_0, MSEL2CR_MSEL13_1, - MSEL2CR_MSEL12_0, MSEL2CR_MSEL12_1, - MSEL2CR_MSEL11_0, MSEL2CR_MSEL11_1, - MSEL2CR_MSEL10_0, MSEL2CR_MSEL10_1, - MSEL2CR_MSEL9_0, MSEL2CR_MSEL9_1, - MSEL2CR_MSEL8_0, MSEL2CR_MSEL8_1, - MSEL2CR_MSEL7_0, MSEL2CR_MSEL7_1, - MSEL2CR_MSEL6_0, MSEL2CR_MSEL6_1, - MSEL2CR_MSEL4_0, MSEL2CR_MSEL4_1, - MSEL2CR_MSEL5_0, MSEL2CR_MSEL5_1, - MSEL2CR_MSEL3_0, MSEL2CR_MSEL3_1, - MSEL2CR_MSEL2_0, MSEL2CR_MSEL2_1, - MSEL2CR_MSEL1_0, MSEL2CR_MSEL1_1, - MSEL2CR_MSEL0_0, MSEL2CR_MSEL0_1, - MSEL3CR_MSEL28_0, MSEL3CR_MSEL28_1, - MSEL3CR_MSEL15_0, MSEL3CR_MSEL15_1, - MSEL3CR_MSEL11_0, MSEL3CR_MSEL11_1, - MSEL3CR_MSEL9_0, MSEL3CR_MSEL9_1, - MSEL3CR_MSEL6_0, MSEL3CR_MSEL6_1, - MSEL3CR_MSEL2_0, MSEL3CR_MSEL2_1, - MSEL4CR_MSEL29_0, MSEL4CR_MSEL29_1, - MSEL4CR_MSEL27_0, MSEL4CR_MSEL27_1, - MSEL4CR_MSEL26_0, MSEL4CR_MSEL26_1, - MSEL4CR_MSEL22_0, MSEL4CR_MSEL22_1, - MSEL4CR_MSEL21_0, MSEL4CR_MSEL21_1, - MSEL4CR_MSEL20_0, MSEL4CR_MSEL20_1, - MSEL4CR_MSEL19_0, MSEL4CR_MSEL19_1, - MSEL4CR_MSEL15_0, MSEL4CR_MSEL15_1, - MSEL4CR_MSEL13_0, MSEL4CR_MSEL13_1, - MSEL4CR_MSEL12_0, MSEL4CR_MSEL12_1, - MSEL4CR_MSEL11_0, MSEL4CR_MSEL11_1, - MSEL4CR_MSEL10_0, MSEL4CR_MSEL10_1, - MSEL4CR_MSEL9_0, MSEL4CR_MSEL9_1, - MSEL4CR_MSEL8_0, MSEL4CR_MSEL8_1, - MSEL4CR_MSEL7_0, MSEL4CR_MSEL7_1, - MSEL4CR_MSEL4_0, MSEL4CR_MSEL4_1, - MSEL4CR_MSEL1_0, MSEL4CR_MSEL1_1, - PINMUX_FUNCTION_END, - - PINMUX_MARK_BEGIN, - /* Hardware manual Table 25-1 (Function 0-7) */ - VBUS_0_MARK, - GPI0_MARK, - GPI1_MARK, - GPI2_MARK, - GPI3_MARK, - GPI4_MARK, - GPI5_MARK, - GPI6_MARK, - GPI7_MARK, - SCIFA7_RXD_MARK, - SCIFA7_CTS__MARK, - GPO7_MARK, MFG0_OUT2_MARK, - GPO6_MARK, MFG1_OUT2_MARK, - GPO5_MARK, SCIFA0_SCK_MARK, FSICOSLDT3_MARK, PORT16_VIO_CKOR_MARK, - SCIFA0_TXD_MARK, - SCIFA7_TXD_MARK, - SCIFA7_RTS__MARK, PORT19_VIO_CKO2_MARK, - GPO0_MARK, - GPO1_MARK, - GPO2_MARK, STATUS0_MARK, - GPO3_MARK, STATUS1_MARK, - GPO4_MARK, STATUS2_MARK, - VINT_MARK, - TCKON_MARK, - XDVFS1_MARK, PORT27_I2C_SCL2_MARK, PORT27_I2C_SCL3_MARK, \ - MFG0_OUT1_MARK, PORT27_IROUT_MARK, - XDVFS2_MARK, PORT28_I2C_SDA2_MARK, PORT28_I2C_SDA3_MARK, \ - PORT28_TPU1TO1_MARK, - SIM_RST_MARK, PORT29_TPU1TO1_MARK, - SIM_CLK_MARK, PORT30_VIO_CKOR_MARK, - SIM_D_MARK, PORT31_IROUT_MARK, - SCIFA4_TXD_MARK, - SCIFA4_RXD_MARK, XWUP_MARK, - SCIFA4_RTS__MARK, - SCIFA4_CTS__MARK, - FSIBOBT_MARK, FSIBIBT_MARK, - FSIBOLR_MARK, FSIBILR_MARK, - FSIBOSLD_MARK, - FSIBISLD_MARK, - VACK_MARK, - XTAL1L_MARK, - SCIFA0_RTS__MARK, FSICOSLDT2_MARK, - SCIFA0_RXD_MARK, - SCIFA0_CTS__MARK, FSICOSLDT1_MARK, - FSICOBT_MARK, FSICIBT_MARK, FSIDOBT_MARK, FSIDIBT_MARK, - FSICOLR_MARK, FSICILR_MARK, FSIDOLR_MARK, FSIDILR_MARK, - FSICOSLD_MARK, PORT47_FSICSPDIF_MARK, - FSICISLD_MARK, FSIDISLD_MARK, - FSIACK_MARK, PORT49_IRDA_OUT_MARK, PORT49_IROUT_MARK, FSIAOMC_MARK, - FSIAOLR_MARK, BBIF2_TSYNC2_MARK, TPU2TO2_MARK, FSIAILR_MARK, - - FSIAOBT_MARK, BBIF2_TSCK2_MARK, TPU2TO3_MARK, FSIAIBT_MARK, - FSIAOSLD_MARK, BBIF2_TXD2_MARK, - FSIASPDIF_MARK, PORT53_IRDA_IN_MARK, TPU3TO3_MARK, FSIBSPDIF_MARK, \ - PORT53_FSICSPDIF_MARK, - FSIBCK_MARK, PORT54_IRDA_FIRSEL_MARK, TPU3TO2_MARK, FSIBOMC_MARK, \ - FSICCK_MARK, FSICOMC_MARK, - FSIAISLD_MARK, TPU0TO0_MARK, - A0_MARK, BS__MARK, - A12_MARK, PORT58_KEYOUT7_MARK, TPU4TO2_MARK, - A13_MARK, PORT59_KEYOUT6_MARK, TPU0TO1_MARK, - A14_MARK, KEYOUT5_MARK, - A15_MARK, KEYOUT4_MARK, - A16_MARK, KEYOUT3_MARK, MSIOF0_SS1_MARK, - A17_MARK, KEYOUT2_MARK, MSIOF0_TSYNC_MARK, - A18_MARK, KEYOUT1_MARK, MSIOF0_TSCK_MARK, - A19_MARK, KEYOUT0_MARK, MSIOF0_TXD_MARK, - A20_MARK, KEYIN0_MARK, MSIOF0_RSCK_MARK, - A21_MARK, KEYIN1_MARK, MSIOF0_RSYNC_MARK, - A22_MARK, KEYIN2_MARK, MSIOF0_MCK0_MARK, - A23_MARK, KEYIN3_MARK, MSIOF0_MCK1_MARK, - A24_MARK, KEYIN4_MARK, MSIOF0_RXD_MARK, - A25_MARK, KEYIN5_MARK, MSIOF0_SS2_MARK, - A26_MARK, KEYIN6_MARK, - KEYIN7_MARK, - D0_NAF0_MARK, - D1_NAF1_MARK, - D2_NAF2_MARK, - D3_NAF3_MARK, - D4_NAF4_MARK, - D5_NAF5_MARK, - D6_NAF6_MARK, - D7_NAF7_MARK, - D8_NAF8_MARK, - D9_NAF9_MARK, - D10_NAF10_MARK, - D11_NAF11_MARK, - D12_NAF12_MARK, - D13_NAF13_MARK, - D14_NAF14_MARK, - D15_NAF15_MARK, - CS4__MARK, - CS5A__MARK, PORT91_RDWR_MARK, - CS5B__MARK, FCE1__MARK, - CS6B__MARK, DACK0_MARK, - FCE0__MARK, CS6A__MARK, - WAIT__MARK, DREQ0_MARK, - RD__FSC_MARK, - WE0__FWE_MARK, RDWR_FWE_MARK, - WE1__MARK, - FRB_MARK, - CKO_MARK, - NBRSTOUT__MARK, - NBRST__MARK, - BBIF2_TXD_MARK, - BBIF2_RXD_MARK, - BBIF2_SYNC_MARK, - BBIF2_SCK_MARK, - SCIFA3_CTS__MARK, MFG3_IN2_MARK, - SCIFA3_RXD_MARK, MFG3_IN1_MARK, - BBIF1_SS2_MARK, SCIFA3_RTS__MARK, MFG3_OUT1_MARK, - SCIFA3_TXD_MARK, - HSI_RX_DATA_MARK, BBIF1_RXD_MARK, - HSI_TX_WAKE_MARK, BBIF1_TSCK_MARK, - HSI_TX_DATA_MARK, BBIF1_TSYNC_MARK, - HSI_TX_READY_MARK, BBIF1_TXD_MARK, - HSI_RX_READY_MARK, BBIF1_RSCK_MARK, PORT115_I2C_SCL2_MARK, \ - PORT115_I2C_SCL3_MARK, - HSI_RX_WAKE_MARK, BBIF1_RSYNC_MARK, PORT116_I2C_SDA2_MARK, \ - PORT116_I2C_SDA3_MARK, - HSI_RX_FLAG_MARK, BBIF1_SS1_MARK, BBIF1_FLOW_MARK, - HSI_TX_FLAG_MARK, - VIO_VD_MARK, PORT128_LCD2VSYN_MARK, VIO2_VD_MARK, LCD2D0_MARK, - - VIO_HD_MARK, PORT129_LCD2HSYN_MARK, PORT129_LCD2CS__MARK, \ - VIO2_HD_MARK, LCD2D1_MARK, - VIO_D0_MARK, PORT130_MSIOF2_RXD_MARK, LCD2D10_MARK, - VIO_D1_MARK, PORT131_KEYOUT6_MARK, PORT131_MSIOF2_SS1_MARK, \ - PORT131_KEYOUT11_MARK, LCD2D11_MARK, - VIO_D2_MARK, PORT132_KEYOUT7_MARK, PORT132_MSIOF2_SS2_MARK, \ - PORT132_KEYOUT10_MARK, LCD2D12_MARK, - VIO_D3_MARK, MSIOF2_TSYNC_MARK, LCD2D13_MARK, - VIO_D4_MARK, MSIOF2_TXD_MARK, LCD2D14_MARK, - VIO_D5_MARK, MSIOF2_TSCK_MARK, LCD2D15_MARK, - VIO_D6_MARK, PORT136_KEYOUT8_MARK, LCD2D16_MARK, - VIO_D7_MARK, PORT137_KEYOUT9_MARK, LCD2D17_MARK, - VIO_D8_MARK, PORT138_KEYOUT8_MARK, VIO2_D0_MARK, LCD2D6_MARK, - VIO_D9_MARK, PORT139_KEYOUT9_MARK, VIO2_D1_MARK, LCD2D7_MARK, - VIO_D10_MARK, TPU0TO2_MARK, VIO2_D2_MARK, LCD2D8_MARK, - VIO_D11_MARK, TPU0TO3_MARK, VIO2_D3_MARK, LCD2D9_MARK, - VIO_D12_MARK, PORT142_KEYOUT10_MARK, VIO2_D4_MARK, LCD2D2_MARK, - VIO_D13_MARK, PORT143_KEYOUT11_MARK, PORT143_KEYOUT6_MARK, \ - VIO2_D5_MARK, LCD2D3_MARK, - VIO_D14_MARK, PORT144_KEYOUT7_MARK, VIO2_D6_MARK, LCD2D4_MARK, - VIO_D15_MARK, TPU1TO3_MARK, PORT145_LCD2DISP_MARK, \ - PORT145_LCD2RS_MARK, VIO2_D7_MARK, LCD2D5_MARK, - VIO_CLK_MARK, LCD2DCK_MARK, PORT146_LCD2WR__MARK, VIO2_CLK_MARK, \ - LCD2D18_MARK, - VIO_FIELD_MARK, LCD2RD__MARK, VIO2_FIELD_MARK, LCD2D19_MARK, - VIO_CKO_MARK, - A27_MARK, PORT149_RDWR_MARK, MFG0_IN1_MARK, PORT149_KEYOUT9_MARK, - MFG0_IN2_MARK, - TS_SPSYNC3_MARK, MSIOF2_RSCK_MARK, - TS_SDAT3_MARK, MSIOF2_RSYNC_MARK, - TPU1TO2_MARK, TS_SDEN3_MARK, PORT153_MSIOF2_SS1_MARK, - SCIFA2_TXD1_MARK, MSIOF2_MCK0_MARK, - SCIFA2_RXD1_MARK, MSIOF2_MCK1_MARK, - SCIFA2_RTS1__MARK, PORT156_MSIOF2_SS2_MARK, - SCIFA2_CTS1__MARK, PORT157_MSIOF2_RXD_MARK, - DINT__MARK, SCIFA2_SCK1_MARK, TS_SCK3_MARK, - PORT159_SCIFB_SCK_MARK, PORT159_SCIFA5_SCK_MARK, NMI_MARK, - PORT160_SCIFB_TXD_MARK, PORT160_SCIFA5_TXD_MARK, - PORT161_SCIFB_CTS__MARK, PORT161_SCIFA5_CTS__MARK, - PORT162_SCIFB_RXD_MARK, PORT162_SCIFA5_RXD_MARK, - PORT163_SCIFB_RTS__MARK, PORT163_SCIFA5_RTS__MARK, TPU3TO0_MARK, - LCDD0_MARK, - LCDD1_MARK, PORT193_SCIFA5_CTS__MARK, BBIF2_TSYNC1_MARK, - LCDD2_MARK, PORT194_SCIFA5_RTS__MARK, BBIF2_TSCK1_MARK, - LCDD3_MARK, PORT195_SCIFA5_RXD_MARK, BBIF2_TXD1_MARK, - LCDD4_MARK, PORT196_SCIFA5_TXD_MARK, - LCDD5_MARK, PORT197_SCIFA5_SCK_MARK, MFG2_OUT2_MARK, TPU2TO1_MARK, - LCDD6_MARK, - LCDD7_MARK, TPU4TO1_MARK, MFG4_OUT2_MARK, - LCDD8_MARK, D16_MARK, - LCDD9_MARK, D17_MARK, - LCDD10_MARK, D18_MARK, - LCDD11_MARK, D19_MARK, - LCDD12_MARK, D20_MARK, - LCDD13_MARK, D21_MARK, - LCDD14_MARK, D22_MARK, - LCDD15_MARK, PORT207_MSIOF0L_SS1_MARK, D23_MARK, - LCDD16_MARK, PORT208_MSIOF0L_SS2_MARK, D24_MARK, - LCDD17_MARK, D25_MARK, - LCDD18_MARK, DREQ2_MARK, PORT210_MSIOF0L_SS1_MARK, D26_MARK, - LCDD19_MARK, PORT211_MSIOF0L_SS2_MARK, D27_MARK, - LCDD20_MARK, TS_SPSYNC1_MARK, MSIOF0L_MCK0_MARK, D28_MARK, - LCDD21_MARK, TS_SDAT1_MARK, MSIOF0L_MCK1_MARK, D29_MARK, - LCDD22_MARK, TS_SDEN1_MARK, MSIOF0L_RSCK_MARK, D30_MARK, - LCDD23_MARK, TS_SCK1_MARK, MSIOF0L_RSYNC_MARK, D31_MARK, - LCDDCK_MARK, LCDWR__MARK, - LCDRD__MARK, DACK2_MARK, PORT217_LCD2RS_MARK, MSIOF0L_TSYNC_MARK, \ - VIO2_FIELD3_MARK, PORT217_LCD2DISP_MARK, - LCDHSYN_MARK, LCDCS__MARK, LCDCS2__MARK, DACK3_MARK, \ - PORT218_VIO_CKOR_MARK, - LCDDISP_MARK, LCDRS_MARK, PORT219_LCD2WR__MARK, DREQ3_MARK, \ - MSIOF0L_TSCK_MARK, VIO2_CLK3_MARK, LCD2DCK_2_MARK, - LCDVSYN_MARK, LCDVSYN2_MARK, - LCDLCLK_MARK, DREQ1_MARK, PORT221_LCD2CS__MARK, PWEN_MARK, \ - MSIOF0L_RXD_MARK, VIO2_HD3_MARK, PORT221_LCD2HSYN_MARK, - LCDDON_MARK, LCDDON2_MARK, DACK1_MARK, OVCN_MARK, MSIOF0L_TXD_MARK, \ - VIO2_VD3_MARK, PORT222_LCD2VSYN_MARK, - - SCIFA1_TXD_MARK, OVCN2_MARK, - EXTLP_MARK, SCIFA1_SCK_MARK, PORT226_VIO_CKO2_MARK, - SCIFA1_RTS__MARK, IDIN_MARK, - SCIFA1_RXD_MARK, - SCIFA1_CTS__MARK, MFG1_IN1_MARK, - MSIOF1_TXD_MARK, SCIFA2_TXD2_MARK, - MSIOF1_TSYNC_MARK, SCIFA2_CTS2__MARK, - MSIOF1_TSCK_MARK, SCIFA2_SCK2_MARK, - MSIOF1_RXD_MARK, SCIFA2_RXD2_MARK, - MSIOF1_RSCK_MARK, SCIFA2_RTS2__MARK, VIO2_CLK2_MARK, LCD2D20_MARK, - MSIOF1_RSYNC_MARK, MFG1_IN2_MARK, VIO2_VD2_MARK, LCD2D21_MARK, - MSIOF1_MCK0_MARK, PORT236_I2C_SDA2_MARK, - MSIOF1_MCK1_MARK, PORT237_I2C_SCL2_MARK, - MSIOF1_SS1_MARK, VIO2_FIELD2_MARK, LCD2D22_MARK, - MSIOF1_SS2_MARK, VIO2_HD2_MARK, LCD2D23_MARK, - SCIFA6_TXD_MARK, - PORT241_IRDA_OUT_MARK, PORT241_IROUT_MARK, MFG4_OUT1_MARK, TPU4TO0_MARK, - PORT242_IRDA_IN_MARK, MFG4_IN2_MARK, - PORT243_IRDA_FIRSEL_MARK, PORT243_VIO_CKO2_MARK, - PORT244_SCIFA5_CTS__MARK, MFG2_IN1_MARK, PORT244_SCIFB_CTS__MARK, \ - MSIOF2R_RXD_MARK, - PORT245_SCIFA5_RTS__MARK, MFG2_IN2_MARK, PORT245_SCIFB_RTS__MARK, \ - MSIOF2R_TXD_MARK, - PORT246_SCIFA5_RXD_MARK, MFG1_OUT1_MARK, PORT246_SCIFB_RXD_MARK, \ - TPU1TO0_MARK, - PORT247_SCIFA5_TXD_MARK, MFG3_OUT2_MARK, PORT247_SCIFB_TXD_MARK, \ - TPU3TO1_MARK, - PORT248_SCIFA5_SCK_MARK, MFG2_OUT1_MARK, PORT248_SCIFB_SCK_MARK, \ - TPU2TO0_MARK, PORT248_I2C_SCL3_MARK, MSIOF2R_TSCK_MARK, - PORT249_IROUT_MARK, MFG4_IN1_MARK, PORT249_I2C_SDA3_MARK, \ - MSIOF2R_TSYNC_MARK, - SDHICLK0_MARK, - SDHICD0_MARK, - SDHID0_0_MARK, - SDHID0_1_MARK, - SDHID0_2_MARK, - SDHID0_3_MARK, - SDHICMD0_MARK, - SDHIWP0_MARK, - SDHICLK1_MARK, - SDHID1_0_MARK, TS_SPSYNC2_MARK, - SDHID1_1_MARK, TS_SDAT2_MARK, - SDHID1_2_MARK, TS_SDEN2_MARK, - SDHID1_3_MARK, TS_SCK2_MARK, - SDHICMD1_MARK, - SDHICLK2_MARK, - SDHID2_0_MARK, TS_SPSYNC4_MARK, - SDHID2_1_MARK, TS_SDAT4_MARK, - SDHID2_2_MARK, TS_SDEN4_MARK, - SDHID2_3_MARK, TS_SCK4_MARK, - SDHICMD2_MARK, - MMCCLK0_MARK, - MMCD0_0_MARK, - MMCD0_1_MARK, - MMCD0_2_MARK, - MMCD0_3_MARK, - MMCD0_4_MARK, TS_SPSYNC5_MARK, - MMCD0_5_MARK, TS_SDAT5_MARK, - MMCD0_6_MARK, TS_SDEN5_MARK, - MMCD0_7_MARK, TS_SCK5_MARK, - MMCCMD0_MARK, - RESETOUTS__MARK, EXTAL2OUT_MARK, - MCP_WAIT__MCP_FRB_MARK, - MCP_CKO_MARK, MMCCLK1_MARK, - MCP_D15_MCP_NAF15_MARK, - MCP_D14_MCP_NAF14_MARK, - MCP_D13_MCP_NAF13_MARK, - MCP_D12_MCP_NAF12_MARK, - MCP_D11_MCP_NAF11_MARK, - MCP_D10_MCP_NAF10_MARK, - MCP_D9_MCP_NAF9_MARK, - MCP_D8_MCP_NAF8_MARK, MMCCMD1_MARK, - MCP_D7_MCP_NAF7_MARK, MMCD1_7_MARK, - - MCP_D6_MCP_NAF6_MARK, MMCD1_6_MARK, - MCP_D5_MCP_NAF5_MARK, MMCD1_5_MARK, - MCP_D4_MCP_NAF4_MARK, MMCD1_4_MARK, - MCP_D3_MCP_NAF3_MARK, MMCD1_3_MARK, - MCP_D2_MCP_NAF2_MARK, MMCD1_2_MARK, - MCP_D1_MCP_NAF1_MARK, MMCD1_1_MARK, - MCP_D0_MCP_NAF0_MARK, MMCD1_0_MARK, - MCP_NBRSTOUT__MARK, - MCP_WE0__MCP_FWE_MARK, MCP_RDWR_MCP_FWE_MARK, - - /* MSEL2 special cases */ - TSIF2_TS_XX1_MARK, - TSIF2_TS_XX2_MARK, - TSIF2_TS_XX3_MARK, - TSIF2_TS_XX4_MARK, - TSIF2_TS_XX5_MARK, - TSIF1_TS_XX1_MARK, - TSIF1_TS_XX2_MARK, - TSIF1_TS_XX3_MARK, - TSIF1_TS_XX4_MARK, - TSIF1_TS_XX5_MARK, - TSIF0_TS_XX1_MARK, - TSIF0_TS_XX2_MARK, - TSIF0_TS_XX3_MARK, - TSIF0_TS_XX4_MARK, - TSIF0_TS_XX5_MARK, - MST1_TS_XX1_MARK, - MST1_TS_XX2_MARK, - MST1_TS_XX3_MARK, - MST1_TS_XX4_MARK, - MST1_TS_XX5_MARK, - MST0_TS_XX1_MARK, - MST0_TS_XX2_MARK, - MST0_TS_XX3_MARK, - MST0_TS_XX4_MARK, - MST0_TS_XX5_MARK, - - /* MSEL3 special cases */ - SDHI0_VCCQ_MC0_ON_MARK, - SDHI0_VCCQ_MC0_OFF_MARK, - DEBUG_MON_VIO_MARK, - DEBUG_MON_LCDD_MARK, - LCDC_LCDC0_MARK, - LCDC_LCDC1_MARK, - - /* MSEL4 special cases */ - IRQ9_MEM_INT_MARK, - IRQ9_MCP_INT_MARK, - A11_MARK, - KEYOUT8_MARK, - TPU4TO3_MARK, - RESETA_N_PU_ON_MARK, - RESETA_N_PU_OFF_MARK, - EDBGREQ_PD_MARK, - EDBGREQ_PU_MARK, - - /* Functions with pull-ups */ - KEYIN0_PU_MARK, - KEYIN1_PU_MARK, - KEYIN2_PU_MARK, - KEYIN3_PU_MARK, - KEYIN4_PU_MARK, - KEYIN5_PU_MARK, - KEYIN6_PU_MARK, - KEYIN7_PU_MARK, - SDHICD0_PU_MARK, - SDHID0_0_PU_MARK, - SDHID0_1_PU_MARK, - SDHID0_2_PU_MARK, - SDHID0_3_PU_MARK, - SDHICMD0_PU_MARK, - SDHIWP0_PU_MARK, - SDHID1_0_PU_MARK, - SDHID1_1_PU_MARK, - SDHID1_2_PU_MARK, - SDHID1_3_PU_MARK, - SDHICMD1_PU_MARK, - SDHID2_0_PU_MARK, - SDHID2_1_PU_MARK, - SDHID2_2_PU_MARK, - SDHID2_3_PU_MARK, - SDHICMD2_PU_MARK, - MMCCMD0_PU_MARK, - MMCCMD1_PU_MARK, - MMCD0_0_PU_MARK, - MMCD0_1_PU_MARK, - MMCD0_2_PU_MARK, - MMCD0_3_PU_MARK, - MMCD0_4_PU_MARK, - MMCD0_5_PU_MARK, - MMCD0_6_PU_MARK, - MMCD0_7_PU_MARK, - FSIBISLD_PU_MARK, - FSIACK_PU_MARK, - FSIAILR_PU_MARK, - FSIAIBT_PU_MARK, - FSIAISLD_PU_MARK, - - PINMUX_MARK_END, -}; - -static unsigned short pinmux_data[] = { - /* specify valid pin states for each pin in GPIO mode */ - - /* Table 25-1 (I/O and Pull U/D) */ - PORT_DATA_I_PD(0), - PORT_DATA_I_PU(1), - PORT_DATA_I_PU(2), - PORT_DATA_I_PU(3), - PORT_DATA_I_PU(4), - PORT_DATA_I_PU(5), - PORT_DATA_I_PU(6), - PORT_DATA_I_PU(7), - PORT_DATA_I_PU(8), - PORT_DATA_I_PD(9), - PORT_DATA_I_PD(10), - PORT_DATA_I_PU_PD(11), - PORT_DATA_IO_PU_PD(12), - PORT_DATA_IO_PU_PD(13), - PORT_DATA_IO_PU_PD(14), - PORT_DATA_IO_PU_PD(15), - PORT_DATA_IO_PD(16), - PORT_DATA_IO_PD(17), - PORT_DATA_IO_PU(18), - PORT_DATA_IO_PU(19), - PORT_DATA_O(20), - PORT_DATA_O(21), - PORT_DATA_O(22), - PORT_DATA_O(23), - PORT_DATA_O(24), - PORT_DATA_I_PD(25), - PORT_DATA_I_PD(26), - PORT_DATA_IO_PU(27), - PORT_DATA_IO_PU(28), - PORT_DATA_IO_PD(29), - PORT_DATA_IO_PD(30), - PORT_DATA_IO_PU(31), - PORT_DATA_IO_PD(32), - PORT_DATA_I_PU_PD(33), - PORT_DATA_IO_PD(34), - PORT_DATA_I_PU_PD(35), - PORT_DATA_IO_PD(36), - PORT_DATA_IO(37), - PORT_DATA_O(38), - PORT_DATA_I_PU(39), - PORT_DATA_I_PU_PD(40), - PORT_DATA_O(41), - PORT_DATA_IO_PD(42), - PORT_DATA_IO_PU_PD(43), - PORT_DATA_IO_PU_PD(44), - PORT_DATA_IO_PD(45), - PORT_DATA_IO_PD(46), - PORT_DATA_IO_PD(47), - PORT_DATA_I_PD(48), - PORT_DATA_IO_PU_PD(49), - PORT_DATA_IO_PD(50), - - PORT_DATA_IO_PD(51), - PORT_DATA_O(52), - PORT_DATA_IO_PU_PD(53), - PORT_DATA_IO_PU_PD(54), - PORT_DATA_IO_PD(55), - PORT_DATA_I_PU_PD(56), - PORT_DATA_IO(57), - PORT_DATA_IO(58), - PORT_DATA_IO(59), - PORT_DATA_IO(60), - PORT_DATA_IO(61), - PORT_DATA_IO_PD(62), - PORT_DATA_IO_PD(63), - PORT_DATA_IO_PU_PD(64), - PORT_DATA_IO_PD(65), - PORT_DATA_IO_PU_PD(66), - PORT_DATA_IO_PU_PD(67), - PORT_DATA_IO_PU_PD(68), - PORT_DATA_IO_PU_PD(69), - PORT_DATA_IO_PU_PD(70), - PORT_DATA_IO_PU_PD(71), - PORT_DATA_IO_PU_PD(72), - PORT_DATA_I_PU_PD(73), - PORT_DATA_IO_PU(74), - PORT_DATA_IO_PU(75), - PORT_DATA_IO_PU(76), - PORT_DATA_IO_PU(77), - PORT_DATA_IO_PU(78), - PORT_DATA_IO_PU(79), - PORT_DATA_IO_PU(80), - PORT_DATA_IO_PU(81), - PORT_DATA_IO_PU(82), - PORT_DATA_IO_PU(83), - PORT_DATA_IO_PU(84), - PORT_DATA_IO_PU(85), - PORT_DATA_IO_PU(86), - PORT_DATA_IO_PU(87), - PORT_DATA_IO_PU(88), - PORT_DATA_IO_PU(89), - PORT_DATA_O(90), - PORT_DATA_IO_PU(91), - PORT_DATA_O(92), - PORT_DATA_IO_PU(93), - PORT_DATA_O(94), - PORT_DATA_I_PU_PD(95), - PORT_DATA_IO(96), - PORT_DATA_IO(97), - PORT_DATA_IO(98), - PORT_DATA_I_PU(99), - PORT_DATA_O(100), - PORT_DATA_O(101), - PORT_DATA_I_PU(102), - PORT_DATA_IO_PD(103), - PORT_DATA_I_PU_PD(104), - PORT_DATA_I_PD(105), - PORT_DATA_I_PD(106), - PORT_DATA_I_PU_PD(107), - PORT_DATA_I_PU_PD(108), - PORT_DATA_IO_PD(109), - PORT_DATA_IO_PD(110), - PORT_DATA_IO_PU_PD(111), - PORT_DATA_IO_PU_PD(112), - PORT_DATA_IO_PU_PD(113), - PORT_DATA_IO_PD(114), - PORT_DATA_IO_PU(115), - PORT_DATA_IO_PU(116), - PORT_DATA_IO_PU_PD(117), - PORT_DATA_IO_PU_PD(118), - PORT_DATA_IO_PD(128), - - PORT_DATA_IO_PD(129), - PORT_DATA_IO_PU_PD(130), - PORT_DATA_IO_PD(131), - PORT_DATA_IO_PD(132), - PORT_DATA_IO_PD(133), - PORT_DATA_IO_PU_PD(134), - PORT_DATA_IO_PU_PD(135), - PORT_DATA_IO_PU_PD(136), - PORT_DATA_IO_PU_PD(137), - PORT_DATA_IO_PD(138), - PORT_DATA_IO_PD(139), - PORT_DATA_IO_PD(140), - PORT_DATA_IO_PD(141), - PORT_DATA_IO_PD(142), - PORT_DATA_IO_PD(143), - PORT_DATA_IO_PU_PD(144), - PORT_DATA_IO_PD(145), - PORT_DATA_IO_PU_PD(146), - PORT_DATA_IO_PU_PD(147), - PORT_DATA_IO_PU_PD(148), - PORT_DATA_IO_PU_PD(149), - PORT_DATA_I_PU_PD(150), - PORT_DATA_IO_PU_PD(151), - PORT_DATA_IO_PU_PD(152), - PORT_DATA_IO_PD(153), - PORT_DATA_IO_PD(154), - PORT_DATA_I_PU_PD(155), - PORT_DATA_IO_PU_PD(156), - PORT_DATA_I_PD(157), - PORT_DATA_IO_PD(158), - PORT_DATA_IO_PU_PD(159), - PORT_DATA_IO_PU_PD(160), - PORT_DATA_I_PU_PD(161), - PORT_DATA_I_PU_PD(162), - PORT_DATA_IO_PU_PD(163), - PORT_DATA_I_PU_PD(164), - PORT_DATA_IO_PD(192), - PORT_DATA_IO_PU_PD(193), - PORT_DATA_IO_PD(194), - PORT_DATA_IO_PU_PD(195), - PORT_DATA_IO_PD(196), - PORT_DATA_IO_PD(197), - PORT_DATA_IO_PD(198), - PORT_DATA_IO_PD(199), - PORT_DATA_IO_PU_PD(200), - PORT_DATA_IO_PU_PD(201), - PORT_DATA_IO_PU_PD(202), - PORT_DATA_IO_PU_PD(203), - PORT_DATA_IO_PU_PD(204), - PORT_DATA_IO_PU_PD(205), - PORT_DATA_IO_PU_PD(206), - PORT_DATA_IO_PD(207), - PORT_DATA_IO_PD(208), - PORT_DATA_IO_PD(209), - PORT_DATA_IO_PD(210), - PORT_DATA_IO_PD(211), - PORT_DATA_IO_PD(212), - PORT_DATA_IO_PD(213), - PORT_DATA_IO_PU_PD(214), - PORT_DATA_IO_PU_PD(215), - PORT_DATA_IO_PD(216), - PORT_DATA_IO_PD(217), - PORT_DATA_O(218), - PORT_DATA_IO_PD(219), - PORT_DATA_IO_PD(220), - PORT_DATA_IO_PU_PD(221), - PORT_DATA_IO_PU_PD(222), - PORT_DATA_I_PU_PD(223), - PORT_DATA_I_PU_PD(224), - - PORT_DATA_IO_PU_PD(225), - PORT_DATA_O(226), - PORT_DATA_IO_PU_PD(227), - PORT_DATA_I_PU_PD(228), - PORT_DATA_I_PD(229), - PORT_DATA_IO(230), - PORT_DATA_IO_PU_PD(231), - PORT_DATA_IO_PU_PD(232), - PORT_DATA_I_PU_PD(233), - PORT_DATA_IO_PU_PD(234), - PORT_DATA_IO_PU_PD(235), - PORT_DATA_IO_PU_PD(236), - PORT_DATA_IO_PD(237), - PORT_DATA_IO_PU_PD(238), - PORT_DATA_IO_PU_PD(239), - PORT_DATA_IO_PU_PD(240), - PORT_DATA_O(241), - PORT_DATA_I_PD(242), - PORT_DATA_IO_PU_PD(243), - PORT_DATA_IO_PU_PD(244), - PORT_DATA_IO_PU_PD(245), - PORT_DATA_IO_PU_PD(246), - PORT_DATA_IO_PU_PD(247), - PORT_DATA_IO_PU_PD(248), - PORT_DATA_IO_PU_PD(249), - PORT_DATA_IO_PU_PD(250), - PORT_DATA_IO_PU_PD(251), - PORT_DATA_IO_PU_PD(252), - PORT_DATA_IO_PU_PD(253), - PORT_DATA_IO_PU_PD(254), - PORT_DATA_IO_PU_PD(255), - PORT_DATA_IO_PU_PD(256), - PORT_DATA_IO_PU_PD(257), - PORT_DATA_IO_PU_PD(258), - PORT_DATA_IO_PU_PD(259), - PORT_DATA_IO_PU_PD(260), - PORT_DATA_IO_PU_PD(261), - PORT_DATA_IO_PU_PD(262), - PORT_DATA_IO_PU_PD(263), - PORT_DATA_IO_PU_PD(264), - PORT_DATA_IO_PU_PD(265), - PORT_DATA_IO_PU_PD(266), - PORT_DATA_IO_PU_PD(267), - PORT_DATA_IO_PU_PD(268), - PORT_DATA_IO_PU_PD(269), - PORT_DATA_IO_PU_PD(270), - PORT_DATA_IO_PU_PD(271), - PORT_DATA_IO_PU_PD(272), - PORT_DATA_IO_PU_PD(273), - PORT_DATA_IO_PU_PD(274), - PORT_DATA_IO_PU_PD(275), - PORT_DATA_IO_PU_PD(276), - PORT_DATA_IO_PU_PD(277), - PORT_DATA_IO_PU_PD(278), - PORT_DATA_IO_PU_PD(279), - PORT_DATA_IO_PU_PD(280), - PORT_DATA_O(281), - PORT_DATA_O(282), - PORT_DATA_I_PU(288), - PORT_DATA_IO_PU_PD(289), - PORT_DATA_IO_PU_PD(290), - PORT_DATA_IO_PU_PD(291), - PORT_DATA_IO_PU_PD(292), - PORT_DATA_IO_PU_PD(293), - PORT_DATA_IO_PU_PD(294), - PORT_DATA_IO_PU_PD(295), - PORT_DATA_IO_PU_PD(296), - PORT_DATA_IO_PU_PD(297), - PORT_DATA_IO_PU_PD(298), - - PORT_DATA_IO_PU_PD(299), - PORT_DATA_IO_PU_PD(300), - PORT_DATA_IO_PU_PD(301), - PORT_DATA_IO_PU_PD(302), - PORT_DATA_IO_PU_PD(303), - PORT_DATA_IO_PU_PD(304), - PORT_DATA_IO_PU_PD(305), - PORT_DATA_O(306), - PORT_DATA_O(307), - PORT_DATA_I_PU(308), - PORT_DATA_O(309), - - /* Table 25-1 (Function 0-7) */ - PINMUX_DATA(VBUS_0_MARK, PORT0_FN1), - PINMUX_DATA(GPI0_MARK, PORT1_FN1), - PINMUX_DATA(GPI1_MARK, PORT2_FN1), - PINMUX_DATA(GPI2_MARK, PORT3_FN1), - PINMUX_DATA(GPI3_MARK, PORT4_FN1), - PINMUX_DATA(GPI4_MARK, PORT5_FN1), - PINMUX_DATA(GPI5_MARK, PORT6_FN1), - PINMUX_DATA(GPI6_MARK, PORT7_FN1), - PINMUX_DATA(GPI7_MARK, PORT8_FN1), - PINMUX_DATA(SCIFA7_RXD_MARK, PORT12_FN2), - PINMUX_DATA(SCIFA7_CTS__MARK, PORT13_FN2), - PINMUX_DATA(GPO7_MARK, PORT14_FN1), \ - PINMUX_DATA(MFG0_OUT2_MARK, PORT14_FN4), - PINMUX_DATA(GPO6_MARK, PORT15_FN1), \ - PINMUX_DATA(MFG1_OUT2_MARK, PORT15_FN4), - PINMUX_DATA(GPO5_MARK, PORT16_FN1), \ - PINMUX_DATA(SCIFA0_SCK_MARK, PORT16_FN2), \ - PINMUX_DATA(FSICOSLDT3_MARK, PORT16_FN3), \ - PINMUX_DATA(PORT16_VIO_CKOR_MARK, PORT16_FN4), - PINMUX_DATA(SCIFA0_TXD_MARK, PORT17_FN2), - PINMUX_DATA(SCIFA7_TXD_MARK, PORT18_FN2), - PINMUX_DATA(SCIFA7_RTS__MARK, PORT19_FN2), \ - PINMUX_DATA(PORT19_VIO_CKO2_MARK, PORT19_FN3), - PINMUX_DATA(GPO0_MARK, PORT20_FN1), - PINMUX_DATA(GPO1_MARK, PORT21_FN1), - PINMUX_DATA(GPO2_MARK, PORT22_FN1), \ - PINMUX_DATA(STATUS0_MARK, PORT22_FN2), - PINMUX_DATA(GPO3_MARK, PORT23_FN1), \ - PINMUX_DATA(STATUS1_MARK, PORT23_FN2), - PINMUX_DATA(GPO4_MARK, PORT24_FN1), \ - PINMUX_DATA(STATUS2_MARK, PORT24_FN2), - PINMUX_DATA(VINT_MARK, PORT25_FN1), - PINMUX_DATA(TCKON_MARK, PORT26_FN1), - PINMUX_DATA(XDVFS1_MARK, PORT27_FN1), \ - PINMUX_DATA(PORT27_I2C_SCL2_MARK, PORT27_FN2, MSEL2CR_MSEL17_0, - MSEL2CR_MSEL16_1), \ - PINMUX_DATA(PORT27_I2C_SCL3_MARK, PORT27_FN3, MSEL2CR_MSEL19_0, - MSEL2CR_MSEL18_1), \ - PINMUX_DATA(MFG0_OUT1_MARK, PORT27_FN4), \ - PINMUX_DATA(PORT27_IROUT_MARK, PORT27_FN7), - PINMUX_DATA(XDVFS2_MARK, PORT28_FN1), \ - PINMUX_DATA(PORT28_I2C_SDA2_MARK, PORT28_FN2, MSEL2CR_MSEL17_0, - MSEL2CR_MSEL16_1), \ - PINMUX_DATA(PORT28_I2C_SDA3_MARK, PORT28_FN3, MSEL2CR_MSEL19_0, - MSEL2CR_MSEL18_1), \ - PINMUX_DATA(PORT28_TPU1TO1_MARK, PORT28_FN7), - PINMUX_DATA(SIM_RST_MARK, PORT29_FN1), \ - PINMUX_DATA(PORT29_TPU1TO1_MARK, PORT29_FN4), - PINMUX_DATA(SIM_CLK_MARK, PORT30_FN1), \ - PINMUX_DATA(PORT30_VIO_CKOR_MARK, PORT30_FN4), - PINMUX_DATA(SIM_D_MARK, PORT31_FN1), \ - PINMUX_DATA(PORT31_IROUT_MARK, PORT31_FN4), - PINMUX_DATA(SCIFA4_TXD_MARK, PORT32_FN2), - PINMUX_DATA(SCIFA4_RXD_MARK, PORT33_FN2), \ - PINMUX_DATA(XWUP_MARK, PORT33_FN3), - PINMUX_DATA(SCIFA4_RTS__MARK, PORT34_FN2), - PINMUX_DATA(SCIFA4_CTS__MARK, PORT35_FN2), - PINMUX_DATA(FSIBOBT_MARK, PORT36_FN1), \ - PINMUX_DATA(FSIBIBT_MARK, PORT36_FN2), - PINMUX_DATA(FSIBOLR_MARK, PORT37_FN1), \ - PINMUX_DATA(FSIBILR_MARK, PORT37_FN2), - PINMUX_DATA(FSIBOSLD_MARK, PORT38_FN1), - PINMUX_DATA(FSIBISLD_MARK, PORT39_FN1), - PINMUX_DATA(VACK_MARK, PORT40_FN1), - PINMUX_DATA(XTAL1L_MARK, PORT41_FN1), - PINMUX_DATA(SCIFA0_RTS__MARK, PORT42_FN2), \ - PINMUX_DATA(FSICOSLDT2_MARK, PORT42_FN3), - PINMUX_DATA(SCIFA0_RXD_MARK, PORT43_FN2), - PINMUX_DATA(SCIFA0_CTS__MARK, PORT44_FN2), \ - PINMUX_DATA(FSICOSLDT1_MARK, PORT44_FN3), - PINMUX_DATA(FSICOBT_MARK, PORT45_FN1), \ - PINMUX_DATA(FSICIBT_MARK, PORT45_FN2), \ - PINMUX_DATA(FSIDOBT_MARK, PORT45_FN3), \ - PINMUX_DATA(FSIDIBT_MARK, PORT45_FN4), - PINMUX_DATA(FSICOLR_MARK, PORT46_FN1), \ - PINMUX_DATA(FSICILR_MARK, PORT46_FN2), \ - PINMUX_DATA(FSIDOLR_MARK, PORT46_FN3), \ - PINMUX_DATA(FSIDILR_MARK, PORT46_FN4), - PINMUX_DATA(FSICOSLD_MARK, PORT47_FN1), \ - PINMUX_DATA(PORT47_FSICSPDIF_MARK, PORT47_FN2), - PINMUX_DATA(FSICISLD_MARK, PORT48_FN1), \ - PINMUX_DATA(FSIDISLD_MARK, PORT48_FN3), - PINMUX_DATA(FSIACK_MARK, PORT49_FN1), \ - PINMUX_DATA(PORT49_IRDA_OUT_MARK, PORT49_FN2, MSEL4CR_MSEL19_1), \ - PINMUX_DATA(PORT49_IROUT_MARK, PORT49_FN4), \ - PINMUX_DATA(FSIAOMC_MARK, PORT49_FN5), - PINMUX_DATA(FSIAOLR_MARK, PORT50_FN1), \ - PINMUX_DATA(BBIF2_TSYNC2_MARK, PORT50_FN2), \ - PINMUX_DATA(TPU2TO2_MARK, PORT50_FN3), \ - PINMUX_DATA(FSIAILR_MARK, PORT50_FN5), - - PINMUX_DATA(FSIAOBT_MARK, PORT51_FN1), \ - PINMUX_DATA(BBIF2_TSCK2_MARK, PORT51_FN2), \ - PINMUX_DATA(TPU2TO3_MARK, PORT51_FN3), \ - PINMUX_DATA(FSIAIBT_MARK, PORT51_FN5), - PINMUX_DATA(FSIAOSLD_MARK, PORT52_FN1), \ - PINMUX_DATA(BBIF2_TXD2_MARK, PORT52_FN2), - PINMUX_DATA(FSIASPDIF_MARK, PORT53_FN1), \ - PINMUX_DATA(PORT53_IRDA_IN_MARK, PORT53_FN2, MSEL4CR_MSEL19_1), \ - PINMUX_DATA(TPU3TO3_MARK, PORT53_FN3), \ - PINMUX_DATA(FSIBSPDIF_MARK, PORT53_FN5), \ - PINMUX_DATA(PORT53_FSICSPDIF_MARK, PORT53_FN6), - PINMUX_DATA(FSIBCK_MARK, PORT54_FN1), \ - PINMUX_DATA(PORT54_IRDA_FIRSEL_MARK, PORT54_FN2, MSEL4CR_MSEL19_1), \ - PINMUX_DATA(TPU3TO2_MARK, PORT54_FN3), \ - PINMUX_DATA(FSIBOMC_MARK, PORT54_FN5), \ - PINMUX_DATA(FSICCK_MARK, PORT54_FN6), \ - PINMUX_DATA(FSICOMC_MARK, PORT54_FN7), - PINMUX_DATA(FSIAISLD_MARK, PORT55_FN1), \ - PINMUX_DATA(TPU0TO0_MARK, PORT55_FN3), - PINMUX_DATA(A0_MARK, PORT57_FN1), \ - PINMUX_DATA(BS__MARK, PORT57_FN2), - PINMUX_DATA(A12_MARK, PORT58_FN1), \ - PINMUX_DATA(PORT58_KEYOUT7_MARK, PORT58_FN2), \ - PINMUX_DATA(TPU4TO2_MARK, PORT58_FN4), - PINMUX_DATA(A13_MARK, PORT59_FN1), \ - PINMUX_DATA(PORT59_KEYOUT6_MARK, PORT59_FN2), \ - PINMUX_DATA(TPU0TO1_MARK, PORT59_FN4), - PINMUX_DATA(A14_MARK, PORT60_FN1), \ - PINMUX_DATA(KEYOUT5_MARK, PORT60_FN2), - PINMUX_DATA(A15_MARK, PORT61_FN1), \ - PINMUX_DATA(KEYOUT4_MARK, PORT61_FN2), - PINMUX_DATA(A16_MARK, PORT62_FN1), \ - PINMUX_DATA(KEYOUT3_MARK, PORT62_FN2), \ - PINMUX_DATA(MSIOF0_SS1_MARK, PORT62_FN4, MSEL3CR_MSEL11_0), - PINMUX_DATA(A17_MARK, PORT63_FN1), \ - PINMUX_DATA(KEYOUT2_MARK, PORT63_FN2), \ - PINMUX_DATA(MSIOF0_TSYNC_MARK, PORT63_FN4, MSEL3CR_MSEL11_0), - PINMUX_DATA(A18_MARK, PORT64_FN1), \ - PINMUX_DATA(KEYOUT1_MARK, PORT64_FN2), \ - PINMUX_DATA(MSIOF0_TSCK_MARK, PORT64_FN4, MSEL3CR_MSEL11_0), - PINMUX_DATA(A19_MARK, PORT65_FN1), \ - PINMUX_DATA(KEYOUT0_MARK, PORT65_FN2), \ - PINMUX_DATA(MSIOF0_TXD_MARK, PORT65_FN4, MSEL3CR_MSEL11_0), - PINMUX_DATA(A20_MARK, PORT66_FN1), \ - PINMUX_DATA(KEYIN0_MARK, PORT66_FN2), \ - PINMUX_DATA(MSIOF0_RSCK_MARK, PORT66_FN4, MSEL3CR_MSEL11_0), - PINMUX_DATA(A21_MARK, PORT67_FN1), \ - PINMUX_DATA(KEYIN1_MARK, PORT67_FN2), \ - PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT67_FN4, MSEL3CR_MSEL11_0), - PINMUX_DATA(A22_MARK, PORT68_FN1), \ - PINMUX_DATA(KEYIN2_MARK, PORT68_FN2), \ - PINMUX_DATA(MSIOF0_MCK0_MARK, PORT68_FN4, MSEL3CR_MSEL11_0), - PINMUX_DATA(A23_MARK, PORT69_FN1), \ - PINMUX_DATA(KEYIN3_MARK, PORT69_FN2), \ - PINMUX_DATA(MSIOF0_MCK1_MARK, PORT69_FN4, MSEL3CR_MSEL11_0), - PINMUX_DATA(A24_MARK, PORT70_FN1), \ - PINMUX_DATA(KEYIN4_MARK, PORT70_FN2), \ - PINMUX_DATA(MSIOF0_RXD_MARK, PORT70_FN4, MSEL3CR_MSEL11_0), - PINMUX_DATA(A25_MARK, PORT71_FN1), \ - PINMUX_DATA(KEYIN5_MARK, PORT71_FN2), \ - PINMUX_DATA(MSIOF0_SS2_MARK, PORT71_FN4, MSEL3CR_MSEL11_0), - PINMUX_DATA(A26_MARK, PORT72_FN1), \ - PINMUX_DATA(KEYIN6_MARK, PORT72_FN2), - PINMUX_DATA(KEYIN7_MARK, PORT73_FN2), - PINMUX_DATA(D0_NAF0_MARK, PORT74_FN1), - PINMUX_DATA(D1_NAF1_MARK, PORT75_FN1), - PINMUX_DATA(D2_NAF2_MARK, PORT76_FN1), - PINMUX_DATA(D3_NAF3_MARK, PORT77_FN1), - PINMUX_DATA(D4_NAF4_MARK, PORT78_FN1), - PINMUX_DATA(D5_NAF5_MARK, PORT79_FN1), - PINMUX_DATA(D6_NAF6_MARK, PORT80_FN1), - PINMUX_DATA(D7_NAF7_MARK, PORT81_FN1), - PINMUX_DATA(D8_NAF8_MARK, PORT82_FN1), - PINMUX_DATA(D9_NAF9_MARK, PORT83_FN1), - PINMUX_DATA(D10_NAF10_MARK, PORT84_FN1), - PINMUX_DATA(D11_NAF11_MARK, PORT85_FN1), - PINMUX_DATA(D12_NAF12_MARK, PORT86_FN1), - PINMUX_DATA(D13_NAF13_MARK, PORT87_FN1), - PINMUX_DATA(D14_NAF14_MARK, PORT88_FN1), - PINMUX_DATA(D15_NAF15_MARK, PORT89_FN1), - PINMUX_DATA(CS4__MARK, PORT90_FN1), - PINMUX_DATA(CS5A__MARK, PORT91_FN1), \ - PINMUX_DATA(PORT91_RDWR_MARK, PORT91_FN2), - PINMUX_DATA(CS5B__MARK, PORT92_FN1), \ - PINMUX_DATA(FCE1__MARK, PORT92_FN2), - PINMUX_DATA(CS6B__MARK, PORT93_FN1), \ - PINMUX_DATA(DACK0_MARK, PORT93_FN4), - PINMUX_DATA(FCE0__MARK, PORT94_FN1), \ - PINMUX_DATA(CS6A__MARK, PORT94_FN2), - PINMUX_DATA(WAIT__MARK, PORT95_FN1), \ - PINMUX_DATA(DREQ0_MARK, PORT95_FN2), - PINMUX_DATA(RD__FSC_MARK, PORT96_FN1), - PINMUX_DATA(WE0__FWE_MARK, PORT97_FN1), \ - PINMUX_DATA(RDWR_FWE_MARK, PORT97_FN2), - PINMUX_DATA(WE1__MARK, PORT98_FN1), - PINMUX_DATA(FRB_MARK, PORT99_FN1), - PINMUX_DATA(CKO_MARK, PORT100_FN1), - PINMUX_DATA(NBRSTOUT__MARK, PORT101_FN1), - PINMUX_DATA(NBRST__MARK, PORT102_FN1), - PINMUX_DATA(BBIF2_TXD_MARK, PORT103_FN3), - PINMUX_DATA(BBIF2_RXD_MARK, PORT104_FN3), - PINMUX_DATA(BBIF2_SYNC_MARK, PORT105_FN3), - PINMUX_DATA(BBIF2_SCK_MARK, PORT106_FN3), - PINMUX_DATA(SCIFA3_CTS__MARK, PORT107_FN3), \ - PINMUX_DATA(MFG3_IN2_MARK, PORT107_FN4), - PINMUX_DATA(SCIFA3_RXD_MARK, PORT108_FN3), \ - PINMUX_DATA(MFG3_IN1_MARK, PORT108_FN4), - PINMUX_DATA(BBIF1_SS2_MARK, PORT109_FN2), \ - PINMUX_DATA(SCIFA3_RTS__MARK, PORT109_FN3), \ - PINMUX_DATA(MFG3_OUT1_MARK, PORT109_FN4), - PINMUX_DATA(SCIFA3_TXD_MARK, PORT110_FN3), - PINMUX_DATA(HSI_RX_DATA_MARK, PORT111_FN1), \ - PINMUX_DATA(BBIF1_RXD_MARK, PORT111_FN3), - PINMUX_DATA(HSI_TX_WAKE_MARK, PORT112_FN1), \ - PINMUX_DATA(BBIF1_TSCK_MARK, PORT112_FN3), - PINMUX_DATA(HSI_TX_DATA_MARK, PORT113_FN1), \ - PINMUX_DATA(BBIF1_TSYNC_MARK, PORT113_FN3), - PINMUX_DATA(HSI_TX_READY_MARK, PORT114_FN1), \ - PINMUX_DATA(BBIF1_TXD_MARK, PORT114_FN3), - PINMUX_DATA(HSI_RX_READY_MARK, PORT115_FN1), \ - PINMUX_DATA(BBIF1_RSCK_MARK, PORT115_FN3), \ - PINMUX_DATA(PORT115_I2C_SCL2_MARK, PORT115_FN5, MSEL2CR_MSEL17_1), \ - PINMUX_DATA(PORT115_I2C_SCL3_MARK, PORT115_FN6, MSEL2CR_MSEL19_1), - PINMUX_DATA(HSI_RX_WAKE_MARK, PORT116_FN1), \ - PINMUX_DATA(BBIF1_RSYNC_MARK, PORT116_FN3), \ - PINMUX_DATA(PORT116_I2C_SDA2_MARK, PORT116_FN5, MSEL2CR_MSEL17_1), \ - PINMUX_DATA(PORT116_I2C_SDA3_MARK, PORT116_FN6, MSEL2CR_MSEL19_1), - PINMUX_DATA(HSI_RX_FLAG_MARK, PORT117_FN1), \ - PINMUX_DATA(BBIF1_SS1_MARK, PORT117_FN2), \ - PINMUX_DATA(BBIF1_FLOW_MARK, PORT117_FN3), - PINMUX_DATA(HSI_TX_FLAG_MARK, PORT118_FN1), - PINMUX_DATA(VIO_VD_MARK, PORT128_FN1), \ - PINMUX_DATA(PORT128_LCD2VSYN_MARK, PORT128_FN4, MSEL3CR_MSEL2_0), \ - PINMUX_DATA(VIO2_VD_MARK, PORT128_FN6, MSEL4CR_MSEL27_0), \ - PINMUX_DATA(LCD2D0_MARK, PORT128_FN7), - - PINMUX_DATA(VIO_HD_MARK, PORT129_FN1), \ - PINMUX_DATA(PORT129_LCD2HSYN_MARK, PORT129_FN4), \ - PINMUX_DATA(PORT129_LCD2CS__MARK, PORT129_FN5), \ - PINMUX_DATA(VIO2_HD_MARK, PORT129_FN6, MSEL4CR_MSEL27_0), \ - PINMUX_DATA(LCD2D1_MARK, PORT129_FN7), - PINMUX_DATA(VIO_D0_MARK, PORT130_FN1), \ - PINMUX_DATA(PORT130_MSIOF2_RXD_MARK, PORT130_FN3, MSEL4CR_MSEL11_0, - MSEL4CR_MSEL10_1), \ - PINMUX_DATA(LCD2D10_MARK, PORT130_FN7), - PINMUX_DATA(VIO_D1_MARK, PORT131_FN1), \ - PINMUX_DATA(PORT131_KEYOUT6_MARK, PORT131_FN2), \ - PINMUX_DATA(PORT131_MSIOF2_SS1_MARK, PORT131_FN3), \ - PINMUX_DATA(PORT131_KEYOUT11_MARK, PORT131_FN4), \ - PINMUX_DATA(LCD2D11_MARK, PORT131_FN7), - PINMUX_DATA(VIO_D2_MARK, PORT132_FN1), \ - PINMUX_DATA(PORT132_KEYOUT7_MARK, PORT132_FN2), \ - PINMUX_DATA(PORT132_MSIOF2_SS2_MARK, PORT132_FN3), \ - PINMUX_DATA(PORT132_KEYOUT10_MARK, PORT132_FN4), \ - PINMUX_DATA(LCD2D12_MARK, PORT132_FN7), - PINMUX_DATA(VIO_D3_MARK, PORT133_FN1), \ - PINMUX_DATA(MSIOF2_TSYNC_MARK, PORT133_FN3, MSEL4CR_MSEL11_0), \ - PINMUX_DATA(LCD2D13_MARK, PORT133_FN7), - PINMUX_DATA(VIO_D4_MARK, PORT134_FN1), \ - PINMUX_DATA(MSIOF2_TXD_MARK, PORT134_FN3, MSEL4CR_MSEL11_0), \ - PINMUX_DATA(LCD2D14_MARK, PORT134_FN7), - PINMUX_DATA(VIO_D5_MARK, PORT135_FN1), \ - PINMUX_DATA(MSIOF2_TSCK_MARK, PORT135_FN3, MSEL4CR_MSEL11_0), \ - PINMUX_DATA(LCD2D15_MARK, PORT135_FN7), - PINMUX_DATA(VIO_D6_MARK, PORT136_FN1), \ - PINMUX_DATA(PORT136_KEYOUT8_MARK, PORT136_FN2), \ - PINMUX_DATA(LCD2D16_MARK, PORT136_FN7), - PINMUX_DATA(VIO_D7_MARK, PORT137_FN1), \ - PINMUX_DATA(PORT137_KEYOUT9_MARK, PORT137_FN2), \ - PINMUX_DATA(LCD2D17_MARK, PORT137_FN7), - PINMUX_DATA(VIO_D8_MARK, PORT138_FN1), \ - PINMUX_DATA(PORT138_KEYOUT8_MARK, PORT138_FN2), \ - PINMUX_DATA(VIO2_D0_MARK, PORT138_FN6), \ - PINMUX_DATA(LCD2D6_MARK, PORT138_FN7), - PINMUX_DATA(VIO_D9_MARK, PORT139_FN1), \ - PINMUX_DATA(PORT139_KEYOUT9_MARK, PORT139_FN2), \ - PINMUX_DATA(VIO2_D1_MARK, PORT139_FN6), \ - PINMUX_DATA(LCD2D7_MARK, PORT139_FN7), - PINMUX_DATA(VIO_D10_MARK, PORT140_FN1), \ - PINMUX_DATA(TPU0TO2_MARK, PORT140_FN4), \ - PINMUX_DATA(VIO2_D2_MARK, PORT140_FN6), \ - PINMUX_DATA(LCD2D8_MARK, PORT140_FN7), - PINMUX_DATA(VIO_D11_MARK, PORT141_FN1), \ - PINMUX_DATA(TPU0TO3_MARK, PORT141_FN4), \ - PINMUX_DATA(VIO2_D3_MARK, PORT141_FN6), \ - PINMUX_DATA(LCD2D9_MARK, PORT141_FN7), - PINMUX_DATA(VIO_D12_MARK, PORT142_FN1), \ - PINMUX_DATA(PORT142_KEYOUT10_MARK, PORT142_FN2), \ - PINMUX_DATA(VIO2_D4_MARK, PORT142_FN6), \ - PINMUX_DATA(LCD2D2_MARK, PORT142_FN7), - PINMUX_DATA(VIO_D13_MARK, PORT143_FN1), \ - PINMUX_DATA(PORT143_KEYOUT11_MARK, PORT143_FN2), \ - PINMUX_DATA(PORT143_KEYOUT6_MARK, PORT143_FN3), \ - PINMUX_DATA(VIO2_D5_MARK, PORT143_FN6), \ - PINMUX_DATA(LCD2D3_MARK, PORT143_FN7), - PINMUX_DATA(VIO_D14_MARK, PORT144_FN1), \ - PINMUX_DATA(PORT144_KEYOUT7_MARK, PORT144_FN2), \ - PINMUX_DATA(VIO2_D6_MARK, PORT144_FN6), \ - PINMUX_DATA(LCD2D4_MARK, PORT144_FN7), - PINMUX_DATA(VIO_D15_MARK, PORT145_FN1), \ - PINMUX_DATA(TPU1TO3_MARK, PORT145_FN3), \ - PINMUX_DATA(PORT145_LCD2DISP_MARK, PORT145_FN4), \ - PINMUX_DATA(PORT145_LCD2RS_MARK, PORT145_FN5), \ - PINMUX_DATA(VIO2_D7_MARK, PORT145_FN6), \ - PINMUX_DATA(LCD2D5_MARK, PORT145_FN7), - PINMUX_DATA(VIO_CLK_MARK, PORT146_FN1), \ - PINMUX_DATA(LCD2DCK_MARK, PORT146_FN4), \ - PINMUX_DATA(PORT146_LCD2WR__MARK, PORT146_FN5), \ - PINMUX_DATA(VIO2_CLK_MARK, PORT146_FN6, MSEL4CR_MSEL27_0), \ - PINMUX_DATA(LCD2D18_MARK, PORT146_FN7), - PINMUX_DATA(VIO_FIELD_MARK, PORT147_FN1), \ - PINMUX_DATA(LCD2RD__MARK, PORT147_FN4), \ - PINMUX_DATA(VIO2_FIELD_MARK, PORT147_FN6, MSEL4CR_MSEL27_0), \ - PINMUX_DATA(LCD2D19_MARK, PORT147_FN7), - PINMUX_DATA(VIO_CKO_MARK, PORT148_FN1), - PINMUX_DATA(A27_MARK, PORT149_FN1), \ - PINMUX_DATA(PORT149_RDWR_MARK, PORT149_FN2), \ - PINMUX_DATA(MFG0_IN1_MARK, PORT149_FN3), \ - PINMUX_DATA(PORT149_KEYOUT9_MARK, PORT149_FN4), - PINMUX_DATA(MFG0_IN2_MARK, PORT150_FN3), - PINMUX_DATA(TS_SPSYNC3_MARK, PORT151_FN4), \ - PINMUX_DATA(MSIOF2_RSCK_MARK, PORT151_FN5), - PINMUX_DATA(TS_SDAT3_MARK, PORT152_FN4), \ - PINMUX_DATA(MSIOF2_RSYNC_MARK, PORT152_FN5), - PINMUX_DATA(TPU1TO2_MARK, PORT153_FN3), \ - PINMUX_DATA(TS_SDEN3_MARK, PORT153_FN4), \ - PINMUX_DATA(PORT153_MSIOF2_SS1_MARK, PORT153_FN5), - PINMUX_DATA(SCIFA2_TXD1_MARK, PORT154_FN2, MSEL3CR_MSEL9_0), \ - PINMUX_DATA(MSIOF2_MCK0_MARK, PORT154_FN5), - PINMUX_DATA(SCIFA2_RXD1_MARK, PORT155_FN2, MSEL3CR_MSEL9_0), \ - PINMUX_DATA(MSIOF2_MCK1_MARK, PORT155_FN5), - PINMUX_DATA(SCIFA2_RTS1__MARK, PORT156_FN2, MSEL3CR_MSEL9_0), \ - PINMUX_DATA(PORT156_MSIOF2_SS2_MARK, PORT156_FN5), - PINMUX_DATA(SCIFA2_CTS1__MARK, PORT157_FN2, MSEL3CR_MSEL9_0), \ - PINMUX_DATA(PORT157_MSIOF2_RXD_MARK, PORT157_FN5, MSEL4CR_MSEL11_0, - MSEL4CR_MSEL10_0), - PINMUX_DATA(DINT__MARK, PORT158_FN1), \ - PINMUX_DATA(SCIFA2_SCK1_MARK, PORT158_FN2, MSEL3CR_MSEL9_0), \ - PINMUX_DATA(TS_SCK3_MARK, PORT158_FN4), - PINMUX_DATA(PORT159_SCIFB_SCK_MARK, PORT159_FN1, MSEL4CR_MSEL22_0), \ - PINMUX_DATA(PORT159_SCIFA5_SCK_MARK, PORT159_FN2, MSEL4CR_MSEL21_1), \ - PINMUX_DATA(NMI_MARK, PORT159_FN3), - PINMUX_DATA(PORT160_SCIFB_TXD_MARK, PORT160_FN1, MSEL4CR_MSEL22_0), \ - PINMUX_DATA(PORT160_SCIFA5_TXD_MARK, PORT160_FN2, MSEL4CR_MSEL21_1), - PINMUX_DATA(PORT161_SCIFB_CTS__MARK, PORT161_FN1, MSEL4CR_MSEL22_0), \ - PINMUX_DATA(PORT161_SCIFA5_CTS__MARK, PORT161_FN2, MSEL4CR_MSEL21_1), - PINMUX_DATA(PORT162_SCIFB_RXD_MARK, PORT162_FN1, MSEL4CR_MSEL22_0), \ - PINMUX_DATA(PORT162_SCIFA5_RXD_MARK, PORT162_FN2, MSEL4CR_MSEL21_1), - PINMUX_DATA(PORT163_SCIFB_RTS__MARK, PORT163_FN1, MSEL4CR_MSEL22_0), \ - PINMUX_DATA(PORT163_SCIFA5_RTS__MARK, PORT163_FN2, MSEL4CR_MSEL21_1), \ - PINMUX_DATA(TPU3TO0_MARK, PORT163_FN5), - PINMUX_DATA(LCDD0_MARK, PORT192_FN1), - PINMUX_DATA(LCDD1_MARK, PORT193_FN1), \ - PINMUX_DATA(PORT193_SCIFA5_CTS__MARK, PORT193_FN3, MSEL4CR_MSEL21_0, - MSEL4CR_MSEL20_1), \ - PINMUX_DATA(BBIF2_TSYNC1_MARK, PORT193_FN5), - PINMUX_DATA(LCDD2_MARK, PORT194_FN1), \ - PINMUX_DATA(PORT194_SCIFA5_RTS__MARK, PORT194_FN3, MSEL4CR_MSEL21_0, - MSEL4CR_MSEL20_1), \ - PINMUX_DATA(BBIF2_TSCK1_MARK, PORT194_FN5), - PINMUX_DATA(LCDD3_MARK, PORT195_FN1), \ - PINMUX_DATA(PORT195_SCIFA5_RXD_MARK, PORT195_FN3, MSEL4CR_MSEL21_0, - MSEL4CR_MSEL20_1), \ - PINMUX_DATA(BBIF2_TXD1_MARK, PORT195_FN5), - PINMUX_DATA(LCDD4_MARK, PORT196_FN1), \ - PINMUX_DATA(PORT196_SCIFA5_TXD_MARK, PORT196_FN3, MSEL4CR_MSEL21_0, - MSEL4CR_MSEL20_1), - PINMUX_DATA(LCDD5_MARK, PORT197_FN1), \ - PINMUX_DATA(PORT197_SCIFA5_SCK_MARK, PORT197_FN3, MSEL4CR_MSEL21_0, - MSEL4CR_MSEL20_1), \ - PINMUX_DATA(MFG2_OUT2_MARK, PORT197_FN5), \ - PINMUX_DATA(TPU2TO1_MARK, PORT197_FN7), - PINMUX_DATA(LCDD6_MARK, PORT198_FN1), - PINMUX_DATA(LCDD7_MARK, PORT199_FN1), \ - PINMUX_DATA(TPU4TO1_MARK, PORT199_FN2), \ - PINMUX_DATA(MFG4_OUT2_MARK, PORT199_FN5), - PINMUX_DATA(LCDD8_MARK, PORT200_FN1), \ - PINMUX_DATA(D16_MARK, PORT200_FN6), - PINMUX_DATA(LCDD9_MARK, PORT201_FN1), \ - PINMUX_DATA(D17_MARK, PORT201_FN6), - PINMUX_DATA(LCDD10_MARK, PORT202_FN1), \ - PINMUX_DATA(D18_MARK, PORT202_FN6), - PINMUX_DATA(LCDD11_MARK, PORT203_FN1), \ - PINMUX_DATA(D19_MARK, PORT203_FN6), - PINMUX_DATA(LCDD12_MARK, PORT204_FN1), \ - PINMUX_DATA(D20_MARK, PORT204_FN6), - PINMUX_DATA(LCDD13_MARK, PORT205_FN1), \ - PINMUX_DATA(D21_MARK, PORT205_FN6), - PINMUX_DATA(LCDD14_MARK, PORT206_FN1), \ - PINMUX_DATA(D22_MARK, PORT206_FN6), - PINMUX_DATA(LCDD15_MARK, PORT207_FN1), \ - PINMUX_DATA(PORT207_MSIOF0L_SS1_MARK, PORT207_FN2, MSEL3CR_MSEL11_1), \ - PINMUX_DATA(D23_MARK, PORT207_FN6), - PINMUX_DATA(LCDD16_MARK, PORT208_FN1), \ - PINMUX_DATA(PORT208_MSIOF0L_SS2_MARK, PORT208_FN2, MSEL3CR_MSEL11_1), \ - PINMUX_DATA(D24_MARK, PORT208_FN6), - PINMUX_DATA(LCDD17_MARK, PORT209_FN1), \ - PINMUX_DATA(D25_MARK, PORT209_FN6), - PINMUX_DATA(LCDD18_MARK, PORT210_FN1), \ - PINMUX_DATA(DREQ2_MARK, PORT210_FN2), \ - PINMUX_DATA(PORT210_MSIOF0L_SS1_MARK, PORT210_FN5, MSEL3CR_MSEL11_1), \ - PINMUX_DATA(D26_MARK, PORT210_FN6), - PINMUX_DATA(LCDD19_MARK, PORT211_FN1), \ - PINMUX_DATA(PORT211_MSIOF0L_SS2_MARK, PORT211_FN5, MSEL3CR_MSEL11_1), \ - PINMUX_DATA(D27_MARK, PORT211_FN6), - PINMUX_DATA(LCDD20_MARK, PORT212_FN1), \ - PINMUX_DATA(TS_SPSYNC1_MARK, PORT212_FN2), \ - PINMUX_DATA(MSIOF0L_MCK0_MARK, PORT212_FN5, MSEL3CR_MSEL11_1), \ - PINMUX_DATA(D28_MARK, PORT212_FN6), - PINMUX_DATA(LCDD21_MARK, PORT213_FN1), \ - PINMUX_DATA(TS_SDAT1_MARK, PORT213_FN2), \ - PINMUX_DATA(MSIOF0L_MCK1_MARK, PORT213_FN5, MSEL3CR_MSEL11_1), \ - PINMUX_DATA(D29_MARK, PORT213_FN6), - PINMUX_DATA(LCDD22_MARK, PORT214_FN1), \ - PINMUX_DATA(TS_SDEN1_MARK, PORT214_FN2), \ - PINMUX_DATA(MSIOF0L_RSCK_MARK, PORT214_FN5, MSEL3CR_MSEL11_1), \ - PINMUX_DATA(D30_MARK, PORT214_FN6), - PINMUX_DATA(LCDD23_MARK, PORT215_FN1), \ - PINMUX_DATA(TS_SCK1_MARK, PORT215_FN2), \ - PINMUX_DATA(MSIOF0L_RSYNC_MARK, PORT215_FN5, MSEL3CR_MSEL11_1), \ - PINMUX_DATA(D31_MARK, PORT215_FN6), - PINMUX_DATA(LCDDCK_MARK, PORT216_FN1), \ - PINMUX_DATA(LCDWR__MARK, PORT216_FN2), - PINMUX_DATA(LCDRD__MARK, PORT217_FN1), \ - PINMUX_DATA(DACK2_MARK, PORT217_FN2), \ - PINMUX_DATA(PORT217_LCD2RS_MARK, PORT217_FN3), \ - PINMUX_DATA(MSIOF0L_TSYNC_MARK, PORT217_FN5, MSEL3CR_MSEL11_1), \ - PINMUX_DATA(VIO2_FIELD3_MARK, PORT217_FN6, MSEL4CR_MSEL27_1, - MSEL4CR_MSEL26_1), \ - PINMUX_DATA(PORT217_LCD2DISP_MARK, PORT217_FN7), - PINMUX_DATA(LCDHSYN_MARK, PORT218_FN1), \ - PINMUX_DATA(LCDCS__MARK, PORT218_FN2), \ - PINMUX_DATA(LCDCS2__MARK, PORT218_FN3), \ - PINMUX_DATA(DACK3_MARK, PORT218_FN4), \ - PINMUX_DATA(PORT218_VIO_CKOR_MARK, PORT218_FN5), - PINMUX_DATA(LCDDISP_MARK, PORT219_FN1), \ - PINMUX_DATA(LCDRS_MARK, PORT219_FN2), \ - PINMUX_DATA(PORT219_LCD2WR__MARK, PORT219_FN3), \ - PINMUX_DATA(DREQ3_MARK, PORT219_FN4), \ - PINMUX_DATA(MSIOF0L_TSCK_MARK, PORT219_FN5, MSEL3CR_MSEL11_1), \ - PINMUX_DATA(VIO2_CLK3_MARK, PORT219_FN6, MSEL4CR_MSEL27_1, - MSEL4CR_MSEL26_1), \ - PINMUX_DATA(LCD2DCK_2_MARK, PORT219_FN7), - PINMUX_DATA(LCDVSYN_MARK, PORT220_FN1), \ - PINMUX_DATA(LCDVSYN2_MARK, PORT220_FN2), - PINMUX_DATA(LCDLCLK_MARK, PORT221_FN1), \ - PINMUX_DATA(DREQ1_MARK, PORT221_FN2), \ - PINMUX_DATA(PORT221_LCD2CS__MARK, PORT221_FN3), \ - PINMUX_DATA(PWEN_MARK, PORT221_FN4), \ - PINMUX_DATA(MSIOF0L_RXD_MARK, PORT221_FN5, MSEL3CR_MSEL11_1), \ - PINMUX_DATA(VIO2_HD3_MARK, PORT221_FN6, MSEL4CR_MSEL27_1, - MSEL4CR_MSEL26_1), \ - PINMUX_DATA(PORT221_LCD2HSYN_MARK, PORT221_FN7), - PINMUX_DATA(LCDDON_MARK, PORT222_FN1), \ - PINMUX_DATA(LCDDON2_MARK, PORT222_FN2), \ - PINMUX_DATA(DACK1_MARK, PORT222_FN3), \ - PINMUX_DATA(OVCN_MARK, PORT222_FN4), \ - PINMUX_DATA(MSIOF0L_TXD_MARK, PORT222_FN5, MSEL3CR_MSEL11_1), \ - PINMUX_DATA(VIO2_VD3_MARK, PORT222_FN6, MSEL4CR_MSEL27_1, - MSEL4CR_MSEL26_1), \ - PINMUX_DATA(PORT222_LCD2VSYN_MARK, PORT222_FN7, MSEL3CR_MSEL2_1), - - PINMUX_DATA(SCIFA1_TXD_MARK, PORT225_FN2), \ - PINMUX_DATA(OVCN2_MARK, PORT225_FN4), - PINMUX_DATA(EXTLP_MARK, PORT226_FN1), \ - PINMUX_DATA(SCIFA1_SCK_MARK, PORT226_FN2), \ - PINMUX_DATA(PORT226_VIO_CKO2_MARK, PORT226_FN5), - PINMUX_DATA(SCIFA1_RTS__MARK, PORT227_FN2), \ - PINMUX_DATA(IDIN_MARK, PORT227_FN4), - PINMUX_DATA(SCIFA1_RXD_MARK, PORT228_FN2), - PINMUX_DATA(SCIFA1_CTS__MARK, PORT229_FN2), \ - PINMUX_DATA(MFG1_IN1_MARK, PORT229_FN3), - PINMUX_DATA(MSIOF1_TXD_MARK, PORT230_FN1), \ - PINMUX_DATA(SCIFA2_TXD2_MARK, PORT230_FN2, MSEL3CR_MSEL9_1), - PINMUX_DATA(MSIOF1_TSYNC_MARK, PORT231_FN1), \ - PINMUX_DATA(SCIFA2_CTS2__MARK, PORT231_FN2, MSEL3CR_MSEL9_1), - PINMUX_DATA(MSIOF1_TSCK_MARK, PORT232_FN1), \ - PINMUX_DATA(SCIFA2_SCK2_MARK, PORT232_FN2, MSEL3CR_MSEL9_1), - PINMUX_DATA(MSIOF1_RXD_MARK, PORT233_FN1), \ - PINMUX_DATA(SCIFA2_RXD2_MARK, PORT233_FN2, MSEL3CR_MSEL9_1), - PINMUX_DATA(MSIOF1_RSCK_MARK, PORT234_FN1), \ - PINMUX_DATA(SCIFA2_RTS2__MARK, PORT234_FN2, MSEL3CR_MSEL9_1), \ - PINMUX_DATA(VIO2_CLK2_MARK, PORT234_FN6, MSEL4CR_MSEL27_1, - MSEL4CR_MSEL26_0), \ - PINMUX_DATA(LCD2D20_MARK, PORT234_FN7), - PINMUX_DATA(MSIOF1_RSYNC_MARK, PORT235_FN1), \ - PINMUX_DATA(MFG1_IN2_MARK, PORT235_FN3), \ - PINMUX_DATA(VIO2_VD2_MARK, PORT235_FN6, MSEL4CR_MSEL27_1, - MSEL4CR_MSEL26_0), \ - PINMUX_DATA(LCD2D21_MARK, PORT235_FN7), - PINMUX_DATA(MSIOF1_MCK0_MARK, PORT236_FN1), \ - PINMUX_DATA(PORT236_I2C_SDA2_MARK, PORT236_FN2, MSEL2CR_MSEL17_0, - MSEL2CR_MSEL16_0), - PINMUX_DATA(MSIOF1_MCK1_MARK, PORT237_FN1), \ - PINMUX_DATA(PORT237_I2C_SCL2_MARK, PORT237_FN2, MSEL2CR_MSEL17_0, - MSEL2CR_MSEL16_0), - PINMUX_DATA(MSIOF1_SS1_MARK, PORT238_FN1), \ - PINMUX_DATA(VIO2_FIELD2_MARK, PORT238_FN6, MSEL4CR_MSEL27_1, - MSEL4CR_MSEL26_0), \ - PINMUX_DATA(LCD2D22_MARK, PORT238_FN7), - PINMUX_DATA(MSIOF1_SS2_MARK, PORT239_FN1), \ - PINMUX_DATA(VIO2_HD2_MARK, PORT239_FN6, MSEL4CR_MSEL27_1, - MSEL4CR_MSEL26_0), \ - PINMUX_DATA(LCD2D23_MARK, PORT239_FN7), - PINMUX_DATA(SCIFA6_TXD_MARK, PORT240_FN1), - PINMUX_DATA(PORT241_IRDA_OUT_MARK, PORT241_FN1, MSEL4CR_MSEL19_0), \ - PINMUX_DATA(PORT241_IROUT_MARK, PORT241_FN2), \ - PINMUX_DATA(MFG4_OUT1_MARK, PORT241_FN3), \ - PINMUX_DATA(TPU4TO0_MARK, PORT241_FN4), - PINMUX_DATA(PORT242_IRDA_IN_MARK, PORT242_FN1, MSEL4CR_MSEL19_0), \ - PINMUX_DATA(MFG4_IN2_MARK, PORT242_FN3), - PINMUX_DATA(PORT243_IRDA_FIRSEL_MARK, PORT243_FN1, MSEL4CR_MSEL19_0), \ - PINMUX_DATA(PORT243_VIO_CKO2_MARK, PORT243_FN2), - PINMUX_DATA(PORT244_SCIFA5_CTS__MARK, PORT244_FN1, MSEL4CR_MSEL21_0, - MSEL4CR_MSEL20_0), \ - PINMUX_DATA(MFG2_IN1_MARK, PORT244_FN2), \ - PINMUX_DATA(PORT244_SCIFB_CTS__MARK, PORT244_FN3, MSEL4CR_MSEL22_1), \ - PINMUX_DATA(MSIOF2R_RXD_MARK, PORT244_FN7, MSEL4CR_MSEL11_1), - PINMUX_DATA(PORT245_SCIFA5_RTS__MARK, PORT245_FN1, MSEL4CR_MSEL21_0, - MSEL4CR_MSEL20_0), \ - PINMUX_DATA(MFG2_IN2_MARK, PORT245_FN2), \ - PINMUX_DATA(PORT245_SCIFB_RTS__MARK, PORT245_FN3, MSEL4CR_MSEL22_1), \ - PINMUX_DATA(MSIOF2R_TXD_MARK, PORT245_FN7, MSEL4CR_MSEL11_1), - PINMUX_DATA(PORT246_SCIFA5_RXD_MARK, PORT246_FN1, MSEL4CR_MSEL21_0, - MSEL4CR_MSEL20_0), \ - PINMUX_DATA(MFG1_OUT1_MARK, PORT246_FN2), \ - PINMUX_DATA(PORT246_SCIFB_RXD_MARK, PORT246_FN3, MSEL4CR_MSEL22_1), \ - PINMUX_DATA(TPU1TO0_MARK, PORT246_FN4), - PINMUX_DATA(PORT247_SCIFA5_TXD_MARK, PORT247_FN1, MSEL4CR_MSEL21_0, - MSEL4CR_MSEL20_0), \ - PINMUX_DATA(MFG3_OUT2_MARK, PORT247_FN2), \ - PINMUX_DATA(PORT247_SCIFB_TXD_MARK, PORT247_FN3, MSEL4CR_MSEL22_1), \ - PINMUX_DATA(TPU3TO1_MARK, PORT247_FN4), - PINMUX_DATA(PORT248_SCIFA5_SCK_MARK, PORT248_FN1, MSEL4CR_MSEL21_0, - MSEL4CR_MSEL20_0), \ - PINMUX_DATA(MFG2_OUT1_MARK, PORT248_FN2), \ - PINMUX_DATA(PORT248_SCIFB_SCK_MARK, PORT248_FN3, MSEL4CR_MSEL22_1), \ - PINMUX_DATA(TPU2TO0_MARK, PORT248_FN4), \ - PINMUX_DATA(PORT248_I2C_SCL3_MARK, PORT248_FN5, MSEL2CR_MSEL19_0, - MSEL2CR_MSEL18_0), \ - PINMUX_DATA(MSIOF2R_TSCK_MARK, PORT248_FN7, MSEL4CR_MSEL11_1), - PINMUX_DATA(PORT249_IROUT_MARK, PORT249_FN1), \ - PINMUX_DATA(MFG4_IN1_MARK, PORT249_FN2), \ - PINMUX_DATA(PORT249_I2C_SDA3_MARK, PORT249_FN5, MSEL2CR_MSEL19_0, - MSEL2CR_MSEL18_0), \ - PINMUX_DATA(MSIOF2R_TSYNC_MARK, PORT249_FN7, MSEL4CR_MSEL11_1), - PINMUX_DATA(SDHICLK0_MARK, PORT250_FN1), - PINMUX_DATA(SDHICD0_MARK, PORT251_FN1), - PINMUX_DATA(SDHID0_0_MARK, PORT252_FN1), - PINMUX_DATA(SDHID0_1_MARK, PORT253_FN1), - PINMUX_DATA(SDHID0_2_MARK, PORT254_FN1), - PINMUX_DATA(SDHID0_3_MARK, PORT255_FN1), - PINMUX_DATA(SDHICMD0_MARK, PORT256_FN1), - PINMUX_DATA(SDHIWP0_MARK, PORT257_FN1), - PINMUX_DATA(SDHICLK1_MARK, PORT258_FN1), - PINMUX_DATA(SDHID1_0_MARK, PORT259_FN1), \ - PINMUX_DATA(TS_SPSYNC2_MARK, PORT259_FN3), - PINMUX_DATA(SDHID1_1_MARK, PORT260_FN1), \ - PINMUX_DATA(TS_SDAT2_MARK, PORT260_FN3), - PINMUX_DATA(SDHID1_2_MARK, PORT261_FN1), \ - PINMUX_DATA(TS_SDEN2_MARK, PORT261_FN3), - PINMUX_DATA(SDHID1_3_MARK, PORT262_FN1), \ - PINMUX_DATA(TS_SCK2_MARK, PORT262_FN3), - PINMUX_DATA(SDHICMD1_MARK, PORT263_FN1), - PINMUX_DATA(SDHICLK2_MARK, PORT264_FN1), - PINMUX_DATA(SDHID2_0_MARK, PORT265_FN1), \ - PINMUX_DATA(TS_SPSYNC4_MARK, PORT265_FN3), - PINMUX_DATA(SDHID2_1_MARK, PORT266_FN1), \ - PINMUX_DATA(TS_SDAT4_MARK, PORT266_FN3), - PINMUX_DATA(SDHID2_2_MARK, PORT267_FN1), \ - PINMUX_DATA(TS_SDEN4_MARK, PORT267_FN3), - PINMUX_DATA(SDHID2_3_MARK, PORT268_FN1), \ - PINMUX_DATA(TS_SCK4_MARK, PORT268_FN3), - PINMUX_DATA(SDHICMD2_MARK, PORT269_FN1), - PINMUX_DATA(MMCCLK0_MARK, PORT270_FN1, MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_0_MARK, PORT271_FN1, PORT271_IN_PU, - MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_1_MARK, PORT272_FN1, PORT272_IN_PU, - MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_2_MARK, PORT273_FN1, PORT273_IN_PU, - MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_3_MARK, PORT274_FN1, PORT274_IN_PU, - MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_4_MARK, PORT275_FN1, PORT275_IN_PU, - MSEL4CR_MSEL15_0), \ - PINMUX_DATA(TS_SPSYNC5_MARK, PORT275_FN3), - PINMUX_DATA(MMCD0_5_MARK, PORT276_FN1, PORT276_IN_PU, - MSEL4CR_MSEL15_0), \ - PINMUX_DATA(TS_SDAT5_MARK, PORT276_FN3), - PINMUX_DATA(MMCD0_6_MARK, PORT277_FN1, PORT277_IN_PU, - MSEL4CR_MSEL15_0), \ - PINMUX_DATA(TS_SDEN5_MARK, PORT277_FN3), - PINMUX_DATA(MMCD0_7_MARK, PORT278_FN1, PORT278_IN_PU, - MSEL4CR_MSEL15_0), \ - PINMUX_DATA(TS_SCK5_MARK, PORT278_FN3), - PINMUX_DATA(MMCCMD0_MARK, PORT279_FN1, PORT279_IN_PU, - MSEL4CR_MSEL15_0), - PINMUX_DATA(RESETOUTS__MARK, PORT281_FN1), \ - PINMUX_DATA(EXTAL2OUT_MARK, PORT281_FN2), - PINMUX_DATA(MCP_WAIT__MCP_FRB_MARK, PORT288_FN1), - PINMUX_DATA(MCP_CKO_MARK, PORT289_FN1), \ - PINMUX_DATA(MMCCLK1_MARK, PORT289_FN2, MSEL4CR_MSEL15_1), - PINMUX_DATA(MCP_D15_MCP_NAF15_MARK, PORT290_FN1), - PINMUX_DATA(MCP_D14_MCP_NAF14_MARK, PORT291_FN1), - PINMUX_DATA(MCP_D13_MCP_NAF13_MARK, PORT292_FN1), - PINMUX_DATA(MCP_D12_MCP_NAF12_MARK, PORT293_FN1), - PINMUX_DATA(MCP_D11_MCP_NAF11_MARK, PORT294_FN1), - PINMUX_DATA(MCP_D10_MCP_NAF10_MARK, PORT295_FN1), - PINMUX_DATA(MCP_D9_MCP_NAF9_MARK, PORT296_FN1), - PINMUX_DATA(MCP_D8_MCP_NAF8_MARK, PORT297_FN1), \ - PINMUX_DATA(MMCCMD1_MARK, PORT297_FN2, MSEL4CR_MSEL15_1), - PINMUX_DATA(MCP_D7_MCP_NAF7_MARK, PORT298_FN1), \ - PINMUX_DATA(MMCD1_7_MARK, PORT298_FN2, MSEL4CR_MSEL15_1), - - PINMUX_DATA(MCP_D6_MCP_NAF6_MARK, PORT299_FN1), \ - PINMUX_DATA(MMCD1_6_MARK, PORT299_FN2, MSEL4CR_MSEL15_1), - PINMUX_DATA(MCP_D5_MCP_NAF5_MARK, PORT300_FN1), \ - PINMUX_DATA(MMCD1_5_MARK, PORT300_FN2, MSEL4CR_MSEL15_1), - PINMUX_DATA(MCP_D4_MCP_NAF4_MARK, PORT301_FN1), \ - PINMUX_DATA(MMCD1_4_MARK, PORT301_FN2, MSEL4CR_MSEL15_1), - PINMUX_DATA(MCP_D3_MCP_NAF3_MARK, PORT302_FN1), \ - PINMUX_DATA(MMCD1_3_MARK, PORT302_FN2, MSEL4CR_MSEL15_1), - PINMUX_DATA(MCP_D2_MCP_NAF2_MARK, PORT303_FN1), \ - PINMUX_DATA(MMCD1_2_MARK, PORT303_FN2, MSEL4CR_MSEL15_1), - PINMUX_DATA(MCP_D1_MCP_NAF1_MARK, PORT304_FN1), \ - PINMUX_DATA(MMCD1_1_MARK, PORT304_FN2, MSEL4CR_MSEL15_1), - PINMUX_DATA(MCP_D0_MCP_NAF0_MARK, PORT305_FN1), \ - PINMUX_DATA(MMCD1_0_MARK, PORT305_FN2, MSEL4CR_MSEL15_1), - PINMUX_DATA(MCP_NBRSTOUT__MARK, PORT306_FN1), - PINMUX_DATA(MCP_WE0__MCP_FWE_MARK, PORT309_FN1), \ - PINMUX_DATA(MCP_RDWR_MCP_FWE_MARK, PORT309_FN2), - - /* MSEL2 special cases */ - PINMUX_DATA(TSIF2_TS_XX1_MARK, MSEL2CR_MSEL14_0, MSEL2CR_MSEL13_0, - MSEL2CR_MSEL12_0), - PINMUX_DATA(TSIF2_TS_XX2_MARK, MSEL2CR_MSEL14_0, MSEL2CR_MSEL13_0, - MSEL2CR_MSEL12_1), - PINMUX_DATA(TSIF2_TS_XX3_MARK, MSEL2CR_MSEL14_0, MSEL2CR_MSEL13_1, - MSEL2CR_MSEL12_0), - PINMUX_DATA(TSIF2_TS_XX4_MARK, MSEL2CR_MSEL14_0, MSEL2CR_MSEL13_1, - MSEL2CR_MSEL12_1), - PINMUX_DATA(TSIF2_TS_XX5_MARK, MSEL2CR_MSEL14_1, MSEL2CR_MSEL13_0, - MSEL2CR_MSEL12_0), - PINMUX_DATA(TSIF1_TS_XX1_MARK, MSEL2CR_MSEL11_0, MSEL2CR_MSEL10_0, - MSEL2CR_MSEL9_0), - PINMUX_DATA(TSIF1_TS_XX2_MARK, MSEL2CR_MSEL11_0, MSEL2CR_MSEL10_0, - MSEL2CR_MSEL9_1), - PINMUX_DATA(TSIF1_TS_XX3_MARK, MSEL2CR_MSEL11_0, MSEL2CR_MSEL10_1, - MSEL2CR_MSEL9_0), - PINMUX_DATA(TSIF1_TS_XX4_MARK, MSEL2CR_MSEL11_0, MSEL2CR_MSEL10_1, - MSEL2CR_MSEL9_1), - PINMUX_DATA(TSIF1_TS_XX5_MARK, MSEL2CR_MSEL11_1, MSEL2CR_MSEL10_0, - MSEL2CR_MSEL9_0), - PINMUX_DATA(TSIF0_TS_XX1_MARK, MSEL2CR_MSEL8_0, MSEL2CR_MSEL7_0, - MSEL2CR_MSEL6_0), - PINMUX_DATA(TSIF0_TS_XX2_MARK, MSEL2CR_MSEL8_0, MSEL2CR_MSEL7_0, - MSEL2CR_MSEL6_1), - PINMUX_DATA(TSIF0_TS_XX3_MARK, MSEL2CR_MSEL8_0, MSEL2CR_MSEL7_1, - MSEL2CR_MSEL6_0), - PINMUX_DATA(TSIF0_TS_XX4_MARK, MSEL2CR_MSEL8_0, MSEL2CR_MSEL7_1, - MSEL2CR_MSEL6_1), - PINMUX_DATA(TSIF0_TS_XX5_MARK, MSEL2CR_MSEL8_1, MSEL2CR_MSEL7_0, - MSEL2CR_MSEL6_0), - PINMUX_DATA(MST1_TS_XX1_MARK, MSEL2CR_MSEL5_0, MSEL2CR_MSEL4_0, - MSEL2CR_MSEL3_0), - PINMUX_DATA(MST1_TS_XX2_MARK, MSEL2CR_MSEL5_0, MSEL2CR_MSEL4_0, - MSEL2CR_MSEL3_1), - PINMUX_DATA(MST1_TS_XX3_MARK, MSEL2CR_MSEL5_0, MSEL2CR_MSEL4_1, - MSEL2CR_MSEL3_0), - PINMUX_DATA(MST1_TS_XX4_MARK, MSEL2CR_MSEL5_0, MSEL2CR_MSEL4_1, - MSEL2CR_MSEL3_1), - PINMUX_DATA(MST1_TS_XX5_MARK, MSEL2CR_MSEL5_1, MSEL2CR_MSEL4_0, - MSEL2CR_MSEL3_0), - PINMUX_DATA(MST0_TS_XX1_MARK, MSEL2CR_MSEL2_0, MSEL2CR_MSEL1_0, - MSEL2CR_MSEL0_0), - PINMUX_DATA(MST0_TS_XX2_MARK, MSEL2CR_MSEL2_0, MSEL2CR_MSEL1_0, - MSEL2CR_MSEL0_1), - PINMUX_DATA(MST0_TS_XX3_MARK, MSEL2CR_MSEL2_0, MSEL2CR_MSEL1_1, - MSEL2CR_MSEL0_0), - PINMUX_DATA(MST0_TS_XX4_MARK, MSEL2CR_MSEL2_0, MSEL2CR_MSEL1_1, - MSEL2CR_MSEL0_1), - PINMUX_DATA(MST0_TS_XX5_MARK, MSEL2CR_MSEL2_1, MSEL2CR_MSEL1_0, - MSEL2CR_MSEL0_0), - - /* MSEL3 special cases */ - PINMUX_DATA(SDHI0_VCCQ_MC0_ON_MARK, MSEL3CR_MSEL28_1), - PINMUX_DATA(SDHI0_VCCQ_MC0_OFF_MARK, MSEL3CR_MSEL28_0), - PINMUX_DATA(DEBUG_MON_VIO_MARK, MSEL3CR_MSEL15_0), - PINMUX_DATA(DEBUG_MON_LCDD_MARK, MSEL3CR_MSEL15_1), - PINMUX_DATA(LCDC_LCDC0_MARK, MSEL3CR_MSEL6_0), - PINMUX_DATA(LCDC_LCDC1_MARK, MSEL3CR_MSEL6_1), - - /* MSEL4 special cases */ - PINMUX_DATA(IRQ9_MEM_INT_MARK, MSEL4CR_MSEL29_0), - PINMUX_DATA(IRQ9_MCP_INT_MARK, MSEL4CR_MSEL29_1), - PINMUX_DATA(A11_MARK, MSEL4CR_MSEL13_0, MSEL4CR_MSEL12_0), - PINMUX_DATA(KEYOUT8_MARK, MSEL4CR_MSEL13_0, MSEL4CR_MSEL12_1), - PINMUX_DATA(TPU4TO3_MARK, MSEL4CR_MSEL13_1, MSEL4CR_MSEL12_0), - PINMUX_DATA(RESETA_N_PU_ON_MARK, MSEL4CR_MSEL4_0), - PINMUX_DATA(RESETA_N_PU_OFF_MARK, MSEL4CR_MSEL4_1), - PINMUX_DATA(EDBGREQ_PD_MARK, MSEL4CR_MSEL1_0), - PINMUX_DATA(EDBGREQ_PU_MARK, MSEL4CR_MSEL1_1), - - /* Functions with pull-ups */ - PINMUX_DATA(KEYIN0_PU_MARK, PORT66_FN2, PORT66_IN_PU), - PINMUX_DATA(KEYIN1_PU_MARK, PORT67_FN2, PORT67_IN_PU), - PINMUX_DATA(KEYIN2_PU_MARK, PORT68_FN2, PORT68_IN_PU), - PINMUX_DATA(KEYIN3_PU_MARK, PORT69_FN2, PORT69_IN_PU), - PINMUX_DATA(KEYIN4_PU_MARK, PORT70_FN2, PORT70_IN_PU), - PINMUX_DATA(KEYIN5_PU_MARK, PORT71_FN2, PORT71_IN_PU), - PINMUX_DATA(KEYIN6_PU_MARK, PORT72_FN2, PORT72_IN_PU), - PINMUX_DATA(KEYIN7_PU_MARK, PORT73_FN2, PORT73_IN_PU), - - PINMUX_DATA(SDHICD0_PU_MARK, PORT251_FN1, PORT251_IN_PU), - PINMUX_DATA(SDHID0_0_PU_MARK, PORT252_FN1, PORT252_IN_PU), - PINMUX_DATA(SDHID0_1_PU_MARK, PORT253_FN1, PORT253_IN_PU), - PINMUX_DATA(SDHID0_2_PU_MARK, PORT254_FN1, PORT254_IN_PU), - PINMUX_DATA(SDHID0_3_PU_MARK, PORT255_FN1, PORT255_IN_PU), - PINMUX_DATA(SDHICMD0_PU_MARK, PORT256_FN1, PORT256_IN_PU), - PINMUX_DATA(SDHIWP0_PU_MARK, PORT257_FN1, PORT256_IN_PU), - PINMUX_DATA(SDHID1_0_PU_MARK, PORT259_FN1, PORT259_IN_PU), - PINMUX_DATA(SDHID1_1_PU_MARK, PORT260_FN1, PORT260_IN_PU), - PINMUX_DATA(SDHID1_2_PU_MARK, PORT261_FN1, PORT261_IN_PU), - PINMUX_DATA(SDHID1_3_PU_MARK, PORT262_FN1, PORT262_IN_PU), - PINMUX_DATA(SDHICMD1_PU_MARK, PORT263_FN1, PORT263_IN_PU), - PINMUX_DATA(SDHID2_0_PU_MARK, PORT265_FN1, PORT265_IN_PU), - PINMUX_DATA(SDHID2_1_PU_MARK, PORT266_FN1, PORT266_IN_PU), - PINMUX_DATA(SDHID2_2_PU_MARK, PORT267_FN1, PORT267_IN_PU), - PINMUX_DATA(SDHID2_3_PU_MARK, PORT268_FN1, PORT268_IN_PU), - PINMUX_DATA(SDHICMD2_PU_MARK, PORT269_FN1, PORT269_IN_PU), - - PINMUX_DATA(MMCCMD0_PU_MARK, PORT279_FN1, PORT279_IN_PU, - MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT297_IN_PU, - MSEL4CR_MSEL15_1), - - PINMUX_DATA(MMCD0_0_PU_MARK, - PORT271_FN1, PORT271_IN_PU, MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_1_PU_MARK, - PORT272_FN1, PORT272_IN_PU, MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_2_PU_MARK, - PORT273_FN1, PORT273_IN_PU, MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_3_PU_MARK, - PORT274_FN1, PORT274_IN_PU, MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_4_PU_MARK, - PORT275_FN1, PORT275_IN_PU, MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_5_PU_MARK, - PORT276_FN1, PORT276_IN_PU, MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_6_PU_MARK, - PORT277_FN1, PORT277_IN_PU, MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_7_PU_MARK, - PORT278_FN1, PORT278_IN_PU, MSEL4CR_MSEL15_0), - - PINMUX_DATA(FSIBISLD_PU_MARK, PORT39_FN1, PORT39_IN_PU), - PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU), - PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU), - PINMUX_DATA(FSIAIBT_PU_MARK, PORT51_FN5, PORT51_IN_PU), - PINMUX_DATA(FSIAISLD_PU_MARK, PORT55_FN1, PORT55_IN_PU), -}; - -static struct pinmux_gpio pinmux_gpios[] = { - GPIO_PORT_ALL(), - - /* Table 25-1 (Functions 0-7) */ - GPIO_FN(VBUS_0), - GPIO_FN(GPI0), - GPIO_FN(GPI1), - GPIO_FN(GPI2), - GPIO_FN(GPI3), - GPIO_FN(GPI4), - GPIO_FN(GPI5), - GPIO_FN(GPI6), - GPIO_FN(GPI7), - GPIO_FN(SCIFA7_RXD), - GPIO_FN(SCIFA7_CTS_), - GPIO_FN(GPO7), \ - GPIO_FN(MFG0_OUT2), - GPIO_FN(GPO6), \ - GPIO_FN(MFG1_OUT2), - GPIO_FN(GPO5), \ - GPIO_FN(SCIFA0_SCK), \ - GPIO_FN(FSICOSLDT3), \ - GPIO_FN(PORT16_VIO_CKOR), - GPIO_FN(SCIFA0_TXD), - GPIO_FN(SCIFA7_TXD), - GPIO_FN(SCIFA7_RTS_), \ - GPIO_FN(PORT19_VIO_CKO2), - GPIO_FN(GPO0), - GPIO_FN(GPO1), - GPIO_FN(GPO2), \ - GPIO_FN(STATUS0), - GPIO_FN(GPO3), \ - GPIO_FN(STATUS1), - GPIO_FN(GPO4), \ - GPIO_FN(STATUS2), - GPIO_FN(VINT), - GPIO_FN(TCKON), - GPIO_FN(XDVFS1), \ - GPIO_FN(PORT27_I2C_SCL2), \ - GPIO_FN(PORT27_I2C_SCL3), \ - GPIO_FN(MFG0_OUT1), \ - GPIO_FN(PORT27_IROUT), - GPIO_FN(XDVFS2), \ - GPIO_FN(PORT28_I2C_SDA2), \ - GPIO_FN(PORT28_I2C_SDA3), \ - GPIO_FN(PORT28_TPU1TO1), - GPIO_FN(SIM_RST), \ - GPIO_FN(PORT29_TPU1TO1), - GPIO_FN(SIM_CLK), \ - GPIO_FN(PORT30_VIO_CKOR), - GPIO_FN(SIM_D), \ - GPIO_FN(PORT31_IROUT), - GPIO_FN(SCIFA4_TXD), - GPIO_FN(SCIFA4_RXD), \ - GPIO_FN(XWUP), - GPIO_FN(SCIFA4_RTS_), - GPIO_FN(SCIFA4_CTS_), - GPIO_FN(FSIBOBT), \ - GPIO_FN(FSIBIBT), - GPIO_FN(FSIBOLR), \ - GPIO_FN(FSIBILR), - GPIO_FN(FSIBOSLD), - GPIO_FN(FSIBISLD), - GPIO_FN(VACK), - GPIO_FN(XTAL1L), - GPIO_FN(SCIFA0_RTS_), \ - GPIO_FN(FSICOSLDT2), - GPIO_FN(SCIFA0_RXD), - GPIO_FN(SCIFA0_CTS_), \ - GPIO_FN(FSICOSLDT1), - GPIO_FN(FSICOBT), \ - GPIO_FN(FSICIBT), \ - GPIO_FN(FSIDOBT), \ - GPIO_FN(FSIDIBT), - GPIO_FN(FSICOLR), \ - GPIO_FN(FSICILR), \ - GPIO_FN(FSIDOLR), \ - GPIO_FN(FSIDILR), - GPIO_FN(FSICOSLD), \ - GPIO_FN(PORT47_FSICSPDIF), - GPIO_FN(FSICISLD), \ - GPIO_FN(FSIDISLD), - GPIO_FN(FSIACK), \ - GPIO_FN(PORT49_IRDA_OUT), \ - GPIO_FN(PORT49_IROUT), \ - GPIO_FN(FSIAOMC), - GPIO_FN(FSIAOLR), \ - GPIO_FN(BBIF2_TSYNC2), \ - GPIO_FN(TPU2TO2), \ - GPIO_FN(FSIAILR), - - GPIO_FN(FSIAOBT), \ - GPIO_FN(BBIF2_TSCK2), \ - GPIO_FN(TPU2TO3), \ - GPIO_FN(FSIAIBT), - GPIO_FN(FSIAOSLD), \ - GPIO_FN(BBIF2_TXD2), - GPIO_FN(FSIASPDIF), \ - GPIO_FN(PORT53_IRDA_IN), \ - GPIO_FN(TPU3TO3), \ - GPIO_FN(FSIBSPDIF), \ - GPIO_FN(PORT53_FSICSPDIF), - GPIO_FN(FSIBCK), \ - GPIO_FN(PORT54_IRDA_FIRSEL), \ - GPIO_FN(TPU3TO2), \ - GPIO_FN(FSIBOMC), \ - GPIO_FN(FSICCK), \ - GPIO_FN(FSICOMC), - GPIO_FN(FSIAISLD), \ - GPIO_FN(TPU0TO0), - GPIO_FN(A0), \ - GPIO_FN(BS_), - GPIO_FN(A12), \ - GPIO_FN(PORT58_KEYOUT7), \ - GPIO_FN(TPU4TO2), - GPIO_FN(A13), \ - GPIO_FN(PORT59_KEYOUT6), \ - GPIO_FN(TPU0TO1), - GPIO_FN(A14), \ - GPIO_FN(KEYOUT5), - GPIO_FN(A15), \ - GPIO_FN(KEYOUT4), - GPIO_FN(A16), \ - GPIO_FN(KEYOUT3), \ - GPIO_FN(MSIOF0_SS1), - GPIO_FN(A17), \ - GPIO_FN(KEYOUT2), \ - GPIO_FN(MSIOF0_TSYNC), - GPIO_FN(A18), \ - GPIO_FN(KEYOUT1), \ - GPIO_FN(MSIOF0_TSCK), - GPIO_FN(A19), \ - GPIO_FN(KEYOUT0), \ - GPIO_FN(MSIOF0_TXD), - GPIO_FN(A20), \ - GPIO_FN(KEYIN0), \ - GPIO_FN(MSIOF0_RSCK), - GPIO_FN(A21), \ - GPIO_FN(KEYIN1), \ - GPIO_FN(MSIOF0_RSYNC), - GPIO_FN(A22), \ - GPIO_FN(KEYIN2), \ - GPIO_FN(MSIOF0_MCK0), - GPIO_FN(A23), \ - GPIO_FN(KEYIN3), \ - GPIO_FN(MSIOF0_MCK1), - GPIO_FN(A24), \ - GPIO_FN(KEYIN4), \ - GPIO_FN(MSIOF0_RXD), - GPIO_FN(A25), \ - GPIO_FN(KEYIN5), \ - GPIO_FN(MSIOF0_SS2), - GPIO_FN(A26), \ - GPIO_FN(KEYIN6), - GPIO_FN(KEYIN7), - GPIO_FN(D0_NAF0), - GPIO_FN(D1_NAF1), - GPIO_FN(D2_NAF2), - GPIO_FN(D3_NAF3), - GPIO_FN(D4_NAF4), - GPIO_FN(D5_NAF5), - GPIO_FN(D6_NAF6), - GPIO_FN(D7_NAF7), - GPIO_FN(D8_NAF8), - GPIO_FN(D9_NAF9), - GPIO_FN(D10_NAF10), - GPIO_FN(D11_NAF11), - GPIO_FN(D12_NAF12), - GPIO_FN(D13_NAF13), - GPIO_FN(D14_NAF14), - GPIO_FN(D15_NAF15), - GPIO_FN(CS4_), - GPIO_FN(CS5A_), \ - GPIO_FN(PORT91_RDWR), - GPIO_FN(CS5B_), \ - GPIO_FN(FCE1_), - GPIO_FN(CS6B_), \ - GPIO_FN(DACK0), - GPIO_FN(FCE0_), \ - GPIO_FN(CS6A_), - GPIO_FN(WAIT_), \ - GPIO_FN(DREQ0), - GPIO_FN(RD__FSC), - GPIO_FN(WE0__FWE), \ - GPIO_FN(RDWR_FWE), - GPIO_FN(WE1_), - GPIO_FN(FRB), - GPIO_FN(CKO), - GPIO_FN(NBRSTOUT_), - GPIO_FN(NBRST_), - GPIO_FN(BBIF2_TXD), - GPIO_FN(BBIF2_RXD), - GPIO_FN(BBIF2_SYNC), - GPIO_FN(BBIF2_SCK), - GPIO_FN(SCIFA3_CTS_), \ - GPIO_FN(MFG3_IN2), - GPIO_FN(SCIFA3_RXD), \ - GPIO_FN(MFG3_IN1), - GPIO_FN(BBIF1_SS2), \ - GPIO_FN(SCIFA3_RTS_), \ - GPIO_FN(MFG3_OUT1), - GPIO_FN(SCIFA3_TXD), - GPIO_FN(HSI_RX_DATA), \ - GPIO_FN(BBIF1_RXD), - GPIO_FN(HSI_TX_WAKE), \ - GPIO_FN(BBIF1_TSCK), - GPIO_FN(HSI_TX_DATA), \ - GPIO_FN(BBIF1_TSYNC), - GPIO_FN(HSI_TX_READY), \ - GPIO_FN(BBIF1_TXD), - GPIO_FN(HSI_RX_READY), \ - GPIO_FN(BBIF1_RSCK), \ - GPIO_FN(PORT115_I2C_SCL2), \ - GPIO_FN(PORT115_I2C_SCL3), - GPIO_FN(HSI_RX_WAKE), \ - GPIO_FN(BBIF1_RSYNC), \ - GPIO_FN(PORT116_I2C_SDA2), \ - GPIO_FN(PORT116_I2C_SDA3), - GPIO_FN(HSI_RX_FLAG), \ - GPIO_FN(BBIF1_SS1), \ - GPIO_FN(BBIF1_FLOW), - GPIO_FN(HSI_TX_FLAG), - GPIO_FN(VIO_VD), \ - GPIO_FN(PORT128_LCD2VSYN), \ - GPIO_FN(VIO2_VD), \ - GPIO_FN(LCD2D0), - - GPIO_FN(VIO_HD), \ - GPIO_FN(PORT129_LCD2HSYN), \ - GPIO_FN(PORT129_LCD2CS_), \ - GPIO_FN(VIO2_HD), \ - GPIO_FN(LCD2D1), - GPIO_FN(VIO_D0), \ - GPIO_FN(PORT130_MSIOF2_RXD), \ - GPIO_FN(LCD2D10), - GPIO_FN(VIO_D1), \ - GPIO_FN(PORT131_KEYOUT6), \ - GPIO_FN(PORT131_MSIOF2_SS1), \ - GPIO_FN(PORT131_KEYOUT11), \ - GPIO_FN(LCD2D11), - GPIO_FN(VIO_D2), \ - GPIO_FN(PORT132_KEYOUT7), \ - GPIO_FN(PORT132_MSIOF2_SS2), \ - GPIO_FN(PORT132_KEYOUT10), \ - GPIO_FN(LCD2D12), - GPIO_FN(VIO_D3), \ - GPIO_FN(MSIOF2_TSYNC), \ - GPIO_FN(LCD2D13), - GPIO_FN(VIO_D4), \ - GPIO_FN(MSIOF2_TXD), \ - GPIO_FN(LCD2D14), - GPIO_FN(VIO_D5), \ - GPIO_FN(MSIOF2_TSCK), \ - GPIO_FN(LCD2D15), - GPIO_FN(VIO_D6), \ - GPIO_FN(PORT136_KEYOUT8), \ - GPIO_FN(LCD2D16), - GPIO_FN(VIO_D7), \ - GPIO_FN(PORT137_KEYOUT9), \ - GPIO_FN(LCD2D17), - GPIO_FN(VIO_D8), \ - GPIO_FN(PORT138_KEYOUT8), \ - GPIO_FN(VIO2_D0), \ - GPIO_FN(LCD2D6), - GPIO_FN(VIO_D9), \ - GPIO_FN(PORT139_KEYOUT9), \ - GPIO_FN(VIO2_D1), \ - GPIO_FN(LCD2D7), - GPIO_FN(VIO_D10), \ - GPIO_FN(TPU0TO2), \ - GPIO_FN(VIO2_D2), \ - GPIO_FN(LCD2D8), - GPIO_FN(VIO_D11), \ - GPIO_FN(TPU0TO3), \ - GPIO_FN(VIO2_D3), \ - GPIO_FN(LCD2D9), - GPIO_FN(VIO_D12), \ - GPIO_FN(PORT142_KEYOUT10), \ - GPIO_FN(VIO2_D4), \ - GPIO_FN(LCD2D2), - GPIO_FN(VIO_D13), \ - GPIO_FN(PORT143_KEYOUT11), \ - GPIO_FN(PORT143_KEYOUT6), \ - GPIO_FN(VIO2_D5), \ - GPIO_FN(LCD2D3), - GPIO_FN(VIO_D14), \ - GPIO_FN(PORT144_KEYOUT7), \ - GPIO_FN(VIO2_D6), \ - GPIO_FN(LCD2D4), - GPIO_FN(VIO_D15), \ - GPIO_FN(TPU1TO3), \ - GPIO_FN(PORT145_LCD2DISP), \ - GPIO_FN(PORT145_LCD2RS), \ - GPIO_FN(VIO2_D7), \ - GPIO_FN(LCD2D5), - GPIO_FN(VIO_CLK), \ - GPIO_FN(LCD2DCK), \ - GPIO_FN(PORT146_LCD2WR_), \ - GPIO_FN(VIO2_CLK), \ - GPIO_FN(LCD2D18), - GPIO_FN(VIO_FIELD), \ - GPIO_FN(LCD2RD_), \ - GPIO_FN(VIO2_FIELD), \ - GPIO_FN(LCD2D19), - GPIO_FN(VIO_CKO), - GPIO_FN(A27), \ - GPIO_FN(PORT149_RDWR), \ - GPIO_FN(MFG0_IN1), \ - GPIO_FN(PORT149_KEYOUT9), - GPIO_FN(MFG0_IN2), - GPIO_FN(TS_SPSYNC3), \ - GPIO_FN(MSIOF2_RSCK), - GPIO_FN(TS_SDAT3), \ - GPIO_FN(MSIOF2_RSYNC), - GPIO_FN(TPU1TO2), \ - GPIO_FN(TS_SDEN3), \ - GPIO_FN(PORT153_MSIOF2_SS1), - GPIO_FN(SCIFA2_TXD1), \ - GPIO_FN(MSIOF2_MCK0), - GPIO_FN(SCIFA2_RXD1), \ - GPIO_FN(MSIOF2_MCK1), - GPIO_FN(SCIFA2_RTS1_), \ - GPIO_FN(PORT156_MSIOF2_SS2), - GPIO_FN(SCIFA2_CTS1_), \ - GPIO_FN(PORT157_MSIOF2_RXD), - GPIO_FN(DINT_), \ - GPIO_FN(SCIFA2_SCK1), \ - GPIO_FN(TS_SCK3), - GPIO_FN(PORT159_SCIFB_SCK), \ - GPIO_FN(PORT159_SCIFA5_SCK), \ - GPIO_FN(NMI), - GPIO_FN(PORT160_SCIFB_TXD), \ - GPIO_FN(PORT160_SCIFA5_TXD), - GPIO_FN(PORT161_SCIFB_CTS_), \ - GPIO_FN(PORT161_SCIFA5_CTS_), - GPIO_FN(PORT162_SCIFB_RXD), \ - GPIO_FN(PORT162_SCIFA5_RXD), - GPIO_FN(PORT163_SCIFB_RTS_), \ - GPIO_FN(PORT163_SCIFA5_RTS_), \ - GPIO_FN(TPU3TO0), - GPIO_FN(LCDD0), - GPIO_FN(LCDD1), \ - GPIO_FN(PORT193_SCIFA5_CTS_), \ - GPIO_FN(BBIF2_TSYNC1), - GPIO_FN(LCDD2), \ - GPIO_FN(PORT194_SCIFA5_RTS_), \ - GPIO_FN(BBIF2_TSCK1), - GPIO_FN(LCDD3), \ - GPIO_FN(PORT195_SCIFA5_RXD), \ - GPIO_FN(BBIF2_TXD1), - GPIO_FN(LCDD4), \ - GPIO_FN(PORT196_SCIFA5_TXD), - GPIO_FN(LCDD5), \ - GPIO_FN(PORT197_SCIFA5_SCK), \ - GPIO_FN(MFG2_OUT2), \ - GPIO_FN(TPU2TO1), - GPIO_FN(LCDD6), - GPIO_FN(LCDD7), \ - GPIO_FN(TPU4TO1), \ - GPIO_FN(MFG4_OUT2), - GPIO_FN(LCDD8), \ - GPIO_FN(D16), - GPIO_FN(LCDD9), \ - GPIO_FN(D17), - GPIO_FN(LCDD10), \ - GPIO_FN(D18), - GPIO_FN(LCDD11), \ - GPIO_FN(D19), - GPIO_FN(LCDD12), \ - GPIO_FN(D20), - GPIO_FN(LCDD13), \ - GPIO_FN(D21), - GPIO_FN(LCDD14), \ - GPIO_FN(D22), - GPIO_FN(LCDD15), \ - GPIO_FN(PORT207_MSIOF0L_SS1), \ - GPIO_FN(D23), - GPIO_FN(LCDD16), \ - GPIO_FN(PORT208_MSIOF0L_SS2), \ - GPIO_FN(D24), - GPIO_FN(LCDD17), \ - GPIO_FN(D25), - GPIO_FN(LCDD18), \ - GPIO_FN(DREQ2), \ - GPIO_FN(PORT210_MSIOF0L_SS1), \ - GPIO_FN(D26), - GPIO_FN(LCDD19), \ - GPIO_FN(PORT211_MSIOF0L_SS2), \ - GPIO_FN(D27), - GPIO_FN(LCDD20), \ - GPIO_FN(TS_SPSYNC1), \ - GPIO_FN(MSIOF0L_MCK0), \ - GPIO_FN(D28), - GPIO_FN(LCDD21), \ - GPIO_FN(TS_SDAT1), \ - GPIO_FN(MSIOF0L_MCK1), \ - GPIO_FN(D29), - GPIO_FN(LCDD22), \ - GPIO_FN(TS_SDEN1), \ - GPIO_FN(MSIOF0L_RSCK), \ - GPIO_FN(D30), - GPIO_FN(LCDD23), \ - GPIO_FN(TS_SCK1), \ - GPIO_FN(MSIOF0L_RSYNC), \ - GPIO_FN(D31), - GPIO_FN(LCDDCK), \ - GPIO_FN(LCDWR_), - GPIO_FN(LCDRD_), \ - GPIO_FN(DACK2), \ - GPIO_FN(PORT217_LCD2RS), \ - GPIO_FN(MSIOF0L_TSYNC), \ - GPIO_FN(VIO2_FIELD3), \ - GPIO_FN(PORT217_LCD2DISP), - GPIO_FN(LCDHSYN), \ - GPIO_FN(LCDCS_), \ - GPIO_FN(LCDCS2_), \ - GPIO_FN(DACK3), \ - GPIO_FN(PORT218_VIO_CKOR), - GPIO_FN(LCDDISP), \ - GPIO_FN(LCDRS), \ - GPIO_FN(PORT219_LCD2WR_), \ - GPIO_FN(DREQ3), \ - GPIO_FN(MSIOF0L_TSCK), \ - GPIO_FN(VIO2_CLK3), \ - GPIO_FN(LCD2DCK_2), - GPIO_FN(LCDVSYN), \ - GPIO_FN(LCDVSYN2), - GPIO_FN(LCDLCLK), \ - GPIO_FN(DREQ1), \ - GPIO_FN(PORT221_LCD2CS_), \ - GPIO_FN(PWEN), \ - GPIO_FN(MSIOF0L_RXD), \ - GPIO_FN(VIO2_HD3), \ - GPIO_FN(PORT221_LCD2HSYN), - GPIO_FN(LCDDON), \ - GPIO_FN(LCDDON2), \ - GPIO_FN(DACK1), \ - GPIO_FN(OVCN), \ - GPIO_FN(MSIOF0L_TXD), \ - GPIO_FN(VIO2_VD3), \ - GPIO_FN(PORT222_LCD2VSYN), - - GPIO_FN(SCIFA1_TXD), \ - GPIO_FN(OVCN2), - GPIO_FN(EXTLP), \ - GPIO_FN(SCIFA1_SCK), \ - GPIO_FN(PORT226_VIO_CKO2), - GPIO_FN(SCIFA1_RTS_), \ - GPIO_FN(IDIN), - GPIO_FN(SCIFA1_RXD), - GPIO_FN(SCIFA1_CTS_), \ - GPIO_FN(MFG1_IN1), - GPIO_FN(MSIOF1_TXD), \ - GPIO_FN(SCIFA2_TXD2), - GPIO_FN(MSIOF1_TSYNC), \ - GPIO_FN(SCIFA2_CTS2_), - GPIO_FN(MSIOF1_TSCK), \ - GPIO_FN(SCIFA2_SCK2), - GPIO_FN(MSIOF1_RXD), \ - GPIO_FN(SCIFA2_RXD2), - GPIO_FN(MSIOF1_RSCK), \ - GPIO_FN(SCIFA2_RTS2_), \ - GPIO_FN(VIO2_CLK2), \ - GPIO_FN(LCD2D20), - GPIO_FN(MSIOF1_RSYNC), \ - GPIO_FN(MFG1_IN2), \ - GPIO_FN(VIO2_VD2), \ - GPIO_FN(LCD2D21), - GPIO_FN(MSIOF1_MCK0), \ - GPIO_FN(PORT236_I2C_SDA2), - GPIO_FN(MSIOF1_MCK1), \ - GPIO_FN(PORT237_I2C_SCL2), - GPIO_FN(MSIOF1_SS1), \ - GPIO_FN(VIO2_FIELD2), \ - GPIO_FN(LCD2D22), - GPIO_FN(MSIOF1_SS2), \ - GPIO_FN(VIO2_HD2), \ - GPIO_FN(LCD2D23), - GPIO_FN(SCIFA6_TXD), - GPIO_FN(PORT241_IRDA_OUT), \ - GPIO_FN(PORT241_IROUT), \ - GPIO_FN(MFG4_OUT1), \ - GPIO_FN(TPU4TO0), - GPIO_FN(PORT242_IRDA_IN), \ - GPIO_FN(MFG4_IN2), - GPIO_FN(PORT243_IRDA_FIRSEL), \ - GPIO_FN(PORT243_VIO_CKO2), - GPIO_FN(PORT244_SCIFA5_CTS_), \ - GPIO_FN(MFG2_IN1), \ - GPIO_FN(PORT244_SCIFB_CTS_), \ - GPIO_FN(MSIOF2R_RXD), - GPIO_FN(PORT245_SCIFA5_RTS_), \ - GPIO_FN(MFG2_IN2), \ - GPIO_FN(PORT245_SCIFB_RTS_), \ - GPIO_FN(MSIOF2R_TXD), - GPIO_FN(PORT246_SCIFA5_RXD), \ - GPIO_FN(MFG1_OUT1), \ - GPIO_FN(PORT246_SCIFB_RXD), \ - GPIO_FN(TPU1TO0), - GPIO_FN(PORT247_SCIFA5_TXD), \ - GPIO_FN(MFG3_OUT2), \ - GPIO_FN(PORT247_SCIFB_TXD), \ - GPIO_FN(TPU3TO1), - GPIO_FN(PORT248_SCIFA5_SCK), \ - GPIO_FN(MFG2_OUT1), \ - GPIO_FN(PORT248_SCIFB_SCK), \ - GPIO_FN(TPU2TO0), \ - GPIO_FN(PORT248_I2C_SCL3), \ - GPIO_FN(MSIOF2R_TSCK), - GPIO_FN(PORT249_IROUT), \ - GPIO_FN(MFG4_IN1), \ - GPIO_FN(PORT249_I2C_SDA3), \ - GPIO_FN(MSIOF2R_TSYNC), - GPIO_FN(SDHICLK0), - GPIO_FN(SDHICD0), - GPIO_FN(SDHID0_0), - GPIO_FN(SDHID0_1), - GPIO_FN(SDHID0_2), - GPIO_FN(SDHID0_3), - GPIO_FN(SDHICMD0), - GPIO_FN(SDHIWP0), - GPIO_FN(SDHICLK1), - GPIO_FN(SDHID1_0), \ - GPIO_FN(TS_SPSYNC2), - GPIO_FN(SDHID1_1), \ - GPIO_FN(TS_SDAT2), - GPIO_FN(SDHID1_2), \ - GPIO_FN(TS_SDEN2), - GPIO_FN(SDHID1_3), \ - GPIO_FN(TS_SCK2), - GPIO_FN(SDHICMD1), - GPIO_FN(SDHICLK2), - GPIO_FN(SDHID2_0), \ - GPIO_FN(TS_SPSYNC4), - GPIO_FN(SDHID2_1), \ - GPIO_FN(TS_SDAT4), - GPIO_FN(SDHID2_2), \ - GPIO_FN(TS_SDEN4), - GPIO_FN(SDHID2_3), \ - GPIO_FN(TS_SCK4), - GPIO_FN(SDHICMD2), - GPIO_FN(MMCCLK0), - GPIO_FN(MMCD0_0), - GPIO_FN(MMCD0_1), - GPIO_FN(MMCD0_2), - GPIO_FN(MMCD0_3), - GPIO_FN(MMCD0_4), \ - GPIO_FN(TS_SPSYNC5), - GPIO_FN(MMCD0_5), \ - GPIO_FN(TS_SDAT5), - GPIO_FN(MMCD0_6), \ - GPIO_FN(TS_SDEN5), - GPIO_FN(MMCD0_7), \ - GPIO_FN(TS_SCK5), - GPIO_FN(MMCCMD0), - GPIO_FN(RESETOUTS_), \ - GPIO_FN(EXTAL2OUT), - GPIO_FN(MCP_WAIT__MCP_FRB), - GPIO_FN(MCP_CKO), \ - GPIO_FN(MMCCLK1), - GPIO_FN(MCP_D15_MCP_NAF15), - GPIO_FN(MCP_D14_MCP_NAF14), - GPIO_FN(MCP_D13_MCP_NAF13), - GPIO_FN(MCP_D12_MCP_NAF12), - GPIO_FN(MCP_D11_MCP_NAF11), - GPIO_FN(MCP_D10_MCP_NAF10), - GPIO_FN(MCP_D9_MCP_NAF9), - GPIO_FN(MCP_D8_MCP_NAF8), \ - GPIO_FN(MMCCMD1), - GPIO_FN(MCP_D7_MCP_NAF7), \ - GPIO_FN(MMCD1_7), - - GPIO_FN(MCP_D6_MCP_NAF6), \ - GPIO_FN(MMCD1_6), - GPIO_FN(MCP_D5_MCP_NAF5), \ - GPIO_FN(MMCD1_5), - GPIO_FN(MCP_D4_MCP_NAF4), \ - GPIO_FN(MMCD1_4), - GPIO_FN(MCP_D3_MCP_NAF3), \ - GPIO_FN(MMCD1_3), - GPIO_FN(MCP_D2_MCP_NAF2), \ - GPIO_FN(MMCD1_2), - GPIO_FN(MCP_D1_MCP_NAF1), \ - GPIO_FN(MMCD1_1), - GPIO_FN(MCP_D0_MCP_NAF0), \ - GPIO_FN(MMCD1_0), - GPIO_FN(MCP_NBRSTOUT_), - GPIO_FN(MCP_WE0__MCP_FWE), \ - GPIO_FN(MCP_RDWR_MCP_FWE), - - /* MSEL2 special cases */ - GPIO_FN(TSIF2_TS_XX1), - GPIO_FN(TSIF2_TS_XX2), - GPIO_FN(TSIF2_TS_XX3), - GPIO_FN(TSIF2_TS_XX4), - GPIO_FN(TSIF2_TS_XX5), - GPIO_FN(TSIF1_TS_XX1), - GPIO_FN(TSIF1_TS_XX2), - GPIO_FN(TSIF1_TS_XX3), - GPIO_FN(TSIF1_TS_XX4), - GPIO_FN(TSIF1_TS_XX5), - GPIO_FN(TSIF0_TS_XX1), - GPIO_FN(TSIF0_TS_XX2), - GPIO_FN(TSIF0_TS_XX3), - GPIO_FN(TSIF0_TS_XX4), - GPIO_FN(TSIF0_TS_XX5), - GPIO_FN(MST1_TS_XX1), - GPIO_FN(MST1_TS_XX2), - GPIO_FN(MST1_TS_XX3), - GPIO_FN(MST1_TS_XX4), - GPIO_FN(MST1_TS_XX5), - GPIO_FN(MST0_TS_XX1), - GPIO_FN(MST0_TS_XX2), - GPIO_FN(MST0_TS_XX3), - GPIO_FN(MST0_TS_XX4), - GPIO_FN(MST0_TS_XX5), - - /* MSEL3 special cases */ - GPIO_FN(SDHI0_VCCQ_MC0_ON), - GPIO_FN(SDHI0_VCCQ_MC0_OFF), - GPIO_FN(DEBUG_MON_VIO), - GPIO_FN(DEBUG_MON_LCDD), - GPIO_FN(LCDC_LCDC0), - GPIO_FN(LCDC_LCDC1), - - /* MSEL4 special cases */ - GPIO_FN(IRQ9_MEM_INT), - GPIO_FN(IRQ9_MCP_INT), - GPIO_FN(A11), - GPIO_FN(KEYOUT8), - GPIO_FN(TPU4TO3), - GPIO_FN(RESETA_N_PU_ON), - GPIO_FN(RESETA_N_PU_OFF), - GPIO_FN(EDBGREQ_PD), - GPIO_FN(EDBGREQ_PU), - - /* Functions with pull-ups */ - GPIO_FN(KEYIN0_PU), - GPIO_FN(KEYIN1_PU), - GPIO_FN(KEYIN2_PU), - GPIO_FN(KEYIN3_PU), - GPIO_FN(KEYIN4_PU), - GPIO_FN(KEYIN5_PU), - GPIO_FN(KEYIN6_PU), - GPIO_FN(KEYIN7_PU), - GPIO_FN(SDHICD0_PU), - GPIO_FN(SDHID0_0_PU), - GPIO_FN(SDHID0_1_PU), - GPIO_FN(SDHID0_2_PU), - GPIO_FN(SDHID0_3_PU), - GPIO_FN(SDHICMD0_PU), - GPIO_FN(SDHIWP0_PU), - GPIO_FN(SDHID1_0_PU), - GPIO_FN(SDHID1_1_PU), - GPIO_FN(SDHID1_2_PU), - GPIO_FN(SDHID1_3_PU), - GPIO_FN(SDHICMD1_PU), - GPIO_FN(SDHID2_0_PU), - GPIO_FN(SDHID2_1_PU), - GPIO_FN(SDHID2_2_PU), - GPIO_FN(SDHID2_3_PU), - GPIO_FN(SDHICMD2_PU), - GPIO_FN(MMCCMD0_PU), - GPIO_FN(MMCCMD1_PU), - GPIO_FN(MMCD0_0_PU), - GPIO_FN(MMCD0_1_PU), - GPIO_FN(MMCD0_2_PU), - GPIO_FN(MMCD0_3_PU), - GPIO_FN(MMCD0_4_PU), - GPIO_FN(MMCD0_5_PU), - GPIO_FN(MMCD0_6_PU), - GPIO_FN(MMCD0_7_PU), - GPIO_FN(FSIACK_PU), - GPIO_FN(FSIAILR_PU), - GPIO_FN(FSIAIBT_PU), - GPIO_FN(FSIAISLD_PU), -}; - -static struct pinmux_cfg_reg pinmux_config_regs[] = { - PORTCR(0, 0xe6050000), /* PORT0CR */ - PORTCR(1, 0xe6050001), /* PORT1CR */ - PORTCR(2, 0xe6050002), /* PORT2CR */ - PORTCR(3, 0xe6050003), /* PORT3CR */ - PORTCR(4, 0xe6050004), /* PORT4CR */ - PORTCR(5, 0xe6050005), /* PORT5CR */ - PORTCR(6, 0xe6050006), /* PORT6CR */ - PORTCR(7, 0xe6050007), /* PORT7CR */ - PORTCR(8, 0xe6050008), /* PORT8CR */ - PORTCR(9, 0xe6050009), /* PORT9CR */ - - PORTCR(10, 0xe605000a), /* PORT10CR */ - PORTCR(11, 0xe605000b), /* PORT11CR */ - PORTCR(12, 0xe605000c), /* PORT12CR */ - PORTCR(13, 0xe605000d), /* PORT13CR */ - PORTCR(14, 0xe605000e), /* PORT14CR */ - PORTCR(15, 0xe605000f), /* PORT15CR */ - PORTCR(16, 0xe6050010), /* PORT16CR */ - PORTCR(17, 0xe6050011), /* PORT17CR */ - PORTCR(18, 0xe6050012), /* PORT18CR */ - PORTCR(19, 0xe6050013), /* PORT19CR */ - - PORTCR(20, 0xe6050014), /* PORT20CR */ - PORTCR(21, 0xe6050015), /* PORT21CR */ - PORTCR(22, 0xe6050016), /* PORT22CR */ - PORTCR(23, 0xe6050017), /* PORT23CR */ - PORTCR(24, 0xe6050018), /* PORT24CR */ - PORTCR(25, 0xe6050019), /* PORT25CR */ - PORTCR(26, 0xe605001a), /* PORT26CR */ - PORTCR(27, 0xe605001b), /* PORT27CR */ - PORTCR(28, 0xe605001c), /* PORT28CR */ - PORTCR(29, 0xe605001d), /* PORT29CR */ - - PORTCR(30, 0xe605001e), /* PORT30CR */ - PORTCR(31, 0xe605001f), /* PORT31CR */ - PORTCR(32, 0xe6051020), /* PORT32CR */ - PORTCR(33, 0xe6051021), /* PORT33CR */ - PORTCR(34, 0xe6051022), /* PORT34CR */ - PORTCR(35, 0xe6051023), /* PORT35CR */ - PORTCR(36, 0xe6051024), /* PORT36CR */ - PORTCR(37, 0xe6051025), /* PORT37CR */ - PORTCR(38, 0xe6051026), /* PORT38CR */ - PORTCR(39, 0xe6051027), /* PORT39CR */ - - PORTCR(40, 0xe6051028), /* PORT40CR */ - PORTCR(41, 0xe6051029), /* PORT41CR */ - PORTCR(42, 0xe605102a), /* PORT42CR */ - PORTCR(43, 0xe605102b), /* PORT43CR */ - PORTCR(44, 0xe605102c), /* PORT44CR */ - PORTCR(45, 0xe605102d), /* PORT45CR */ - PORTCR(46, 0xe605102e), /* PORT46CR */ - PORTCR(47, 0xe605102f), /* PORT47CR */ - PORTCR(48, 0xe6051030), /* PORT48CR */ - PORTCR(49, 0xe6051031), /* PORT49CR */ - - PORTCR(50, 0xe6051032), /* PORT50CR */ - PORTCR(51, 0xe6051033), /* PORT51CR */ - PORTCR(52, 0xe6051034), /* PORT52CR */ - PORTCR(53, 0xe6051035), /* PORT53CR */ - PORTCR(54, 0xe6051036), /* PORT54CR */ - PORTCR(55, 0xe6051037), /* PORT55CR */ - PORTCR(56, 0xe6051038), /* PORT56CR */ - PORTCR(57, 0xe6051039), /* PORT57CR */ - PORTCR(58, 0xe605103a), /* PORT58CR */ - PORTCR(59, 0xe605103b), /* PORT59CR */ - - PORTCR(60, 0xe605103c), /* PORT60CR */ - PORTCR(61, 0xe605103d), /* PORT61CR */ - PORTCR(62, 0xe605103e), /* PORT62CR */ - PORTCR(63, 0xe605103f), /* PORT63CR */ - PORTCR(64, 0xe6051040), /* PORT64CR */ - PORTCR(65, 0xe6051041), /* PORT65CR */ - PORTCR(66, 0xe6051042), /* PORT66CR */ - PORTCR(67, 0xe6051043), /* PORT67CR */ - PORTCR(68, 0xe6051044), /* PORT68CR */ - PORTCR(69, 0xe6051045), /* PORT69CR */ - - PORTCR(70, 0xe6051046), /* PORT70CR */ - PORTCR(71, 0xe6051047), /* PORT71CR */ - PORTCR(72, 0xe6051048), /* PORT72CR */ - PORTCR(73, 0xe6051049), /* PORT73CR */ - PORTCR(74, 0xe605104a), /* PORT74CR */ - PORTCR(75, 0xe605104b), /* PORT75CR */ - PORTCR(76, 0xe605104c), /* PORT76CR */ - PORTCR(77, 0xe605104d), /* PORT77CR */ - PORTCR(78, 0xe605104e), /* PORT78CR */ - PORTCR(79, 0xe605104f), /* PORT79CR */ - - PORTCR(80, 0xe6051050), /* PORT80CR */ - PORTCR(81, 0xe6051051), /* PORT81CR */ - PORTCR(82, 0xe6051052), /* PORT82CR */ - PORTCR(83, 0xe6051053), /* PORT83CR */ - PORTCR(84, 0xe6051054), /* PORT84CR */ - PORTCR(85, 0xe6051055), /* PORT85CR */ - PORTCR(86, 0xe6051056), /* PORT86CR */ - PORTCR(87, 0xe6051057), /* PORT87CR */ - PORTCR(88, 0xe6051058), /* PORT88CR */ - PORTCR(89, 0xe6051059), /* PORT89CR */ - - PORTCR(90, 0xe605105a), /* PORT90CR */ - PORTCR(91, 0xe605105b), /* PORT91CR */ - PORTCR(92, 0xe605105c), /* PORT92CR */ - PORTCR(93, 0xe605105d), /* PORT93CR */ - PORTCR(94, 0xe605105e), /* PORT94CR */ - PORTCR(95, 0xe605105f), /* PORT95CR */ - PORTCR(96, 0xe6052060), /* PORT96CR */ - PORTCR(97, 0xe6052061), /* PORT97CR */ - PORTCR(98, 0xe6052062), /* PORT98CR */ - PORTCR(99, 0xe6052063), /* PORT99CR */ - - PORTCR(100, 0xe6052064), /* PORT100CR */ - PORTCR(101, 0xe6052065), /* PORT101CR */ - PORTCR(102, 0xe6052066), /* PORT102CR */ - PORTCR(103, 0xe6052067), /* PORT103CR */ - PORTCR(104, 0xe6052068), /* PORT104CR */ - PORTCR(105, 0xe6052069), /* PORT105CR */ - PORTCR(106, 0xe605206a), /* PORT106CR */ - PORTCR(107, 0xe605206b), /* PORT107CR */ - PORTCR(108, 0xe605206c), /* PORT108CR */ - PORTCR(109, 0xe605206d), /* PORT109CR */ - - PORTCR(110, 0xe605206e), /* PORT110CR */ - PORTCR(111, 0xe605206f), /* PORT111CR */ - PORTCR(112, 0xe6052070), /* PORT112CR */ - PORTCR(113, 0xe6052071), /* PORT113CR */ - PORTCR(114, 0xe6052072), /* PORT114CR */ - PORTCR(115, 0xe6052073), /* PORT115CR */ - PORTCR(116, 0xe6052074), /* PORT116CR */ - PORTCR(117, 0xe6052075), /* PORT117CR */ - PORTCR(118, 0xe6052076), /* PORT118CR */ - - PORTCR(128, 0xe6052080), /* PORT128CR */ - PORTCR(129, 0xe6052081), /* PORT129CR */ - - PORTCR(130, 0xe6052082), /* PORT130CR */ - PORTCR(131, 0xe6052083), /* PORT131CR */ - PORTCR(132, 0xe6052084), /* PORT132CR */ - PORTCR(133, 0xe6052085), /* PORT133CR */ - PORTCR(134, 0xe6052086), /* PORT134CR */ - PORTCR(135, 0xe6052087), /* PORT135CR */ - PORTCR(136, 0xe6052088), /* PORT136CR */ - PORTCR(137, 0xe6052089), /* PORT137CR */ - PORTCR(138, 0xe605208a), /* PORT138CR */ - PORTCR(139, 0xe605208b), /* PORT139CR */ - - PORTCR(140, 0xe605208c), /* PORT140CR */ - PORTCR(141, 0xe605208d), /* PORT141CR */ - PORTCR(142, 0xe605208e), /* PORT142CR */ - PORTCR(143, 0xe605208f), /* PORT143CR */ - PORTCR(144, 0xe6052090), /* PORT144CR */ - PORTCR(145, 0xe6052091), /* PORT145CR */ - PORTCR(146, 0xe6052092), /* PORT146CR */ - PORTCR(147, 0xe6052093), /* PORT147CR */ - PORTCR(148, 0xe6052094), /* PORT148CR */ - PORTCR(149, 0xe6052095), /* PORT149CR */ - - PORTCR(150, 0xe6052096), /* PORT150CR */ - PORTCR(151, 0xe6052097), /* PORT151CR */ - PORTCR(152, 0xe6052098), /* PORT152CR */ - PORTCR(153, 0xe6052099), /* PORT153CR */ - PORTCR(154, 0xe605209a), /* PORT154CR */ - PORTCR(155, 0xe605209b), /* PORT155CR */ - PORTCR(156, 0xe605209c), /* PORT156CR */ - PORTCR(157, 0xe605209d), /* PORT157CR */ - PORTCR(158, 0xe605209e), /* PORT158CR */ - PORTCR(159, 0xe605209f), /* PORT159CR */ - - PORTCR(160, 0xe60520a0), /* PORT160CR */ - PORTCR(161, 0xe60520a1), /* PORT161CR */ - PORTCR(162, 0xe60520a2), /* PORT162CR */ - PORTCR(163, 0xe60520a3), /* PORT163CR */ - PORTCR(164, 0xe60520a4), /* PORT164CR */ - - PORTCR(192, 0xe60520c0), /* PORT192CR */ - PORTCR(193, 0xe60520c1), /* PORT193CR */ - PORTCR(194, 0xe60520c2), /* PORT194CR */ - PORTCR(195, 0xe60520c3), /* PORT195CR */ - PORTCR(196, 0xe60520c4), /* PORT196CR */ - PORTCR(197, 0xe60520c5), /* PORT197CR */ - PORTCR(198, 0xe60520c6), /* PORT198CR */ - PORTCR(199, 0xe60520c7), /* PORT199CR */ - - PORTCR(200, 0xe60520c8), /* PORT200CR */ - PORTCR(201, 0xe60520c9), /* PORT201CR */ - PORTCR(202, 0xe60520ca), /* PORT202CR */ - PORTCR(203, 0xe60520cb), /* PORT203CR */ - PORTCR(204, 0xe60520cc), /* PORT204CR */ - PORTCR(205, 0xe60520cd), /* PORT205CR */ - PORTCR(206, 0xe60520ce), /* PORT206CR */ - PORTCR(207, 0xe60520cf), /* PORT207CR */ - PORTCR(208, 0xe60520d0), /* PORT208CR */ - PORTCR(209, 0xe60520d1), /* PORT209CR */ - - PORTCR(210, 0xe60520d2), /* PORT210CR */ - PORTCR(211, 0xe60520d3), /* PORT211CR */ - PORTCR(212, 0xe60520d4), /* PORT212CR */ - PORTCR(213, 0xe60520d5), /* PORT213CR */ - PORTCR(214, 0xe60520d6), /* PORT214CR */ - PORTCR(215, 0xe60520d7), /* PORT215CR */ - PORTCR(216, 0xe60520d8), /* PORT216CR */ - PORTCR(217, 0xe60520d9), /* PORT217CR */ - PORTCR(218, 0xe60520da), /* PORT218CR */ - PORTCR(219, 0xe60520db), /* PORT219CR */ - - PORTCR(220, 0xe60520dc), /* PORT220CR */ - PORTCR(221, 0xe60520dd), /* PORT221CR */ - PORTCR(222, 0xe60520de), /* PORT222CR */ - PORTCR(223, 0xe60520df), /* PORT223CR */ - PORTCR(224, 0xe60530e0), /* PORT224CR */ - PORTCR(225, 0xe60530e1), /* PORT225CR */ - PORTCR(226, 0xe60530e2), /* PORT226CR */ - PORTCR(227, 0xe60530e3), /* PORT227CR */ - PORTCR(228, 0xe60530e4), /* PORT228CR */ - PORTCR(229, 0xe60530e5), /* PORT229CR */ - - PORTCR(230, 0xe60530e6), /* PORT230CR */ - PORTCR(231, 0xe60530e7), /* PORT231CR */ - PORTCR(232, 0xe60530e8), /* PORT232CR */ - PORTCR(233, 0xe60530e9), /* PORT233CR */ - PORTCR(234, 0xe60530ea), /* PORT234CR */ - PORTCR(235, 0xe60530eb), /* PORT235CR */ - PORTCR(236, 0xe60530ec), /* PORT236CR */ - PORTCR(237, 0xe60530ed), /* PORT237CR */ - PORTCR(238, 0xe60530ee), /* PORT238CR */ - PORTCR(239, 0xe60530ef), /* PORT239CR */ - - PORTCR(240, 0xe60530f0), /* PORT240CR */ - PORTCR(241, 0xe60530f1), /* PORT241CR */ - PORTCR(242, 0xe60530f2), /* PORT242CR */ - PORTCR(243, 0xe60530f3), /* PORT243CR */ - PORTCR(244, 0xe60530f4), /* PORT244CR */ - PORTCR(245, 0xe60530f5), /* PORT245CR */ - PORTCR(246, 0xe60530f6), /* PORT246CR */ - PORTCR(247, 0xe60530f7), /* PORT247CR */ - PORTCR(248, 0xe60530f8), /* PORT248CR */ - PORTCR(249, 0xe60530f9), /* PORT249CR */ - - PORTCR(250, 0xe60530fa), /* PORT250CR */ - PORTCR(251, 0xe60530fb), /* PORT251CR */ - PORTCR(252, 0xe60530fc), /* PORT252CR */ - PORTCR(253, 0xe60530fd), /* PORT253CR */ - PORTCR(254, 0xe60530fe), /* PORT254CR */ - PORTCR(255, 0xe60530ff), /* PORT255CR */ - PORTCR(256, 0xe6053100), /* PORT256CR */ - PORTCR(257, 0xe6053101), /* PORT257CR */ - PORTCR(258, 0xe6053102), /* PORT258CR */ - PORTCR(259, 0xe6053103), /* PORT259CR */ - - PORTCR(260, 0xe6053104), /* PORT260CR */ - PORTCR(261, 0xe6053105), /* PORT261CR */ - PORTCR(262, 0xe6053106), /* PORT262CR */ - PORTCR(263, 0xe6053107), /* PORT263CR */ - PORTCR(264, 0xe6053108), /* PORT264CR */ - PORTCR(265, 0xe6053109), /* PORT265CR */ - PORTCR(266, 0xe605310a), /* PORT266CR */ - PORTCR(267, 0xe605310b), /* PORT267CR */ - PORTCR(268, 0xe605310c), /* PORT268CR */ - PORTCR(269, 0xe605310d), /* PORT269CR */ - - PORTCR(270, 0xe605310e), /* PORT270CR */ - PORTCR(271, 0xe605310f), /* PORT271CR */ - PORTCR(272, 0xe6053110), /* PORT272CR */ - PORTCR(273, 0xe6053111), /* PORT273CR */ - PORTCR(274, 0xe6053112), /* PORT274CR */ - PORTCR(275, 0xe6053113), /* PORT275CR */ - PORTCR(276, 0xe6053114), /* PORT276CR */ - PORTCR(277, 0xe6053115), /* PORT277CR */ - PORTCR(278, 0xe6053116), /* PORT278CR */ - PORTCR(279, 0xe6053117), /* PORT279CR */ - - PORTCR(280, 0xe6053118), /* PORT280CR */ - PORTCR(281, 0xe6053119), /* PORT281CR */ - PORTCR(282, 0xe605311a), /* PORT282CR */ - - PORTCR(288, 0xe6052120), /* PORT288CR */ - PORTCR(289, 0xe6052121), /* PORT289CR */ - - PORTCR(290, 0xe6052122), /* PORT290CR */ - PORTCR(291, 0xe6052123), /* PORT291CR */ - PORTCR(292, 0xe6052124), /* PORT292CR */ - PORTCR(293, 0xe6052125), /* PORT293CR */ - PORTCR(294, 0xe6052126), /* PORT294CR */ - PORTCR(295, 0xe6052127), /* PORT295CR */ - PORTCR(296, 0xe6052128), /* PORT296CR */ - PORTCR(297, 0xe6052129), /* PORT297CR */ - PORTCR(298, 0xe605212a), /* PORT298CR */ - PORTCR(299, 0xe605212b), /* PORT299CR */ - - PORTCR(300, 0xe605212c), /* PORT300CR */ - PORTCR(301, 0xe605212d), /* PORT301CR */ - PORTCR(302, 0xe605212e), /* PORT302CR */ - PORTCR(303, 0xe605212f), /* PORT303CR */ - PORTCR(304, 0xe6052130), /* PORT304CR */ - PORTCR(305, 0xe6052131), /* PORT305CR */ - PORTCR(306, 0xe6052132), /* PORT306CR */ - PORTCR(307, 0xe6052133), /* PORT307CR */ - PORTCR(308, 0xe6052134), /* PORT308CR */ - PORTCR(309, 0xe6052135), /* PORT309CR */ - - { PINMUX_CFG_REG("MSEL2CR", 0xe605801c, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - MSEL2CR_MSEL19_0, MSEL2CR_MSEL19_1, - MSEL2CR_MSEL18_0, MSEL2CR_MSEL18_1, - MSEL2CR_MSEL17_0, MSEL2CR_MSEL17_1, - MSEL2CR_MSEL16_0, MSEL2CR_MSEL16_1, - 0, 0, - MSEL2CR_MSEL14_0, MSEL2CR_MSEL14_1, - MSEL2CR_MSEL13_0, MSEL2CR_MSEL13_1, - MSEL2CR_MSEL12_0, MSEL2CR_MSEL12_1, - MSEL2CR_MSEL11_0, MSEL2CR_MSEL11_1, - MSEL2CR_MSEL10_0, MSEL2CR_MSEL10_1, - MSEL2CR_MSEL9_0, MSEL2CR_MSEL9_1, - MSEL2CR_MSEL8_0, MSEL2CR_MSEL8_1, - MSEL2CR_MSEL7_0, MSEL2CR_MSEL7_1, - MSEL2CR_MSEL6_0, MSEL2CR_MSEL6_1, - MSEL2CR_MSEL5_0, MSEL2CR_MSEL5_1, - MSEL2CR_MSEL4_0, MSEL2CR_MSEL4_1, - MSEL2CR_MSEL3_0, MSEL2CR_MSEL3_1, - MSEL2CR_MSEL2_0, MSEL2CR_MSEL2_1, - MSEL2CR_MSEL1_0, MSEL2CR_MSEL1_1, - MSEL2CR_MSEL0_0, MSEL2CR_MSEL0_1, - } - }, - { PINMUX_CFG_REG("MSEL3CR", 0xe6058020, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - MSEL3CR_MSEL28_0, MSEL3CR_MSEL28_1, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - MSEL3CR_MSEL15_0, MSEL3CR_MSEL15_1, - 0, 0, - 0, 0, - 0, 0, - MSEL3CR_MSEL11_0, MSEL3CR_MSEL11_1, - 0, 0, - MSEL3CR_MSEL9_0, MSEL3CR_MSEL9_1, - 0, 0, - 0, 0, - MSEL3CR_MSEL6_0, MSEL3CR_MSEL6_1, - 0, 0, - 0, 0, - 0, 0, - MSEL3CR_MSEL2_0, MSEL3CR_MSEL2_1, - 0, 0, - 0, 0, - } - }, - { PINMUX_CFG_REG("MSEL4CR", 0xe6058024, 32, 1) { - 0, 0, - 0, 0, - MSEL4CR_MSEL29_0, MSEL4CR_MSEL29_1, - 0, 0, - MSEL4CR_MSEL27_0, MSEL4CR_MSEL27_1, - MSEL4CR_MSEL26_0, MSEL4CR_MSEL26_1, - 0, 0, - 0, 0, - 0, 0, - MSEL4CR_MSEL22_0, MSEL4CR_MSEL22_1, - MSEL4CR_MSEL21_0, MSEL4CR_MSEL21_1, - MSEL4CR_MSEL20_0, MSEL4CR_MSEL20_1, - MSEL4CR_MSEL19_0, MSEL4CR_MSEL19_1, - 0, 0, - 0, 0, - 0, 0, - MSEL4CR_MSEL15_0, MSEL4CR_MSEL15_1, - 0, 0, - MSEL4CR_MSEL13_0, MSEL4CR_MSEL13_1, - MSEL4CR_MSEL12_0, MSEL4CR_MSEL12_1, - MSEL4CR_MSEL11_0, MSEL4CR_MSEL11_1, - MSEL4CR_MSEL10_0, MSEL4CR_MSEL10_1, - MSEL4CR_MSEL9_0, MSEL4CR_MSEL9_1, - MSEL4CR_MSEL8_0, MSEL4CR_MSEL8_1, - MSEL4CR_MSEL7_0, MSEL4CR_MSEL7_1, - 0, 0, - 0, 0, - MSEL4CR_MSEL4_0, MSEL4CR_MSEL4_1, - 0, 0, - 0, 0, - MSEL4CR_MSEL1_0, MSEL4CR_MSEL1_1, - 0, 0, - } - }, - { }, -}; - -static struct pinmux_data_reg pinmux_data_regs[] = { - { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) { - PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA, - PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA, - PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA, - PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA, - PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA, - PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA, - PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA, - PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA } - }, - { PINMUX_DATA_REG("PORTD063_032DR", 0xe6055000, 32) { - PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA, - PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA, - PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA, - PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA, - PORT47_DATA, PORT46_DATA, PORT45_DATA, PORT44_DATA, - PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA, - PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA, - PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA } - }, - { PINMUX_DATA_REG("PORTD095_064DR", 0xe6055004, 32) { - PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA, - PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA, - PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA, - PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA, - PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA, - PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA, - PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA, - PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA } - }, - { PINMUX_DATA_REG("PORTR127_096DR", 0xe6056000, 32) { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, PORT118_DATA, PORT117_DATA, PORT116_DATA, - PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA, - PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA, - PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA, - PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA, - PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA } - }, - { PINMUX_DATA_REG("PORTR159_128DR", 0xe6056004, 32) { - PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA, - PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA, - PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA, - PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA, - PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA, - PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA, - PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA, - PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA } - }, - { PINMUX_DATA_REG("PORTR191_160DR", 0xe6056008, 32) { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, PORT164_DATA, - PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA } - }, - { PINMUX_DATA_REG("PORTR223_192DR", 0xe605600C, 32) { - PORT223_DATA, PORT222_DATA, PORT221_DATA, PORT220_DATA, - PORT219_DATA, PORT218_DATA, PORT217_DATA, PORT216_DATA, - PORT215_DATA, PORT214_DATA, PORT213_DATA, PORT212_DATA, - PORT211_DATA, PORT210_DATA, PORT209_DATA, PORT208_DATA, - PORT207_DATA, PORT206_DATA, PORT205_DATA, PORT204_DATA, - PORT203_DATA, PORT202_DATA, PORT201_DATA, PORT200_DATA, - PORT199_DATA, PORT198_DATA, PORT197_DATA, PORT196_DATA, - PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA } - }, - { PINMUX_DATA_REG("PORTU255_224DR", 0xe6057000, 32) { - PORT255_DATA, PORT254_DATA, PORT253_DATA, PORT252_DATA, - PORT251_DATA, PORT250_DATA, PORT249_DATA, PORT248_DATA, - PORT247_DATA, PORT246_DATA, PORT245_DATA, PORT244_DATA, - PORT243_DATA, PORT242_DATA, PORT241_DATA, PORT240_DATA, - PORT239_DATA, PORT238_DATA, PORT237_DATA, PORT236_DATA, - PORT235_DATA, PORT234_DATA, PORT233_DATA, PORT232_DATA, - PORT231_DATA, PORT230_DATA, PORT229_DATA, PORT228_DATA, - PORT227_DATA, PORT226_DATA, PORT225_DATA, PORT224_DATA } - }, - { PINMUX_DATA_REG("PORTU287_256DR", 0xe6057004, 32) { - 0, 0, 0, 0, - 0, PORT282_DATA, PORT281_DATA, PORT280_DATA, - PORT279_DATA, PORT278_DATA, PORT277_DATA, PORT276_DATA, - PORT275_DATA, PORT274_DATA, PORT273_DATA, PORT272_DATA, - PORT271_DATA, PORT270_DATA, PORT269_DATA, PORT268_DATA, - PORT267_DATA, PORT266_DATA, PORT265_DATA, PORT264_DATA, - PORT263_DATA, PORT262_DATA, PORT261_DATA, PORT260_DATA, - PORT259_DATA, PORT258_DATA, PORT257_DATA, PORT256_DATA } - }, - { PINMUX_DATA_REG("PORTR319_288DR", 0xe6056010, 32) { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, PORT309_DATA, PORT308_DATA, - PORT307_DATA, PORT306_DATA, PORT305_DATA, PORT304_DATA, - PORT303_DATA, PORT302_DATA, PORT301_DATA, PORT300_DATA, - PORT299_DATA, PORT298_DATA, PORT297_DATA, PORT296_DATA, - PORT295_DATA, PORT294_DATA, PORT293_DATA, PORT292_DATA, - PORT291_DATA, PORT290_DATA, PORT289_DATA, PORT288_DATA } - }, - { }, -}; - -#if 0 -/* IRQ pins through INTCS with IRQ0->15 from 0x200 and IRQ16-31 from 0x3200 */ -#define EXT_IRQ16L(n) intcs_evt2irq(0x200 + ((n) << 5)) -#define EXT_IRQ16H(n) intcs_evt2irq(0x3200 + ((n - 16) << 5)) -#else -#define EXT_IRQ16L(n) (n) -#define EXT_IRQ16H(n) (n) -#endif - -static struct pinmux_irq pinmux_irqs[] = { - PINMUX_IRQ(EXT_IRQ16H(19), PORT9_FN0), - PINMUX_IRQ(EXT_IRQ16L(1), PORT10_FN0), - PINMUX_IRQ(EXT_IRQ16L(0), PORT11_FN0), - PINMUX_IRQ(EXT_IRQ16H(18), PORT13_FN0), - PINMUX_IRQ(EXT_IRQ16H(20), PORT14_FN0), - PINMUX_IRQ(EXT_IRQ16H(21), PORT15_FN0), - PINMUX_IRQ(EXT_IRQ16H(31), PORT26_FN0), - PINMUX_IRQ(EXT_IRQ16H(30), PORT27_FN0), - PINMUX_IRQ(EXT_IRQ16H(29), PORT28_FN0), - PINMUX_IRQ(EXT_IRQ16H(22), PORT40_FN0), - PINMUX_IRQ(EXT_IRQ16H(23), PORT53_FN0), - PINMUX_IRQ(EXT_IRQ16L(10), PORT54_FN0), - PINMUX_IRQ(EXT_IRQ16L(9), PORT56_FN0), - PINMUX_IRQ(EXT_IRQ16H(26), PORT115_FN0), - PINMUX_IRQ(EXT_IRQ16H(27), PORT116_FN0), - PINMUX_IRQ(EXT_IRQ16H(28), PORT117_FN0), - PINMUX_IRQ(EXT_IRQ16H(24), PORT118_FN0), - PINMUX_IRQ(EXT_IRQ16L(6), PORT147_FN0), - PINMUX_IRQ(EXT_IRQ16L(2), PORT149_FN0), - PINMUX_IRQ(EXT_IRQ16L(7), PORT150_FN0), - PINMUX_IRQ(EXT_IRQ16L(12), PORT156_FN0), - PINMUX_IRQ(EXT_IRQ16L(4), PORT159_FN0), - PINMUX_IRQ(EXT_IRQ16H(25), PORT164_FN0), - PINMUX_IRQ(EXT_IRQ16L(8), PORT223_FN0), - PINMUX_IRQ(EXT_IRQ16L(3), PORT224_FN0), - PINMUX_IRQ(EXT_IRQ16L(5), PORT227_FN0), - PINMUX_IRQ(EXT_IRQ16H(17), PORT234_FN0), - PINMUX_IRQ(EXT_IRQ16L(11), PORT238_FN0), - PINMUX_IRQ(EXT_IRQ16L(13), PORT239_FN0), - PINMUX_IRQ(EXT_IRQ16H(16), PORT249_FN0), - PINMUX_IRQ(EXT_IRQ16L(14), PORT251_FN0), - PINMUX_IRQ(EXT_IRQ16L(9), PORT308_FN0), -}; - -static struct pinmux_info sh73a0_pinmux_info = { - .name = "sh73a0_pfc", - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, - .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, - .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, - .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END }, - .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, - .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - - .first_gpio = GPIO_PORT0, - .last_gpio = GPIO_FN_FSIAISLD_PU, - - .gpios = pinmux_gpios, - .cfg_regs = pinmux_config_regs, - .data_regs = pinmux_data_regs, - - .gpio_data = pinmux_data, - .gpio_data_size = ARRAY_SIZE(pinmux_data), - - .gpio_irq = pinmux_irqs, - .gpio_irq_size = ARRAY_SIZE(pinmux_irqs), -}; - -void sh73a0_pinmux_init(void) -{ - register_pinmux(&sh73a0_pinmux_info); -} diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c index 6cecec41450..3335d9482a2 100644 --- a/drivers/i2c/sh_i2c.c +++ b/drivers/i2c/sh_i2c.c @@ -172,14 +172,9 @@ static int sh_i2c_raw_read(struct sh_i2c *dev, u8 chip, u8 addr) { int ret = -1;

-#if defined(CONFIG_SH73A0) - if (sh_i2c_set_addr(dev, chip, addr, 0) != 0) - goto exit0; -#else if (sh_i2c_set_addr(dev, chip, addr, 1) != 0) goto exit0; udelay(100); -#endif

writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), &dev->iccr); sh_irq_dte(dev); diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h index e6ab6f1b9b7..660aaab6638 100644 --- a/drivers/serial/serial_sh.h +++ b/drivers/serial/serial_sh.h @@ -13,7 +13,6 @@ struct uart_port { };

#if defined(CONFIG_CPU_SH7721) || \ - defined(CONFIG_SH73A0) || \ defined(CONFIG_R8A7740) # define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ # define PORT_PTCR 0xA405011EUL @@ -149,7 +148,6 @@ struct uart_port { #define SCIF_DR 0x0001 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */

#if defined(CONFIG_CPU_SH7721) || \ - defined(CONFIG_SH73A0) || \ defined(CONFIG_R8A7740) # define SCIF_ORER 0x0200 # define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER) @@ -197,7 +195,6 @@ struct uart_port { (((port)->type == PORT_SCI) ? SCI_ORER : SCIF_ORER)

#if defined(CONFIG_CPU_SH7721) || \ - defined(CONFIG_SH73A0) || \ defined(CONFIG_R8A7740) # define SCxSR_RDxF_CLEAR(port) (sci_in(port, SCxSR) & 0xfffc) # define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73) @@ -278,8 +275,7 @@ static inline void sci_##name##_out(struct uart_port *port,\ SCI_OUT(sci_size, sci_offset, value);\ }

-#if defined(CONFIG_SH73A0) || \ - defined(CONFIG_R8A7740) +#if defined(CONFIG_R8A7740) #if defined(CONFIG_CPU_SH7721) || \ defined(CONFIG_SH73A0) #define SCIF_FNS(name, scif_offset, scif_size) \ @@ -323,8 +319,7 @@ static inline void sci_##name##_out(struct uart_port *port,\ CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) #endif

-#if defined(CONFIG_CPU_SH7721) || \ - defined(CONFIG_SH73A0) +#if defined(CONFIG_CPU_SH7721)

SCIF_FNS(SCSMR, 0x00, 16) SCIF_FNS(SCBRR, 0x04, 8) @@ -477,7 +472,6 @@ static inline int sci_rxd_in(struct uart_port *port) #if defined(CONFIG_CPU_SH7780) #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) #elif defined(CONFIG_CPU_SH7721) || \ - defined(CONFIG_SH73A0) || \ defined(CONFIG_R8A7740) #define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) #elif defined(CONFIG_CPU_SH7723)

This seems to have been used by ppc4xx which was removed a while back. The Kconfig does not exist so it is never built. Drop it.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

Makefile | 3 -- tools/.gitignore | 1 - tools/Makefile | 6 ---- tools/ubsha1.c | 83 ------------------------------------------------ 4 files changed, 93 deletions(-) delete mode 100644 tools/ubsha1.c

diff --git a/Makefile b/Makefile index 73a562a26de..2c9e27ac5c2 100644 --- a/Makefile +++ b/Makefile @@ -1450,9 +1450,6 @@ u-boot-with-spl.kwb: u-boot.bin spl/u-boot-spl.bin FORCE $(call if_changed,mkimage) $(BOARD_SIZE_CHECK)

-u-boot.sha1: u-boot.bin - tools/ubsha1 u-boot.bin - u-boot.dis: u-boot $(OBJDUMP) -d $< > $@

diff --git a/tools/.gitignore b/tools/.gitignore index 28e8ce2a07a..788ea260a07 100644 --- a/tools/.gitignore +++ b/tools/.gitignore @@ -33,7 +33,6 @@ /relocate-rela /spl_size_limit /sunxi-spl-image-builder -/ubsha1 /update_octeon_header /version.h /xway-swap-bytes diff --git a/tools/Makefile b/tools/Makefile index 2ee43dff542..0eadd8154a7 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -29,7 +29,6 @@ CONFIG_CMD_LOADS = y CONFIG_CMD_NET = y CONFIG_XWAY_SWAP_BYTES = y CONFIG_NETCONSOLE = y -CONFIG_SHA1_CHECK_UB_IMG = y CONFIG_ARCH_SUNXI = y endif

@@ -217,11 +216,6 @@ hostprogs-$(CONFIG_ARCH_SUNXI) += sunxi-spl-image-builder sunxi-spl-image-builder-objs := sunxi-spl-image-builder.o lib/bch.o

hostprogs-$(CONFIG_NETCONSOLE) += ncb -hostprogs-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1 - -ubsha1-objs := os_support.o ubsha1.o lib/sha1.o - -HOSTCFLAGS_ubsha1.o := -pedantic

hostprogs-$(CONFIG_ARCH_KIRKWOOD) += kwboot hostprogs-$(CONFIG_ARCH_MVEBU) += kwboot diff --git a/tools/ubsha1.c b/tools/ubsha1.c deleted file mode 100644 index 90a6f3f59d2..00000000000 --- a/tools/ubsha1.c +++ /dev/null @@ -1,83 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2007 - * Heiko Schocher, DENX Software Engineering, hs@denx.de - */ - -#include "os_support.h" -#include <stdio.h> -#include <stdlib.h> -#include <unistd.h> -#include <fcntl.h> -#include <errno.h> -#include <string.h> -#include <sys/stat.h> -#include <u-boot/sha1.h> - -int main (int argc, char **argv) -{ - unsigned char output[20]; - int i, len; - - char *imagefile; - char *cmdname = *argv; - unsigned char *ptr; - unsigned char *data; - struct stat sbuf; - unsigned char *ptroff; - int ifd; - int off; - - if (argc > 1) { - imagefile = argv[1]; - ifd = open (imagefile, O_RDWR|O_BINARY); - if (ifd < 0) { - fprintf (stderr, "%s: Can't open %s: %s\n", - cmdname, imagefile, strerror(errno)); - exit (EXIT_FAILURE); - } - if (fstat (ifd, &sbuf) < 0) { - fprintf (stderr, "%s: Can't stat %s: %s\n", - cmdname, imagefile, strerror(errno)); - exit (EXIT_FAILURE); - } - len = sbuf.st_size; - ptr = (unsigned char *)mmap(0, len, - PROT_READ, MAP_SHARED, ifd, 0); - if (ptr == (unsigned char *)MAP_FAILED) { - fprintf (stderr, "%s: Can't read %s: %s\n", - cmdname, imagefile, strerror(errno)); - exit (EXIT_FAILURE); - } - - /* create a copy, so we can blank out the sha1 sum */ - data = malloc (len); - memcpy (data, ptr, len); - off = SHA1_SUM_POS; - ptroff = &data[len + off]; - for (i = 0; i < SHA1_SUM_LEN; i++) { - ptroff[i] = 0; - } - - sha1_csum ((unsigned char *) data, len, (unsigned char *)output); - - printf ("U-Boot sum:\n"); - for (i = 0; i < 20 ; i++) { - printf ("%02X ", output[i]); - } - printf ("\n"); - /* overwrite the sum in the bin file, with the actual */ - lseek (ifd, SHA1_SUM_POS, SEEK_END); - if (write (ifd, output, SHA1_SUM_LEN) != SHA1_SUM_LEN) { - fprintf (stderr, "%s: Can't write %s: %s\n", - cmdname, imagefile, strerror(errno)); - exit (EXIT_FAILURE); - } - - free (data); - (void) munmap((void *)ptr, len); - (void) close (ifd); - } - - return EXIT_SUCCESS; -}

This is not used since CONFIG_SYS_FPGA_COMMON is not defined anywhere. Drop the code and the Makefile rule.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

board/gdsys/common/Makefile | 1 - board/gdsys/common/fpga.c | 28 ---------------------------- 2 files changed, 29 deletions(-) delete mode 100644 board/gdsys/common/fpga.c

diff --git a/board/gdsys/common/Makefile b/board/gdsys/common/Makefile index 553e2ca50ed..94cbf3c5cc1 100644 --- a/board/gdsys/common/Makefile +++ b/board/gdsys/common/Makefile @@ -3,7 +3,6 @@ # (C) Copyright 2007 # Stefan Roese, DENX Software Engineering, sr@denx.de.

-obj-$(CONFIG_SYS_FPGA_COMMON) += fpga.o obj-$(CONFIG_CMD_IOLOOP) += cmd_ioloop.o obj-$(CONFIG_TARGET_CONTROLCENTERDC) += dp501.o obj-$(CONFIG_TARGET_GAZERBEAM) += osd.o ihs_mdio.o ioep-fpga.o diff --git a/board/gdsys/common/fpga.c b/board/gdsys/common/fpga.c deleted file mode 100644 index 5ba6613ed56..00000000000 --- a/board/gdsys/common/fpga.c +++ /dev/null @@ -1,28 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2013 - * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc - */ - -#ifdef CONFIG_GDSYS_LEGACY_DRIVERS - -#include <common.h> -#include <gdsys_fpga.h> - -#include <asm/io.h> - -int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data) -{ - out_le16(reg, data); - - return 0; -} - -int fpga_get_reg(u32 fpga, u16 *reg, off_t regoff, u16 *data) -{ - *data = in_le16(reg); - - return 0; -} - -#endif /* CONFIG_GDSYS_LEGACY_DRIVERS */

This option is not defined anywhere. Drop it.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

board/compulab/imx8mm-cl-iot-gate/ddr/Makefile | 4 ---- 1 file changed, 4 deletions(-)

diff --git a/board/compulab/imx8mm-cl-iot-gate/ddr/Makefile b/board/compulab/imx8mm-cl-iot-gate/ddr/Makefile index 5914796628d..f73f35cd664 100644 --- a/board/compulab/imx8mm-cl-iot-gate/ddr/Makefile +++ b/board/compulab/imx8mm-cl-iot-gate/ddr/Makefile @@ -1,8 +1,4 @@ obj-y += ddr.o obj-y += lpddr4_timing_ff020008.o obj-y += lpddr4_timing_ff000110.o -ifdef CONFIG_TARGET_MCM_IMX8M_MINI -obj-y += lpddr4_timing_01061010.o -else obj-y += lpddr4_timing_01061010.1_2.o -endif

CONFIG_UBOOT_PAD_TO is not defined anywhere. Drop this dead code.

Signed-off-by: Simon Glass sjg@chromium.org Reviewed-by: Stefan Roese sr@denx.de ---

(no changes since v1)

Makefile | 11 ----------- 1 file changed, 11 deletions(-)

diff --git a/Makefile b/Makefile index 2c9e27ac5c2..815ee0333d8 100644 --- a/Makefile +++ b/Makefile @@ -1648,17 +1648,6 @@ OBJCOPYFLAGS_u-boot-with-spl-pbl.bin = -I binary -O binary --pad-to=$(CONFIG_SPL u-boot-with-spl-pbl.bin: spl/u-boot-spl.pbl $(UBOOT_BINLOAD) FORCE $(call if_changed,pad_cat)

-# PPC4xx needs the SPL at the end of the image, since the reset vector -# is located at 0xfffffffc. So we can't use the "u-boot-img.bin" target -# and need to introduce a new build target with the full blown U-Boot -# at the start padded up to the start of the SPL image. And then concat -# the SPL image to the end. - -OBJCOPYFLAGS_u-boot-img-spl-at-end.bin := -I binary -O binary \ - --pad-to=$(CONFIG_UBOOT_PAD_TO) --gap-fill=0xff -u-boot-img-spl-at-end.bin: u-boot.img spl/u-boot-spl.bin FORCE - $(call if_changed,pad_cat) - quiet_cmd_u-boot-elf ?= LD $@ cmd_u-boot-elf ?= $(LD) u-boot-elf.o -o $@ \ $(if $(CONFIG_SYS_BIG_ENDIAN),-EB,-EL) \

This is not used. Drop the driver and Kconfig option.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v2)

Changes in v2: - Reinstate usb_hub code removed by accident

common/usb_hub.c | 6 -- drivers/usb/host/Makefile | 1 - drivers/usb/host/ehci-faraday.c | 144 -------------------------------- drivers/usb/host/ehci-hcd.c | 5 -- include/usb/fusbh200.h | 59 ------------- 5 files changed, 215 deletions(-) delete mode 100644 drivers/usb/host/ehci-faraday.c delete mode 100644 include/usb/fusbh200.h

diff --git a/common/usb_hub.c b/common/usb_hub.c index f7fd12c0450..85c0822d8b7 100644 --- a/common/usb_hub.c +++ b/common/usb_hub.c @@ -506,11 +506,6 @@ static int usb_scan_port(struct usb_device_scan *usb_scan) if (portchange & USB_PORT_STAT_C_ENABLE) { debug("port %d enable change, status %x\n", i + 1, portstatus); usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_C_ENABLE); - /* - * The following hack causes a ghost device problem - * to Faraday EHCI - */ -#ifndef CONFIG_USB_EHCI_FARADAY /* * EM interference sometimes causes bad shielded USB * devices to be shutdown by the hub, this hack enables @@ -523,7 +518,6 @@ static int usb_scan_port(struct usb_device_scan *usb_scan) i + 1); usb_hub_port_connect_change(dev, i); } -#endif }

if (portstatus & USB_PORT_STAT_SUSPEND) { diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 1f59e910d3b..cce78846d98 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -27,7 +27,6 @@ obj-$(CONFIG_USB_OHCI_NPCM) += ohci-npcm.o obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o obj-$(CONFIG_USB_EHCI_ATMEL) += ehci-atmel.o obj-$(CONFIG_USB_EHCI_FSL) += ehci-fsl.o -obj-$(CONFIG_USB_EHCI_FARADAY) += ehci-faraday.o obj-$(CONFIG_USB_EHCI_GENERIC) += ehci-generic.o obj-$(CONFIG_USB_EHCI_EXYNOS) += ehci-exynos.o obj-$(CONFIG_USB_EHCI_MXS) += ehci-mxs.o diff --git a/drivers/usb/host/ehci-faraday.c b/drivers/usb/host/ehci-faraday.c deleted file mode 100644 index 85a35269601..00000000000 --- a/drivers/usb/host/ehci-faraday.c +++ /dev/null @@ -1,144 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Faraday USB 2.0 EHCI Controller - * - * (C) Copyright 2010 Faraday Technology - * Dante Su dantesu@faraday-tech.com - */ - -#include <common.h> -#include <log.h> -#include <asm/io.h> -#include <usb.h> -#include <linux/delay.h> -#include <usb/fusbh200.h> -#include <usb/fotg210.h> - -#include "ehci.h" - -#ifndef CFG_USB_EHCI_BASE_LIST -#define CFG_USB_EHCI_BASE_LIST { CONFIG_USB_EHCI_BASE } -#endif - -union ehci_faraday_regs { - struct fusbh200_regs usb; - struct fotg210_regs otg; -}; - -static inline int ehci_is_fotg2xx(union ehci_faraday_regs *regs) -{ - return !readl(&regs->usb.easstr); -} - -void faraday_ehci_set_usbmode(struct ehci_ctrl *ctrl) -{ - /* nothing needs to be done */ -} - -int faraday_ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg) -{ - int spd, ret = PORTSC_PSPD_HS; - union ehci_faraday_regs *regs; - - ret = (void __iomem *)((ulong)ctrl->hcor - 0x10); - if (ehci_is_fotg2xx(regs)) - spd = OTGCSR_SPD(readl(&regs->otg.otgcsr)); - else - spd = BMCSR_SPD(readl(&regs->usb.bmcsr)); - - switch (spd) { - case 0: /* full speed */ - ret = PORTSC_PSPD_FS; - break; - case 1: /* low speed */ - ret = PORTSC_PSPD_LS; - break; - case 2: /* high speed */ - ret = PORTSC_PSPD_HS; - break; - default: - printf("ehci-faraday: invalid device speed\n"); - break; - } - - return ret; -} - -uint32_t *faraday_ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port) -{ - /* Faraday EHCI has one and only one portsc register */ - if (port) { - /* Printing the message would cause a scan failure! */ - debug("The request port(%d) is not configured\n", port); - return NULL; - } - - /* Faraday EHCI PORTSC register offset is 0x20 from hcor */ - return (uint32_t *)((uint8_t *)ctrl->hcor + 0x20); -} - -static const struct ehci_ops faraday_ehci_ops = { - .set_usb_mode = faraday_ehci_set_usbmode, - .get_port_speed = faraday_ehci_get_port_speed, - .get_portsc_register = faraday_ehci_get_portsc_register, -}; - -/* - * Create the appropriate control structures to manage - * a new EHCI host controller. - */ -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **ret_hccr, struct ehci_hcor **ret_hcor) -{ - struct ehci_hccr *hccr; - struct ehci_hcor *hcor; - union ehci_faraday_regs *regs; - uint32_t base_list[] = CFG_USB_EHCI_BASE_LIST; - - if (index < 0 || index >= ARRAY_SIZE(base_list)) - return -1; - ehci_set_controller_priv(index, NULL, &faraday_ehci_ops); - regs = (void __iomem *)base_list[index]; - hccr = (struct ehci_hccr *)&regs->usb.hccr; - hcor = (struct ehci_hcor *)&regs->usb.hcor; - - if (ehci_is_fotg2xx(regs)) { - /* A-device bus reset */ - /* ... Power off A-device */ - setbits_le32(&regs->otg.otgcsr, OTGCSR_A_BUSDROP); - /* ... Drop vbus and bus traffic */ - clrbits_le32(&regs->otg.otgcsr, OTGCSR_A_BUSREQ); - mdelay(1); - /* ... Power on A-device */ - clrbits_le32(&regs->otg.otgcsr, OTGCSR_A_BUSDROP); - /* ... Drive vbus and bus traffic */ - setbits_le32(&regs->otg.otgcsr, OTGCSR_A_BUSREQ); - mdelay(1); - /* Disable OTG & DEV interrupts, triggered at level-high */ - writel(IMR_IRQLH | IMR_OTG | IMR_DEV, &regs->otg.imr); - /* Clear all interrupt status */ - writel(ISR_HOST | ISR_OTG | ISR_DEV, &regs->otg.isr); - } else { - /* Interrupt=level-high */ - setbits_le32(&regs->usb.bmcsr, BMCSR_IRQLH); - /* VBUS on */ - clrbits_le32(&regs->usb.bmcsr, BMCSR_VBUS_OFF); - /* Disable all interrupts */ - writel(0x00, &regs->usb.bmier); - writel(0x1f, &regs->usb.bmisr); - } - - *ret_hccr = hccr; - *ret_hcor = hcor; - - return 0; -} - -/* - * Destroy the appropriate control structures corresponding - * the the EHCI host controller. - */ -int ehci_hcd_stop(int index) -{ - return 0; -} diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 9139d61dd0c..9839aa17492 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -705,12 +705,10 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, dev->act_len = length - QT_TOKEN_GET_TOTALBYTES(qhtoken); } else { dev->act_len = 0; -#ifndef CONFIG_USB_EHCI_FARADAY debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n", dev->devnum, ehci_readl(&ctrl->hcor->or_usbsts), ehci_readl(&ctrl->hcor->or_portsc[0]), ehci_readl(&ctrl->hcor->or_portsc[1])); -#endif }

free(qtd); @@ -1189,9 +1187,6 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor); if (rc) return rc; -#endif -#ifdef CONFIG_USB_EHCI_FARADAY - tweaks |= EHCI_TWEAK_NO_INIT_CF; #endif rc = ehci_common_init(ctrl, tweaks); if (rc) diff --git a/include/usb/fusbh200.h b/include/usb/fusbh200.h deleted file mode 100644 index 6ae1d848801..00000000000 --- a/include/usb/fusbh200.h +++ /dev/null @@ -1,59 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Faraday USB 2.0 EHCI Controller - * - * (C) Copyright 2010 Faraday Technology - * Dante Su dantesu@faraday-tech.com - */ - -#ifndef _FUSBH200_H -#define _FUSBH200_H - -struct fusbh200_regs { - struct { - uint32_t data[4]; - } hccr; /* 0x00 - 0x0f: hccr */ - struct { - uint32_t data[9]; - } hcor; /* 0x10 - 0x33: hcor */ - uint32_t easstr;/* 0x34: EOF&Async. Sched. Sleep Timer Register */ - uint32_t rsvd[2]; - uint32_t bmcsr; /* 0x40: Bus Monitor Control Status Register */ - uint32_t bmisr; /* 0x44: Bus Monitor Interrupt Status Register */ - uint32_t bmier; /* 0x48: Bus Monitor Interrupt Enable Register */ -}; - -/* EOF & Async. Schedule Sleep Timer Register */ -#define EASSTR_RUNNING (1 << 6) /* Put transceiver in running/resume mode */ -#define EASSTR_SUSPEND (0 << 6) /* Put transceiver in suspend mode */ -#define EASSTR_EOF2(x) (((x) & 0x3) << 4) /* EOF 2 Timing */ -#define EASSTR_EOF1(x) (((x) & 0x3) << 2) /* EOF 1 Timing */ -#define EASSTR_ASST(x) (((x) & 0x3) << 0) /* Async. Sched. Sleep Timer */ - -/* Bus Monitor Control Status Register */ -#define BMCSR_SPD_HIGH (2 << 9) /* Speed of the attached device */ -#define BMCSR_SPD_LOW (1 << 9) -#define BMCSR_SPD_FULL (0 << 9) -#define BMCSR_SPD_MASK (3 << 9) -#define BMCSR_SPD_SHIFT 9 -#define BMCSR_SPD(x) ((x >> 9) & 0x03) -#define BMCSR_VBUS (1 << 8) /* VBUS Valid */ -#define BMCSR_VBUS_OFF (1 << 4) /* VBUS Off */ -#define BMCSR_VBUS_ON (0 << 4) /* VBUS On */ -#define BMCSR_IRQLH (1 << 3) /* IRQ triggered at level-high */ -#define BMCSR_IRQLL (0 << 3) /* IRQ triggered at level-low */ -#define BMCSR_HALFSPD (1 << 2) /* Half speed mode for FPGA test */ -#define BMCSR_HFT_LONG (1 << 1) /* HDISCON noise filter = 270 us*/ -#define BMCSR_HFT (0 << 1) /* HDISCON noise filter = 135 us*/ -#define BMCSR_VFT_LONG (1 << 1) /* VBUS noise filter = 472 us*/ -#define BMCSR_VFT (0 << 1) /* VBUS noise filter = 135 us*/ - -/* Bus Monitor Interrupt Status Register */ -/* Bus Monitor Interrupt Enable Register */ -#define BMISR_DMAERR (1 << 4) /* DMA error */ -#define BMISR_DMA (1 << 3) /* DMA complete */ -#define BMISR_DEVRM (1 << 2) /* device removed */ -#define BMISR_OVD (1 << 1) /* over-current detected */ -#define BMISR_VBUSERR (1 << 0) /* VBUS error */ - -#endif

This is not used. Drop the driver and Kconfig option.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

.../mach-rmobile/include/mach/ehci-rmobile.h | 146 ------------------ drivers/usb/host/Makefile | 1 - drivers/usb/host/ehci-rmobile.c | 129 ---------------- 3 files changed, 276 deletions(-) delete mode 100644 arch/arm/mach-rmobile/include/mach/ehci-rmobile.h delete mode 100644 drivers/usb/host/ehci-rmobile.c

diff --git a/arch/arm/mach-rmobile/include/mach/ehci-rmobile.h b/arch/arm/mach-rmobile/include/mach/ehci-rmobile.h deleted file mode 100644 index ca8c5f37063..00000000000 --- a/arch/arm/mach-rmobile/include/mach/ehci-rmobile.h +++ /dev/null @@ -1,146 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2013,2014 Renesas Electronics Corporation - * Copyright (C) 2014 Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com - */ - -#ifndef __EHCI_RMOBILE_H__ -#define __EHCI_RMOBILE_H__ - -/* Register offset */ -#define OHCI_OFFSET 0x00 -#define OHCI_SIZE 0x1000 -#define EHCI_OFFSET 0x1000 -#define EHCI_SIZE 0x1000 - -#define EHCI_USBCMD (EHCI_OFFSET + 0x0020) - -/* USBCTR */ -#define DIRPD (1 << 8) -#define PLL_RST (1 << 2) -#define PCICLK_MASK (1 << 1) -#define USBH_RST (1 << 0) - -/* CMND_STS */ -#define SERREN (1 << 8) -#define PERREN (1 << 6) -#define MASTEREN (1 << 2) -#define MEMEN (1 << 1) - -/* PCIAHB_WIN1_CTR and PCIAHB_WIN2_CTR */ -#define PCIAHB_WIN_PREFETCH ((1 << 1)|(1 << 0)) - -/* AHBPCI_WIN1_CTR */ -#define PCIWIN1_PCICMD ((1 << 3)|(1 << 1)) -#define AHB_CFG_AHBPCI 0x40000000 -#define AHB_CFG_HOST 0x80000000 - -/* AHBPCI_WIN2_CTR */ -#define PCIWIN2_PCICMD ((1 << 2)|(1 << 1)) - -/* PCI_INT_ENABLE */ -#define USBH_PMEEN (1 << 19) -#define USBH_INTBEN (1 << 17) -#define USBH_INTAEN (1 << 16) - -/* AHB_BUS_CTR */ -#define SMODE_READY_CTR (1 << 17) -#define SMODE_READ_BURST (1 << 16) -#define MMODE_HBUSREQ (1 << 7) -#define MMODE_BOUNDARY ((1 << 6)|(1 << 5)) -#define MMODE_BURST_WIDTH ((1 << 4)|(1 << 3)) -#define MMODE_SINGLE_MODE ((1 << 4)|(1 << 3)) -#define MMODE_WR_INCR (1 << 2) -#define MMODE_BYTE_BURST (1 << 1) -#define MMODE_HTRANS (1 << 0) - -/* PCI_ARBITER_CTR */ -#define PCIBUS_PARK_TIMER 0x00FF0000 -#define PCIBUS_PARK_TIMER_SET 0x00070000 -#define PCIBP_MODE (1 << 12) -#define PCIREQ7 (1 << 7) -#define PCIREQ6 (1 << 6) -#define PCIREQ5 (1 << 5) -#define PCIREQ4 (1 << 4) -#define PCIREQ3 (1 << 3) -#define PCIREQ2 (1 << 2) -#define PCIREQ1 (1 << 1) -#define PCIREQ0 (1 << 0) - -#define SMSTPCR7 0xE615014C -#define SMSTPCR703 (1 << 3) - -/* Init AHB master and slave functions of the host logic */ -#define AHB_BUS_CTR_INIT \ - (SMODE_READY_CTR | MMODE_HBUSREQ | MMODE_WR_INCR | \ - MMODE_BYTE_BURST | MMODE_HTRANS) - -#define USBCTR_WIN_SIZE_1GB 0x800 - -/* PCI Configuration Registers */ -#define PCI_CONF_OHCI_OFFSET 0x10000 -#define PCI_CONF_EHCI_OFFSET 0x10100 -struct ahb_pciconf { - u32 vid_did; - u32 cmnd_sts; - u32 rev; - u32 cache_line; - u32 basead; -}; - -/* PCI Configuration Registers for AHB-PCI Bridge Registers */ -#define PCI_CONF_AHBPCI_OFFSET 0x10000 -struct ahbconf_pci_bridge { - u32 vid_did; /* 0x00 */ - u32 cmnd_sts; - u32 revid_cc; - u32 cls_lt_ht_bist; - u32 basead; /* 0x10 */ - u32 win1_basead; - u32 win2_basead; - u32 dummy0[5]; - u32 ssvdi_ssid; /* 0x2C */ - u32 dummy1[4]; - u32 intr_line_pin; -}; - -/* AHB-PCI Bridge PCI Communication Registers */ -#define AHBPCI_OFFSET 0x10800 -struct ahbcom_pci_bridge { - u32 pciahb_win1_ctr; /* 0x00 */ - u32 pciahb_win2_ctr; - u32 pciahb_dct_ctr; - u32 dummy0; - u32 ahbpci_win1_ctr; /* 0x10 */ - u32 ahbpci_win2_ctr; - u32 dummy1; - u32 ahbpci_dct_ctr; - u32 pci_int_enable; /* 0x20 */ - u32 pci_int_status; - u32 dummy2[2]; - u32 ahb_bus_ctr; /* 0x30 */ - u32 usbctr; - u32 dummy3[2]; - u32 pci_arbiter_ctr; /* 0x40 */ - u32 dummy4; - u32 pci_unit_rev; /* 0x48 */ -}; - -struct rmobile_ehci_reg { - u32 hciversion; /* hciversion/caplength */ - u32 hcsparams; /* hcsparams */ - u32 hccparams; /* hccparams */ - u32 hcsp_portroute; /* hcsp_portroute */ - u32 usbcmd; /* usbcmd */ - u32 usbsts; /* usbsts */ - u32 usbintr; /* usbintr */ - u32 frindex; /* frindex */ - u32 ctrldssegment; /* ctrldssegment */ - u32 periodiclistbase; /* periodiclistbase */ - u32 asynclistaddr; /* asynclistaddr */ - u32 dummy[9]; - u32 configflag; /* configflag */ - u32 portsc; /* portsc */ -}; - -#endif /* __EHCI_RMOBILE_H__ */ diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index cce78846d98..3d3dd5f279f 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -41,7 +41,6 @@ obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o obj-$(CONFIG_USB_EHCI_VF) += ehci-vf.o -obj-$(CONFIG_USB_EHCI_RMOBILE) += ehci-rmobile.o obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o

# xhci diff --git a/drivers/usb/host/ehci-rmobile.c b/drivers/usb/host/ehci-rmobile.c deleted file mode 100644 index 60525f22867..00000000000 --- a/drivers/usb/host/ehci-rmobile.c +++ /dev/null @@ -1,129 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * EHCI HCD (Host Controller Driver) for USB. - * - * Copyright (C) 2013,2014 Renesas Electronics Corporation - * Copyright (C) 2014 Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com - */ - -#include <common.h> -#include <asm/io.h> -#include <asm/arch/ehci-rmobile.h> -#include <linux/delay.h> -#include "ehci.h" - -#if defined(CONFIG_R8A7740) -static u32 usb_base_address[] = { - 0xC6700000 -}; -#elif defined(CONFIG_R8A7790) -static u32 usb_base_address[] = { - 0xEE080000, /* USB0 (EHCI) */ - 0xEE0A0000, /* USB1 */ - 0xEE0C0000, /* USB2 */ -}; -#elif defined(CONFIG_R8A7791) || defined(CONFIG_R8A7793) || \ - defined(CONFIG_R8A7794) -static u32 usb_base_address[] = { - 0xEE080000, /* USB0 (EHCI) */ - 0xEE0C0000, /* USB1 */ -}; -#else -#error rmobile EHCI USB driver not supported on this platform -#endif - -int ehci_hcd_stop(int index) -{ - int i; - u32 base; - struct ahbcom_pci_bridge *ahbcom_pci; - - base = usb_base_address[index]; - ahbcom_pci = (struct ahbcom_pci_bridge *)(base + AHBPCI_OFFSET); - writel(0, &ahbcom_pci->ahb_bus_ctr); - - /* reset ehci */ - setbits_le32(base + EHCI_USBCMD, CMD_RESET); - for (i = 100; i > 0; i--) { - if (!(readl(base + EHCI_USBCMD) & CMD_RESET)) - break; - udelay(100); - } - - if (!i) - printf("error : ehci(%d) reset failed.\n", index); - - if (index == (ARRAY_SIZE(usb_base_address) - 1)) - setbits_le32(SMSTPCR7, SMSTPCR703); - - return 0; -} - -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - u32 base; - u32 phys_base; - struct rmobile_ehci_reg *rehci; - struct ahbcom_pci_bridge *ahbcom_pci; - struct ahbconf_pci_bridge *ahbconf_pci; - struct ahb_pciconf *ahb_pciconf_ohci; - struct ahb_pciconf *ahb_pciconf_ehci; - uint32_t cap_base; - - base = usb_base_address[index]; - phys_base = base; - if (index == 0) - clrbits_le32(SMSTPCR7, SMSTPCR703); - - rehci = (struct rmobile_ehci_reg *)(base + EHCI_OFFSET); - ahbcom_pci = (struct ahbcom_pci_bridge *)(base + AHBPCI_OFFSET); - ahbconf_pci = - (struct ahbconf_pci_bridge *)(base + PCI_CONF_AHBPCI_OFFSET); - ahb_pciconf_ohci = (struct ahb_pciconf *)(base + PCI_CONF_OHCI_OFFSET); - ahb_pciconf_ehci = (struct ahb_pciconf *)(base + PCI_CONF_EHCI_OFFSET); - - /* Clock & Reset & Direct Power Down */ - clrsetbits_le32(&ahbcom_pci->usbctr, - (DIRPD | PCICLK_MASK | USBH_RST), USBCTR_WIN_SIZE_1GB); - clrbits_le32(&ahbcom_pci->usbctr, PLL_RST); - - /* AHB-PCI Bridge Communication Registers */ - writel(AHB_BUS_CTR_INIT, &ahbcom_pci->ahb_bus_ctr); - writel((CFG_SYS_SDRAM_BASE & 0xf0000000) | PCIAHB_WIN_PREFETCH, - &ahbcom_pci->pciahb_win1_ctr); - writel(0xf0000000 | PCIAHB_WIN_PREFETCH, - &ahbcom_pci->pciahb_win2_ctr); - writel(phys_base | PCIWIN2_PCICMD, &ahbcom_pci->ahbpci_win2_ctr); - - setbits_le32(&ahbcom_pci->pci_arbiter_ctr, - PCIBP_MODE | PCIREQ1 | PCIREQ0); - - /* PCI Configuration Registers for AHBPCI */ - writel(PCIWIN1_PCICMD | AHB_CFG_AHBPCI, - &ahbcom_pci->ahbpci_win1_ctr); - writel(phys_base + AHBPCI_OFFSET, &ahbconf_pci->basead); - writel(CFG_SYS_SDRAM_BASE & 0xf0000000, &ahbconf_pci->win1_basead); - writel(0xf0000000, &ahbconf_pci->win2_basead); - writel(SERREN | PERREN | MASTEREN | MEMEN, - &ahbconf_pci->cmnd_sts); - - /* PCI Configuration Registers for EHCI */ - writel(PCIWIN1_PCICMD | AHB_CFG_HOST, &ahbcom_pci->ahbpci_win1_ctr); - writel(phys_base + OHCI_OFFSET, &ahb_pciconf_ohci->basead); - writel(phys_base + EHCI_OFFSET, &ahb_pciconf_ehci->basead); - writel(SERREN | PERREN | MASTEREN | MEMEN, - &ahb_pciconf_ohci->cmnd_sts); - writel(SERREN | PERREN | MASTEREN | MEMEN, - &ahb_pciconf_ehci->cmnd_sts); - - /* Enable PCI interrupt */ - setbits_le32(&ahbcom_pci->pci_int_enable, - USBH_PMEEN | USBH_INTBEN | USBH_INTAEN); - - *hccr = (struct ehci_hccr *)((uint32_t)&rehci->hciversion); - cap_base = ehci_readl(&(*hccr)->cr_capbase); - *hcor = (struct ehci_hcor *)((uint32_t)*hccr + HC_LENGTH(cap_base)); - - return 0; -}

This is not used. Drop the driver and Kconfig option.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

drivers/usb/host/Makefile | 1 - drivers/usb/host/sl811-hcd.c | 714 ----------------------------------- drivers/usb/host/sl811.h | 104 ----- 3 files changed, 819 deletions(-) delete mode 100644 drivers/usb/host/sl811-hcd.c delete mode 100644 drivers/usb/host/sl811.h

diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 3e5ba2bd0ba..8dad36f9369 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -17,7 +17,6 @@ obj-$(CONFIG_USB_OHCI_NEW) += ohci-hcd.o obj-$(CONFIG_USB_ATMEL) += ohci-at91.o obj-$(CONFIG_USB_OHCI_DA8XX) += ohci-da8xx.o obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o -obj-$(CONFIG_USB_SL811HS) += sl811-hcd.o obj-$(CONFIG_USB_OHCI_LPC32XX) += ohci-lpc32xx.o obj-$(CONFIG_USB_OHCI_PCI) += ohci-pci.o obj-$(CONFIG_USB_OHCI_GENERIC) += ohci-generic.o diff --git a/drivers/usb/host/sl811-hcd.c b/drivers/usb/host/sl811-hcd.c deleted file mode 100644 index 7c823f241a8..00000000000 --- a/drivers/usb/host/sl811-hcd.c +++ /dev/null @@ -1,714 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * This code is based on linux driver for sl811hs chip, source at - * drivers/usb/host/sl811.c: - * - * SL811 Host Controller Interface driver for USB. - * - * Copyright (c) 2003/06, Courage Co., Ltd. - * - * Based on: - * 1.uhci.c by Linus Torvalds, Johannes Erdfelt, Randy Dunlap, - * Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, - * Adam Richter, Gregory P. Smith; - * 2.Original SL811 driver (hc_sl811.o) by Pei Liu pbl@cypress.com - * 3.Rewrited as sl811.o by Yin Aihua yinah:couragetech.com.cn - */ - -#include <common.h> -#include <mpc8xx.h> -#include <usb.h> -#include <linux/delay.h> -#include "sl811.h" - -#include "../../../board/kup/common/kup.h" - -#ifdef __PPC__ -# define EIEIO __asm__ volatile ("eieio") -#else -# define EIEIO /* nothing */ -#endif - -#define SL811_ADR (0x50000000) -#define SL811_DAT (0x50000001) - -#ifdef SL811_DEBUG -static int debug = 9; -#endif - -static int root_hub_devnum = 0; -static struct usb_port_status rh_status = { 0 };/* root hub port status */ - -static int sl811_rh_submit_urb(struct usb_device *usb_dev, unsigned long pipe, - void *data, int buf_len, struct devrequest *cmd); - -static void sl811_write (__u8 index, __u8 data) -{ - *(volatile unsigned char *) (SL811_ADR) = index; - EIEIO; - *(volatile unsigned char *) (SL811_DAT) = data; - EIEIO; -} - -static __u8 sl811_read (__u8 index) -{ - __u8 data; - - *(volatile unsigned char *) (SL811_ADR) = index; - EIEIO; - data = *(volatile unsigned char *) (SL811_DAT); - EIEIO; - return (data); -} - -/* - * Read consecutive bytes of data from the SL811H/SL11H buffer - */ -static void inline sl811_read_buf(__u8 offset, __u8 *buf, __u8 size) -{ - *(volatile unsigned char *) (SL811_ADR) = offset; - EIEIO; - while (size--) { - *buf++ = *(volatile unsigned char *) (SL811_DAT); - EIEIO; - } -} - -/* - * Write consecutive bytes of data to the SL811H/SL11H buffer - */ -static void inline sl811_write_buf(__u8 offset, __u8 *buf, __u8 size) -{ - *(volatile unsigned char *) (SL811_ADR) = offset; - EIEIO; - while (size--) { - *(volatile unsigned char *) (SL811_DAT) = *buf++; - EIEIO; - } -} - -int usb_init_kup4x (void) -{ - volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; - volatile memctl8xx_t *memctl = &immap->im_memctl; - int i; - unsigned char tmp; - - memctl = &immap->im_memctl; - memctl->memc_or7 = 0xFFFF8726; - memctl->memc_br7 = 0x50000401; /* start at 0x50000000 */ - /* BP 14 low = USB ON */ - immap->im_cpm.cp_pbdat &= ~(BP_USB_VCC); - /* PB 14 nomal port */ - immap->im_cpm.cp_pbpar &= ~(BP_USB_VCC); - /* output */ - immap->im_cpm.cp_pbdir |= (BP_USB_VCC); - - puts ("USB: "); - - for (i = 0x10; i < 0xff; i++) { - sl811_write(i, i); - tmp = (sl811_read(i)); - if (tmp != i) { - printf ("SL811 compare error index=0x%02x read=0x%02x\n", i, tmp); - return (-1); - } - } - printf ("SL811 ready\n"); - return (0); -} - -/* - * This function resets SL811HS controller and detects the speed of - * the connecting device - * - * Return: 0 = no device attached; 1 = USB device attached - */ -static int sl811_hc_reset(void) -{ - int status ; - - sl811_write(SL811_CTRL2, SL811_CTL2_HOST | SL811_12M_HI); - sl811_write(SL811_CTRL1, SL811_CTRL1_RESET); - - mdelay(20); - - /* Disable hardware SOF generation, clear all irq status. */ - sl811_write(SL811_CTRL1, 0); - mdelay(2); - sl811_write(SL811_INTRSTS, 0xff); - status = sl811_read(SL811_INTRSTS); - - if (status & SL811_INTR_NOTPRESENT) { - /* Device is not present */ - PDEBUG(0, "Device not present\n"); - rh_status.wPortStatus &= ~(USB_PORT_STAT_CONNECTION | USB_PORT_STAT_ENABLE); - rh_status.wPortChange |= USB_PORT_STAT_C_CONNECTION; - sl811_write(SL811_INTR, SL811_INTR_INSRMV); - return 0; - } - - /* Send SOF to address 0, endpoint 0. */ - sl811_write(SL811_LEN_B, 0); - sl811_write(SL811_PIDEP_B, PIDEP(USB_PID_SOF, 0)); - sl811_write(SL811_DEV_B, 0x00); - sl811_write(SL811_SOFLOW, SL811_12M_LOW); - - if (status & SL811_INTR_SPEED_FULL) { - /* full speed device connect directly to root hub */ - PDEBUG (0, "Full speed Device attached\n"); - - sl811_write(SL811_CTRL1, SL811_CTRL1_RESET); - mdelay(20); - sl811_write(SL811_CTRL2, SL811_CTL2_HOST | SL811_12M_HI); - sl811_write(SL811_CTRL1, SL811_CTRL1_SOF); - - /* start the SOF or EOP */ - sl811_write(SL811_CTRL_B, SL811_USB_CTRL_ARM); - rh_status.wPortStatus |= USB_PORT_STAT_CONNECTION; - rh_status.wPortStatus &= ~USB_PORT_STAT_LOW_SPEED; - mdelay(2); - sl811_write(SL811_INTRSTS, 0xff); - } else { - /* slow speed device connect directly to root-hub */ - PDEBUG(0, "Low speed Device attached\n"); - - sl811_write(SL811_CTRL1, SL811_CTRL1_RESET); - mdelay(20); - sl811_write(SL811_CTRL2, SL811_CTL2_HOST | SL811_CTL2_DSWAP | SL811_12M_HI); - sl811_write(SL811_CTRL1, SL811_CTRL1_SPEED_LOW | SL811_CTRL1_SOF); - - /* start the SOF or EOP */ - sl811_write(SL811_CTRL_B, SL811_USB_CTRL_ARM); - rh_status.wPortStatus |= USB_PORT_STAT_CONNECTION | USB_PORT_STAT_LOW_SPEED; - mdelay(2); - sl811_write(SL811_INTRSTS, 0xff); - } - - rh_status.wPortChange |= USB_PORT_STAT_C_CONNECTION; - sl811_write(SL811_INTR, /*SL811_INTR_INSRMV*/SL811_INTR_DONE_A); - - return 1; -} - -int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) -{ - root_hub_devnum = 0; - sl811_hc_reset(); - return 0; -} - -int usb_lowlevel_stop(int index) -{ - sl811_hc_reset(); - return 0; -} - -static int calc_needed_buswidth(int bytes, int need_preamble) -{ - return !need_preamble ? bytes * 8 + 256 : 8 * 8 * bytes + 2048; -} - -static int sl811_send_packet(struct usb_device *dev, unsigned long pipe, __u8 *buffer, int len) -{ - __u8 ctrl = SL811_USB_CTRL_ARM | SL811_USB_CTRL_ENABLE; - __u16 status = 0; - int err = 0, time_start = get_timer(0); - int need_preamble = !(rh_status.wPortStatus & USB_PORT_STAT_LOW_SPEED) && - (dev->speed == USB_SPEED_LOW); - - if (len > 239) - return -1; - - if (usb_pipeout(pipe)) - ctrl |= SL811_USB_CTRL_DIR_OUT; - if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) - ctrl |= SL811_USB_CTRL_TOGGLE_1; - if (need_preamble) - ctrl |= SL811_USB_CTRL_PREAMBLE; - - sl811_write(SL811_INTRSTS, 0xff); - - while (err < 3) { - sl811_write(SL811_ADDR_A, 0x10); - sl811_write(SL811_LEN_A, len); - if (usb_pipeout(pipe) && len) - sl811_write_buf(0x10, buffer, len); - - if (!(rh_status.wPortStatus & USB_PORT_STAT_LOW_SPEED) && - sl811_read(SL811_SOFCNTDIV)*64 < calc_needed_buswidth(len, need_preamble)) - ctrl |= SL811_USB_CTRL_SOF; - else - ctrl &= ~SL811_USB_CTRL_SOF; - - sl811_write(SL811_CTRL_A, ctrl); - while (!(sl811_read(SL811_INTRSTS) & SL811_INTR_DONE_A)) { - if (5*CONFIG_SYS_HZ < get_timer(time_start)) { - printf("USB transmit timed out\n"); - return -USB_ST_CRC_ERR; - } - } - - sl811_write(SL811_INTRSTS, 0xff); - status = sl811_read(SL811_STS_A); - - if (status & SL811_USB_STS_ACK) { - int remainder = sl811_read(SL811_CNT_A); - if (remainder) { - PDEBUG(0, "usb transfer remainder = %d\n", remainder); - len -= remainder; - } - if (usb_pipein(pipe) && len) - sl811_read_buf(0x10, buffer, len); - return len; - } - - if ((status & SL811_USB_STS_NAK) == SL811_USB_STS_NAK) - continue; - - PDEBUG(0, "usb transfer error %#x\n", (int)status); - err++; - } - - err = 0; - - if (status & SL811_USB_STS_ERROR) - err |= USB_ST_BUF_ERR; - if (status & SL811_USB_STS_TIMEOUT) - err |= USB_ST_CRC_ERR; - if (status & SL811_USB_STS_STALL) - err |= USB_ST_STALLED; - - return -err; -} - -int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer, - int len) -{ - int dir_out = usb_pipeout(pipe); - int ep = usb_pipeendpoint(pipe); - int max = usb_maxpacket(dev, pipe); - int done = 0; - - PDEBUG(7, "dev = %ld pipe = %ld buf = %p size = %d dir_out = %d\n", - usb_pipedevice(pipe), usb_pipeendpoint(pipe), buffer, len, dir_out); - - dev->status = 0; - - sl811_write(SL811_DEV_A, usb_pipedevice(pipe)); - sl811_write(SL811_PIDEP_A, PIDEP(!dir_out ? USB_PID_IN : USB_PID_OUT, ep)); - while (done < len) { - int res = sl811_send_packet(dev, pipe, (__u8*)buffer+done, - max > len - done ? len - done : max); - if (res < 0) { - dev->status = -res; - return res; - } - - if (!dir_out && res < max) /* short packet */ - break; - - done += res; - usb_dotoggle(dev, ep, dir_out); - } - - dev->act_len = done; - - return 0; -} - -int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, - int len,struct devrequest *setup) -{ - int done = 0; - int devnum = usb_pipedevice(pipe); - int ep = usb_pipeendpoint(pipe); - - dev->status = 0; - - if (devnum == root_hub_devnum) - return sl811_rh_submit_urb(dev, pipe, buffer, len, setup); - - PDEBUG(7, "dev = %d pipe = %ld buf = %p size = %d rt = %#x req = %#x bus = %i\n", - devnum, ep, buffer, len, (int)setup->requesttype, - (int)setup->request, sl811_read(SL811_SOFCNTDIV)*64); - - sl811_write(SL811_DEV_A, devnum); - sl811_write(SL811_PIDEP_A, PIDEP(USB_PID_SETUP, ep)); - /* setup phase */ - usb_settoggle(dev, ep, 1, 0); - if (sl811_send_packet(dev, usb_sndctrlpipe(dev, ep), - (__u8*)setup, sizeof(*setup)) == sizeof(*setup)) { - int dir_in = usb_pipein(pipe); - int max = usb_maxpacket(dev, pipe); - - /* data phase */ - sl811_write(SL811_PIDEP_A, - PIDEP(dir_in ? USB_PID_IN : USB_PID_OUT, ep)); - usb_settoggle(dev, ep, usb_pipeout(pipe), 1); - while (done < len) { - int res = sl811_send_packet(dev, pipe, (__u8*)buffer+done, - max > len - done ? len - done : max); - if (res < 0) { - PDEBUG(0, "status data failed!\n"); - dev->status = -res; - return 0; - } - done += res; - usb_dotoggle(dev, ep, usb_pipeout(pipe)); - if (dir_in && res < max) /* short packet */ - break; - } - - /* status phase */ - sl811_write(SL811_PIDEP_A, - PIDEP(!dir_in ? USB_PID_IN : USB_PID_OUT, ep)); - usb_settoggle(dev, ep, !usb_pipeout(pipe), 1); - if (sl811_send_packet(dev, - !dir_in ? usb_rcvctrlpipe(dev, ep) : - usb_sndctrlpipe(dev, ep), - 0, 0) < 0) { - PDEBUG(0, "status phase failed!\n"); - dev->status = -1; - } - } else { - PDEBUG(0, "setup phase failed!\n"); - dev->status = -1; - } - - dev->act_len = done; - - return done; -} - -int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, - int len, int interval, bool nonblock) -{ - PDEBUG(0, "dev = %p pipe = %#lx buf = %p size = %d int = %d\n", dev, pipe, - buffer, len, interval); - return -1; -} - -/* - * SL811 Virtual Root Hub - */ - -/* Device descriptor */ -static __u8 sl811_rh_dev_des[] = -{ - 0x12, /* __u8 bLength; */ - 0x01, /* __u8 bDescriptorType; Device */ - 0x10, /* __u16 bcdUSB; v1.1 */ - 0x01, - 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */ - 0x00, /* __u8 bDeviceSubClass; */ - 0x00, /* __u8 bDeviceProtocol; */ - 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */ - 0x00, /* __u16 idVendor; */ - 0x00, - 0x00, /* __u16 idProduct; */ - 0x00, - 0x00, /* __u16 bcdDevice; */ - 0x00, - 0x00, /* __u8 iManufacturer; */ - 0x02, /* __u8 iProduct; */ - 0x01, /* __u8 iSerialNumber; */ - 0x01 /* __u8 bNumConfigurations; */ -}; - -/* Configuration descriptor */ -static __u8 sl811_rh_config_des[] = -{ - 0x09, /* __u8 bLength; */ - 0x02, /* __u8 bDescriptorType; Configuration */ - 0x19, /* __u16 wTotalLength; */ - 0x00, - 0x01, /* __u8 bNumInterfaces; */ - 0x01, /* __u8 bConfigurationValue; */ - 0x00, /* __u8 iConfiguration; */ - 0x40, /* __u8 bmAttributes; - Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, - 4..0: resvd */ - 0x00, /* __u8 MaxPower; */ - - /* interface */ - 0x09, /* __u8 if_bLength; */ - 0x04, /* __u8 if_bDescriptorType; Interface */ - 0x00, /* __u8 if_bInterfaceNumber; */ - 0x00, /* __u8 if_bAlternateSetting; */ - 0x01, /* __u8 if_bNumEndpoints; */ - 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */ - 0x00, /* __u8 if_bInterfaceSubClass; */ - 0x00, /* __u8 if_bInterfaceProtocol; */ - 0x00, /* __u8 if_iInterface; */ - - /* endpoint */ - 0x07, /* __u8 ep_bLength; */ - 0x05, /* __u8 ep_bDescriptorType; Endpoint */ - 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */ - 0x03, /* __u8 ep_bmAttributes; Interrupt */ - 0x08, /* __u16 ep_wMaxPacketSize; */ - 0x00, - 0xff /* __u8 ep_bInterval; 255 ms */ -}; - -/* root hub class descriptor*/ -static __u8 sl811_rh_hub_des[] = -{ - 0x09, /* __u8 bLength; */ - 0x29, /* __u8 bDescriptorType; Hub-descriptor */ - 0x01, /* __u8 bNbrPorts; */ - 0x00, /* __u16 wHubCharacteristics; */ - 0x00, - 0x50, /* __u8 bPwrOn2pwrGood; 2ms */ - 0x00, /* __u8 bHubContrCurrent; 0 mA */ - 0xfc, /* __u8 DeviceRemovable; *** 7 Ports max *** */ - 0xff /* __u8 PortPwrCtrlMask; *** 7 ports max *** */ -}; - -/* - * helper routine for returning string descriptors in UTF-16LE - * input can actually be ISO-8859-1; ASCII is its 7-bit subset - */ -static int ascii2utf (char *s, u8 *utf, int utfmax) -{ - int retval; - - for (retval = 0; *s && utfmax > 1; utfmax -= 2, retval += 2) { - *utf++ = *s++; - *utf++ = 0; - } - return retval; -} - -/* - * root_hub_string is used by each host controller's root hub code, - * so that they're identified consistently throughout the system. - */ -static int usb_root_hub_string (int id, int serial, char *type, __u8 *data, int len) -{ - char buf [30]; - - /* assert (len > (2 * (sizeof (buf) + 1))); - assert (strlen (type) <= 8);*/ - - /* language ids */ - if (id == 0) { - *data++ = 4; *data++ = 3; /* 4 bytes data */ - *data++ = 0; *data++ = 0; /* some language id */ - return 4; - - /* serial number */ - } else if (id == 1) { - sprintf (buf, "%#x", serial); - - /* product description */ - } else if (id == 2) { - sprintf (buf, "USB %s Root Hub", type); - - /* id 3 == vendor description */ - - /* unsupported IDs --> "stall" */ - } else - return 0; - - ascii2utf (buf, data + 2, len - 2); - data [0] = 2 + strlen(buf) * 2; - data [1] = 3; - return data [0]; -} - -/* helper macro */ -#define OK(x) len = (x); break - -/* - * This function handles all USB request to the the virtual root hub - */ -static int sl811_rh_submit_urb(struct usb_device *usb_dev, unsigned long pipe, - void *data, int buf_len, struct devrequest *cmd) -{ - __u8 data_buf[16]; - __u8 *bufp = data_buf; - int len = 0; - int status = 0; - __u16 bmRType_bReq; - __u16 wValue = le16_to_cpu (cmd->value); - __u16 wLength = le16_to_cpu (cmd->length); -#ifdef SL811_DEBUG - __u16 wIndex = le16_to_cpu (cmd->index); -#endif - - if (usb_pipeint(pipe)) { - PDEBUG(0, "interrupt transfer unimplemented!\n"); - return 0; - } - - bmRType_bReq = cmd->requesttype | (cmd->request << 8); - - PDEBUG(5, "submit rh urb, req = %d(%x) val = %#x index = %#x len=%d\n", - bmRType_bReq, bmRType_bReq, wValue, wIndex, wLength); - - /* Request Destination: - without flags: Device, - USB_RECIP_INTERFACE: interface, - USB_RECIP_ENDPOINT: endpoint, - USB_TYPE_CLASS means HUB here, - USB_RECIP_OTHER | USB_TYPE_CLASS almost ever means HUB_PORT here - */ - switch (bmRType_bReq) { - case RH_GET_STATUS: - *(__u16 *)bufp = cpu_to_le16(1); - OK(2); - - case RH_GET_STATUS | USB_RECIP_INTERFACE: - *(__u16 *)bufp = cpu_to_le16(0); - OK(2); - - case RH_GET_STATUS | USB_RECIP_ENDPOINT: - *(__u16 *)bufp = cpu_to_le16(0); - OK(2); - - case RH_GET_STATUS | USB_TYPE_CLASS: - *(__u32 *)bufp = cpu_to_le32(0); - OK(4); - - case RH_GET_STATUS | USB_RECIP_OTHER | USB_TYPE_CLASS: - *(__u32 *)bufp = cpu_to_le32(rh_status.wPortChange<<16 | rh_status.wPortStatus); - OK(4); - - case RH_CLEAR_FEATURE | USB_RECIP_ENDPOINT: - switch (wValue) { - case 1: - OK(0); - } - break; - - case RH_CLEAR_FEATURE | USB_TYPE_CLASS: - switch (wValue) { - case C_HUB_LOCAL_POWER: - OK(0); - - case C_HUB_OVER_CURRENT: - OK(0); - } - break; - - case RH_CLEAR_FEATURE | USB_RECIP_OTHER | USB_TYPE_CLASS: - switch (wValue) { - case USB_PORT_FEAT_ENABLE: - rh_status.wPortStatus &= ~USB_PORT_STAT_ENABLE; - OK(0); - - case USB_PORT_FEAT_SUSPEND: - rh_status.wPortStatus &= ~USB_PORT_STAT_SUSPEND; - OK(0); - - case USB_PORT_FEAT_POWER: - rh_status.wPortStatus &= ~USB_PORT_STAT_POWER; - OK(0); - - case USB_PORT_FEAT_C_CONNECTION: - rh_status.wPortChange &= ~USB_PORT_STAT_C_CONNECTION; - OK(0); - - case USB_PORT_FEAT_C_ENABLE: - rh_status.wPortChange &= ~USB_PORT_STAT_C_ENABLE; - OK(0); - - case USB_PORT_FEAT_C_SUSPEND: - rh_status.wPortChange &= ~USB_PORT_STAT_C_SUSPEND; - OK(0); - - case USB_PORT_FEAT_C_OVER_CURRENT: - rh_status.wPortChange &= ~USB_PORT_STAT_C_OVERCURRENT; - OK(0); - - case USB_PORT_FEAT_C_RESET: - rh_status.wPortChange &= ~USB_PORT_STAT_C_RESET; - OK(0); - } - break; - - case RH_SET_FEATURE | USB_RECIP_OTHER | USB_TYPE_CLASS: - switch (wValue) { - case USB_PORT_FEAT_SUSPEND: - rh_status.wPortStatus |= USB_PORT_STAT_SUSPEND; - OK(0); - - case USB_PORT_FEAT_RESET: - rh_status.wPortStatus |= USB_PORT_STAT_RESET; - rh_status.wPortChange = 0; - rh_status.wPortChange |= USB_PORT_STAT_C_RESET; - rh_status.wPortStatus &= ~USB_PORT_STAT_RESET; - rh_status.wPortStatus |= USB_PORT_STAT_ENABLE; - OK(0); - - case USB_PORT_FEAT_POWER: - rh_status.wPortStatus |= USB_PORT_STAT_POWER; - OK(0); - - case USB_PORT_FEAT_ENABLE: - rh_status.wPortStatus |= USB_PORT_STAT_ENABLE; - OK(0); - } - break; - - case RH_SET_ADDRESS: - root_hub_devnum = wValue; - OK(0); - - case RH_GET_DESCRIPTOR: - switch ((wValue & 0xff00) >> 8) { - case USB_DT_DEVICE: - len = sizeof(sl811_rh_dev_des); - bufp = sl811_rh_dev_des; - OK(len); - - case USB_DT_CONFIG: - len = sizeof(sl811_rh_config_des); - bufp = sl811_rh_config_des; - OK(len); - - case USB_DT_STRING: - len = usb_root_hub_string(wValue & 0xff, (int)(long)0, "SL811HS", data, wLength); - if (len > 0) { - bufp = data; - OK(len); - } - - default: - status = -32; - } - break; - - case RH_GET_DESCRIPTOR | USB_TYPE_CLASS: - len = sizeof(sl811_rh_hub_des); - bufp = sl811_rh_hub_des; - OK(len); - - case RH_GET_CONFIGURATION: - bufp[0] = 0x01; - OK(1); - - case RH_SET_CONFIGURATION: - OK(0); - - default: - PDEBUG(1, "unsupported root hub command\n"); - status = -32; - } - - len = min(len, buf_len); - if (data != bufp) - memcpy(data, bufp, len); - - PDEBUG(5, "len = %d, status = %d\n", len, status); - - usb_dev->status = status; - usb_dev->act_len = len; - - return status == 0 ? len : status; -} diff --git a/drivers/usb/host/sl811.h b/drivers/usb/host/sl811.h deleted file mode 100644 index c1f9f013bd1..00000000000 --- a/drivers/usb/host/sl811.h +++ /dev/null @@ -1,104 +0,0 @@ -#ifndef __UBOOT_SL811_H -#define __UBOOT_SL811_H - -#undef SL811_DEBUG - -#ifdef SL811_DEBUG - #define PDEBUG(level, fmt, args...) \ - if (debug >= (level)) printf("[%s:%d] " fmt, \ - __PRETTY_FUNCTION__, __LINE__ , ## args) -#else - #define PDEBUG(level, fmt, args...) do {} while(0) -#endif - -/* Sl811 host control register */ -#define SL811_CTRL_A 0x00 -#define SL811_ADDR_A 0x01 -#define SL811_LEN_A 0x02 -#define SL811_STS_A 0x03 /* read */ -#define SL811_PIDEP_A 0x03 /* write */ -#define SL811_CNT_A 0x04 /* read */ -#define SL811_DEV_A 0x04 /* write */ -#define SL811_CTRL1 0x05 -#define SL811_INTR 0x06 -#define SL811_CTRL_B 0x08 -#define SL811_ADDR_B 0x09 -#define SL811_LEN_B 0x0A -#define SL811_STS_B 0x0B /* read */ -#define SL811_PIDEP_B 0x0B /* write */ -#define SL811_CNT_B 0x0C /* read */ -#define SL811_DEV_B 0x0C /* write */ -#define SL811_INTRSTS 0x0D /* write clears bitwise */ -#define SL811_HWREV 0x0E /* read */ -#define SL811_SOFLOW 0x0E /* write */ -#define SL811_SOFCNTDIV 0x0F /* read */ -#define SL811_CTRL2 0x0F /* write */ - -/* USB control register bits (addr 0x00 and addr 0x08) */ -#define SL811_USB_CTRL_ARM 0x01 -#define SL811_USB_CTRL_ENABLE 0x02 -#define SL811_USB_CTRL_DIR_OUT 0x04 -#define SL811_USB_CTRL_ISO 0x10 -#define SL811_USB_CTRL_SOF 0x20 -#define SL811_USB_CTRL_TOGGLE_1 0x40 -#define SL811_USB_CTRL_PREAMBLE 0x80 - -/* USB status register bits (addr 0x03 and addr 0x0B) */ -#define SL811_USB_STS_ACK 0x01 -#define SL811_USB_STS_ERROR 0x02 -#define SL811_USB_STS_TIMEOUT 0x04 -#define SL811_USB_STS_TOGGLE_1 0x08 -#define SL811_USB_STS_SETUP 0x10 -#define SL811_USB_STS_OVERFLOW 0x20 -#define SL811_USB_STS_NAK 0x40 -#define SL811_USB_STS_STALL 0x80 - -/* Control register 1 bits (addr 0x05) */ -#define SL811_CTRL1_SOF 0x01 -#define SL811_CTRL1_RESET 0x08 -#define SL811_CTRL1_JKSTATE 0x10 -#define SL811_CTRL1_SPEED_LOW 0x20 -#define SL811_CTRL1_SUSPEND 0x40 - -/* Interrut enable (addr 0x06) and interrupt status register bits (addr 0x0D) */ -#define SL811_INTR_DONE_A 0x01 -#define SL811_INTR_DONE_B 0x02 -#define SL811_INTR_SOF 0x10 -#define SL811_INTR_INSRMV 0x20 -#define SL811_INTR_DETECT 0x40 -#define SL811_INTR_NOTPRESENT 0x40 -#define SL811_INTR_SPEED_FULL 0x80 /* only in status reg */ - -/* HW rev and SOF lo register bits (addr 0x0E) */ -#define SL811_HWR_HWREV 0xF0 - -/* SOF counter and control reg 2 (addr 0x0F) */ -#define SL811_CTL2_SOFHI 0x3F -#define SL811_CTL2_DSWAP 0x40 -#define SL811_CTL2_HOST 0x80 - -/* Set up for 1-ms SOF time. */ -#define SL811_12M_LOW 0xE0 -#define SL811_12M_HI 0x2E - -#define SL811_DATA_START 0x10 -#define SL811_DATA_LIMIT 240 - -/* Requests: bRequest << 8 | bmRequestType */ -#define RH_GET_STATUS 0x0080 -#define RH_CLEAR_FEATURE 0x0100 -#define RH_SET_FEATURE 0x0300 -#define RH_SET_ADDRESS 0x0500 -#define RH_GET_DESCRIPTOR 0x0680 -#define RH_SET_DESCRIPTOR 0x0700 -#define RH_GET_CONFIGURATION 0x0880 -#define RH_SET_CONFIGURATION 0x0900 -#define RH_GET_STATE 0x0280 -#define RH_GET_INTERFACE 0x0A80 -#define RH_SET_INTERFACE 0x0B00 -#define RH_SYNC_FRAME 0x0C80 - - -#define PIDEP(pid, ep) (((pid) & 0x0f) << 4 | (ep)) - -#endif /* __UBOOT_SL811_H */

This is not used. Drop the driver and Kconfig option.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

board/freescale/common/Makefile | 1 - board/freescale/common/vsc3316_3308.c | 530 -------------------------- 2 files changed, 531 deletions(-) delete mode 100644 board/freescale/common/vsc3316_3308.c

diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 5f0503faf8d..c200cf4d403 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -54,7 +54,6 @@ obj-$(CONFIG_TARGET_MPC8548CDS) += cds_pci_ft.o obj-$(CONFIG_TARGET_P3041DS) += ics307_clk.o obj-$(CONFIG_TARGET_P4080DS) += ics307_clk.o obj-$(CONFIG_TARGET_P5040DS) += ics307_clk.o -obj-$(CONFIG_VSC_CROSSBAR) += vsc3316_3308.o obj-$(CONFIG_ZM7300) += zm7300.o ifeq ($(CONFIG_$(SPL_)POWER_LEGACY),y) obj-$(CONFIG_POWER_PFUZE100) += pfuze.o diff --git a/board/freescale/common/vsc3316_3308.c b/board/freescale/common/vsc3316_3308.c deleted file mode 100644 index c51f3c5aca2..00000000000 --- a/board/freescale/common/vsc3316_3308.c +++ /dev/null @@ -1,530 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2012 Freescale Semiconductor, Inc. - * Copyright 2020 NXP - */ - -#include "vsc3316_3308.h" -#include <log.h> - -#define REVISION_ID_REG 0x7E -#define INTERFACE_MODE_REG 0x79 -#define CURRENT_PAGE_REGISTER 0x7F -#define CONNECTION_CONFIG_PAGE 0x00 -#define INPUT_STATE_REG 0x13 -#define GLOBAL_INPUT_ISE1 0x51 -#define GLOBAL_INPUT_ISE2 0x52 -#define GLOBAL_INPUT_GAIN 0x53 -#define GLOBAL_INPUT_LOS 0x55 -#define GLOBAL_OUTPUT_PE1 0x56 -#define GLOBAL_OUTPUT_PE2 0x57 -#define GLOBAL_OUTPUT_LEVEL 0x58 -#define GLOBAL_OUTPUT_TERMINATION 0x5A -#define GLOBAL_CORE_CNTRL 0x5D -#define OUTPUT_MODE_PAGE 0x23 -#define CORE_CONTROL_PAGE 0x25 -#define CORE_CONFIG_REG 0x75 - -int vsc_if_enable(unsigned int vsc_addr) -{ - u8 data; - - debug("VSC:Configuring VSC at I2C address 0x%2x" - " for 2-wire interface\n", vsc_addr); - - /* enable 2-wire Serial InterFace (I2C) */ - data = 0x02; -#if CONFIG_IS_ENABLED(DM_I2C) - int ret, bus_num = 0; - struct udevice *dev; - - ret = i2c_get_chip_for_busnum(bus_num, vsc_addr, - 1, &dev); - if (ret) { - printf("%s: Cannot find udev for a bus %d\n", __func__, - bus_num); - return ret; - } - - return dm_i2c_write(dev, INTERFACE_MODE_REG, &data, 1); -#else - return i2c_write(vsc_addr, INTERFACE_MODE_REG, 1, &data, 1); -#endif -} - -int vsc3316_config(unsigned int vsc_addr, int8_t con_arr[][2], - unsigned int num_con) -{ - unsigned int i; - u8 rev_id = 0; - int ret; - - debug("VSC:Initializing VSC3316 at I2C address 0x%2x" - " for Tx\n", vsc_addr); - -#if CONFIG_IS_ENABLED(DM_I2C) - int bus_num = 0; - struct udevice *dev; - - ret = i2c_get_chip_for_busnum(bus_num, vsc_addr, - 1, &dev); - if (ret) { - printf("%s: Cannot find udev for a bus %d\n", __func__, - bus_num); - return ret; - } - - ret = dm_i2c_read(dev, REVISION_ID_REG, &rev_id, 1); - if (ret < 0) { - printf("VSC:0x%x could not read REV_ID from device.\n", - vsc_addr); - return ret; - } - - if (rev_id != 0xab) { - printf("VSC: device at address 0x%x is not VSC3316/3308.\n", - vsc_addr); - return -ENODEV; - } - - ret = vsc_if_enable(vsc_addr); - if (ret) { - printf("VSC:0x%x could not configured for 2-wire I/F.\n", - vsc_addr); - return ret; - } - - /* config connections - page 0x00 */ - dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, CONNECTION_CONFIG_PAGE); - - /* Making crosspoint connections, by connecting required - * input to output - */ - for (i = 0; i < num_con ; i++) - dm_i2c_reg_write(dev, con_arr[i][1], con_arr[i][0]); - - /* input state - page 0x13 */ - dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, INPUT_STATE_REG); - /* Configuring the required input of the switch */ - for (i = 0; i < num_con ; i++) - dm_i2c_reg_write(dev, con_arr[i][0], 0x80); - - /* Setting Global Input LOS threshold value */ - dm_i2c_reg_write(dev, GLOBAL_INPUT_LOS, 0x60); - - /* config output mode - page 0x23 */ - dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, OUTPUT_MODE_PAGE); - /* Turn ON the Output driver correspond to required output*/ - for (i = 0; i < num_con ; i++) - dm_i2c_reg_write(dev, con_arr[i][1], 0); - - /* configure global core control register, Turn on Global core power */ - dm_i2c_reg_write(dev, GLOBAL_CORE_CNTRL, 0); - -#else - ret = i2c_read(vsc_addr, REVISION_ID_REG, 1, &rev_id, 1); - if (ret < 0) { - printf("VSC:0x%x could not read REV_ID from device.\n", - vsc_addr); - return ret; - } - - if (rev_id != 0xab) { - printf("VSC: device at address 0x%x is not VSC3316/3308.\n", - vsc_addr); - return -ENODEV; - } - - ret = vsc_if_enable(vsc_addr); - if (ret) { - printf("VSC:0x%x could not configured for 2-wire I/F.\n", - vsc_addr); - return ret; - } - - /* config connections - page 0x00 */ - i2c_reg_write(vsc_addr, CURRENT_PAGE_REGISTER, CONNECTION_CONFIG_PAGE); - - /* Making crosspoint connections, by connecting required - * input to output */ - for (i = 0; i < num_con ; i++) - i2c_reg_write(vsc_addr, con_arr[i][1], con_arr[i][0]); - - /* input state - page 0x13 */ - i2c_reg_write(vsc_addr, CURRENT_PAGE_REGISTER, INPUT_STATE_REG); - /* Configuring the required input of the switch */ - for (i = 0; i < num_con ; i++) - i2c_reg_write(vsc_addr, con_arr[i][0], 0x80); - - /* Setting Global Input LOS threshold value */ - i2c_reg_write(vsc_addr, GLOBAL_INPUT_LOS, 0x60); - - /* config output mode - page 0x23 */ - i2c_reg_write(vsc_addr, CURRENT_PAGE_REGISTER, OUTPUT_MODE_PAGE); - /* Turn ON the Output driver correspond to required output*/ - for (i = 0; i < num_con ; i++) - i2c_reg_write(vsc_addr, con_arr[i][1], 0); - - /* configure global core control register, Turn on Global core power */ - i2c_reg_write(vsc_addr, GLOBAL_CORE_CNTRL, 0); -#endif - - vsc_wp_config(vsc_addr); - - return 0; -} - -#ifdef CONFIG_SYS_FSL_B4860QDS_XFI_ERR -int vsc3308_config_adjust(unsigned int vsc_addr, const int8_t con_arr[][2], - unsigned int num_con) -{ - unsigned int i; - u8 rev_id = 0; - int ret; - - debug("VSC:Initializing VSC3308 at I2C address 0x%x for Tx\n", - vsc_addr); - -#if CONFIG_IS_ENABLED(DM_I2C) - int bus_num = 0; - struct udevice *dev; - - ret = i2c_get_chip_for_busnum(bus_num, vsc_addr, - 1, &dev); - if (ret) { - printf("%s: Cannot find udev for a bus %d\n", __func__, - bus_num); - return ret; - } - - ret = dm_i2c_read(dev, REVISION_ID_REG, &rev_id, 1); - if (ret < 0) { - printf("VSC:0x%x could not read REV_ID from device.\n", - vsc_addr); - return ret; - } - - if (rev_id != 0xab) { - printf("VSC: device at address 0x%x is not VSC3316/3308.\n", - vsc_addr); - return -ENODEV; - } - - ret = vsc_if_enable(vsc_addr); - if (ret) { - printf("VSC:0x%x could not configured for 2-wire I/F.\n", - vsc_addr); - return ret; - } - - /* config connections - page 0x00 */ - dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, CONNECTION_CONFIG_PAGE); - - /* Configure Global Input ISE */ - dm_i2c_reg_write(dev, GLOBAL_INPUT_ISE1, 0); - dm_i2c_reg_write(dev, GLOBAL_INPUT_ISE2, 0); - - /* Configure Tx/Rx Global Output PE1 */ - dm_i2c_reg_write(dev, GLOBAL_OUTPUT_PE1, 0); - - /* Configure Tx/Rx Global Output PE2 */ - dm_i2c_reg_write(dev, GLOBAL_OUTPUT_PE2, 0); - - /* Configure Tx/Rx Global Input GAIN */ - dm_i2c_reg_write(dev, GLOBAL_INPUT_GAIN, 0x3F); - - /* Setting Global Input LOS threshold value */ - dm_i2c_reg_write(dev, GLOBAL_INPUT_LOS, 0xE0); - - /* Setting Global output termination */ - dm_i2c_reg_write(dev, GLOBAL_OUTPUT_TERMINATION, 0); - - /* Configure Tx/Rx Global Output level */ - if (vsc_addr == VSC3308_TX_ADDRESS) - dm_i2c_reg_write(dev, GLOBAL_OUTPUT_LEVEL, 4); - else - dm_i2c_reg_write(dev, GLOBAL_OUTPUT_LEVEL, 2); - - /* Making crosspoint connections, by connecting required - * input to output - */ - for (i = 0; i < num_con ; i++) - dm_i2c_reg_write(dev, con_arr[i][1], con_arr[i][0]); - - /* input state - page 0x13 */ - dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, INPUT_STATE_REG); - /* Turning off all the required input of the switch */ - for (i = 0; i < num_con; i++) - dm_i2c_reg_write(dev, con_arr[i][0], 1); - - /* only turn on specific Tx/Rx requested by the XFI erratum */ - if (vsc_addr == VSC3308_TX_ADDRESS) { - dm_i2c_reg_write(dev, 2, 0); - dm_i2c_reg_write(dev, 3, 0); - } else { - dm_i2c_reg_write(dev, 0, 0); - dm_i2c_reg_write(dev, 1, 0); - } - - /* config output mode - page 0x23 */ - dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, OUTPUT_MODE_PAGE); - /* Turn off the Output driver correspond to required output*/ - for (i = 0; i < num_con ; i++) - dm_i2c_reg_write(dev, con_arr[i][1], 1); - - /* only turn on specific Tx/Rx requested by the XFI erratum */ - if (vsc_addr == VSC3308_TX_ADDRESS) { - dm_i2c_reg_write(dev, 0, 0); - dm_i2c_reg_write(dev, 1, 0); - } else { - dm_i2c_reg_write(dev, 3, 0); - dm_i2c_reg_write(dev, 4, 0); - } - - /* configure global core control register, Turn on Global core power */ - dm_i2c_reg_write(dev, GLOBAL_CORE_CNTRL, 0); -#else - ret = i2c_read(vsc_addr, REVISION_ID_REG, 1, &rev_id, 1); - if (ret < 0) { - printf("VSC:0x%x could not read REV_ID from device.\n", - vsc_addr); - return ret; - } - - if (rev_id != 0xab) { - printf("VSC: device at address 0x%x is not VSC3316/3308.\n", - vsc_addr); - return -ENODEV; - } - - ret = vsc_if_enable(vsc_addr); - if (ret) { - printf("VSC:0x%x could not configured for 2-wire I/F.\n", - vsc_addr); - return ret; - } - - /* config connections - page 0x00 */ - i2c_reg_write(vsc_addr, CURRENT_PAGE_REGISTER, CONNECTION_CONFIG_PAGE); - - /* Configure Global Input ISE */ - i2c_reg_write(vsc_addr, GLOBAL_INPUT_ISE1, 0); - i2c_reg_write(vsc_addr, GLOBAL_INPUT_ISE2, 0); - - /* Configure Tx/Rx Global Output PE1 */ - i2c_reg_write(vsc_addr, GLOBAL_OUTPUT_PE1, 0); - - /* Configure Tx/Rx Global Output PE2 */ - i2c_reg_write(vsc_addr, GLOBAL_OUTPUT_PE2, 0); - - /* Configure Tx/Rx Global Input GAIN */ - i2c_reg_write(vsc_addr, GLOBAL_INPUT_GAIN, 0x3F); - - /* Setting Global Input LOS threshold value */ - i2c_reg_write(vsc_addr, GLOBAL_INPUT_LOS, 0xE0); - - /* Setting Global output termination */ - i2c_reg_write(vsc_addr, GLOBAL_OUTPUT_TERMINATION, 0); - - /* Configure Tx/Rx Global Output level */ - if (vsc_addr == VSC3308_TX_ADDRESS) - i2c_reg_write(vsc_addr, GLOBAL_OUTPUT_LEVEL, 4); - else - i2c_reg_write(vsc_addr, GLOBAL_OUTPUT_LEVEL, 2); - - /* Making crosspoint connections, by connecting required - * input to output */ - for (i = 0; i < num_con ; i++) - i2c_reg_write(vsc_addr, con_arr[i][1], con_arr[i][0]); - - /* input state - page 0x13 */ - i2c_reg_write(vsc_addr, CURRENT_PAGE_REGISTER, INPUT_STATE_REG); - /* Turning off all the required input of the switch */ - for (i = 0; i < num_con; i++) - i2c_reg_write(vsc_addr, con_arr[i][0], 1); - - /* only turn on specific Tx/Rx requested by the XFI erratum */ - if (vsc_addr == VSC3308_TX_ADDRESS) { - i2c_reg_write(vsc_addr, 2, 0); - i2c_reg_write(vsc_addr, 3, 0); - } else { - i2c_reg_write(vsc_addr, 0, 0); - i2c_reg_write(vsc_addr, 1, 0); - } - - /* config output mode - page 0x23 */ - i2c_reg_write(vsc_addr, CURRENT_PAGE_REGISTER, OUTPUT_MODE_PAGE); - /* Turn off the Output driver correspond to required output*/ - for (i = 0; i < num_con ; i++) - i2c_reg_write(vsc_addr, con_arr[i][1], 1); - - /* only turn on specific Tx/Rx requested by the XFI erratum */ - if (vsc_addr == VSC3308_TX_ADDRESS) { - i2c_reg_write(vsc_addr, 0, 0); - i2c_reg_write(vsc_addr, 1, 0); - } else { - i2c_reg_write(vsc_addr, 3, 0); - i2c_reg_write(vsc_addr, 4, 0); - } - - /* configure global core control register, Turn on Global core power */ - i2c_reg_write(vsc_addr, GLOBAL_CORE_CNTRL, 0); -#endif - vsc_wp_config(vsc_addr); - - return 0; -} -#endif - -int vsc3308_config(unsigned int vsc_addr, const int8_t con_arr[][2], - unsigned int num_con) -{ - unsigned int i; - u8 rev_id = 0; - int ret; - - debug("VSC:Initializing VSC3308 at I2C address 0x%x" - " for Tx\n", vsc_addr); -#if CONFIG_IS_ENABLED(DM_I2C) - int bus_num = 0; - struct udevice *dev; - - ret = i2c_get_chip_for_busnum(bus_num, vsc_addr, - 1, &dev); - if (ret) { - printf("%s: Cannot find udev for a bus %d\n", __func__, - bus_num); - return ret; - } - - ret = dm_i2c_read(dev, REVISION_ID_REG, &rev_id, 1); - if (ret < 0) { - printf("VSC:0x%x could not read REV_ID from device.\n", - vsc_addr); - return ret; - } - - if (rev_id != 0xab) { - printf("VSC: device at address 0x%x is not VSC3316/3308.\n", - vsc_addr); - return -ENODEV; - } - - ret = vsc_if_enable(vsc_addr); - if (ret) { - printf("VSC:0x%x could not configured for 2-wire I/F.\n", - vsc_addr); - return ret; - } - - /* config connections - page 0x00 */ - dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, CONNECTION_CONFIG_PAGE); - - /* Making crosspoint connections, by connecting required - * input to output - */ - for (i = 0; i < num_con ; i++) - dm_i2c_reg_write(dev, con_arr[i][1], con_arr[i][0]); - - /*Configure Global Input ISE and gain */ - dm_i2c_reg_write(dev, GLOBAL_INPUT_ISE1, 0x12); - dm_i2c_reg_write(dev, GLOBAL_INPUT_ISE2, 0x12); - - /* input state - page 0x13 */ - dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, INPUT_STATE_REG); - /* Turning ON the required input of the switch */ - for (i = 0; i < num_con ; i++) - dm_i2c_reg_write(dev, con_arr[i][0], 0); - - /* Setting Global Input LOS threshold value */ - dm_i2c_reg_write(dev, GLOBAL_INPUT_LOS, 0x60); - - /* config output mode - page 0x23 */ - dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, OUTPUT_MODE_PAGE); - /* Turn ON the Output driver correspond to required output*/ - for (i = 0; i < num_con ; i++) - dm_i2c_reg_write(dev, con_arr[i][1], 0); - - /* configure global core control register, Turn on Global core power */ - dm_i2c_reg_write(dev, GLOBAL_CORE_CNTRL, 0); -#else - ret = i2c_read(vsc_addr, REVISION_ID_REG, 1, &rev_id, 1); - if (ret < 0) { - printf("VSC:0x%x could not read REV_ID from device.\n", - vsc_addr); - return ret; - } - - if (rev_id != 0xab) { - printf("VSC: device at address 0x%x is not VSC3316/3308.\n", - vsc_addr); - return -ENODEV; - } - - ret = vsc_if_enable(vsc_addr); - if (ret) { - printf("VSC:0x%x could not configured for 2-wire I/F.\n", - vsc_addr); - return ret; - } - - /* config connections - page 0x00 */ - i2c_reg_write(vsc_addr, CURRENT_PAGE_REGISTER, CONNECTION_CONFIG_PAGE); - - /* Making crosspoint connections, by connecting required - * input to output */ - for (i = 0; i < num_con ; i++) - i2c_reg_write(vsc_addr, con_arr[i][1], con_arr[i][0]); - - /*Configure Global Input ISE and gain */ - i2c_reg_write(vsc_addr, GLOBAL_INPUT_ISE1, 0x12); - i2c_reg_write(vsc_addr, GLOBAL_INPUT_ISE2, 0x12); - - /* input state - page 0x13 */ - i2c_reg_write(vsc_addr, CURRENT_PAGE_REGISTER, INPUT_STATE_REG); - /* Turning ON the required input of the switch */ - for (i = 0; i < num_con ; i++) - i2c_reg_write(vsc_addr, con_arr[i][0], 0); - - /* Setting Global Input LOS threshold value */ - i2c_reg_write(vsc_addr, GLOBAL_INPUT_LOS, 0x60); - - /* config output mode - page 0x23 */ - i2c_reg_write(vsc_addr, CURRENT_PAGE_REGISTER, OUTPUT_MODE_PAGE); - /* Turn ON the Output driver correspond to required output*/ - for (i = 0; i < num_con ; i++) - i2c_reg_write(vsc_addr, con_arr[i][1], 0); - - /* configure global core control register, Turn on Global core power */ - i2c_reg_write(vsc_addr, GLOBAL_CORE_CNTRL, 0); -#endif - vsc_wp_config(vsc_addr); - - return 0; -} - -void vsc_wp_config(unsigned int vsc_addr) -{ - debug("VSC:Configuring VSC at address:0x%x for WP\n", vsc_addr); - - /* For new crosspoint configuration to occur, WP bit of - * CORE_CONFIG_REG should be set 1 and then reset to 0 */ -#if CONFIG_IS_ENABLED(DM_I2C) - int ret, bus_num = 0; - struct udevice *dev; - - ret = i2c_get_chip_for_busnum(bus_num, vsc_addr, - 1, &dev); - if (ret) { - printf("%s: Cannot find udev for a bus %d\n", __func__, - bus_num); - return; - } - - dm_i2c_reg_write(dev, CORE_CONFIG_REG, 0x01); - dm_i2c_reg_write(dev, CORE_CONFIG_REG, 0x0); -#else - i2c_reg_write(vsc_addr, CORE_CONFIG_REG, 0x01); - i2c_reg_write(vsc_addr, CORE_CONFIG_REG, 0x0); -#endif -}

This is not used anymore. Drop the driver and Kconfig option.

Signed-off-by: Simon Glass sjg@chromium.org ---

(no changes since v1)

board/freescale/common/Makefile | 1 - board/freescale/common/zm7300.c | 232 -------------------------------- board/freescale/common/zm7300.h | 21 --- 3 files changed, 254 deletions(-) delete mode 100644 board/freescale/common/zm7300.c delete mode 100644 board/freescale/common/zm7300.h

diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index c200cf4d403..b4faf6f9e0a 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -54,7 +54,6 @@ obj-$(CONFIG_TARGET_MPC8548CDS) += cds_pci_ft.o obj-$(CONFIG_TARGET_P3041DS) += ics307_clk.o obj-$(CONFIG_TARGET_P4080DS) += ics307_clk.o obj-$(CONFIG_TARGET_P5040DS) += ics307_clk.o -obj-$(CONFIG_ZM7300) += zm7300.o ifeq ($(CONFIG_$(SPL_)POWER_LEGACY),y) obj-$(CONFIG_POWER_PFUZE100) += pfuze.o endif diff --git a/board/freescale/common/zm7300.c b/board/freescale/common/zm7300.c deleted file mode 100644 index e8c2fc85c84..00000000000 --- a/board/freescale/common/zm7300.c +++ /dev/null @@ -1,232 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2013 Freescale Semiconductor, Inc. - */ - -/* Power-One ZM7300 DPM */ -#include "zm7300.h" -#include <log.h> - -#define DPM_WP 0x96 -#define WRP_OPCODE 0x01 -#define WRM_OPCODE 0x02 -#define RRP_OPCODE 0x11 - -#define DPM_SUCCESS 0x01 -#define DPM_EXEC_FAIL 0x00 - -static const uint16_t hex_to_1_10mv[] = { - 5000, - 5125, - 5250, - 5375, - 5500, - 5625, - 5750, - 5875, - 6000, - 6125, - 6250, - 6375, - 6500, - 6625, - 6750, - 6875, - 7000, - 7125, - 7250, - 7375, - 7500, - 7625, - 7750, - 7875, - 8000, - 8125, - 8250, - 8375, - 8500, - 8625, - 8750, - 8875, - 9000, - 9125, - 9250, - 9375, - 9500, /* 0.95mV */ - 9625, - 9750, - 9875, - 10000, /* 1.0V */ - 10125, - 10250, - 10375, - 10500, - 10625, - 10750, - 10875, - 11000, - 11125, - 11250, - 11375, - 11500, - 11625, - 11750, - 11875, - 12000, - 12125, - 12250, - 12375, - 0, /* reserved */ -}; - - -/* Read Data d from Register r of POL p */ -u8 dpm_rrp(uchar r) -{ - u8 ret[5]; - - ret[0] = RRP_OPCODE; - /* POL is 0 */ - ret[1] = 0; - ret[2] = r; - i2c_read(I2C_DPM_ADDR, 0, -3, ret, 2); - if (ret[1] == DPM_SUCCESS) { /* the DPM returned success as status */ - debug("RRP_OPCODE returned success data is %x\n", ret[0]); - return ret[0]; - } else { - return -1; - } -} - -/* Write Data d into DPM register r (RAM) */ -int dpm_wrm(u8 r, u8 d) -{ - u8 ret[5]; - - ret[0] = WRM_OPCODE; - ret[1] = r; - ret[2] = d; - i2c_read(I2C_DPM_ADDR, 0, -3, ret, 1); - if (ret[0] == DPM_SUCCESS) { /* the DPM returned success as status */ - debug("WRM_OPCODE returned success data is %x\n", ret[0]); - return ret[0]; - } else { - return -1; - } -} - -/* Write Data d into Register r of POL(s) a */ -int dpm_wrp(u8 r, u8 d) -{ - u8 ret[7]; - - ret[0] = WRP_OPCODE; - /* only POL0 is present */ - ret[1] = 0x01; - ret[2] = 0x00; - ret[3] = 0x00; - ret[4] = 0x00; - ret[5] = r; - ret[6] = d; - i2c_read(I2C_DPM_ADDR, 0, -7, ret, 1); - if (ret[0] == DPM_SUCCESS) { /* the DPM returned success as status */ - debug("WRP_OPCODE returned success data is %x\n", ret[0]); - return 0; - } else { - return -1; - } -} - -/* Uses the DPM command RRP */ -u8 zm_read(uchar reg) -{ - return dpm_rrp(reg); -} - -/* ZM_write -- - Steps: - a. Write data to the register - b. Read data from register and compare to written value - c. Return return_code & voltage_read -*/ -u8 zm_write(u8 reg, u8 data) -{ - u8 d; - - /* write data to register */ - dpm_wrp(reg, data); - - /* read register and compare to written value */ - d = dpm_rrp(reg); - if (d != data) { - printf("zm_write : Comparison register data failed\n"); - return -1; - } - - return d; -} - -/* zm_write_out_voltage - * voltage in 1/10 mV - */ -int zm_write_voltage(int voltage) -{ - u8 reg = 0x7, vid; - uint16_t voltage_read; - u8 ret; - - vid = (voltage - 5000) / ZM_STEP; - - ret = zm_write(reg, vid); - if (ret != -1) { - voltage_read = hex_to_1_10mv[ret]; - debug("voltage set to %dmV\n", voltage_read/10); - return voltage_read; - } - return -1; -} - -/* zm_read_out_voltage - * voltage in 1/10 mV - */ -int zm_read_voltage(void) -{ - u8 reg = 0x7; - u8 ret; - int voltage; - - ret = zm_read(reg); - if (ret != -1) { - voltage = hex_to_1_10mv[ret]; - debug("Voltage read is %dmV\n", voltage/10); - return voltage; - } else { - return -1; - } -} - -int zm_disable_wp() -{ - u8 new_wp_value; - - /* Disable using Write-Protect register 0x96 */ - new_wp_value = 0x8; - if ((dpm_wrm(DPM_WP, new_wp_value)) < 0) { - printf("Disable Write-Protect register failed\n"); - return -1; - } - return 0; -} - -int zm_enable_wp() -{ - u8 orig_wp_value; - orig_wp_value = 0x0; - - /* Enable using Write-Protect register 0x96 */ - if ((dpm_wrm(DPM_WP, orig_wp_value)) < 0) { - printf("Enable Write-Protect register failed\n"); - return -1; - } - return 0; -} diff --git a/board/freescale/common/zm7300.h b/board/freescale/common/zm7300.h deleted file mode 100644 index 9ce24afc178..00000000000 --- a/board/freescale/common/zm7300.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2013 Freescale Semiconductor, Inc. - */ - -#ifndef __ZM7300_H_ -#define __ZM7300_H 1_ - -#include <common.h> -#include <i2c.h> -#include <errno.h> -#include <asm/io.h> - -#define ZM_STEP 125 -int zm7300_set_voltage(int voltage_1_10mv); -int zm_write_voltage(int voltage); -int zm_read_voltage(void); -int zm_disable_wp(void); -int zm_enable_wp(void); - -#endif /* __ZM7300_H_ */