[U-Boot] [PATCH v2 00/10] rockchip: enable board_debug_uart_init for all soc
ALl rockchip soc use DEBUG UART, and need init the uart iomux in board_debug_uart_init(). Move the board_debug_uart_init() into soc file so that we can make all soc config in soc file and share a common board file later for all rockchip SoCs.
Verison 2 rebase on master with 'SYS_SOC name correction' patch set. This patchset has been test on: rk3036, rk3188, rk3229, rk3288, rk3328, rk3368, rk3399, rv1108
Kever Yang (10): rockchip: enable DEBUG_UART_BOARD_INIT by default rockchip; kylin-rk3036: enabl DEBUG UART rockchip: rk3036: add board_debug_uart_init() rockchip: rk3188: add board_debug_uart_init() rockchip: rk322x: move board_debug_uart_init() to rk322x.c rockchip: rk3288: use grf structure to access soc_con2 rockchip: rk3288: add board_debug_uart_init() rockchip: rk3368: move board_debug_uart_init() to rk3368.c rockchip: rk3399: use grf structure to access reg rockchip: rk3399: add board_debug_uart_init()
arch/arm/Kconfig | 1 + arch/arm/mach-rockchip/Kconfig | 4 -- arch/arm/mach-rockchip/rk3036-board-spl.c | 20 +-------- arch/arm/mach-rockchip/rk3036/Makefile | 1 + arch/arm/mach-rockchip/rk3036/rk3036.c | 39 ++++++++++++++++ arch/arm/mach-rockchip/rk3188-board-spl.c | 28 +----------- arch/arm/mach-rockchip/rk3188/Makefile | 1 + arch/arm/mach-rockchip/rk3188/rk3188.c | 36 +++++++++++++++ arch/arm/mach-rockchip/rk322x-board-spl.c | 44 +----------------- arch/arm/mach-rockchip/rk322x-board.c | 30 +------------ arch/arm/mach-rockchip/rk322x/Makefile | 2 +- arch/arm/mach-rockchip/rk322x/rk322x.c | 44 ++++++++++++++++++ arch/arm/mach-rockchip/rk3288-board-spl.c | 12 +---- arch/arm/mach-rockchip/rk3288-board-tpl.c | 16 +------ arch/arm/mach-rockchip/rk3288/rk3288.c | 19 +++++++- arch/arm/mach-rockchip/rk3368-board-spl.c | 8 ---- arch/arm/mach-rockchip/rk3368-board-tpl.c | 33 +------------- arch/arm/mach-rockchip/rk3368/rk3368.c | 31 +++++++++++++ arch/arm/mach-rockchip/rk3399-board-spl.c | 50 +-------------------- arch/arm/mach-rockchip/rk3399/rk3399.c | 55 ++++++++++++++++++++++- configs/kylin-rk3036_defconfig | 4 ++ 21 files changed, 240 insertions(+), 238 deletions(-) create mode 100644 arch/arm/mach-rockchip/rk3036/rk3036.c create mode 100644 arch/arm/mach-rockchip/rk3188/rk3188.c create mode 100644 arch/arm/mach-rockchip/rk322x/rk322x.c
All Rockchip SoCs use DEBUG_UART_BOARD_INIT to init per board UART IOMUX, enable it by default.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
arch/arm/Kconfig | 1 + arch/arm/mach-rockchip/Kconfig | 4 ---- 2 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f42eccef80..a5851aeeae 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1432,6 +1432,7 @@ config ARCH_ROCKCHIP select SYS_THUMB_BUILD if !ARM64 imply ADC imply CMD_DM + imply DEBUG_UART_BOARD_INIT imply DISTRO_DEFAULTS imply FAT_WRITE imply SARADC_ROCKCHIP diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 7e5a73f92c..17b3b9372d 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -34,7 +34,6 @@ config ROCKCHIP_RK3188 select SPL_RAM select SPL_DRIVERS_MISC_SUPPORT select SPL_ROCKCHIP_EARLYRETURN_TO_BROM - select DEBUG_UART_BOARD_INIT select BOARD_LATE_INIT select ROCKCHIP_BROM_HELPER help @@ -50,7 +49,6 @@ config ROCKCHIP_RK322X select SUPPORT_SPL select SPL select ROCKCHIP_BROM_HELPER - select DEBUG_UART_BOARD_INIT help The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 including NEON and GPU, Mali-400 graphics, several DDR3 options @@ -102,7 +100,6 @@ config ROCKCHIP_RK3368 imply SPL_SEPARATE_BSS imply SPL_SERIAL_SUPPORT imply TPL_SERIAL_SUPPORT - select DEBUG_UART_BOARD_INIT help The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised into a big and little cluster with 4 cores each) Cortex-A53 including @@ -135,7 +132,6 @@ config ROCKCHIP_RK3399 select SPL_SEPARATE_BSS select SPL_SERIAL_SUPPORT select SPL_DRIVERS_MISC_SUPPORT - select DEBUG_UART_BOARD_INIT select BOARD_LATE_INIT select ROCKCHIP_BROM_HELPER help
All Rockchip SoCs use DEBUG_UART_BOARD_INIT to init per board UART IOMUX, enable it by default.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/Kconfig | 1 + arch/arm/mach-rockchip/Kconfig | 4 ---- 2 files changed, 1 insertion(+), 4 deletions(-)
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
All Rockchip SoCs use DEBUG_UART_BOARD_INIT to init per board UART IOMUX, enable it by default.
Signed-off-by: Kever Yang kever.yang@rock-chips.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/Kconfig | 1 + arch/arm/mach-rockchip/Kconfig | 4 ---- 2 files changed, 1 insertion(+), 4 deletions(-)
Applied to u-boot-rockchip, thanks!
Enable debug uart for kylin board in defconfig.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
configs/kylin-rk3036_defconfig | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig index d6d5abb2b6..fca3c238f7 100644 --- a/configs/kylin-rk3036_defconfig +++ b/configs/kylin-rk3036_defconfig @@ -7,7 +7,10 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ROCKCHIP_RK3036=y CONFIG_TARGET_KYLIN_RK3036=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x0 +CONFIG_DEBUG_UART_BASE=0x20068000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_DEBUG_UART=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rk3036-kylin.dtb" @@ -44,6 +47,7 @@ CONFIG_SPI_FLASH=y CONFIG_PINCTRL=y CONFIG_DM_REGULATOR_FIXED=y # CONFIG_SPL_DM_SERIAL is not set +CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y
Enable debug uart for kylin board in defconfig.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
configs/kylin-rk3036_defconfig | 4 ++++ 1 file changed, 4 insertions(+)
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Enable debug uart for kylin board in defconfig.
Signed-off-by: Kever Yang kever.yang@rock-chips.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
configs/kylin-rk3036_defconfig | 4 ++++ 1 file changed, 4 insertions(+)
Applied to u-boot-rockchip, thanks!
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
arch/arm/mach-rockchip/rk3036-board-spl.c | 20 +----------- arch/arm/mach-rockchip/rk3036/Makefile | 1 + arch/arm/mach-rockchip/rk3036/rk3036.c | 39 +++++++++++++++++++++++ 3 files changed, 41 insertions(+), 19 deletions(-) create mode 100644 arch/arm/mach-rockchip/rk3036/rk3036.c
diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c index b897ffeae2..110d06dba5 100644 --- a/arch/arm/mach-rockchip/rk3036-board-spl.c +++ b/arch/arm/mach-rockchip/rk3036-board-spl.c @@ -7,30 +7,12 @@ #include <debug_uart.h> #include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> -#include <asm/arch-rockchip/grf_rk3036.h> -#include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/sdram_rk3036.h> #include <asm/arch-rockchip/timer.h> -#include <asm/arch-rockchip/uart.h> - -#define GRF_BASE 0x20008000 - -#define DEBUG_UART_BASE 0x20068000
void board_init_f(ulong dummy) { -#ifdef EARLY_DEBUG - struct rk3036_grf * const grf = (void *)GRF_BASE; - /* - * NOTE: sd card and debug uart use same iomux in rk3036, - * so if you enable uart, - * you can not boot from sdcard - */ - rk_clrsetreg(&grf->gpio1c_iomux, - GPIO1C3_MASK << GPIO1C3_SHIFT | - GPIO1C2_MASK << GPIO1C2_SHIFT, - GPIO1C3_UART2_SOUT << GPIO1C3_SHIFT | - GPIO1C2_UART2_SIN << GPIO1C2_SHIFT); +#ifdef CONFIG_DEBUG_UART debug_uart_init(); #endif rockchip_timer_init(); diff --git a/arch/arm/mach-rockchip/rk3036/Makefile b/arch/arm/mach-rockchip/rk3036/Makefile index 20d28f7c21..299fc50635 100644 --- a/arch/arm/mach-rockchip/rk3036/Makefile +++ b/arch/arm/mach-rockchip/rk3036/Makefile @@ -10,4 +10,5 @@ ifndef CONFIG_SPL_BUILD obj-y += syscon_rk3036.o endif
+obj-y += rk3036.o obj-y += sdram_rk3036.o diff --git a/arch/arm/mach-rockchip/rk3036/rk3036.c b/arch/arm/mach-rockchip/rk3036/rk3036.c new file mode 100644 index 0000000000..32426ac840 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3036/rk3036.c @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2019 Rockchip Electronics Co., Ltd + */ +#include <asm/io.h> +#include <asm/arch-rockchip/grf_rk3036.h> +#include <asm/arch-rockchip/hardware.h> + +#ifdef CONFIG_DEBUG_UART_BOARD_INIT +void board_debug_uart_init(void) +{ +#define GRF_BASE 0x20008000 + struct rk3036_grf * const grf = (void *)GRF_BASE; + enum { + GPIO1C3_SHIFT = 6, + GPIO1C3_MASK = 3 << GPIO1C3_SHIFT, + GPIO1C3_GPIO = 0, + GPIO1C3_MMC0_D1, + GPIO1C3_UART2_SOUT, + + GPIO1C2_SHIFT = 4, + GPIO1C2_MASK = 3 << GPIO1C2_SHIFT, + GPIO1C2_GPIO = 0, + GPIO1C2_MMC0_D0, + GPIO1C2_UART2_SIN, + }; + /* + * NOTE: sd card and debug uart use same iomux in rk3036, + * so if you enable uart, + * you can not boot from sdcard + */ + rk_clrsetreg(&grf->gpio1c_iomux, + GPIO1C3_MASK << GPIO1C3_SHIFT | + GPIO1C2_MASK << GPIO1C2_SHIFT, + GPIO1C3_UART2_SOUT << GPIO1C3_SHIFT | + GPIO1C2_UART2_SIN << GPIO1C2_SHIFT); +} +#endif +
On 29/03/2019 01:09, Kever Yang wrote:
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/rk3036-board-spl.c | 20 +----------- arch/arm/mach-rockchip/rk3036/Makefile | 1 + arch/arm/mach-rockchip/rk3036/rk3036.c | 39 +++++++++++++++++++++++ 3 files changed, 41 insertions(+), 19 deletions(-) create mode 100644 arch/arm/mach-rockchip/rk3036/rk3036.c
diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c index b897ffeae2..110d06dba5 100644 --- a/arch/arm/mach-rockchip/rk3036-board-spl.c +++ b/arch/arm/mach-rockchip/rk3036-board-spl.c @@ -7,30 +7,12 @@ #include <debug_uart.h> #include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> -#include <asm/arch-rockchip/grf_rk3036.h> -#include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/sdram_rk3036.h> #include <asm/arch-rockchip/timer.h> -#include <asm/arch-rockchip/uart.h>
-#define GRF_BASE 0x20008000
-#define DEBUG_UART_BASE 0x20068000
void board_init_f(ulong dummy) { -#ifdef EARLY_DEBUG
- struct rk3036_grf * const grf = (void *)GRF_BASE;
- /*
* NOTE: sd card and debug uart use same iomux in rk3036,* so if you enable uart,* you can not boot from sdcard*/- rk_clrsetreg(&grf->gpio1c_iomux,
GPIO1C3_MASK << GPIO1C3_SHIFT |GPIO1C2_MASK << GPIO1C2_SHIFT,GPIO1C3_UART2_SOUT << GPIO1C3_SHIFT |GPIO1C2_UART2_SIN << GPIO1C2_SHIFT);+#ifdef CONFIG_DEBUG_UART debug_uart_init(); #endif rockchip_timer_init(); diff --git a/arch/arm/mach-rockchip/rk3036/Makefile b/arch/arm/mach-rockchip/rk3036/Makefile index 20d28f7c21..299fc50635 100644 --- a/arch/arm/mach-rockchip/rk3036/Makefile +++ b/arch/arm/mach-rockchip/rk3036/Makefile @@ -10,4 +10,5 @@ ifndef CONFIG_SPL_BUILD obj-y += syscon_rk3036.o endif
+obj-y += rk3036.o obj-y += sdram_rk3036.o diff --git a/arch/arm/mach-rockchip/rk3036/rk3036.c b/arch/arm/mach-rockchip/rk3036/rk3036.c new file mode 100644 index 0000000000..32426ac840 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3036/rk3036.c @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- (C) Copyright 2019 Rockchip Electronics Co., Ltd
- */
+#include <asm/io.h> +#include <asm/arch-rockchip/grf_rk3036.h> +#include <asm/arch-rockchip/hardware.h>
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT +void board_debug_uart_init(void) +{ +#define GRF_BASE 0x20008000
- struct rk3036_grf * const grf = (void *)GRF_BASE;
- enum {
GPIO1C3_SHIFT = 6,GPIO1C3_MASK = 3 << GPIO1C3_SHIFT,GPIO1C3_GPIO = 0,GPIO1C3_MMC0_D1,GPIO1C3_UART2_SOUT,GPIO1C2_SHIFT = 4,GPIO1C2_MASK = 3 << GPIO1C2_SHIFT,GPIO1C2_GPIO = 0,GPIO1C2_MMC0_D0,GPIO1C2_UART2_SIN,- };
Would it be better to put this enum in the grf_rk3036.h header file as is done on the rk3288 to keep some consistency and have a central place where these defines are kept? Same for the other patches where the enums are defined in place.
- /*
* NOTE: sd card and debug uart use same iomux in rk3036,* so if you enable uart,* you can not boot from sdcard*/- rk_clrsetreg(&grf->gpio1c_iomux,
GPIO1C3_MASK << GPIO1C3_SHIFT |GPIO1C2_MASK << GPIO1C2_SHIFT,GPIO1C3_UART2_SOUT << GPIO1C3_SHIFT |GPIO1C2_UART2_SIN << GPIO1C2_SHIFT);+} +#endif
Hi Jack,
On 03/29/2019 06:10 PM, Jack Mitchell wrote:
On 29/03/2019 01:09, Kever Yang wrote:
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/rk3036-board-spl.c | 20 +----------- arch/arm/mach-rockchip/rk3036/Makefile | 1 + arch/arm/mach-rockchip/rk3036/rk3036.c | 39 +++++++++++++++++++++++ 3 files changed, 41 insertions(+), 19 deletions(-) create mode 100644 arch/arm/mach-rockchip/rk3036/rk3036.c
diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c index b897ffeae2..110d06dba5 100644 --- a/arch/arm/mach-rockchip/rk3036-board-spl.c +++ b/arch/arm/mach-rockchip/rk3036-board-spl.c @@ -7,30 +7,12 @@ #include <debug_uart.h> #include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> -#include <asm/arch-rockchip/grf_rk3036.h> -#include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/sdram_rk3036.h> #include <asm/arch-rockchip/timer.h> -#include <asm/arch-rockchip/uart.h>
-#define GRF_BASE 0x20008000
-#define DEBUG_UART_BASE 0x20068000
void board_init_f(ulong dummy) { -#ifdef EARLY_DEBUG
- struct rk3036_grf * const grf = (void *)GRF_BASE;
- /*
* NOTE: sd card and debug uart use same iomux in rk3036,* so if you enable uart,* you can not boot from sdcard*/- rk_clrsetreg(&grf->gpio1c_iomux,
GPIO1C3_MASK << GPIO1C3_SHIFT |GPIO1C2_MASK << GPIO1C2_SHIFT,GPIO1C3_UART2_SOUT << GPIO1C3_SHIFT |GPIO1C2_UART2_SIN << GPIO1C2_SHIFT);+#ifdef CONFIG_DEBUG_UART debug_uart_init(); #endif rockchip_timer_init(); diff --git a/arch/arm/mach-rockchip/rk3036/Makefile b/arch/arm/mach-rockchip/rk3036/Makefile index 20d28f7c21..299fc50635 100644 --- a/arch/arm/mach-rockchip/rk3036/Makefile +++ b/arch/arm/mach-rockchip/rk3036/Makefile @@ -10,4 +10,5 @@ ifndef CONFIG_SPL_BUILD obj-y += syscon_rk3036.o endif
+obj-y += rk3036.o obj-y += sdram_rk3036.o diff --git a/arch/arm/mach-rockchip/rk3036/rk3036.c b/arch/arm/mach-rockchip/rk3036/rk3036.c new file mode 100644 index 0000000000..32426ac840 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3036/rk3036.c @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- (C) Copyright 2019 Rockchip Electronics Co., Ltd
- */
+#include <asm/io.h> +#include <asm/arch-rockchip/grf_rk3036.h> +#include <asm/arch-rockchip/hardware.h>
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT +void board_debug_uart_init(void) +{ +#define GRF_BASE 0x20008000
- struct rk3036_grf * const grf = (void *)GRF_BASE;
- enum {
GPIO1C3_SHIFT = 6,GPIO1C3_MASK = 3 << GPIO1C3_SHIFT,GPIO1C3_GPIO = 0,GPIO1C3_MMC0_D1,GPIO1C3_UART2_SOUT,GPIO1C2_SHIFT = 4,GPIO1C2_MASK = 3 << GPIO1C2_SHIFT,GPIO1C2_GPIO = 0,GPIO1C2_MMC0_D0,GPIO1C2_UART2_SIN,- };
Would it be better to put this enum in the grf_rk3036.h header file as is done on the rk3288 to keep some consistency and have a central place where these defines are kept? Same for the other patches where the enums are defined in place.
Thanks for your comment, but this kind of style is recommend by the maintainer, so maybe the rk3288 is the one need to update.
Thanks, - Kever
- /*
* NOTE: sd card and debug uart use same iomux in rk3036,* so if you enable uart,* you can not boot from sdcard*/- rk_clrsetreg(&grf->gpio1c_iomux,
GPIO1C3_MASK << GPIO1C3_SHIFT |GPIO1C2_MASK << GPIO1C2_SHIFT,GPIO1C3_UART2_SOUT << GPIO1C3_SHIFT |GPIO1C2_UART2_SIN << GPIO1C2_SHIFT);+} +#endif
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/rk3036-board-spl.c | 20 +----------- arch/arm/mach-rockchip/rk3036/Makefile | 1 + arch/arm/mach-rockchip/rk3036/rk3036.c | 39 +++++++++++++++++++++++ 3 files changed, 41 insertions(+), 19 deletions(-) create mode 100644 arch/arm/mach-rockchip/rk3036/rk3036.c
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file.
Signed-off-by: Kever Yang kever.yang@rock-chips.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/mach-rockchip/rk3036-board-spl.c | 20 +----------- arch/arm/mach-rockchip/rk3036/Makefile | 1 + arch/arm/mach-rockchip/rk3036/rk3036.c | 39 +++++++++++++++++++++++ 3 files changed, 41 insertions(+), 19 deletions(-) create mode 100644 arch/arm/mach-rockchip/rk3036/rk3036.c
Applied to u-boot-rockchip, thanks!
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
arch/arm/mach-rockchip/rk3188-board-spl.c | 28 +----------------- arch/arm/mach-rockchip/rk3188/Makefile | 1 + arch/arm/mach-rockchip/rk3188/rk3188.c | 36 +++++++++++++++++++++++ 3 files changed, 38 insertions(+), 27 deletions(-) create mode 100644 arch/arm/mach-rockchip/rk3188/rk3188.c
diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c b/arch/arm/mach-rockchip/rk3188-board-spl.c index 230d69c4c1..77b9b36d35 100644 --- a/arch/arm/mach-rockchip/rk3188-board-spl.c +++ b/arch/arm/mach-rockchip/rk3188-board-spl.c @@ -93,38 +93,12 @@ static int setup_arm_clock(void) return ret; }
-void board_debug_uart_init(void) -{ - /* Enable early UART on the RK3188 */ -#define GRF_BASE 0x20008000 - struct rk3188_grf * const grf = (void *)GRF_BASE; - enum { - GPIO1B1_SHIFT = 2, - GPIO1B1_MASK = 3, - GPIO1B1_GPIO = 0, - GPIO1B1_UART2_SOUT, - - GPIO1B0_SHIFT = 0, - GPIO1B0_MASK = 3, - GPIO1B0_GPIO = 0, - GPIO1B0_UART2_SIN, - }; - - /* Enable early UART on the RK3188 */ - rk_clrsetreg(&grf->gpio1b_iomux, - GPIO1B1_MASK << GPIO1B1_SHIFT | - GPIO1B0_MASK << GPIO1B0_SHIFT, - GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT | - GPIO1B0_UART2_SIN << GPIO1B0_SHIFT); -} - void board_init_f(ulong dummy) { struct udevice *dev; int ret;
-#define EARLY_UART -#ifdef EARLY_UART +#ifdef CONFIG_DEBUG_UART /* * Debug UART can be used from here if required: * diff --git a/arch/arm/mach-rockchip/rk3188/Makefile b/arch/arm/mach-rockchip/rk3188/Makefile index 7fa010405b..7dc123a3d2 100644 --- a/arch/arm/mach-rockchip/rk3188/Makefile +++ b/arch/arm/mach-rockchip/rk3188/Makefile @@ -6,5 +6,6 @@
ifndef CONFIG_TPL_BUILD obj-y += clk_rk3188.o +obj-y += rk3188.o obj-y += syscon_rk3188.o endif diff --git a/arch/arm/mach-rockchip/rk3188/rk3188.c b/arch/arm/mach-rockchip/rk3188/rk3188.c new file mode 100644 index 0000000000..933484e0df --- /dev/null +++ b/arch/arm/mach-rockchip/rk3188/rk3188.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2019 Rockchip Electronics Co., Ltd + */ +#include <common.h> +#include <asm/io.h> +#include <asm/arch-rockchip/grf_rk3188.h> +#include <asm/arch-rockchip/hardware.h> + +#ifdef CONFIG_DEBUG_UART_BOARD_INIT +void board_debug_uart_init(void) +{ + /* Enable early UART on the RK3188 */ +#define GRF_BASE 0x20008000 + struct rk3188_grf * const grf = (void *)GRF_BASE; + enum { + GPIO1B1_SHIFT = 2, + GPIO1B1_MASK = 3, + GPIO1B1_GPIO = 0, + GPIO1B1_UART2_SOUT, + GPIO1B1_JTAG_TDO, + + GPIO1B0_SHIFT = 0, + GPIO1B0_MASK = 3, + GPIO1B0_GPIO = 0, + GPIO1B0_UART2_SIN, + GPIO1B0_JTAG_TDI, + }; + + rk_clrsetreg(&grf->gpio1b_iomux, + GPIO1B1_MASK << GPIO1B1_SHIFT | + GPIO1B0_MASK << GPIO1B0_SHIFT, + GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT | + GPIO1B0_UART2_SIN << GPIO1B0_SHIFT); +} +#endif
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/rk3188-board-spl.c | 28 +----------------- arch/arm/mach-rockchip/rk3188/Makefile | 1 + arch/arm/mach-rockchip/rk3188/rk3188.c | 36 +++++++++++++++++++++++ 3 files changed, 38 insertions(+), 27 deletions(-) create mode 100644 arch/arm/mach-rockchip/rk3188/rk3188.c
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file.
Signed-off-by: Kever Yang kever.yang@rock-chips.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/mach-rockchip/rk3188-board-spl.c | 28 +----------------- arch/arm/mach-rockchip/rk3188/Makefile | 1 + arch/arm/mach-rockchip/rk3188/rk3188.c | 36 +++++++++++++++++++++++ 3 files changed, 38 insertions(+), 27 deletions(-) create mode 100644 arch/arm/mach-rockchip/rk3188/rk3188.c
Applied to u-boot-rockchip, thanks!
Move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file later for all rockchip SoCs.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
arch/arm/mach-rockchip/rk322x-board-spl.c | 44 ++--------------------- arch/arm/mach-rockchip/rk322x-board.c | 30 +--------------- arch/arm/mach-rockchip/rk322x/Makefile | 2 +- arch/arm/mach-rockchip/rk322x/rk322x.c | 44 +++++++++++++++++++++++ 4 files changed, 48 insertions(+), 72 deletions(-) create mode 100644 arch/arm/mach-rockchip/rk322x/rk322x.c
diff --git a/arch/arm/mach-rockchip/rk322x-board-spl.c b/arch/arm/mach-rockchip/rk322x-board-spl.c index c50130c3b5..888310efbe 100644 --- a/arch/arm/mach-rockchip/rk322x-board-spl.c +++ b/arch/arm/mach-rockchip/rk322x-board-spl.c @@ -10,54 +10,13 @@ #include <spl.h> #include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> -#include <asm/arch-rockchip/cru_rk322x.h> -#include <asm/arch-rockchip/grf_rk322x.h> #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/timer.h> -#include <asm/arch-rockchip/uart.h>
u32 spl_boot_device(void) { return BOOT_DEVICE_MMC1; } -#define GRF_BASE 0x11000000 -#define SGRF_BASE 0x10140000 - -#define DEBUG_UART_BASE 0x11030000 - -void board_debug_uart_init(void) -{ - static struct rk322x_grf * const grf = (void *)GRF_BASE; - enum { - GPIO1B2_SHIFT = 4, - GPIO1B2_MASK = 3 << GPIO1B2_SHIFT, - GPIO1B2_GPIO = 0, - GPIO1B2_UART1_SIN, - GPIO1B2_UART21_SIN, - - GPIO1B1_SHIFT = 2, - GPIO1B1_MASK = 3 << GPIO1B1_SHIFT, - GPIO1B1_GPIO = 0, - GPIO1B1_UART1_SOUT, - GPIO1B1_UART21_SOUT, - }; - enum { - CON_IOMUX_UART2SEL_SHIFT= 8, - CON_IOMUX_UART2SEL_MASK = 1 << CON_IOMUX_UART2SEL_SHIFT, - CON_IOMUX_UART2SEL_2 = 0, - CON_IOMUX_UART2SEL_21, - }; - - /* Enable early UART2 channel 1 on the RK322x */ - rk_clrsetreg(&grf->gpio1b_iomux, - GPIO1B1_MASK | GPIO1B2_MASK, - GPIO1B2_UART21_SIN << GPIO1B2_SHIFT | - GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT); - /* Set channel C as UART2 input */ - rk_clrsetreg(&grf->con_iomux, - CON_IOMUX_UART2SEL_MASK, - CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT); -}
#define SGRF_DDR_CON0 0x10150000 void board_init_f(ulong dummy) @@ -65,6 +24,7 @@ void board_init_f(ulong dummy) struct udevice *dev; int ret;
+#ifdef CONFIG_DEBUG_UART /* * Debug UART can be used from here if required: * @@ -75,7 +35,7 @@ void board_init_f(ulong dummy) */ debug_uart_init(); printascii("SPL Init"); - +#endif ret = spl_early_init(); if (ret) { debug("spl_early_init() failed: %d\n", ret); diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c index 9aad6bb0bc..d24f7c959d 100644 --- a/arch/arm/mach-rockchip/rk322x-board.c +++ b/arch/arm/mach-rockchip/rk322x-board.c @@ -11,7 +11,6 @@ #include <asm/arch-rockchip/boot_mode.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/periph.h> -#include <asm/arch-rockchip/grf_rk322x.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -32,34 +31,7 @@ int board_init(void) #include <asm/arch-rockchip/grf_rk322x.h> /* Enable early UART2 channel 1 on the RK322x */ #define GRF_BASE 0x11000000 - struct rk322x_grf * const grf = (void *)GRF_BASE; - enum { - GPIO1B2_SHIFT = 4, - GPIO1B2_MASK = 3 << GPIO1B2_SHIFT, - GPIO1B2_GPIO = 0, - GPIO1B2_UART21_SIN, - - GPIO1B1_SHIFT = 2, - GPIO1B1_MASK = 3 << GPIO1B1_SHIFT, - GPIO1B1_GPIO = 0, - GPIO1B1_UART1_SOUT, - GPIO1B1_UART21_SOUT, - }; - enum { - CON_IOMUX_UART2SEL_SHIFT= 8, - CON_IOMUX_UART2SEL_MASK = 1 << CON_IOMUX_UART2SEL_SHIFT, - CON_IOMUX_UART2SEL_2 = 0, - CON_IOMUX_UART2SEL_21, - }; - - rk_clrsetreg(&grf->gpio1b_iomux, - GPIO1B1_MASK | GPIO1B2_MASK, - GPIO1B2_UART21_SIN << GPIO1B2_SHIFT | - GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT); - /* Set channel C as UART2 input */ - rk_clrsetreg(&grf->con_iomux, - CON_IOMUX_UART2SEL_MASK, - CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT); + static struct rk322x_grf * const grf = (void *)GRF_BASE;
/* * The integrated macphy is enabled by default, disable it diff --git a/arch/arm/mach-rockchip/rk322x/Makefile b/arch/arm/mach-rockchip/rk322x/Makefile index ecb3e8dfda..89b0fed692 100644 --- a/arch/arm/mach-rockchip/rk322x/Makefile +++ b/arch/arm/mach-rockchip/rk322x/Makefile @@ -4,6 +4,6 @@ # SPDX-License-Identifier: GPL-2.0+ #
- obj-y += clk_rk322x.o +obj-y += rk322x.o obj-y += syscon_rk322x.o diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c b/arch/arm/mach-rockchip/rk322x/rk322x.c new file mode 100644 index 0000000000..e5250bc784 --- /dev/null +++ b/arch/arm/mach-rockchip/rk322x/rk322x.c @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2019 Rockchip Electronics Co., Ltd + */ +#include <asm/io.h> +#include <asm/arch-rockchip/grf_rk322x.h> +#include <asm/arch-rockchip/hardware.h> + +#ifdef CONFIG_DEBUG_UART_BOARD_INIT +void board_debug_uart_init(void) +{ +#define GRF_BASE 0x11000000 + static struct rk322x_grf * const grf = (void *)GRF_BASE; + enum { + GPIO1B2_SHIFT = 4, + GPIO1B2_MASK = 3 << GPIO1B2_SHIFT, + GPIO1B2_GPIO = 0, + GPIO1B2_UART1_SIN, + GPIO1B2_UART21_SIN, + + GPIO1B1_SHIFT = 2, + GPIO1B1_MASK = 3 << GPIO1B1_SHIFT, + GPIO1B1_GPIO = 0, + GPIO1B1_UART1_SOUT, + GPIO1B1_UART21_SOUT, + }; + enum { + CON_IOMUX_UART2SEL_SHIFT = 8, + CON_IOMUX_UART2SEL_MASK = 1 << CON_IOMUX_UART2SEL_SHIFT, + CON_IOMUX_UART2SEL_2 = 0, + CON_IOMUX_UART2SEL_21, + }; + + /* Enable early UART2 channel 1 on the RK322x */ + rk_clrsetreg(&grf->gpio1b_iomux, + GPIO1B1_MASK | GPIO1B2_MASK, + GPIO1B2_UART21_SIN << GPIO1B2_SHIFT | + GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT); + /* Set channel C as UART2 input */ + rk_clrsetreg(&grf->con_iomux, + CON_IOMUX_UART2SEL_MASK, + CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT); +} +#endif
Move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file later for all rockchip SoCs.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/rk322x-board-spl.c | 44 ++--------------------- arch/arm/mach-rockchip/rk322x-board.c | 30 +--------------- arch/arm/mach-rockchip/rk322x/Makefile | 2 +- arch/arm/mach-rockchip/rk322x/rk322x.c | 44 +++++++++++++++++++++++ 4 files changed, 48 insertions(+), 72 deletions(-) create mode 100644 arch/arm/mach-rockchip/rk322x/rk322x.c
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file later for all rockchip SoCs.
Signed-off-by: Kever Yang kever.yang@rock-chips.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/mach-rockchip/rk322x-board-spl.c | 44 ++--------------------- arch/arm/mach-rockchip/rk322x-board.c | 30 +--------------- arch/arm/mach-rockchip/rk322x/Makefile | 2 +- arch/arm/mach-rockchip/rk322x/rk322x.c | 44 +++++++++++++++++++++++ 4 files changed, 48 insertions(+), 72 deletions(-) create mode 100644 arch/arm/mach-rockchip/rk322x/rk322x.c
Applied to u-boot-rockchip, thanks!
Prefer to use structure to access register if we can.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
arch/arm/mach-rockchip/rk3288/rk3288.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c index af3a465cc3..987fae544c 100644 --- a/arch/arm/mach-rockchip/rk3288/rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/rk3288.c @@ -4,15 +4,17 @@ */ #include <asm/io.h> #include <asm/arch-rockchip/hardware.h> +#include <asm/arch-rockchip/grf_rk3288.h>
-#define GRF_SOC_CON2 0xff77024c +#define GRF_BASE 0xff770000
int arch_cpu_init(void) { /* We do some SoC one time setting here. */ + struct rk3288_grf * const grf = (void *)GRF_BASE;
/* Use rkpwm by default */ - rk_setreg(GRF_SOC_CON2, 1 << 0); + rk_setreg(&grf->soc_con2, 1 << 0);
return 0; }
Prefer to use structure to access register if we can.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/rk3288/rk3288.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Prefer to use structure to access register if we can.
Signed-off-by: Kever Yang kever.yang@rock-chips.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/mach-rockchip/rk3288/rk3288.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
Applied to u-boot-rockchip, thanks!
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file for all rockchip SoCs later.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
arch/arm/mach-rockchip/rk3288-board-spl.c | 12 ++---------- arch/arm/mach-rockchip/rk3288-board-tpl.c | 16 ++-------------- arch/arm/mach-rockchip/rk3288/rk3288.c | 13 +++++++++++++ 3 files changed, 17 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c index 937a99db53..d8d215db8a 100644 --- a/arch/arm/mach-rockchip/rk3288-board-spl.c +++ b/arch/arm/mach-rockchip/rk3288-board-spl.c @@ -109,16 +109,7 @@ void board_init_f(ulong dummy) struct udevice *dev; int ret;
- /* Example code showing how to enable the debug UART on RK3288 */ -#include <asm/arch-rockchip/grf_rk3288.h> - /* Enable early UART on the RK3288 */ -#define GRF_BASE 0xff770000 - struct rk3288_grf * const grf = (void *)GRF_BASE; - - rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT | - GPIO7C6_MASK << GPIO7C6_SHIFT, - GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT | - GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT); +#ifdef CONFIG_DEBUG_UART /* * Debug UART can be used from here if required: * @@ -129,6 +120,7 @@ void board_init_f(ulong dummy) */ debug_uart_init(); debug("\nspl:debug uart enabled in %s\n", __func__); +#endif ret = spl_early_init(); if (ret) { debug("spl_early_init() failed: %d\n", ret); diff --git a/arch/arm/mach-rockchip/rk3288-board-tpl.c b/arch/arm/mach-rockchip/rk3288-board-tpl.c index a430bb43ad..a9848067ba 100644 --- a/arch/arm/mach-rockchip/rk3288-board-tpl.c +++ b/arch/arm/mach-rockchip/rk3288-board-tpl.c @@ -10,28 +10,16 @@ #include <spl.h> #include <version.h> #include <asm/io.h> -#include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/clock.h> -#include <asm/arch-rockchip/grf_rk3288.h> -#include <asm/arch-rockchip/periph.h> -#include <asm/arch-rockchip/pmu_rk3288.h> #include <asm/arch-rockchip/sys_proto.h> #include <asm/arch-rockchip/timer.h>
-#define GRF_BASE 0xff770000 void board_init_f(ulong dummy) { struct udevice *dev; int ret;
- /* Example code showing how to enable the debug UART on RK3288 */ - /* Enable early UART on the RK3288 */ - struct rk3288_grf * const grf = (void *)GRF_BASE; - - rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT | - GPIO7C6_MASK << GPIO7C6_SHIFT, - GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT | - GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT); +#ifdef CONFIG_DEBUG_UART /* * Debug UART can be used from here if required: * @@ -41,7 +29,7 @@ void board_init_f(ulong dummy) * printascii("string"); */ debug_uart_init(); - +#endif ret = spl_early_init(); if (ret) { debug("spl_early_init() failed: %d\n", ret); diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c index 987fae544c..7941ca68a6 100644 --- a/arch/arm/mach-rockchip/rk3288/rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/rk3288.c @@ -18,3 +18,16 @@ int arch_cpu_init(void)
return 0; } + +#ifdef CONFIG_DEBUG_UART_BOARD_INIT +void board_debug_uart_init(void) +{ + /* Enable early UART on the RK3288 */ + struct rk3288_grf * const grf = (void *)GRF_BASE; + + rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT | + GPIO7C6_MASK << GPIO7C6_SHIFT, + GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT | + GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT); +} +#endif
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file for all rockchip SoCs later.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/rk3288-board-spl.c | 12 ++---------- arch/arm/mach-rockchip/rk3288-board-tpl.c | 16 ++-------------- arch/arm/mach-rockchip/rk3288/rk3288.c | 13 +++++++++++++ 3 files changed, 17 insertions(+), 24 deletions(-)
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file for all rockchip SoCs later.
Signed-off-by: Kever Yang kever.yang@rock-chips.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/mach-rockchip/rk3288-board-spl.c | 12 ++---------- arch/arm/mach-rockchip/rk3288-board-tpl.c | 16 ++-------------- arch/arm/mach-rockchip/rk3288/rk3288.c | 13 +++++++++++++ 3 files changed, 17 insertions(+), 24 deletions(-)
Applied to u-boot-rockchip, thanks!
Move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file later for all rockchip SoCs.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
arch/arm/mach-rockchip/rk3368-board-spl.c | 8 ------ arch/arm/mach-rockchip/rk3368-board-tpl.c | 33 +---------------------- arch/arm/mach-rockchip/rk3368/rk3368.c | 31 +++++++++++++++++++++ 3 files changed, 32 insertions(+), 40 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3368-board-spl.c b/arch/arm/mach-rockchip/rk3368-board-spl.c index 9dea4ed994..b055ed4aee 100644 --- a/arch/arm/mach-rockchip/rk3368-board-spl.c +++ b/arch/arm/mach-rockchip/rk3368-board-spl.c @@ -9,17 +9,9 @@ #include <ram.h> #include <spl.h> #include <asm/io.h> -#include <asm/arch-rockchip/cru_rk3368.h> -#include <asm/arch-rockchip/grf_rk3368.h> -#include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/periph.h> -#include <asm/arch-rockchip/timer.h> #include <dm/pinctrl.h>
-void board_debug_uart_init(void) -{ -} - void board_init_f(ulong dummy) { struct udevice *pinctrl; diff --git a/arch/arm/mach-rockchip/rk3368-board-tpl.c b/arch/arm/mach-rockchip/rk3368-board-tpl.c index 373f009414..dc65a021c8 100644 --- a/arch/arm/mach-rockchip/rk3368-board-tpl.c +++ b/arch/arm/mach-rockchip/rk3368-board-tpl.c @@ -13,7 +13,6 @@ #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru_rk3368.h> -#include <asm/arch-rockchip/grf_rk3368.h> #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/timer.h>
@@ -79,42 +78,12 @@ static void sgrf_init(void) rk_clrreg(&cru->softrst_con[4], DMA2_SRST_REQ); }
-void board_debug_uart_init(void) -{ - /* - * N.B.: This is called before the device-model has been - * initialised. For this reason, we can not access - * the GRF address range using the syscon API. - */ - struct rk3368_grf * const grf = - (struct rk3368_grf * const)0xff770000; - - enum { - GPIO2D1_MASK = GENMASK(3, 2), - GPIO2D1_GPIO = 0, - GPIO2D1_UART0_SOUT = (1 << 2), - - GPIO2D0_MASK = GENMASK(1, 0), - GPIO2D0_GPIO = 0, - GPIO2D0_UART0_SIN = (1 << 0), - }; - -#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000) - /* Enable early UART0 on the RK3368 */ - rk_clrsetreg(&grf->gpio2d_iomux, - GPIO2D0_MASK, GPIO2D0_UART0_SIN); - rk_clrsetreg(&grf->gpio2d_iomux, - GPIO2D1_MASK, GPIO2D1_UART0_SOUT); -#endif -} - void board_init_f(ulong dummy) { struct udevice *dev; int ret;
-#define EARLY_UART -#ifdef EARLY_UART +#ifdef CONFIG_DEBUG_UART /* * Debug UART can be used from here if required: * diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c index 197f0c485a..1ed06c5352 100644 --- a/arch/arm/mach-rockchip/rk3368/rk3368.c +++ b/arch/arm/mach-rockchip/rk3368/rk3368.c @@ -96,3 +96,34 @@ int arch_early_init_r(void) return mcu_init(); } #endif + +#ifdef CONFIG_DEBUG_UART_BOARD_INIT +void board_debug_uart_init(void) +{ + /* + * N.B.: This is called before the device-model has been + * initialised. For this reason, we can not access + * the GRF address range using the syscon API. + */ +#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000) + struct rk3368_grf * const grf = + (struct rk3368_grf * const)0xff770000; + + enum { + GPIO2D1_MASK = GENMASK(3, 2), + GPIO2D1_GPIO = 0, + GPIO2D1_UART0_SOUT = (1 << 2), + + GPIO2D0_MASK = GENMASK(1, 0), + GPIO2D0_GPIO = 0, + GPIO2D0_UART0_SIN = (1 << 0), + }; + + /* Enable early UART0 on the RK3368 */ + rk_clrsetreg(&grf->gpio2d_iomux, + GPIO2D0_MASK, GPIO2D0_UART0_SIN); + rk_clrsetreg(&grf->gpio2d_iomux, + GPIO2D1_MASK, GPIO2D1_UART0_SOUT); +#endif +} +#endif
Move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file later for all rockchip SoCs.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/rk3368-board-spl.c | 8 ------ arch/arm/mach-rockchip/rk3368-board-tpl.c | 33 +---------------------- arch/arm/mach-rockchip/rk3368/rk3368.c | 31 +++++++++++++++++++++ 3 files changed, 32 insertions(+), 40 deletions(-)
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Kever Yang kever.yang@rock-chips.com 于2019年3月29日周五 上午9:12写道：
Move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file later for all rockchip SoCs.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/rk3368-board-spl.c | 8 ------ arch/arm/mach-rockchip/rk3368-board-tpl.c | 33 +---------------------- arch/arm/mach-rockchip/rk3368/rk3368.c | 31 +++++++++++++++++++++ 3 files changed, 32 insertions(+), 40 deletions(-)
Tested-by: Andy Yan andy.yan@rock-chips.com
diff --git a/arch/arm/mach-rockchip/rk3368-board-spl.c b/arch/arm/mach-rockchip/rk3368-board-spl.c index 9dea4ed994..b055ed4aee 100644 --- a/arch/arm/mach-rockchip/rk3368-board-spl.c +++ b/arch/arm/mach-rockchip/rk3368-board-spl.c @@ -9,17 +9,9 @@ #include <ram.h> #include <spl.h> #include <asm/io.h> -#include <asm/arch-rockchip/cru_rk3368.h> -#include <asm/arch-rockchip/grf_rk3368.h> -#include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/periph.h> -#include <asm/arch-rockchip/timer.h> #include <dm/pinctrl.h>
-void board_debug_uart_init(void) -{ -}
void board_init_f(ulong dummy) { struct udevice *pinctrl; diff --git a/arch/arm/mach-rockchip/rk3368-board-tpl.c b/arch/arm/mach-rockchip/rk3368-board-tpl.c index 373f009414..dc65a021c8 100644 --- a/arch/arm/mach-rockchip/rk3368-board-tpl.c +++ b/arch/arm/mach-rockchip/rk3368-board-tpl.c @@ -13,7 +13,6 @@ #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru_rk3368.h> -#include <asm/arch-rockchip/grf_rk3368.h> #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/timer.h>
@@ -79,42 +78,12 @@ static void sgrf_init(void) rk_clrreg(&cru->softrst_con[4], DMA2_SRST_REQ); }
-void board_debug_uart_init(void) -{
/** N.B.: This is called before the device-model has been* initialised. For this reason, we can not access* the GRF address range using the syscon API.*/struct rk3368_grf * const grf =(struct rk3368_grf * const)0xff770000;enum {GPIO2D1_MASK = GENMASK(3, 2),GPIO2D1_GPIO = 0,GPIO2D1_UART0_SOUT = (1 << 2),GPIO2D0_MASK = GENMASK(1, 0),GPIO2D0_GPIO = 0,GPIO2D0_UART0_SIN = (1 << 0),};-#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
/* Enable early UART0 on the RK3368 */rk_clrsetreg(&grf->gpio2d_iomux,GPIO2D0_MASK, GPIO2D0_UART0_SIN);rk_clrsetreg(&grf->gpio2d_iomux,GPIO2D1_MASK, GPIO2D1_UART0_SOUT);-#endif -}
void board_init_f(ulong dummy) { struct udevice *dev; int ret;
-#define EARLY_UART -#ifdef EARLY_UART +#ifdef CONFIG_DEBUG_UART /* * Debug UART can be used from here if required: * diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c index 197f0c485a..1ed06c5352 100644 --- a/arch/arm/mach-rockchip/rk3368/rk3368.c +++ b/arch/arm/mach-rockchip/rk3368/rk3368.c @@ -96,3 +96,34 @@ int arch_early_init_r(void) return mcu_init(); } #endif
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT +void board_debug_uart_init(void) +{
/** N.B.: This is called before the device-model has been* initialised. For this reason, we can not access* the GRF address range using the syscon API.*/+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
struct rk3368_grf * const grf =(struct rk3368_grf * const)0xff770000;enum {GPIO2D1_MASK = GENMASK(3, 2),GPIO2D1_GPIO = 0,GPIO2D1_UART0_SOUT = (1 << 2),GPIO2D0_MASK = GENMASK(1, 0),GPIO2D0_GPIO = 0,GPIO2D0_UART0_SIN = (1 << 0),};/* Enable early UART0 on the RK3368 */rk_clrsetreg(&grf->gpio2d_iomux,GPIO2D0_MASK, GPIO2D0_UART0_SIN);rk_clrsetreg(&grf->gpio2d_iomux,GPIO2D1_MASK, GPIO2D1_UART0_SOUT);+#endif +}
+#endif
2.20.1
U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file later for all rockchip SoCs.
Signed-off-by: Kever Yang kever.yang@rock-chips.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com Tested-by: Andy Yan andy.yan@rock-chips.com
arch/arm/mach-rockchip/rk3368-board-spl.c | 8 ------ arch/arm/mach-rockchip/rk3368-board-tpl.c | 33 +---------------------- arch/arm/mach-rockchip/rk3368/rk3368.c | 31 +++++++++++++++++++++ 3 files changed, 32 insertions(+), 40 deletions(-)
Applied to u-boot-rockchip, thanks!
Prefer to use structure to access register if we could.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
arch/arm/mach-rockchip/rk3399/rk3399.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 7567a4f584..b76ba4ed32 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -6,11 +6,13 @@ #include <common.h> #include <asm/armv8/mmu.h> #include <asm/io.h> +#include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h>
DECLARE_GLOBAL_DATA_PTR;
#define GRF_EMMCCORE_CON11 0xff77f02c +#define GRF_BASE 0xff770000
static struct mm_region rk3399_mem_map[] = { { @@ -48,9 +50,10 @@ int dram_init_banksize(void) int arch_cpu_init(void) { /* We do some SoC one time setting here. */ + struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
/* Emmc clock generator: disable the clock multipilier */ - rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff); + rk_clrreg(&grf->emmccore_con[11], 0x0ff);
return 0; }
Prefer to use structure to access register if we could.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/rk3399/rk3399.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Kever Yang kever.yang@rock-chips.com 于2019年3月29日周五 上午9:13写道：
Prefer to use structure to access register if we could.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/rk3399/rk3399.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
Tested-by: Andy Yan andy.yan@rock-chips.com
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 7567a4f584..b76ba4ed32 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -6,11 +6,13 @@ #include <common.h> #include <asm/armv8/mmu.h> #include <asm/io.h> +#include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h>
DECLARE_GLOBAL_DATA_PTR;
#define GRF_EMMCCORE_CON11 0xff77f02c +#define GRF_BASE 0xff770000
static struct mm_region rk3399_mem_map[] = { { @@ -48,9 +50,10 @@ int dram_init_banksize(void) int arch_cpu_init(void) { /* We do some SoC one time setting here. */
struct rk3399_grf_regs * const grf = (void *)GRF_BASE; /* Emmc clock generator: disable the clock multipilier */
rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff);
rk_clrreg(&grf->emmccore_con[11], 0x0ff); return 0;}
2.20.1
U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Prefer to use structure to access register if we could.
Signed-off-by: Kever Yang kever.yang@rock-chips.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com Tested-by: Andy Yan andy.yan@rock-chips.com
arch/arm/mach-rockchip/rk3399/rk3399.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
Applied to u-boot-rockchip, thanks!
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file for all rockchip SoCs later.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
arch/arm/mach-rockchip/rk3399-board-spl.c | 50 +---------------------- arch/arm/mach-rockchip/rk3399/rk3399.c | 50 +++++++++++++++++++++++ 2 files changed, 51 insertions(+), 49 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c index 54a4b848a3..800ca80022 100644 --- a/arch/arm/mach-rockchip/rk3399-board-spl.c +++ b/arch/arm/mach-rockchip/rk3399-board-spl.c @@ -127,53 +127,6 @@ void secure_timer_init(void) writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG); }
-void board_debug_uart_init(void) -{ -#define GRF_BASE 0xff770000 -#define GPIO0_BASE 0xff720000 -#define PMUGRF_BASE 0xff320000 - struct rk3399_grf_regs * const grf = (void *)GRF_BASE; -#ifdef CONFIG_TARGET_CHROMEBOOK_BOB - struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE; - struct rockchip_gpio_regs * const gpio = (void *)GPIO0_BASE; -#endif - -#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000) - /* Enable early UART0 on the RK3399 */ - rk_clrsetreg(&grf->gpio2c_iomux, - GRF_GPIO2C0_SEL_MASK, - GRF_UART0BT_SIN << GRF_GPIO2C0_SEL_SHIFT); - rk_clrsetreg(&grf->gpio2c_iomux, - GRF_GPIO2C1_SEL_MASK, - GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT); -#else -# ifdef CONFIG_TARGET_CHROMEBOOK_BOB - rk_setreg(&grf->io_vsel, 1 << 0); - - /* - * Let's enable these power rails here, we are already running the SPI - * Flash based code. - */ - spl_gpio_output(gpio, GPIO(BANK_B, 2), 1); /* PP1500_EN */ - spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 2), GPIO_PULL_NORMAL); - - spl_gpio_output(gpio, GPIO(BANK_B, 4), 1); /* PP3000_EN */ - spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 4), GPIO_PULL_NORMAL); -#endif /* CONFIG_TARGET_CHROMEBOOK_BOB */ - - /* Enable early UART2 channel C on the RK3399 */ - rk_clrsetreg(&grf->gpio4c_iomux, - GRF_GPIO4C3_SEL_MASK, - GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT); - rk_clrsetreg(&grf->gpio4c_iomux, - GRF_GPIO4C4_SEL_MASK, - GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT); - /* Set channel C as UART2 input */ - rk_clrsetreg(&grf->soc_con7, - GRF_UART_DBG_SEL_MASK, - GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT); -#endif -}
void board_init_f(ulong dummy) { @@ -183,8 +136,7 @@ void board_init_f(ulong dummy) struct rk3399_grf_regs *grf; int ret;
-#define EARLY_UART -#ifdef EARLY_UART +#ifdef CONFIG_DEBUG_UART debug_uart_init();
# ifdef CONFIG_TARGET_CHROMEBOOK_BOB diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index b76ba4ed32..238f79a216 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -57,3 +57,53 @@ int arch_cpu_init(void)
return 0; } + +#ifdef CONFIG_DEBUG_UART_BOARD_INIT +void board_debug_uart_init(void) +{ +#define GRF_BASE 0xff770000 +#define GPIO0_BASE 0xff720000 +#define PMUGRF_BASE 0xff320000 + struct rk3399_grf_regs * const grf = (void *)GRF_BASE; +#ifdef CONFIG_TARGET_CHROMEBOOK_BOB + struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE; + struct rockchip_gpio_regs * const gpio = (void *)GPIO0_BASE; +#endif + +#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000) + /* Enable early UART0 on the RK3399 */ + rk_clrsetreg(&grf->gpio2c_iomux, + GRF_GPIO2C0_SEL_MASK, + GRF_UART0BT_SIN << GRF_GPIO2C0_SEL_SHIFT); + rk_clrsetreg(&grf->gpio2c_iomux, + GRF_GPIO2C1_SEL_MASK, + GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT); +#else +# ifdef CONFIG_TARGET_CHROMEBOOK_BOB + rk_setreg(&grf->io_vsel, 1 << 0); + + /* + * Let's enable these power rails here, we are already running the SPI + * Flash based code. + */ + spl_gpio_output(gpio, GPIO(BANK_B, 2), 1); /* PP1500_EN */ + spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 2), GPIO_PULL_NORMAL); + + spl_gpio_output(gpio, GPIO(BANK_B, 4), 1); /* PP3000_EN */ + spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 4), GPIO_PULL_NORMAL); +#endif /* CONFIG_TARGET_CHROMEBOOK_BOB */ + + /* Enable early UART2 channel C on the RK3399 */ + rk_clrsetreg(&grf->gpio4c_iomux, + GRF_GPIO4C3_SEL_MASK, + GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT); + rk_clrsetreg(&grf->gpio4c_iomux, + GRF_GPIO4C4_SEL_MASK, + GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT); + /* Set channel C as UART2 input */ + rk_clrsetreg(&grf->soc_con7, + GRF_UART_DBG_SEL_MASK, + GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT); +#endif +} +#endif
On 29/03/2019 01:09, Kever Yang wrote:
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file for all rockchip SoCs later.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/rk3399-board-spl.c | 50 +---------------------- arch/arm/mach-rockchip/rk3399/rk3399.c | 50 +++++++++++++++++++++++ 2 files changed, 51 insertions(+), 49 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c index 54a4b848a3..800ca80022 100644 --- a/arch/arm/mach-rockchip/rk3399-board-spl.c +++ b/arch/arm/mach-rockchip/rk3399-board-spl.c @@ -127,53 +127,6 @@ void secure_timer_init(void) writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG); }
-void board_debug_uart_init(void) -{ -#define GRF_BASE 0xff770000 -#define GPIO0_BASE 0xff720000 -#define PMUGRF_BASE 0xff320000
- struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
-#ifdef CONFIG_TARGET_CHROMEBOOK_BOB
- struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
- struct rockchip_gpio_regs * const gpio = (void *)GPIO0_BASE;
-#endif
-#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
- /* Enable early UART0 on the RK3399 */
- rk_clrsetreg(&grf->gpio2c_iomux,
GRF_GPIO2C0_SEL_MASK,GRF_UART0BT_SIN << GRF_GPIO2C0_SEL_SHIFT);- rk_clrsetreg(&grf->gpio2c_iomux,
GRF_GPIO2C1_SEL_MASK,GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT);-#else -# ifdef CONFIG_TARGET_CHROMEBOOK_BOB
- rk_setreg(&grf->io_vsel, 1 << 0);
- /*
* Let's enable these power rails here, we are already running the SPI* Flash based code.*/- spl_gpio_output(gpio, GPIO(BANK_B, 2), 1); /* PP1500_EN */
- spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 2), GPIO_PULL_NORMAL);
- spl_gpio_output(gpio, GPIO(BANK_B, 4), 1); /* PP3000_EN */
- spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 4), GPIO_PULL_NORMAL);
-#endif /* CONFIG_TARGET_CHROMEBOOK_BOB */
- /* Enable early UART2 channel C on the RK3399 */
- rk_clrsetreg(&grf->gpio4c_iomux,
GRF_GPIO4C3_SEL_MASK,GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);- rk_clrsetreg(&grf->gpio4c_iomux,
GRF_GPIO4C4_SEL_MASK,GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);- /* Set channel C as UART2 input */
- rk_clrsetreg(&grf->soc_con7,
GRF_UART_DBG_SEL_MASK,GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT);-#endif -}
void board_init_f(ulong dummy) { @@ -183,8 +136,7 @@ void board_init_f(ulong dummy) struct rk3399_grf_regs *grf; int ret;
-#define EARLY_UART -#ifdef EARLY_UART +#ifdef CONFIG_DEBUG_UART debug_uart_init();
# ifdef CONFIG_TARGET_CHROMEBOOK_BOB diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index b76ba4ed32..238f79a216 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -57,3 +57,53 @@ int arch_cpu_init(void)
return 0; }
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT +void board_debug_uart_init(void) +{ +#define GRF_BASE 0xff770000 +#define GPIO0_BASE 0xff720000 +#define PMUGRF_BASE 0xff320000
- struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
+#ifdef CONFIG_TARGET_CHROMEBOOK_BOB
- struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
- struct rockchip_gpio_regs * const gpio = (void *)GPIO0_BASE;
+#endif
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
- /* Enable early UART0 on the RK3399 */
- rk_clrsetreg(&grf->gpio2c_iomux,
GRF_GPIO2C0_SEL_MASK,GRF_UART0BT_SIN << GRF_GPIO2C0_SEL_SHIFT);- rk_clrsetreg(&grf->gpio2c_iomux,
GRF_GPIO2C1_SEL_MASK,GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT);+#else +# ifdef CONFIG_TARGET_CHROMEBOOK_BOB
- rk_setreg(&grf->io_vsel, 1 << 0);
- /*
* Let's enable these power rails here, we are already running the SPI* Flash based code.*/- spl_gpio_output(gpio, GPIO(BANK_B, 2), 1); /* PP1500_EN */
- spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 2), GPIO_PULL_NORMAL);
- spl_gpio_output(gpio, GPIO(BANK_B, 4), 1); /* PP3000_EN */
- spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 4), GPIO_PULL_NORMAL);
+#endif /* CONFIG_TARGET_CHROMEBOOK_BOB */
I understand that it's just moving the whole function over, but if I understand correctly these are unrelated to the debug_uart_init that the commit mentions.
- /* Enable early UART2 channel C on the RK3399 */
- rk_clrsetreg(&grf->gpio4c_iomux,
GRF_GPIO4C3_SEL_MASK,GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);- rk_clrsetreg(&grf->gpio4c_iomux,
GRF_GPIO4C4_SEL_MASK,GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);- /* Set channel C as UART2 input */
- rk_clrsetreg(&grf->soc_con7,
GRF_UART_DBG_SEL_MASK,GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT);+#endif +} +#endif
Hi Jack,
On 03/29/2019 06:12 PM, Jack Mitchell wrote:
On 29/03/2019 01:09, Kever Yang wrote:
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file for all rockchip SoCs later.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/rk3399-board-spl.c | 50 +---------------------- arch/arm/mach-rockchip/rk3399/rk3399.c | 50 +++++++++++++++++++++++ 2 files changed, 51 insertions(+), 49 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c index 54a4b848a3..800ca80022 100644 --- a/arch/arm/mach-rockchip/rk3399-board-spl.c +++ b/arch/arm/mach-rockchip/rk3399-board-spl.c @@ -127,53 +127,6 @@ void secure_timer_init(void) writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG); }
-void board_debug_uart_init(void) -{ -#define GRF_BASE 0xff770000 -#define GPIO0_BASE 0xff720000 -#define PMUGRF_BASE 0xff320000
- struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
-#ifdef CONFIG_TARGET_CHROMEBOOK_BOB
- struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
- struct rockchip_gpio_regs * const gpio = (void *)GPIO0_BASE;
-#endif
-#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
- /* Enable early UART0 on the RK3399 */
- rk_clrsetreg(&grf->gpio2c_iomux,
GRF_GPIO2C0_SEL_MASK,GRF_UART0BT_SIN << GRF_GPIO2C0_SEL_SHIFT);- rk_clrsetreg(&grf->gpio2c_iomux,
GRF_GPIO2C1_SEL_MASK,GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT);-#else -# ifdef CONFIG_TARGET_CHROMEBOOK_BOB
- rk_setreg(&grf->io_vsel, 1 << 0);
- /*
* Let's enable these power rails here, we are already running the SPI* Flash based code.*/- spl_gpio_output(gpio, GPIO(BANK_B, 2), 1); /* PP1500_EN */
- spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 2), GPIO_PULL_NORMAL);
- spl_gpio_output(gpio, GPIO(BANK_B, 4), 1); /* PP3000_EN */
- spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 4), GPIO_PULL_NORMAL);
-#endif /* CONFIG_TARGET_CHROMEBOOK_BOB */
- /* Enable early UART2 channel C on the RK3399 */
- rk_clrsetreg(&grf->gpio4c_iomux,
GRF_GPIO4C3_SEL_MASK,GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);- rk_clrsetreg(&grf->gpio4c_iomux,
GRF_GPIO4C4_SEL_MASK,GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);- /* Set channel C as UART2 input */
- rk_clrsetreg(&grf->soc_con7,
GRF_UART_DBG_SEL_MASK,GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT);-#endif -}
void board_init_f(ulong dummy) { @@ -183,8 +136,7 @@ void board_init_f(ulong dummy) struct rk3399_grf_regs *grf; int ret;
-#define EARLY_UART -#ifdef EARLY_UART +#ifdef CONFIG_DEBUG_UART debug_uart_init();
# ifdef CONFIG_TARGET_CHROMEBOOK_BOB diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index b76ba4ed32..238f79a216 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -57,3 +57,53 @@ int arch_cpu_init(void)
return 0; }
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT +void board_debug_uart_init(void) +{ +#define GRF_BASE 0xff770000 +#define GPIO0_BASE 0xff720000 +#define PMUGRF_BASE 0xff320000
- struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
+#ifdef CONFIG_TARGET_CHROMEBOOK_BOB
- struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
- struct rockchip_gpio_regs * const gpio = (void *)GPIO0_BASE;
+#endif
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
- /* Enable early UART0 on the RK3399 */
- rk_clrsetreg(&grf->gpio2c_iomux,
GRF_GPIO2C0_SEL_MASK,GRF_UART0BT_SIN << GRF_GPIO2C0_SEL_SHIFT);- rk_clrsetreg(&grf->gpio2c_iomux,
GRF_GPIO2C1_SEL_MASK,GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT);+#else +# ifdef CONFIG_TARGET_CHROMEBOOK_BOB
- rk_setreg(&grf->io_vsel, 1 << 0);
- /*
* Let's enable these power rails here, we are already running the SPI* Flash based code.*/- spl_gpio_output(gpio, GPIO(BANK_B, 2), 1); /* PP1500_EN */
- spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 2), GPIO_PULL_NORMAL);
- spl_gpio_output(gpio, GPIO(BANK_B, 4), 1); /* PP3000_EN */
- spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 4), GPIO_PULL_NORMAL);
+#endif /* CONFIG_TARGET_CHROMEBOOK_BOB */
I understand that it's just moving the whole function over, but if I understand correctly these are unrelated to the debug_uart_init that the commit mentions.
Thanks for your comment, and I just move the whole function as-is, so I do not want to change the code before I understand it, and I'm not the one contribute this part.
Thanks, - Kever
- /* Enable early UART2 channel C on the RK3399 */
- rk_clrsetreg(&grf->gpio4c_iomux,
GRF_GPIO4C3_SEL_MASK,GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);- rk_clrsetreg(&grf->gpio4c_iomux,
GRF_GPIO4C4_SEL_MASK,GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);- /* Set channel C as UART2 input */
- rk_clrsetreg(&grf->soc_con7,
GRF_UART_DBG_SEL_MASK,GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT);+#endif +} +#endif
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file for all rockchip SoCs later.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
arch/arm/mach-rockchip/rk3399-board-spl.c | 50 +---------------------- arch/arm/mach-rockchip/rk3399/rk3399.c | 50 +++++++++++++++++++++++ 2 files changed, 51 insertions(+), 49 deletions(-)
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file for all rockchip SoCs later.
Signed-off-by: Kever Yang kever.yang@rock-chips.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
arch/arm/mach-rockchip/rk3399-board-spl.c | 50 +---------------------- arch/arm/mach-rockchip/rk3399/rk3399.c | 50 +++++++++++++++++++++++ 2 files changed, 51 insertions(+), 49 deletions(-)
Applied to u-boot-rockchip, thanks!
participants (4)
-
Andy Yan -
Jack Mitchell -
Kever Yang -
Philipp Tomsich