RE: [U-Boot-Users] PCI Enumeration

Start by getting the PCI spec.... PCI22.pdf is usually easy to find on the net the 2.3 spec you will have to pay for.
Apart from that. Make sure that the IDSEL lines on the PCI connector is driven by DIFFERENT address lines. It sounds like your two slots use the same adress lines for IDSEL.
I'm having an issue with U-Boot failing to recognize PCI devices on
bootup. I have a CompactPCI chassis
with a PowerPC 405GP card and a Valleytech PCI carrier board with a TI
6415 DSP on it. The Valleytech
board has an Intel non-transparent PCI bridge chip on it. I also have
a PCI carrier board with two custom
mezzanine boards that have TI 6415 DSPs on them. We access the DSP PCI
interfaces directly on these
boards. My problem is that the PCI bus fails to find one of the boards
when both are plugged in at the
same time. If I only use the Valleytech board, I can talk to it fine;
conversely, if I only use our
custom, board, it works. When both are plugged in, U-Boot only lists
the card device ID for the card
furthest from the PPC. The PCI initialization also fails when I boot
the Debian kernel in this case. I
need to be able to access both cards at the same time so I need to
resolve this.

Hi Rune,
Thanks for the quick reply.
I spoke with the custom DSP board designer about this and he assures me the IDSEL settings are correct. He's done numerous PCI designs and thinking back on it, I've never had more than one PCI device to deal with in a system until now. He reminded me that one thing I left out in my initial description is that both carrier cards have a transparent bridge on them. That bridge would be in front of the non-transparent bridge on the Valleytech board and in front of the DSPs on our custom board. I guess that makes the depth two hops on our custom board and three on the Valleytech board to get to the DSPs. I will read up on the PCI spec and look at the bridge data sheets, but this level of PCI is new to me and I appreciate any and all help. If you have any tips for debugging this in Linux, I would appreciate that too! (I'm used to using Tornado or the Green Hills tools with JTAG probes and this company doesn't have anything for debugging Linux)
Thanks again!! -John
----- Original Message ----- From: "Rune Torgersen" runet@innovsys.com To: "U-Boot-Users" u-boot-users@lists.sourceforge.net Sent: Tuesday, January 13, 2004 9:59 AM Subject: RE: [U-Boot-Users] PCI Enumeration
Start by getting the PCI spec.... PCI22.pdf is usually easy to find on the net the 2.3 spec you will have to pay for.
Apart from that. Make sure that the IDSEL lines on the PCI connector is driven by DIFFERENT address lines. It sounds like your two slots use the same adress lines for IDSEL.
I'm having an issue with U-Boot failing to recognize PCI devices on
bootup. I have a CompactPCI chassis
with a PowerPC 405GP card and a Valleytech PCI carrier board with a TI
6415 DSP on it. The Valleytech
board has an Intel non-transparent PCI bridge chip on it. I also have
a PCI carrier board with two custom
mezzanine boards that have TI 6415 DSPs on them. We access the DSP PCI
interfaces directly on these
boards. My problem is that the PCI bus fails to find one of the boards
when both are plugged in at the
same time. If I only use the Valleytech board, I can talk to it fine;
conversely, if I only use our
custom, board, it works. When both are plugged in, U-Boot only lists
the card device ID for the card
furthest from the PPC. The PCI initialization also fails when I boot
the Debian kernel in this case. I
need to be able to access both cards at the same time so I need to
resolve this.
------------------------------------------------------- This SF.net email is sponsored by: Perforce Software. Perforce is the Fast Software Configuration Management System offering advanced branching capabilities and atomic changes on 50+ platforms. Free Eval! http://www.perforce.com/perforce/loadprog.html _______________________________________________ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users

Hello again,
I've looked at the PCI stuff a little more and based on my loose description below, I believe I should have 4 PCI busses (0-3). PCI0 should see the two Intel transparent bridges, one for each carrier card. Behind transparent bridge 1 (TB1) should be PCI1 which should see the Intel non-transparent bridge. Behind TB2 should be PCI2 which should see the two custom DSP boards. And finally, behind the non-transparent bridge on the Valleytech board should be a DSP. This is definitely not what U-boot is reporting. I have some output that I will paste in below that shows what I'm seeing. The only difference in this output is that I have replaced one of the custom DSPs on the second carrier with another off the shelf Valleytech board to see if it made a difference. (It didn't)
Here is what I see when the carrier card with the two mezzanine cards are placed furthest from the IBM 405GP.
U-Boot 1.0.0 (Jan 2 2004 - 12:10:05)
CPU: IBM PowerPC 405GP Rev. E at 200 MHz (PLB=100, OPB=50, EBC=33 MHz) PCI sync clock at 33 MHz, internal PCI arbiter enabled 16 kB I-Cache 8 kB D-Cache Board: CPCI405_AG310 (Ver 2.x, PCI Host Version) I2C: ready DRAM: 32 MB FLASH: 4 MB PCI: Bus Dev VenId DevId Class Int 01 00 104c a106 0000 1d 01 01 8086 b555 0b40 1e 00 12 1011 0024 0604 00 00 14 1011 0024 0604 00 FPGA: cpci405_2_04.ncd 2s15tq144 2003/03/17 17:16:40 IDE: Bus 0: not available Hit any key to stop autoboot: 0 => => => pci 0 Scanning PCI devices on bus 0 BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ 00.00.00 0x1014 0x0156 Processor 0x20 00.12.00 0x1011 0x0024 Bridge device 0x04 00.14.00 0x1011 0x0024 Bridge device 0x04 => pci 1 Scanning PCI devices on bus 1 BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ 01.00.00 0x0004 0xa104 Build before PCI Rev2.0 0x00 => pci 2 Scanning PCI devices on bus 2 BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ =>
Here is what I see when the carrier card with just a Valleytech mezzannine card is placed furthest from the IBM 405GP.
U-Boot 1.0.0 (Jan 2 2004 - 12:10:05)
CPU: IBM PowerPC 405GP Rev. E at 200 MHz (PLB=100, OPB=50, EBC=33 MHz) PCI sync clock at 33 MHz, internal PCI arbiter enabled 16 kB I-Cache 8 kB D-Cache Board: CPCI405_AG310 (Ver 2.x, PCI Host Version) I2C: ready DRAM: 32 MB FLASH: 4 MB PCI: Bus Dev VenId DevId Class Int 01 00 8086 b555 0b40 1d 00 11 1011 0024 0604 00 00 13 1011 0024 0604 00 FPGA: cpci405_2_04.ncd 2s15tq144 2003/03/17 17:16:40 IDE: Bus 0: not available Hit any key to stop autoboot: 0 => pci 0 Scanning PCI devices on bus 0 BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ 00.00.00 0x1014 0x0156 Processor 0x20 00.11.00 0x1011 0x0024 Bridge device 0x04 00.13.00 0x1011 0x0024 Bridge device 0x04 => pci 1 Scanning PCI devices on bus 1 BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ 01.00.00 0x0004 0xa104 Base system peripheral 0x00 => pci 2 Scanning PCI devices on bus 2 BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ =>
Can someone please provide some insight to me as to what I'm seeing and how I'm interpreting it?
Thanks again, -John
----- Original Message ----- From: "John Manby" jmanby@tnex.com To: "U-Boot-Users" u-boot-users@lists.sourceforge.net Sent: Tuesday, January 13, 2004 6:38 PM Subject: Re: [U-Boot-Users] PCI Enumeration
Hi Rune,
Thanks for the quick reply.
I spoke with the custom DSP board designer about this and he assures me
the
IDSEL settings are correct. He's done numerous PCI designs and thinking
back
on it, I've never had more than one PCI device to deal with in a system until now. He reminded me that one thing I left out in my initial description is that both carrier cards have a transparent bridge on them. That bridge would be in front of the non-transparent bridge on the Valleytech board and in front of the DSPs on our custom board. I guess
that
makes the depth two hops on our custom board and three on the Valleytech board to get to the DSPs. I will read up on the PCI spec and look at the bridge data sheets, but this level of PCI is new to me and I appreciate
any
and all help. If you have any tips for debugging this in Linux, I would appreciate that too! (I'm used to using Tornado or the Green Hills tools with JTAG probes and this company doesn't have anything for debugging
Linux)
Thanks again!! -John
----- Original Message ----- From: "Rune Torgersen" runet@innovsys.com To: "U-Boot-Users" u-boot-users@lists.sourceforge.net Sent: Tuesday, January 13, 2004 9:59 AM Subject: RE: [U-Boot-Users] PCI Enumeration
Start by getting the PCI spec.... PCI22.pdf is usually easy to find on the net the 2.3 spec you will have to pay for.
Apart from that. Make sure that the IDSEL lines on the PCI connector is driven by DIFFERENT address lines. It sounds like your two slots use the same adress lines for IDSEL.
I'm having an issue with U-Boot failing to recognize PCI devices on
bootup. I have a CompactPCI chassis
with a PowerPC 405GP card and a Valleytech PCI carrier board with a TI
6415 DSP on it. The Valleytech
board has an Intel non-transparent PCI bridge chip on it. I also have
a PCI carrier board with two custom
mezzanine boards that have TI 6415 DSPs on them. We access the DSP PCI
interfaces directly on these
boards. My problem is that the PCI bus fails to find one of the boards
when both are plugged in at the
same time. If I only use the Valleytech board, I can talk to it fine;
conversely, if I only use our
custom, board, it works. When both are plugged in, U-Boot only lists
the card device ID for the card
furthest from the PPC. The PCI initialization also fails when I boot
the Debian kernel in this case. I
need to be able to access both cards at the same time so I need to
resolve this.
This SF.net email is sponsored by: Perforce Software. Perforce is the Fast Software Configuration Management System offering advanced branching capabilities and atomic changes on 50+ platforms. Free Eval! http://www.perforce.com/perforce/loadprog.html _______________________________________________ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
This SF.net email is sponsored by: Perforce Software. Perforce is the Fast Software Configuration Management System offering advanced branching capabilities and atomic changes on 50+ platforms. Free Eval! http://www.perforce.com/perforce/loadprog.html _______________________________________________ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
participants (2)
-
John Manby
-
Rune Torgersen