[U-Boot] [PATCH] ppc4xx: Allow setting a single SPD EEPROM address for DDR2 DIMMs

On platforms where SPD EEPROM and another EEPROM have adjacent I2C addresses SPD_EEPROM_ADDRESS should be defined as a single element array, otherwise DDR2 setup code would fail with the following error:
ERROR: Unknown DIMM detected in slot 1
However, fixing SPD_EEPROM_ADDRESS would result in another error:
ERROR: DIMM's DDR1 and DDR2 type can not be mixed.
This happens because initdram() routine does not explicitly initialize dimm_populated array. This patch fixes the problem.
Signed-off-by: Felix Radensky felix@embedded-sol.com --- cpu/ppc4xx/44x_spd_ddr2.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c index f8aa14a..593a286 100644 --- a/cpu/ppc4xx/44x_spd_ddr2.c +++ b/cpu/ppc4xx/44x_spd_ddr2.c @@ -426,7 +426,7 @@ phys_size_t initdram(int board_type) unsigned char spd0[MAX_SPD_BYTES]; unsigned char spd1[MAX_SPD_BYTES]; unsigned char *dimm_spd[MAXDIMMS]; - unsigned long dimm_populated[MAXDIMMS]; + unsigned long dimm_populated[MAXDIMMS] = {SDRAM_NONE, SDRAM_NONE}; unsigned long num_dimm_banks; /* on board dimm banks */ unsigned long val; ddr_cas_id_t selected_cas = DDR_CAS_5; /* preset to silence compiler */

On Tuesday 19 January 2010 20:19:06 Felix Radensky wrote:
On platforms where SPD EEPROM and another EEPROM have adjacent I2C addresses SPD_EEPROM_ADDRESS should be defined as a single element array, otherwise DDR2 setup code would fail with the following error:
ERROR: Unknown DIMM detected in slot 1
However, fixing SPD_EEPROM_ADDRESS would result in another error:
ERROR: DIMM's DDR1 and DDR2 type can not be mixed.
This happens because initdram() routine does not explicitly initialize dimm_populated array. This patch fixes the problem.
Applied to u-boot-ppc4xx/master. Thanks.
Cheers, Stefan
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participants (2)
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Felix Radensky
-
Stefan Roese