[PATCH 1/3] mmc: fsl_esdhc_spl: Add support for loading proper U-Boot from unaligned location
This allows to concatenate SPL and proper U-Boot without extra alignment.
Signed-off-by: Pali Rohár pali@kernel.org --- drivers/mmc/fsl_esdhc_spl.c | 25 ++++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c index 760f13d24018..e3175de16bab 100644 --- a/drivers/mmc/fsl_esdhc_spl.c +++ b/drivers/mmc/fsl_esdhc_spl.c @@ -155,10 +155,21 @@ again: * Load U-Boot image from mmc into RAM */ code_len = CONFIG_SYS_MMC_U_BOOT_SIZE; - blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len; - blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len; + blk_start = offset / mmc->read_bl_len; + blk_off = offset % mmc->read_bl_len; + blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len + 1; + if (blk_off) { + err = mmc->block_dev.block_read(&mmc->block_dev, + blk_start, 1, tmp_buf); + if (err != 1) { + puts("spl: mmc read failed!!\n"); + hang(); + } + blk_start++; + } err = mmc->block_dev.block_read(&mmc->block_dev, blk_start, blk_cnt, - (uchar *)CONFIG_SYS_MMC_U_BOOT_DST); + (uchar *)CONFIG_SYS_MMC_U_BOOT_DST + + (blk_off ? (mmc->read_bl_len - blk_off) : 0)); if (err != blk_cnt) { puts("spl: mmc read failed!!\n"); #ifndef CONFIG_FSL_CORENET @@ -166,6 +177,14 @@ again: #endif hang(); } + /* + * SDHC DMA may erase bytes at dst + bl_len - blk_off - 8 + * due to unaligned access. So copy leading bytes from tmp_buf + * after SDHC DMA transfer. + */ + if (blk_off) + memcpy((uchar *)CONFIG_SYS_MMC_U_BOOT_DST, + tmp_buf + blk_off, mmc->read_bl_len - blk_off);
/* * Clean d-cache and invalidate i-cache, to
When fixed offset via CONFIG_SYS_MMC_U_BOOT_OFFS is not specified then expects that U-Boot proper is placed immediately after SPL without any additional padding.
This allows to generate smaller SPL+U-Boot final binary as it is not required to specify fixed offset to U-Boot proper at SPL compile time.
In this case offset to U-Boot proper is calculated at SPL compile time in linker script.
Signed-off-by: Pali Rohár pali@kernel.org --- arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 10 ++++++++++ drivers/mmc/fsl_esdhc_spl.c | 8 ++++++++ 2 files changed, 18 insertions(+)
diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds index 272e94a1f169..cfb55939468a 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds @@ -59,6 +59,13 @@ SECTIONS __init_begin = .; __init_end = .; _end = .; + +#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC +#if defined(CONFIG_SDCARD) && !defined(CONFIG_SYS_MMC_U_BOOT_OFFS) + mmc_u_boot_offs = .; +#endif +#endif + #ifdef CONFIG_SPL_SKIP_RELOCATE . = ALIGN(4); __bss_start = .; @@ -91,6 +98,9 @@ SECTIONS .resetvec IMAGE_TEXT_BASE + RESET_VECTOR_OFFSET : { KEEP(*(.resetvec)) } = 0xffff +#if defined(CONFIG_SDCARD) && !defined(CONFIG_SYS_MMC_U_BOOT_OFFS) + mmc_u_boot_offs = .; +#endif #endif
#ifndef CONFIG_SPL_SKIP_RELOCATE diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c index e3175de16bab..139b4d853b7a 100644 --- a/drivers/mmc/fsl_esdhc_spl.c +++ b/drivers/mmc/fsl_esdhc_spl.c @@ -9,6 +9,10 @@ #include <mmc.h> #include <malloc.h>
+#ifndef CONFIG_SYS_MMC_U_BOOT_OFFS +extern uchar mmc_u_boot_offs[]; +#endif + /* * The environment variables are written to just after the u-boot image * on SDCard, so we must read the MBR to get the start address and code @@ -149,7 +153,11 @@ again: val = *(tmp_buf + blk_off + ESDHC_BOOT_IMAGE_ADDR + i); offset = (offset << 8) + val; } +#ifndef CONFIG_SYS_MMC_U_BOOT_OFFS + offset += (ulong)&mmc_u_boot_offs - CONFIG_SPL_TEXT_BASE; +#else offset += CONFIG_SYS_MMC_U_BOOT_OFFS; +#endif #endif /* * Load U-Boot image from mmc into RAM
Change 8-byte alignment of SPL binary to just 4-byte alignment as objcopy trims trailing zero bytes when converting ELF file to RAW binary.
This is same fix for SPL linker script as was done fix for U-Boot linker script in commit e8c0e0064c8a ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support").
It is required for the patch "mmc: fsl_esdhc_spl: Add support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS" which triggered this issue in SPL.
Signed-off-by: Pali Rohár pali@kernel.org --- arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds index cfb55939468a..1b189b2f14d3 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds @@ -55,7 +55,7 @@ SECTIONS __ex_table : { *(__ex_table) } __stop___ex_table = .;
- . = ALIGN(8); + . = ALIGN(4); __init_begin = .; __init_end = .; _end = .;
在 2022/5/12 2:33, Pali Rohár 写道:
This allows to concatenate SPL and proper U-Boot without extra alignment.
Signed-off-by: Pali Rohár pali@kernel.org
drivers/mmc/fsl_esdhc_spl.c | 25 ++++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c index 760f13d24018..e3175de16bab 100644 --- a/drivers/mmc/fsl_esdhc_spl.c +++ b/drivers/mmc/fsl_esdhc_spl.c @@ -155,10 +155,21 @@ again:
- Load U-Boot image from mmc into RAM
*/ code_len = CONFIG_SYS_MMC_U_BOOT_SIZE;
- blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len;
- blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len;
- blk_start = offset / mmc->read_bl_len;
- blk_off = offset % mmc->read_bl_len;
Build fail because of blk_off not defined.
Regards, Peng.
- blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len + 1;
- if (blk_off) {
err = mmc->block_dev.block_read(&mmc->block_dev,blk_start, 1, tmp_buf);if (err != 1) {puts("spl: mmc read failed!!\n");hang();}blk_start++;- } err = mmc->block_dev.block_read(&mmc->block_dev, blk_start, blk_cnt,
(uchar *)CONFIG_SYS_MMC_U_BOOT_DST);
(uchar *)CONFIG_SYS_MMC_U_BOOT_DST +(blk_off ? (mmc->read_bl_len - blk_off) : 0));@@ -166,6 +177,14 @@ again: #endif hang(); }
/*
* SDHC DMA may erase bytes at dst + bl_len - blk_off - 8* due to unaligned access. So copy leading bytes from tmp_buf* after SDHC DMA transfer.*/if (blk_off)
memcpy((uchar *)CONFIG_SYS_MMC_U_BOOT_DST,tmp_buf + blk_off, mmc->read_bl_len - blk_off);/*
- Clean d-cache and invalidate i-cache, to
This allows to concatenate SPL and proper U-Boot without extra alignment.
Signed-off-by: Pali Rohár pali@kernel.org --- Changes in v2: * Rebased on top of the U-Boot next branch, commit 98c4828740f4944462b7d9608b95d5b73850c7b0 --- drivers/mmc/fsl_esdhc_spl.c | 27 +++++++++++++++++++++++---- 1 file changed, 23 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c index 760f13d24018..54bf8152ca7a 100644 --- a/drivers/mmc/fsl_esdhc_spl.c +++ b/drivers/mmc/fsl_esdhc_spl.c @@ -58,10 +58,10 @@ void __noreturn mmc_boot(void) { __attribute__((noreturn)) void (*uboot)(void); uint blk_start, blk_cnt, err; + u32 blk_off; #ifndef CONFIG_FSL_CORENET uchar *tmp_buf; u32 blklen; - u32 blk_off; uchar val; #ifndef CONFIG_SPL_FSL_PBL u32 val32; @@ -155,10 +155,21 @@ again: * Load U-Boot image from mmc into RAM */ code_len = CONFIG_SYS_MMC_U_BOOT_SIZE; - blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len; - blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len; + blk_start = offset / mmc->read_bl_len; + blk_off = offset % mmc->read_bl_len; + blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len + 1; + if (blk_off) { + err = mmc->block_dev.block_read(&mmc->block_dev, + blk_start, 1, tmp_buf); + if (err != 1) { + puts("spl: mmc read failed!!\n"); + hang(); + } + blk_start++; + } err = mmc->block_dev.block_read(&mmc->block_dev, blk_start, blk_cnt, - (uchar *)CONFIG_SYS_MMC_U_BOOT_DST); + (uchar *)CONFIG_SYS_MMC_U_BOOT_DST + + (blk_off ? (mmc->read_bl_len - blk_off) : 0)); if (err != blk_cnt) { puts("spl: mmc read failed!!\n"); #ifndef CONFIG_FSL_CORENET @@ -166,6 +177,14 @@ again: #endif hang(); } + /* + * SDHC DMA may erase bytes at dst + bl_len - blk_off - 8 + * due to unaligned access. So copy leading bytes from tmp_buf + * after SDHC DMA transfer. + */ + if (blk_off) + memcpy((uchar *)CONFIG_SYS_MMC_U_BOOT_DST, + tmp_buf + blk_off, mmc->read_bl_len - blk_off);
/* * Clean d-cache and invalidate i-cache, to
On Monday 20 June 2022 12:54:26 Pali Rohár wrote:
This allows to concatenate SPL and proper U-Boot without extra alignment.
Signed-off-by: Pali Rohár pali@kernel.org
Changes in v2:
- Rebased on top of the U-Boot next branch, commit 98c4828740f4944462b7d9608b95d5b73850c7b0
PING?
drivers/mmc/fsl_esdhc_spl.c | 27 +++++++++++++++++++++++---- 1 file changed, 23 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c index 760f13d24018..54bf8152ca7a 100644 --- a/drivers/mmc/fsl_esdhc_spl.c +++ b/drivers/mmc/fsl_esdhc_spl.c @@ -58,10 +58,10 @@ void __noreturn mmc_boot(void) { __attribute__((noreturn)) void (*uboot)(void); uint blk_start, blk_cnt, err;
- u32 blk_off;
#ifndef CONFIG_FSL_CORENET uchar *tmp_buf; u32 blklen;
- u32 blk_off; uchar val;
#ifndef CONFIG_SPL_FSL_PBL u32 val32; @@ -155,10 +155,21 @@ again:
- Load U-Boot image from mmc into RAM
*/ code_len = CONFIG_SYS_MMC_U_BOOT_SIZE;
- blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len;
- blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len;
- blk_start = offset / mmc->read_bl_len;
- blk_off = offset % mmc->read_bl_len;
- blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len + 1;
- if (blk_off) {
err = mmc->block_dev.block_read(&mmc->block_dev,blk_start, 1, tmp_buf);if (err != 1) {puts("spl: mmc read failed!!\n");hang();}blk_start++;- } err = mmc->block_dev.block_read(&mmc->block_dev, blk_start, blk_cnt,
(uchar *)CONFIG_SYS_MMC_U_BOOT_DST);
(uchar *)CONFIG_SYS_MMC_U_BOOT_DST +(blk_off ? (mmc->read_bl_len - blk_off) : 0));#ifndef CONFIG_FSL_CORENET @@ -166,6 +177,14 @@ again: #endif hang(); }
/*
* SDHC DMA may erase bytes at dst + bl_len - blk_off - 8* due to unaligned access. So copy leading bytes from tmp_buf* after SDHC DMA transfer.*/if (blk_off)
memcpy((uchar *)CONFIG_SYS_MMC_U_BOOT_DST,tmp_buf + blk_off, mmc->read_bl_len - blk_off);/*
- Clean d-cache and invalidate i-cache, to
-- 2.20.1
On Thursday 23 June 2022 15:31:14 Pali Rohár wrote:
On Monday 20 June 2022 12:54:26 Pali Rohár wrote:
This allows to concatenate SPL and proper U-Boot without extra alignment.
Signed-off-by: Pali Rohár pali@kernel.org
Changes in v2:
- Rebased on top of the U-Boot next branch, commit 98c4828740f4944462b7d9608b95d5b73850c7b0
PING?
PING?
drivers/mmc/fsl_esdhc_spl.c | 27 +++++++++++++++++++++++---- 1 file changed, 23 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c index 760f13d24018..54bf8152ca7a 100644 --- a/drivers/mmc/fsl_esdhc_spl.c +++ b/drivers/mmc/fsl_esdhc_spl.c @@ -58,10 +58,10 @@ void __noreturn mmc_boot(void) { __attribute__((noreturn)) void (*uboot)(void); uint blk_start, blk_cnt, err;
- u32 blk_off;
#ifndef CONFIG_FSL_CORENET uchar *tmp_buf; u32 blklen;
- u32 blk_off; uchar val;
#ifndef CONFIG_SPL_FSL_PBL u32 val32; @@ -155,10 +155,21 @@ again:
- Load U-Boot image from mmc into RAM
*/ code_len = CONFIG_SYS_MMC_U_BOOT_SIZE;
- blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len;
- blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len;
- blk_start = offset / mmc->read_bl_len;
- blk_off = offset % mmc->read_bl_len;
- blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len + 1;
- if (blk_off) {
err = mmc->block_dev.block_read(&mmc->block_dev,blk_start, 1, tmp_buf);if (err != 1) {puts("spl: mmc read failed!!\n");hang();}blk_start++;- } err = mmc->block_dev.block_read(&mmc->block_dev, blk_start, blk_cnt,
(uchar *)CONFIG_SYS_MMC_U_BOOT_DST);
(uchar *)CONFIG_SYS_MMC_U_BOOT_DST +(blk_off ? (mmc->read_bl_len - blk_off) : 0));#ifndef CONFIG_FSL_CORENET @@ -166,6 +177,14 @@ again: #endif hang(); }
/*
* SDHC DMA may erase bytes at dst + bl_len - blk_off - 8* due to unaligned access. So copy leading bytes from tmp_buf* after SDHC DMA transfer.*/if (blk_off)
memcpy((uchar *)CONFIG_SYS_MMC_U_BOOT_DST,tmp_buf + blk_off, mmc->read_bl_len - blk_off);/*
- Clean d-cache and invalidate i-cache, to
-- 2.20.1
On Tuesday 28 June 2022 20:14:36 Pali Rohár wrote:
On Thursday 23 June 2022 15:31:14 Pali Rohár wrote:
On Monday 20 June 2022 12:54:26 Pali Rohár wrote:
This allows to concatenate SPL and proper U-Boot without extra alignment.
Signed-off-by: Pali Rohár pali@kernel.org
Changes in v2:
- Rebased on top of the U-Boot next branch, commit 98c4828740f4944462b7d9608b95d5b73850c7b0
PING?
PING?
PING?
drivers/mmc/fsl_esdhc_spl.c | 27 +++++++++++++++++++++++---- 1 file changed, 23 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c index 760f13d24018..54bf8152ca7a 100644 --- a/drivers/mmc/fsl_esdhc_spl.c +++ b/drivers/mmc/fsl_esdhc_spl.c @@ -58,10 +58,10 @@ void __noreturn mmc_boot(void) { __attribute__((noreturn)) void (*uboot)(void); uint blk_start, blk_cnt, err;
- u32 blk_off;
#ifndef CONFIG_FSL_CORENET uchar *tmp_buf; u32 blklen;
- u32 blk_off; uchar val;
#ifndef CONFIG_SPL_FSL_PBL u32 val32; @@ -155,10 +155,21 @@ again:
- Load U-Boot image from mmc into RAM
*/ code_len = CONFIG_SYS_MMC_U_BOOT_SIZE;
- blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len;
- blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len;
- blk_start = offset / mmc->read_bl_len;
- blk_off = offset % mmc->read_bl_len;
- blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len + 1;
- if (blk_off) {
err = mmc->block_dev.block_read(&mmc->block_dev,blk_start, 1, tmp_buf);if (err != 1) {puts("spl: mmc read failed!!\n");hang();}blk_start++;- } err = mmc->block_dev.block_read(&mmc->block_dev, blk_start, blk_cnt,
(uchar *)CONFIG_SYS_MMC_U_BOOT_DST);
(uchar *)CONFIG_SYS_MMC_U_BOOT_DST +(blk_off ? (mmc->read_bl_len - blk_off) : 0));#ifndef CONFIG_FSL_CORENET @@ -166,6 +177,14 @@ again: #endif hang(); }
/*
* SDHC DMA may erase bytes at dst + bl_len - blk_off - 8* due to unaligned access. So copy leading bytes from tmp_buf* after SDHC DMA transfer.*/if (blk_off)
memcpy((uchar *)CONFIG_SYS_MMC_U_BOOT_DST,tmp_buf + blk_off, mmc->read_bl_len - blk_off);/*
- Clean d-cache and invalidate i-cache, to
-- 2.20.1
On Thursday 14 July 2022 01:50:44 Pali Rohár wrote:
On Tuesday 28 June 2022 20:14:36 Pali Rohár wrote:
On Thursday 23 June 2022 15:31:14 Pali Rohár wrote:
On Monday 20 June 2022 12:54:26 Pali Rohár wrote:
This allows to concatenate SPL and proper U-Boot without extra alignment.
Signed-off-by: Pali Rohár pali@kernel.org
Changes in v2:
- Rebased on top of the U-Boot next branch, commit 98c4828740f4944462b7d9608b95d5b73850c7b0
PING?
PING?
PING?
PING? What is happening here? I have not received any reply for this patch for more than month. You asked me for rebasing more patches, I did it in one day since request and get no reply.
drivers/mmc/fsl_esdhc_spl.c | 27 +++++++++++++++++++++++---- 1 file changed, 23 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c index 760f13d24018..54bf8152ca7a 100644 --- a/drivers/mmc/fsl_esdhc_spl.c +++ b/drivers/mmc/fsl_esdhc_spl.c @@ -58,10 +58,10 @@ void __noreturn mmc_boot(void) { __attribute__((noreturn)) void (*uboot)(void); uint blk_start, blk_cnt, err;
- u32 blk_off;
#ifndef CONFIG_FSL_CORENET uchar *tmp_buf; u32 blklen;
- u32 blk_off; uchar val;
#ifndef CONFIG_SPL_FSL_PBL u32 val32; @@ -155,10 +155,21 @@ again:
- Load U-Boot image from mmc into RAM
*/ code_len = CONFIG_SYS_MMC_U_BOOT_SIZE;
- blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len;
- blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len;
- blk_start = offset / mmc->read_bl_len;
- blk_off = offset % mmc->read_bl_len;
- blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len + 1;
- if (blk_off) {
err = mmc->block_dev.block_read(&mmc->block_dev,blk_start, 1, tmp_buf);if (err != 1) {puts("spl: mmc read failed!!\n");hang();}blk_start++;- } err = mmc->block_dev.block_read(&mmc->block_dev, blk_start, blk_cnt,
(uchar *)CONFIG_SYS_MMC_U_BOOT_DST);
(uchar *)CONFIG_SYS_MMC_U_BOOT_DST +(blk_off ? (mmc->read_bl_len - blk_off) : 0));#ifndef CONFIG_FSL_CORENET @@ -166,6 +177,14 @@ again: #endif hang(); }
/*
* SDHC DMA may erase bytes at dst + bl_len - blk_off - 8* due to unaligned access. So copy leading bytes from tmp_buf* after SDHC DMA transfer.*/if (blk_off)
memcpy((uchar *)CONFIG_SYS_MMC_U_BOOT_DST,tmp_buf + blk_off, mmc->read_bl_len - blk_off);/*
- Clean d-cache and invalidate i-cache, to
-- 2.20.1
On 6/20/22 19:54, Pali Rohár wrote:
This allows to concatenate SPL and proper U-Boot without extra alignment.
Signed-off-by: Pali Rohár pali@kernel.org
Reviewed-by: Jaehoon Chung jh80.chung@samsung.com
Best Regards, Jaehoon Chung
Changes in v2:
- Rebased on top of the U-Boot next branch, commit 98c4828740f4944462b7d9608b95d5b73850c7b0
drivers/mmc/fsl_esdhc_spl.c | 27 +++++++++++++++++++++++---- 1 file changed, 23 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c index 760f13d24018..54bf8152ca7a 100644 --- a/drivers/mmc/fsl_esdhc_spl.c +++ b/drivers/mmc/fsl_esdhc_spl.c @@ -58,10 +58,10 @@ void __noreturn mmc_boot(void) { __attribute__((noreturn)) void (*uboot)(void); uint blk_start, blk_cnt, err;
- u32 blk_off;
#ifndef CONFIG_FSL_CORENET uchar *tmp_buf; u32 blklen;
- u32 blk_off; uchar val;
#ifndef CONFIG_SPL_FSL_PBL u32 val32; @@ -155,10 +155,21 @@ again:
- Load U-Boot image from mmc into RAM
*/ code_len = CONFIG_SYS_MMC_U_BOOT_SIZE;
- blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len;
- blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len;
- blk_start = offset / mmc->read_bl_len;
- blk_off = offset % mmc->read_bl_len;
- blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len + 1;
- if (blk_off) {
err = mmc->block_dev.block_read(&mmc->block_dev,blk_start, 1, tmp_buf);if (err != 1) {puts("spl: mmc read failed!!\n");hang();}blk_start++;- } err = mmc->block_dev.block_read(&mmc->block_dev, blk_start, blk_cnt,
(uchar *)CONFIG_SYS_MMC_U_BOOT_DST);
(uchar *)CONFIG_SYS_MMC_U_BOOT_DST +(blk_off ? (mmc->read_bl_len - blk_off) : 0));#ifndef CONFIG_FSL_CORENET @@ -166,6 +177,14 @@ again: #endif hang(); }
/*
* SDHC DMA may erase bytes at dst + bl_len - blk_off - 8* due to unaligned access. So copy leading bytes from tmp_buf* after SDHC DMA transfer.*/if (blk_off)
memcpy((uchar *)CONFIG_SYS_MMC_U_BOOT_DST,tmp_buf + blk_off, mmc->read_bl_len - blk_off);/*
- Clean d-cache and invalidate i-cache, to
This allows to concatenate SPL and proper U-Boot without extra alignment.
Signed-off-by: Pali Rohár pali@kernel.org Reviewed-by: Jaehoon Chung jh80.chung@samsung.com --- Changes in v3: * Fix compilation with CONFIG_FSL_CORENET
Changes in v2: * Rebased on top of the U-Boot next branch, commit 98c4828740f4944462b7d9608b95d5b73850c7b0 --- drivers/mmc/fsl_esdhc_spl.c | 35 ++++++++++++++++++++++++++--------- 1 file changed, 26 insertions(+), 9 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c index 760f13d24018..dd6d5fa81ea6 100644 --- a/drivers/mmc/fsl_esdhc_spl.c +++ b/drivers/mmc/fsl_esdhc_spl.c @@ -58,10 +58,10 @@ void __noreturn mmc_boot(void) { __attribute__((noreturn)) void (*uboot)(void); uint blk_start, blk_cnt, err; -#ifndef CONFIG_FSL_CORENET uchar *tmp_buf; u32 blklen; u32 blk_off; +#ifndef CONFIG_FSL_CORENET uchar val; #ifndef CONFIG_SPL_FSL_PBL u32 val32; @@ -83,9 +83,6 @@ void __noreturn mmc_boot(void) hang(); }
-#ifdef CONFIG_FSL_CORENET - offset = CONFIG_SYS_MMC_U_BOOT_OFFS; -#else blklen = mmc->read_bl_len; if (blklen < 512) blklen = 512; @@ -95,6 +92,9 @@ void __noreturn mmc_boot(void) hang(); }
+#ifdef CONFIG_FSL_CORENET + offset = CONFIG_SYS_MMC_U_BOOT_OFFS; +#else sector = 0; again: memset(tmp_buf, 0, blklen); @@ -155,17 +155,34 @@ again: * Load U-Boot image from mmc into RAM */ code_len = CONFIG_SYS_MMC_U_BOOT_SIZE; - blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len; - blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len; + blk_start = offset / mmc->read_bl_len; + blk_off = offset % mmc->read_bl_len; + blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len + 1; + if (blk_off) { + err = mmc->block_dev.block_read(&mmc->block_dev, + blk_start, 1, tmp_buf); + if (err != 1) { + puts("spl: mmc read failed!!\n"); + hang(); + } + blk_start++; + } err = mmc->block_dev.block_read(&mmc->block_dev, blk_start, blk_cnt, - (uchar *)CONFIG_SYS_MMC_U_BOOT_DST); + (uchar *)CONFIG_SYS_MMC_U_BOOT_DST + + (blk_off ? (mmc->read_bl_len - blk_off) : 0)); if (err != blk_cnt) { puts("spl: mmc read failed!!\n"); -#ifndef CONFIG_FSL_CORENET free(tmp_buf); -#endif hang(); } + /* + * SDHC DMA may erase bytes at dst + bl_len - blk_off - 8 + * due to unaligned access. So copy leading bytes from tmp_buf + * after SDHC DMA transfer. + */ + if (blk_off) + memcpy((uchar *)CONFIG_SYS_MMC_U_BOOT_DST, + tmp_buf + blk_off, mmc->read_bl_len - blk_off);
/* * Clean d-cache and invalidate i-cache, to
Change 8-byte alignment of SPL binary to just 4-byte alignment as objcopy trims trailing zero bytes when converting ELF file to RAW binary.
This is same fix for SPL linker script as was done fix for U-Boot linker script in commit e8c0e0064c8a ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support").
It is required for the patch "mmc: fsl_esdhc_spl: Add support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS" which triggered this issue in SPL.
Signed-off-by: Pali Rohár pali@kernel.org --- arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds index e88153745238..89df4b5f6f07 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds @@ -58,7 +58,7 @@ SECTIONS __ex_table : { *(__ex_table) } __stop___ex_table = .;
- . = ALIGN(8); + . = ALIGN(4); __init_begin = .; __init_end = .; _end = .;
When fixed offset via CONFIG_SYS_MMC_U_BOOT_OFFS is not specified then expects that U-Boot proper is placed immediately after SPL without any additional padding.
This allows to generate smaller SPL+U-Boot final binary as it is not required to specify fixed offset to U-Boot proper at SPL compile time.
In this case offset to U-Boot proper is calculated at SPL compile time in linker script.
Signed-off-by: Pali Rohár pali@kernel.org --- arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 10 ++++++++++ drivers/mmc/fsl_esdhc_spl.c | 8 ++++++++ 2 files changed, 18 insertions(+)
diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds index 89df4b5f6f07..f775f6bc4d06 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds @@ -62,6 +62,13 @@ SECTIONS __init_begin = .; __init_end = .; _end = .; + +#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC +#if defined(CONFIG_SDCARD) && !defined(CONFIG_SYS_MMC_U_BOOT_OFFS) + mmc_u_boot_offs = .; +#endif +#endif + #ifdef CONFIG_SPL_SKIP_RELOCATE . = ALIGN(4); __bss_start = .; @@ -94,6 +101,9 @@ SECTIONS .resetvec IMAGE_TEXT_BASE + RESET_VECTOR_OFFSET : { KEEP(*(.resetvec)) } = 0xffff +#if defined(CONFIG_SDCARD) && !defined(CONFIG_SYS_MMC_U_BOOT_OFFS) + mmc_u_boot_offs = .; +#endif #endif
#ifndef CONFIG_SPL_SKIP_RELOCATE diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c index dd6d5fa81ea6..aa00d7e2014d 100644 --- a/drivers/mmc/fsl_esdhc_spl.c +++ b/drivers/mmc/fsl_esdhc_spl.c @@ -9,6 +9,10 @@ #include <mmc.h> #include <malloc.h>
+#ifndef CONFIG_SYS_MMC_U_BOOT_OFFS +extern uchar mmc_u_boot_offs[]; +#endif + /* * The environment variables are written to just after the u-boot image * on SDCard, so we must read the MBR to get the start address and code @@ -149,7 +153,11 @@ again: val = *(tmp_buf + blk_off + ESDHC_BOOT_IMAGE_ADDR + i); offset = (offset << 8) + val; } +#ifndef CONFIG_SYS_MMC_U_BOOT_OFFS + offset += (ulong)&mmc_u_boot_offs - CONFIG_SPL_TEXT_BASE; +#else offset += CONFIG_SYS_MMC_U_BOOT_OFFS; +#endif #endif /* * Load U-Boot image from mmc into RAM
Hi,
-----Original Message----- From: Pali Rohar [mailto:pali@kernel.org] Sent: Saturday, August 6, 2022 5:10 AM To: Jaehoon Chung; Peng Fan; Marek Behun Cc: Sinan Akman; u-boot@lists.denx.de Subject: [PATCH v3 3/3] mmc: fsl_esdhc_spl: Add support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS
When fixed offset via CONFIG_SYS_MMC_U_BOOT_OFFS is not specified then expects that U-Boot proper is placed immediately after SPL without any additional padding.
This allows to generate smaller SPL+U-Boot final binary as it is not required to specify fixed offset to U-Boot proper at SPL compile time.
In this case offset to U-Boot proper is calculated at SPL compile time in linker script.
Signed-off-by: Pali Rohar pali@kernel.org
Reviewed-by: Jaehoon Chung jh80.chung@samsung.com
Best Regards, Jaehoon Chung
arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 10 ++++++++++ drivers/mmc/fsl_esdhc_spl.c | 8 ++++++++ 2 files changed, 18 insertions(+)
diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds index 89df4b5f6f07..f775f6bc4d06 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds @@ -62,6 +62,13 @@ SECTIONS __init_begin = .; __init_end = .; _end = .;
+#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC +#if defined(CONFIG_SDCARD) && !defined(CONFIG_SYS_MMC_U_BOOT_OFFS)
- mmc_u_boot_offs = .;
+#endif +#endif
#ifdef CONFIG_SPL_SKIP_RELOCATE . = ALIGN(4); __bss_start = .; @@ -94,6 +101,9 @@ SECTIONS .resetvec IMAGE_TEXT_BASE + RESET_VECTOR_OFFSET : { KEEP(*(.resetvec)) } = 0xffff +#if defined(CONFIG_SDCARD) && !defined(CONFIG_SYS_MMC_U_BOOT_OFFS)
- mmc_u_boot_offs = .;
+#endif #endif
#ifndef CONFIG_SPL_SKIP_RELOCATE diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c index dd6d5fa81ea6..aa00d7e2014d 100644 --- a/drivers/mmc/fsl_esdhc_spl.c +++ b/drivers/mmc/fsl_esdhc_spl.c @@ -9,6 +9,10 @@ #include <mmc.h> #include <malloc.h>
+#ifndef CONFIG_SYS_MMC_U_BOOT_OFFS +extern uchar mmc_u_boot_offs[]; +#endif
/*
- The environment variables are written to just after the u-boot image
- on SDCard, so we must read the MBR to get the start address and code
@@ -149,7 +153,11 @@ again: val = *(tmp_buf + blk_off + ESDHC_BOOT_IMAGE_ADDR + i); offset = (offset << 8) + val; } +#ifndef CONFIG_SYS_MMC_U_BOOT_OFFS
- offset += (ulong)&mmc_u_boot_offs - CONFIG_SPL_TEXT_BASE;
+#else offset += CONFIG_SYS_MMC_U_BOOT_OFFS; +#endif #endif /*
- Load U-Boot image from mmc into RAM
-- 2.20.1
participants (4)
-
Jaehoon Chung -
jh80.chung＠samsung.com
-
Pali Rohár -
Peng Fan (OSS)