[U-Boot] [PATCH v2 00/10] rockchip: some code optimization and new rk3288 board support
This patchset was rebase to commit c482c60 'rockchip: sdram: Fix register layout for Linux'.
Changes in v2: - Combine multiple patches to a patchset - Disable fastboot in SPL - Add support for PopMetal rk3288 board
Ziyuan Xu (10): rockchip: add a dummy byte for the sdram-channel property cosmetic: rockchip: rk3288: pinctrl: fix config symbol naming Revert "rockchip: Move the MMC setup check earlier" rockchip: rk3288: disable fastboot in SPL stage rockchip: remove the duplicated macro config rockchip: rk3288: revise CONFIG_FASTBOOT_BUF_ADDR rockchip: rk3288: move evb board to rockchip folder rockchip: rk3036: update MAINTAINER file rockchip: add basic support for fennec-rk3288 board rockchip: add support for rk3288 PopMetal board
arch/arm/dts/Makefile | 2 + arch/arm/dts/rk3288-evb.dts | 3 +- arch/arm/dts/rk3288-fennec.dts | 60 +++ arch/arm/dts/rk3288-fennec.dtsi | 421 +++++++++++++++++ arch/arm/dts/rk3288-popmetal.dts | 61 +++ arch/arm/dts/rk3288-popmetal.dtsi | 520 +++++++++++++++++++++ arch/arm/mach-rockchip/rk3288-board-spl.c | 27 +- arch/arm/mach-rockchip/rk3288/Kconfig | 23 +- board/chipspark/popmetal_rk3288/Kconfig | 15 + board/chipspark/popmetal_rk3288/MAINTAINERS | 6 + board/chipspark/popmetal_rk3288/Makefile | 7 + board/chipspark/popmetal_rk3288/popmetal-rk3288.c | 15 + board/rockchip/evb_rk3036/MAINTAINERS | 4 +- .../evb-rk3288 => rockchip/evb_rk3288}/Kconfig | 6 +- .../evb-rk3288 => rockchip/evb_rk3288}/MAINTAINERS | 4 +- .../evb-rk3288 => rockchip/evb_rk3288}/Makefile | 0 .../evb_rk3288}/evb-rk3288.c | 0 board/rockchip/fennec_rk3288/Kconfig | 15 + board/rockchip/fennec_rk3288/MAINTAINERS | 6 + board/rockchip/fennec_rk3288/Makefile | 7 + board/rockchip/fennec_rk3288/fennec-rk3288.c | 15 + board/rockchip/kylin_rk3036/MAINTAINERS | 4 +- configs/evb-rk3288_defconfig | 2 +- configs/fennec-rk3288_defconfig | 66 +++ configs/popmetal-rk3288_defconfig | 65 +++ doc/README.rockchip | 4 +- include/configs/{evb-rk3288.h => evb_rk3288.h} | 0 include/configs/fennec_rk3288.h | 26 ++ include/configs/kylin_rk3036.h | 1 - include/configs/popmetal_rk3288.h | 26 ++ include/configs/rk3036_common.h | 1 - include/configs/rk3288_common.h | 8 +- 32 files changed, 1385 insertions(+), 35 deletions(-) create mode 100644 arch/arm/dts/rk3288-fennec.dts create mode 100644 arch/arm/dts/rk3288-fennec.dtsi create mode 100644 arch/arm/dts/rk3288-popmetal.dts create mode 100644 arch/arm/dts/rk3288-popmetal.dtsi create mode 100644 board/chipspark/popmetal_rk3288/Kconfig create mode 100644 board/chipspark/popmetal_rk3288/MAINTAINERS create mode 100644 board/chipspark/popmetal_rk3288/Makefile create mode 100644 board/chipspark/popmetal_rk3288/popmetal-rk3288.c rename board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/Kconfig (67%) rename board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/MAINTAINERS (58%) rename board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/Makefile (100%) rename board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/evb-rk3288.c (100%) create mode 100644 board/rockchip/fennec_rk3288/Kconfig create mode 100644 board/rockchip/fennec_rk3288/MAINTAINERS create mode 100644 board/rockchip/fennec_rk3288/Makefile create mode 100644 board/rockchip/fennec_rk3288/fennec-rk3288.c create mode 100644 configs/fennec-rk3288_defconfig create mode 100644 configs/popmetal-rk3288_defconfig rename include/configs/{evb-rk3288.h => evb_rk3288.h} (100%) create mode 100644 include/configs/fennec_rk3288.h create mode 100644 include/configs/popmetal_rk3288.h
Add an extra byte so that this data is not byteswapped.
Signed-off-by: Ziyuan Xu jk.kernel@gmail.com Acked-by: Simon Glass sjg@chromium.org Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com ---
Changes in v2: None
arch/arm/dts/rk3288-evb.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/rk3288-evb.dts b/arch/arm/dts/rk3288-evb.dts index caf24ee..3e1ee58 100644 --- a/arch/arm/dts/rk3288-evb.dts +++ b/arch/arm/dts/rk3288-evb.dts @@ -25,7 +25,8 @@ 0x8 0x1f4>; rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076 0x0 0xc3 0x6 0x2>; - rockchip,sdram-channel = /bits/ 8 <0x2 0xa 0x3 0x2 0x2 0x0 0xe 0xe>; + /* Add a dummy value to cause of-platdata think this is bytes */ + rockchip,sdram-channel = /bits/ 8 <0x2 0xa 0x3 0x2 0x2 0x0 0xe 0xe 0xff>; rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 0>; };
On 26 July 2016 at 04:28, Ziyuan Xu jk.kernel@gmail.com wrote:
Add an extra byte so that this data is not byteswapped.
Signed-off-by: Ziyuan Xu jk.kernel@gmail.com Acked-by: Simon Glass sjg@chromium.org Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com
Changes in v2: None
arch/arm/dts/rk3288-evb.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
Applied to u-boot-rockchip, thanks!
Revise config to CONFIG_ROCKCHIP_RK3288_PINCTRL.
Signed-off-by: Ziyuan Xu jk.kernel@gmail.com Acked-by: Simon Glass sjg@chromium.org Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com ---
Changes in v2: None
configs/evb-rk3288_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index 41cfedd..93be4a5 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -46,7 +46,7 @@ CONFIG_PINCTRL=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPL_PINCTRL=y # CONFIG_SPL_PINCTRL_FULL is not set -CONFIG_ROCKCHIP_PINCTRL=y +CONFIG_ROCKCHIP_RK3288_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_ACT8846=y CONFIG_DM_REGULATOR=y
On 26 July 2016 at 04:28, Ziyuan Xu jk.kernel@gmail.com wrote:
Revise config to CONFIG_ROCKCHIP_RK3288_PINCTRL.
Signed-off-by: Ziyuan Xu jk.kernel@gmail.com Acked-by: Simon Glass sjg@chromium.org Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com
Changes in v2: None
configs/evb-rk3288_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Applied to u-boot-rockchip, thanks!
Boot Rom wouldn't initialize sdmmc while booting from eMMC. We need to setup sdmmc gpio, otherwise we will hit an error below:
=>mmc info blk_get_device: if_type=6, devnum=0: dwmmc@ff0c0000.blk, 6, 0 uclass_find_device_by_seq: 0 -1 uclass_find_device_by_seq: 0 0 - -1 -1 - -1 0 - found uclass_find_device_by_seq: 0 1 - -1 -1 - -1 0 - not found fdtdec_get_int_array: interrupts get_prop_check_min_len: interrupts Buswidth = 1, clock: 0 Buswidth = 1, clock: 400000 Sending CMD0 dwmci_send_cmd: Timeout on data busy dwmci_send_cmd: Timeout on data busy dwmci_send_cmd: Timeout on data busy dwmci_send_cmd: Timeout on data busy
This reverts commit 6efeeea79c880d3dd262e0dca9da2687f0ab68c9.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com Acked-by: Simon Glass sjg@chromium.org Tested-by: Simon Glass sjg@chromium.org ---
Changes in v2: None
arch/arm/mach-rockchip/rk3288-board-spl.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c index ed14023..1b74173 100644 --- a/arch/arm/mach-rockchip/rk3288-board-spl.c +++ b/arch/arm/mach-rockchip/rk3288-board-spl.c @@ -116,6 +116,9 @@ static void configure_l2ctlr(void) #ifdef CONFIG_SPL_MMC_SUPPORT static int configure_emmc(struct udevice *pinctrl) { +#if !defined(CONFIG_TARGET_ROCK2) && !defined(CONFIG_TARGET_FIREFLY_RK3288) && \ + !defined(CONFIG_TARGET_EVB_RK3288) + struct gpio_desc desc; int ret;
@@ -145,7 +148,7 @@ static int configure_emmc(struct udevice *pinctrl) debug("gpio value ret=%d\n", ret); return ret; } - +#endif return 0; } #endif @@ -249,20 +252,17 @@ void spl_board_init(void) debug("%s: Cannot find pinctrl device\n", __func__); goto err; } + #ifdef CONFIG_SPL_MMC_SUPPORT - if (!IS_ENABLED(CONFIG_TARGET_ROCK2) && - !IS_ENABLED(CONFIG_TARGET_FIREFLY_RK3288) && - !IS_ENABLED(CONFIG_TARGET_EVB_RK3288)) { - ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD); - if (ret) { - debug("%s: Failed to set up SD card\n", __func__); - goto err; - } - ret = configure_emmc(pinctrl); - if (ret) { - debug("%s: Failed to set up eMMC\n", __func__); - goto err; - } + ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD); + if (ret) { + debug("%s: Failed to set up SD card\n", __func__); + goto err; + } + ret = configure_emmc(pinctrl); + if (ret) { + debug("%s: Failed to set up eMMC\n", __func__); + goto err; } #endif
On 26 July 2016 at 04:28, Ziyuan Xu jk.kernel@gmail.com wrote:
Boot Rom wouldn't initialize sdmmc while booting from eMMC. We need to setup sdmmc gpio, otherwise we will hit an error below:
=>mmc info blk_get_device: if_type=6, devnum=0: dwmmc@ff0c0000.blk, 6, 0 uclass_find_device_by_seq: 0 -1 uclass_find_device_by_seq: 0 0
- -1 -1
- -1 0
- found
uclass_find_device_by_seq: 0 1
- -1 -1
- -1 0
- not found
fdtdec_get_int_array: interrupts get_prop_check_min_len: interrupts Buswidth = 1, clock: 0 Buswidth = 1, clock: 400000 Sending CMD0 dwmci_send_cmd: Timeout on data busy dwmci_send_cmd: Timeout on data busy dwmci_send_cmd: Timeout on data busy dwmci_send_cmd: Timeout on data busy
This reverts commit 6efeeea79c880d3dd262e0dca9da2687f0ab68c9.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com Acked-by: Simon Glass sjg@chromium.org Tested-by: Simon Glass sjg@chromium.org
Changes in v2: None
arch/arm/mach-rockchip/rk3288-board-spl.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-)
Applied to u-boot-rockchip, thanks!
Reduce compilation time for SPL.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com ---
Changes in v2: None
include/configs/rk3288_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 2a36c17..72dfb8a 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -84,6 +84,7 @@ #define CONFIG_SPI #define CONFIG_SF_DEFAULT_SPEED 20000000
+#ifndef CONFIG_SPL_BUILD /* usb otg */ #define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_DUALSPEED @@ -110,7 +111,6 @@ #define CONFIG_CMD_GPT #define CONFIG_EFI_PARTITION
-#ifndef CONFIG_SPL_BUILD #include <config_distro_defaults.h>
#define ENV_MEM_LAYOUT_SETTINGS \
On 26 July 2016 at 04:28, Ziyuan Xu jk.kernel@gmail.com wrote:
Reduce compilation time for SPL.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com
Changes in v2: None
include/configs/rk3288_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Acked-by: Simon Glass sjg@chromium.org
On 27 July 2016 at 21:11, Simon Glass sjg@chromium.org wrote:
On 26 July 2016 at 04:28, Ziyuan Xu jk.kernel@gmail.com wrote:
Reduce compilation time for SPL.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com
Changes in v2: None
include/configs/rk3288_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Acked-by: Simon Glass sjg@chromium.org
Applied to u-boot-rockchip, thanks!
CONFIG_DOS_PARTITION and CONFIG_EFI_PARTITION are already included in config_distro_defaults.h, and we don't need them in SPL stage.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com Acked-by: Simon Glass sjg@chromium.org ---
Changes in v2: None
include/configs/kylin_rk3036.h | 1 - include/configs/rk3036_common.h | 1 - include/configs/rk3288_common.h | 2 -- 3 files changed, 4 deletions(-)
diff --git a/include/configs/kylin_rk3036.h b/include/configs/kylin_rk3036.h index b16c03f..e8ca76d 100644 --- a/include/configs/kylin_rk3036.h +++ b/include/configs/kylin_rk3036.h @@ -26,7 +26,6 @@ /* Enable gpt partition table */ #define CONFIG_CMD_GPT #define CONFIG_RANDOM_UUID -#define CONFIG_EFI_PARTITION #define PARTS_DEFAULT \ "uuid_disk=${uuid_gpt_disk};" \ "name=loader,start=32K,size=4000K,uuid=${uuid_gpt_loader};" \ diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index ae4b101..f50b49c 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -48,7 +48,6 @@ #define CONFIG_DWMMC #define CONFIG_BOUNCE_BUFFER
-#define CONFIG_DOS_PARTITION #define CONFIG_FAT_WRITE #define CONFIG_PARTITION_UUIDS #define CONFIG_CMD_PART diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 72dfb8a..7ef0f03 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -59,7 +59,6 @@ #define CONFIG_DWMMC #define CONFIG_BOUNCE_BUFFER
-#define CONFIG_DOS_PARTITION #define CONFIG_FAT_WRITE #define CONFIG_PARTITION_UUIDS #define CONFIG_CMD_PART @@ -109,7 +108,6 @@
/* Enable gpt partition table */ #define CONFIG_CMD_GPT -#define CONFIG_EFI_PARTITION
#include <config_distro_defaults.h>
On 26 July 2016 at 04:28, Ziyuan Xu jk.kernel@gmail.com wrote:
CONFIG_DOS_PARTITION and CONFIG_EFI_PARTITION are already included in config_distro_defaults.h, and we don't need them in SPL stage.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com Acked-by: Simon Glass sjg@chromium.org
Changes in v2: None
include/configs/kylin_rk3036.h | 1 - include/configs/rk3036_common.h | 1 - include/configs/rk3288_common.h | 2 -- 3 files changed, 4 deletions(-)
Applied to u-boot-rockchip, thanks!
CONFIG_SYS_LOAD_ADDR is absolutely safe to store image for fastboot.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com Acked-by: Simon Glass sjg@chromium.org ---
Changes in v2: None
include/configs/rk3288_common.h | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 7ef0f03..bad5eea 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -96,9 +96,7 @@ #define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_FASTBOOT_FLASH #define CONFIG_FASTBOOT_FLASH_MMC_DEV 1 /* eMMC */ -/* stroe safely fastboot buffer data to the middle of bank */ -#define CONFIG_FASTBOOT_BUF_ADDR (CONFIG_SYS_SDRAM_BASE \ - + SDRAM_BANK_SIZE / 2) +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR #define CONFIG_FASTBOOT_BUF_SIZE 0x08000000
#define CONFIG_USB_GADGET_DOWNLOAD
On 26 July 2016 at 04:28, Ziyuan Xu jk.kernel@gmail.com wrote:
CONFIG_SYS_LOAD_ADDR is absolutely safe to store image for fastboot.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com Acked-by: Simon Glass sjg@chromium.org
Changes in v2: None
include/configs/rk3288_common.h | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)
Applied to u-boot-rockchip, thanks!
The 'evb-rk3288' is not a vendor name, change it to 'rockchip' which is the real vendor name.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com Acked-by: Simon Glass sjg@chromium.org ---
Changes in v2: None
arch/arm/mach-rockchip/rk3288/Kconfig | 2 +- board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/Kconfig | 6 +++--- board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/MAINTAINERS | 4 ++-- board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/Makefile | 0 board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/evb-rk3288.c | 0 include/configs/{evb-rk3288.h => evb_rk3288.h} | 0 6 files changed, 6 insertions(+), 6 deletions(-) rename board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/Kconfig (67%) rename board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/MAINTAINERS (58%) rename board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/Makefile (100%) rename board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/evb-rk3288.c (100%) rename include/configs/{evb-rk3288.h => evb_rk3288.h} (100%)
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index 031dbfc..67f29d2 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -53,6 +53,6 @@ source "board/firefly/firefly-rk3288/Kconfig"
source "board/radxa/rock2/Kconfig"
-source "board/evb-rk3288/evb-rk3288/Kconfig" +source "board/rockchip/evb_rk3288/Kconfig"
endif diff --git a/board/evb-rk3288/evb-rk3288/Kconfig b/board/rockchip/evb_rk3288/Kconfig similarity index 67% rename from board/evb-rk3288/evb-rk3288/Kconfig rename to board/rockchip/evb_rk3288/Kconfig index b201acb..8ab07f4 100644 --- a/board/evb-rk3288/evb-rk3288/Kconfig +++ b/board/rockchip/evb_rk3288/Kconfig @@ -1,13 +1,13 @@ if TARGET_EVB_RK3288
config SYS_BOARD - default "evb-rk3288" + default "evb_rk3288"
config SYS_VENDOR - default "evb-rk3288" + default "rockchip"
config SYS_CONFIG_NAME - default "evb-rk3288" + default "evb_rk3288"
config BOARD_SPECIFIC_OPTIONS # dummy def_bool y diff --git a/board/evb-rk3288/evb-rk3288/MAINTAINERS b/board/rockchip/evb_rk3288/MAINTAINERS similarity index 58% rename from board/evb-rk3288/evb-rk3288/MAINTAINERS rename to board/rockchip/evb_rk3288/MAINTAINERS index 222c254..8a4f127 100644 --- a/board/evb-rk3288/evb-rk3288/MAINTAINERS +++ b/board/rockchip/evb_rk3288/MAINTAINERS @@ -1,6 +1,6 @@ EVB-RK3288 M: Lin Huang hl@rock-chips.com S: Maintained -F: board/evb-rk3288/evb-rk3288 -F: include/configs/evb-rk3288.h +F: board/rockchip/evb_rk3288 +F: include/configs/evb_rk3288.h F: configs/evb-rk3288_defconfig diff --git a/board/evb-rk3288/evb-rk3288/Makefile b/board/rockchip/evb_rk3288/Makefile similarity index 100% rename from board/evb-rk3288/evb-rk3288/Makefile rename to board/rockchip/evb_rk3288/Makefile diff --git a/board/evb-rk3288/evb-rk3288/evb-rk3288.c b/board/rockchip/evb_rk3288/evb-rk3288.c similarity index 100% rename from board/evb-rk3288/evb-rk3288/evb-rk3288.c rename to board/rockchip/evb_rk3288/evb-rk3288.c diff --git a/include/configs/evb-rk3288.h b/include/configs/evb_rk3288.h similarity index 100% rename from include/configs/evb-rk3288.h rename to include/configs/evb_rk3288.h
On 26 July 2016 at 04:28, Ziyuan Xu jk.kernel@gmail.com wrote:
The 'evb-rk3288' is not a vendor name, change it to 'rockchip' which is the real vendor name.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com Acked-by: Simon Glass sjg@chromium.org
Changes in v2: None
arch/arm/mach-rockchip/rk3288/Kconfig | 2 +- board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/Kconfig | 6 +++--- board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/MAINTAINERS | 4 ++-- board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/Makefile | 0 board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/evb-rk3288.c | 0 include/configs/{evb-rk3288.h => evb_rk3288.h} | 0 6 files changed, 6 insertions(+), 6 deletions(-) rename board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/Kconfig (67%) rename board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/MAINTAINERS (58%) rename board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/Makefile (100%) rename board/{evb-rk3288/evb-rk3288 => rockchip/evb_rk3288}/evb-rk3288.c (100%) rename include/configs/{evb-rk3288.h => evb_rk3288.h} (100%)
Applied to u-boot-rockchip, thanks!
Update MAINTAINER files for kylin_rk3036, evb_rk3036.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com Acked-by: Simon Glass sjg@chromium.org ---
Changes in v2: None
board/rockchip/evb_rk3036/MAINTAINERS | 4 ++-- board/rockchip/kylin_rk3036/MAINTAINERS | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/board/rockchip/evb_rk3036/MAINTAINERS b/board/rockchip/evb_rk3036/MAINTAINERS index 152d31c..91f8a83 100644 --- a/board/rockchip/evb_rk3036/MAINTAINERS +++ b/board/rockchip/evb_rk3036/MAINTAINERS @@ -1,6 +1,6 @@ EVB-RK3036 M: huang lin hl@rock-chips.com S: Maintained -F: board/evb/evb-rk3036 -F: include/configs/evb-rk3036.h +F: board/rockchip/evb_rk3036 +F: include/configs/evb_rk3036.h F: configs/evb-rk3036_defconfig diff --git a/board/rockchip/kylin_rk3036/MAINTAINERS b/board/rockchip/kylin_rk3036/MAINTAINERS index f8ee834..5453e7d 100644 --- a/board/rockchip/kylin_rk3036/MAINTAINERS +++ b/board/rockchip/kylin_rk3036/MAINTAINERS @@ -1,6 +1,6 @@ KYLIN-RK3036 M: huang lin hl@rock-chips.com S: Maintained -F: board/kylin/kylin-rk3036 -F: include/configs/kylin-rk3036.h +F: board/rockchip/kylin_rk3036 +F: include/configs/kylin_rk3036.h F: configs/kylin-rk3036_defconfig
On 26 July 2016 at 04:28, Ziyuan Xu jk.kernel@gmail.com wrote:
Update MAINTAINER files for kylin_rk3036, evb_rk3036.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com Acked-by: Simon Glass sjg@chromium.org
Changes in v2: None
board/rockchip/evb_rk3036/MAINTAINERS | 4 ++-- board/rockchip/kylin_rk3036/MAINTAINERS | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-)
Applied to u-boot-rockchip, thanks!
Fennec is a RK3288-based development board with 2 USB ports, HDMI, micro-SD card, audio and WiFi and Gigabit Ethernet. It also includes on-board 8GB eMMC and 2GB of SDRAM. Expansion connectors provides access to display pins, I2C, SPI, UART and GPIOs.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com ---
Changes in v2: None
arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3288-fennec.dts | 60 ++++ arch/arm/dts/rk3288-fennec.dtsi | 421 +++++++++++++++++++++++++++ arch/arm/mach-rockchip/rk3288-board-spl.c | 3 +- arch/arm/mach-rockchip/rk3288/Kconfig | 10 + board/rockchip/fennec_rk3288/Kconfig | 15 + board/rockchip/fennec_rk3288/MAINTAINERS | 6 + board/rockchip/fennec_rk3288/Makefile | 7 + board/rockchip/fennec_rk3288/fennec-rk3288.c | 15 + configs/fennec-rk3288_defconfig | 66 +++++ doc/README.rockchip | 3 +- include/configs/fennec_rk3288.h | 26 ++ 12 files changed, 630 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/rk3288-fennec.dts create mode 100644 arch/arm/dts/rk3288-fennec.dtsi create mode 100644 board/rockchip/fennec_rk3288/Kconfig create mode 100644 board/rockchip/fennec_rk3288/MAINTAINERS create mode 100644 board/rockchip/fennec_rk3288/Makefile create mode 100644 board/rockchip/fennec_rk3288/fennec-rk3288.c create mode 100644 configs/fennec-rk3288_defconfig create mode 100644 include/configs/fennec_rk3288.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index c97e3f6..095a774 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -32,6 +32,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3288-jerry.dtb \ rk3288-rock2-square.dtb \ rk3288-evb.dtb \ + rk3288-fennec.dtb \ rk3036-sdk.dtb \ rk3399-evb.dtb dtb-$(CONFIG_ARCH_MESON) += \ diff --git a/arch/arm/dts/rk3288-fennec.dts b/arch/arm/dts/rk3288-fennec.dts new file mode 100644 index 0000000..36e9f3d --- /dev/null +++ b/arch/arm/dts/rk3288-fennec.dts @@ -0,0 +1,60 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ X11 + */ + +/dts-v1/; +#include "rk3288-fennec.dtsi" + +/ { + model = "Rockchip RK3288 Fennec Board"; + compatible = "rockchip,rk3288-fennec", "rockchip,rk3288"; + + chosen { + stdout-path = &uart2; + }; +}; + +&dmc { + rockchip,num-channels = <2>; + rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d + 0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6 + 0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0 + 0x1 0x2 0x2 0x4 0x0 0x0 0xc0 0x4 + 0x8 0x1f4>; + rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076 + 0x0 0xc3 0x6 0x2>; + /* Add a dummy value to cause of-platdata think this is bytes */ + rockchip,sdram-channel = /bits/ 8 <0x2 0xa 0x3 0x2 0x2 0x0 0xe 0xe 0xff>; + rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 0>; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pwm1 { + status = "okay"; +}; + +&uart2 { + u-boot,dm-pre-reloc; + reg-shift = <2>; +}; + +&sdmmc { + u-boot,dm-pre-reloc; +}; + +&emmc { + u-boot,dm-pre-reloc; +}; + +&gpio3 { + u-boot,dm-pre-reloc; +}; + +&gpio8 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/rk3288-fennec.dtsi b/arch/arm/dts/rk3288-fennec.dtsi new file mode 100644 index 0000000..f61252c --- /dev/null +++ b/arch/arm/dts/rk3288-fennec.dtsi @@ -0,0 +1,421 @@ +/* + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "rk3288.dtsi" + +/ { + memory { + reg = <0x0 0x80000000>; + device_type = "memory"; + }; + + ext_gmac: external-gmac-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + clock-output-names = "ext_gmac"; + }; + + vcc_sys: vsys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; +}; + +&cpu0 { + cpu0-supply = <&vdd_cpu>; +}; + +&emmc { + bus-width = <8>; + cap-mmc-highspeed; + disable-wp; + non-removable; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <200>; + disable-wp; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; + status = "okay"; + vmmc-supply = <&vcc_sd>; + vqmmc-supply = <&vccio_sd>; +}; + +&gmac { + assigned-clocks = <&cru SCLK_MAC>; + assigned-clock-parents = <&ext_gmac>; + clock_in_out = "input"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>; + phy-supply = <&vcc_lan>; + phy-mode = "rgmii"; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 1000000>; + snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>; + tx_delay = <0x30>; + rx_delay = <0x10>; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&hdmi { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + interrupt-parent = <&gpio0>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk808-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int &global_pwroff>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc_io>; + vcc9-supply = <&vcc_io>; + vcc10-supply = <&vcc_io>; + vcc11-supply = <&vcc_io>; + vcc12-supply = <&vcc_io>; + vddio-supply = <&vcc_io>; + + regulators { + vdd_cpu: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-name = "vdd_arm"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-name = "vdd_gpu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_ddr"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_io: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_io"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vccio_pmu: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_33: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcca_33"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_10: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd_10"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc_wl: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_wl"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vdd10_lcd: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd10_lcd"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc_18: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_18"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc18_lcd: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc18_lcd"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_sd: SWITCH_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_sd"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_lan: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_lan"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + }; + }; +}; + +&pinctrl { + pcfg_output_high: pcfg-output-high { + output-high; + }; + + pcfg_output_low: pcfg-output-low { + output-low; + }; + + pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma { + drive-strength = <8>; + }; + + pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma { + bias-pull-up; + drive-strength = <8>; + }; + + gmac { + phy_int: phy-int { + rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + phy_pmeb: phy-pmeb { + rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + phy_rst: phy-rst { + rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; + + pmic { + pmic_int: pmic-int { + rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdmmc { + sdmmc_bus4: sdmmc-bus4 { + rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, + <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, + <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, + <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; + }; + + sdmmc_clk: sdmmc-clk { + rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>; + }; + + sdmmc_cmd: sdmmc-cmd { + rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; + }; + + sdmmc_pwr: sdmmc-pwr { + rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usbphy { + host_drv: host-drv { + rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&uart2 { + status = "okay"; +}; + +&usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&host_drv>; + vbus_drv-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host1 { + status = "okay"; +}; + +&usb_otg { + status = "okay"; +}; + +&usb_hsic { + status = "okay"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; + +&vpu { + status = "okay"; +}; diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c index 1b74173..e0d92a6 100644 --- a/arch/arm/mach-rockchip/rk3288-board-spl.c +++ b/arch/arm/mach-rockchip/rk3288-board-spl.c @@ -116,8 +116,7 @@ static void configure_l2ctlr(void) #ifdef CONFIG_SPL_MMC_SUPPORT static int configure_emmc(struct udevice *pinctrl) { -#if !defined(CONFIG_TARGET_ROCK2) && !defined(CONFIG_TARGET_FIREFLY_RK3288) && \ - !defined(CONFIG_TARGET_EVB_RK3288) +#if defined(CONFIG_TARGET_CHROMEBOOK_JERRY)
struct gpio_desc desc; int ret; diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index 67f29d2..4bfd78b 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -16,6 +16,14 @@ config TARGET_EVB_RK3288 also includes on-board eMMC and 2GB of SDRAM. Expansion connectors provide access to display pins, I2C, SPI, UART and GPIOs.
+config TARGET_FENNEC_RK3288 + bool "Fennec-RK3288" + help + Fennec is a RK3288-based development board with 2 USB ports, + HDMI, micro-SD card, audio, WiFi and Gigabit Ethernet. It also + includes on-board eMMC and 2GB of SDRAM. Expansion connectors + provide access to display pins, I2C, SPI, UART and GPIOs. + config TARGET_CHROMEBOOK_JERRY bool "Google/Rockchip Veyron-Jerry Chromebook" help @@ -55,4 +63,6 @@ source "board/radxa/rock2/Kconfig"
source "board/rockchip/evb_rk3288/Kconfig"
+source "board/rockchip/fennec_rk3288/Kconfig" + endif diff --git a/board/rockchip/fennec_rk3288/Kconfig b/board/rockchip/fennec_rk3288/Kconfig new file mode 100644 index 0000000..1dcfcf0 --- /dev/null +++ b/board/rockchip/fennec_rk3288/Kconfig @@ -0,0 +1,15 @@ +if TARGET_FENNEC_RK3288 + +config SYS_BOARD + default "fennec_rk3288" + +config SYS_VENDOR + default "rockchip" + +config SYS_CONFIG_NAME + default "fennec_rk3288" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + +endif diff --git a/board/rockchip/fennec_rk3288/MAINTAINERS b/board/rockchip/fennec_rk3288/MAINTAINERS new file mode 100644 index 0000000..78a389b --- /dev/null +++ b/board/rockchip/fennec_rk3288/MAINTAINERS @@ -0,0 +1,6 @@ +FENNEC-RK3288 +M: Lin Huang hl@rock-chips.com +S: Maintained +F: board/rockchip/fennec_rk3288 +F: include/configs/fennec_rk3288.h +F: configs/fennec-rk3288_defconfig diff --git a/board/rockchip/fennec_rk3288/Makefile b/board/rockchip/fennec_rk3288/Makefile new file mode 100644 index 0000000..b287db6 --- /dev/null +++ b/board/rockchip/fennec_rk3288/Makefile @@ -0,0 +1,7 @@ +# +# (C) Copyright 2016 Rockchip Electronics Co., Ltd +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += fennec-rk3288.o diff --git a/board/rockchip/fennec_rk3288/fennec-rk3288.c b/board/rockchip/fennec_rk3288/fennec-rk3288.c new file mode 100644 index 0000000..aad74ef --- /dev/null +++ b/board/rockchip/fennec_rk3288/fennec-rk3288.c @@ -0,0 +1,15 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <spl.h> + +void board_boot_order(u32 *spl_boot_list) +{ + /* eMMC prior to sdcard */ + spl_boot_list[0] = BOOT_DEVICE_MMC2; + spl_boot_list[1] = BOOT_DEVICE_MMC1; +} diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig new file mode 100644 index 0000000..bcd6ebf --- /dev/null +++ b/configs/fennec-rk3288_defconfig @@ -0,0 +1,66 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_ROCKCHIP_RK3288=y +CONFIG_TARGET_FENNEC_RK3288=y +CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-fennec" +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_I2C=y +CONFIG_CMD_GPIO=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_SYSRESET=y +CONFIG_DM_MMC=y +CONFIG_ROCKCHIP_DWMMC=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_FULL is not set +CONFIG_SPL_PINCTRL=y +# CONFIG_SPL_PINCTRL_FULL is not set +CONFIG_ROCKCHIP_RK3288_PINCTRL=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK808=y +CONFIG_DM_REGULATOR=y +CONFIG_REGULATOR_RK808=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_PWM=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_BASE=0xff690000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550=y +CONFIG_USE_PRIVATE_LIBGCC=y +CONFIG_USE_TINY_PRINTF=y +CONFIG_CMD_DHRYSTONE=y +CONFIG_ERRNO_STR=y +# CONFIG_SPL_SIMPLE_BUS is not set diff --git a/doc/README.rockchip b/doc/README.rockchip index c218a8b..1e44917 100644 --- a/doc/README.rockchip +++ b/doc/README.rockchip @@ -36,12 +36,13 @@ You will need: Building ========
-At present four RK3288 boards are supported: +At present five RK3288 boards are supported:
- Firefly RK3288 - use firefly-rk3288 configuration - Radxa Rock 2 - use rock2 configuration - Hisense Chromebook - use chromebook_jerry configuration - EVB RK3288 - use evb-rk3288 configuration + - Fennec RK3288 - use fennec-rk3288 configuration
Two RK3036 board are supported:
diff --git a/include/configs/fennec_rk3288.h b/include/configs/fennec_rk3288.h new file mode 100644 index 0000000..342557f --- /dev/null +++ b/include/configs/fennec_rk3288.h @@ -0,0 +1,26 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define ROCKCHIP_DEVICE_SETTINGS +#include <configs/rk3288_common.h> + +#define CONFIG_SPL_MMC_SUPPORT + +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 1 +/* SPL @ 32k for ~36k + * ENV @ 96k + * u-boot @ 128K + */ +#define CONFIG_ENV_OFFSET (96 * 1024) + +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_CONSOLE_SCROLL_LINES 10 + +#endif
On 26 July 2016 at 04:28, Ziyuan Xu jk.kernel@gmail.com wrote:
Fennec is a RK3288-based development board with 2 USB ports, HDMI, micro-SD card, audio and WiFi and Gigabit Ethernet. It also includes on-board 8GB eMMC and 2GB of SDRAM. Expansion connectors provides access to display pins, I2C, SPI, UART and GPIOs.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com
Changes in v2: None
arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3288-fennec.dts | 60 ++++ arch/arm/dts/rk3288-fennec.dtsi | 421 +++++++++++++++++++++++++++ arch/arm/mach-rockchip/rk3288-board-spl.c | 3 +- arch/arm/mach-rockchip/rk3288/Kconfig | 10 + board/rockchip/fennec_rk3288/Kconfig | 15 + board/rockchip/fennec_rk3288/MAINTAINERS | 6 + board/rockchip/fennec_rk3288/Makefile | 7 + board/rockchip/fennec_rk3288/fennec-rk3288.c | 15 + configs/fennec-rk3288_defconfig | 66 +++++ doc/README.rockchip | 3 +- include/configs/fennec_rk3288.h | 26 ++ 12 files changed, 630 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/rk3288-fennec.dts create mode 100644 arch/arm/dts/rk3288-fennec.dtsi create mode 100644 board/rockchip/fennec_rk3288/Kconfig create mode 100644 board/rockchip/fennec_rk3288/MAINTAINERS create mode 100644 board/rockchip/fennec_rk3288/Makefile create mode 100644 board/rockchip/fennec_rk3288/fennec-rk3288.c create mode 100644 configs/fennec-rk3288_defconfig create mode 100644 include/configs/fennec_rk3288.h
Acked-by: Simon Glass sjg@chromium.org
On 27 July 2016 at 21:11, Simon Glass sjg@chromium.org wrote:
On 26 July 2016 at 04:28, Ziyuan Xu jk.kernel@gmail.com wrote:
Fennec is a RK3288-based development board with 2 USB ports, HDMI, micro-SD card, audio and WiFi and Gigabit Ethernet. It also includes on-board 8GB eMMC and 2GB of SDRAM. Expansion connectors provides access to display pins, I2C, SPI, UART and GPIOs.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com
Changes in v2: None
arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3288-fennec.dts | 60 ++++ arch/arm/dts/rk3288-fennec.dtsi | 421 +++++++++++++++++++++++++++ arch/arm/mach-rockchip/rk3288-board-spl.c | 3 +- arch/arm/mach-rockchip/rk3288/Kconfig | 10 + board/rockchip/fennec_rk3288/Kconfig | 15 + board/rockchip/fennec_rk3288/MAINTAINERS | 6 + board/rockchip/fennec_rk3288/Makefile | 7 + board/rockchip/fennec_rk3288/fennec-rk3288.c | 15 + configs/fennec-rk3288_defconfig | 66 +++++ doc/README.rockchip | 3 +- include/configs/fennec_rk3288.h | 26 ++ 12 files changed, 630 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/rk3288-fennec.dts create mode 100644 arch/arm/dts/rk3288-fennec.dtsi create mode 100644 board/rockchip/fennec_rk3288/Kconfig create mode 100644 board/rockchip/fennec_rk3288/MAINTAINERS create mode 100644 board/rockchip/fennec_rk3288/Makefile create mode 100644 board/rockchip/fennec_rk3288/fennec-rk3288.c create mode 100644 configs/fennec-rk3288_defconfig create mode 100644 include/configs/fennec_rk3288.h
Acked-by: Simon Glass sjg@chromium.org
Applied to u-boot-rockchip, thanks!
PopMetal is a rockchip rk3288 based board made by ChipSpark, which has many interface such as HDMI, VGA, USB, micro-SD card, WiFi, Audio and Gigabit Ethernet.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com ---
Changes in v2: None
arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3288-popmetal.dts | 61 +++ arch/arm/dts/rk3288-popmetal.dtsi | 520 ++++++++++++++++++++++ arch/arm/mach-rockchip/rk3288/Kconfig | 11 + board/chipspark/popmetal_rk3288/Kconfig | 15 + board/chipspark/popmetal_rk3288/MAINTAINERS | 6 + board/chipspark/popmetal_rk3288/Makefile | 7 + board/chipspark/popmetal_rk3288/popmetal-rk3288.c | 15 + configs/popmetal-rk3288_defconfig | 65 +++ doc/README.rockchip | 3 +- include/configs/popmetal_rk3288.h | 26 ++ 11 files changed, 729 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/rk3288-popmetal.dts create mode 100644 arch/arm/dts/rk3288-popmetal.dtsi create mode 100644 board/chipspark/popmetal_rk3288/Kconfig create mode 100644 board/chipspark/popmetal_rk3288/MAINTAINERS create mode 100644 board/chipspark/popmetal_rk3288/Makefile create mode 100644 board/chipspark/popmetal_rk3288/popmetal-rk3288.c create mode 100644 configs/popmetal-rk3288_defconfig create mode 100644 include/configs/popmetal_rk3288.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 095a774..dffbd9c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -33,6 +33,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3288-rock2-square.dtb \ rk3288-evb.dtb \ rk3288-fennec.dtb \ + rk3288-popmetal.dtb \ rk3036-sdk.dtb \ rk3399-evb.dtb dtb-$(CONFIG_ARCH_MESON) += \ diff --git a/arch/arm/dts/rk3288-popmetal.dts b/arch/arm/dts/rk3288-popmetal.dts new file mode 100644 index 0000000..3f61a61 --- /dev/null +++ b/arch/arm/dts/rk3288-popmetal.dts @@ -0,0 +1,61 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ X11 + */ + +/dts-v1/; +#include "rk3288-popmetal.dtsi" + +/ { + model = "PopMetal-RK3288"; + compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288"; + + chosen { + stdout-path = &uart2; + }; +}; + +&dmc { + rockchip,num-channels = <2>; + rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa + 0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7 + 0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0 + 0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0 + 0x5 0x0>; + rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200 + 0xa60 0x40 0x10 0x0>; + /* Add a dummy value to cause of-platdata think this is bytes */ + rockchip,sdram-channel = /bits/ 8 <0x1 0xa 0x3 0x2 0x1 0x0 0xf 0xf 0xff>; + rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>; +}; + + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pwm1 { + status = "okay"; +}; + +&uart2 { + u-boot,dm-pre-reloc; + reg-shift = <2>; +}; + +&sdmmc { + u-boot,dm-pre-reloc; +}; + +&emmc { + u-boot,dm-pre-reloc; +}; + +&gpio3 { + u-boot,dm-pre-reloc; +}; + +&gpio8 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/rk3288-popmetal.dtsi b/arch/arm/dts/rk3288-popmetal.dtsi new file mode 100644 index 0000000..f3bd468 --- /dev/null +++ b/arch/arm/dts/rk3288-popmetal.dtsi @@ -0,0 +1,520 @@ +/* + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "rk3288.dtsi" + +/ { + memory{ + device_type = "memory"; + reg = <0 0x80000000>; + }; + + ext_gmac: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "ext_gmac"; + #clock-cells = <0>; + }; + + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + + pinctrl-names = "default"; + pinctrl-0 = <&pwrbtn>; + + power { + gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; + label = "GPIO Key Power"; + linux,input-type = <1>; + wakeup-source; + debounce-interval = <100>; + }; + }; + + io_domains: io-domains { + compatible = "rockchip,rk3288-io-voltage-domain"; + rockchip,grf = <&grf>; + + audio-supply = <&vcca_33>; + bb-supply = <&vcc_io>; + dvp-supply = <&vcc18_dvp>; + flash0-supply = <&vcc_flash>; + flash1-supply = <&vcc_lan>; + gpio30-supply = <&vcc_io>; + gpio1830-supply = <&vcc_io>; + lcdc-supply = <&vcc_io>; + sdcard-supply = <&vccio_sd>; + wifi-supply = <&vccio_wl>; + }; + + ir: ir-receiver { + compatible = "gpio-ir-receiver"; + gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&ir_int>; + }; + + vcc_flash: flash-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_flash"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_io>; + }; + + vcc_sd: sdmmc-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio7 11 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_pwr>; + regulator-name = "vcc_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100000>; + vin-supply = <&vcc_io>; + }; + + vcc_sys: vsys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + /* + * A PT5128 creates both dovdd_1v8 and vcc28_dvp, controlled + * by the dvp_pwr pin. + */ + vcc18_dvp: vcc18-dvp-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc18-dvp"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc28_dvp>; + }; + + vcc28_dvp: vcc28-dvp-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dvp_pwr>; + regulator-name = "vcc28_dvp"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + vin-supply = <&vcc_io>; + }; +}; + +&cpu0 { + cpu0-supply = <&vdd_cpu>; +}; + +&emmc { + bus-width = <8>; + cap-mmc-highspeed; + disable-wp; + non-removable; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>; + vmmc-supply = <&vcc_io>; + vqmmc-supply = <&vcc_flash>; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <200>; + disable-wp; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; + vmmc-supply = <&vcc_sd>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&gmac { + phy-supply = <&vcc_lan>; + phy-mode = "rgmii"; + clock_in_out = "input"; + snps,reset-gpio = <&gpio4 7 0>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 1000000>; + assigned-clocks = <&cru SCLK_MAC>; + assigned-clock-parents = <&ext_gmac>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + tx_delay = <0x30>; + rx_delay = <0x10>; + status = "ok"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c5>; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + interrupt-parent = <&gpio0>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int &global_pwroff>; + rockchip,system-power-controller; + wakeup-source; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk808-clkout2"; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc_18>; + vcc9-supply = <&vcc_io>; + vcc10-supply = <&vcc_io>; + vcc11-supply = <&vcc_sys>; + vcc12-supply = <&vcc_io>; + vddio-supply = <&vcc_io>; + + regulators { + vdd_cpu: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-name = "vdd_arm"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-name = "vdd_gpu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_ddr"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_io: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_io"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_lan: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_lan"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vccio_sd: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_10: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd_10"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc18_lcd: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc18_lcd"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + ldo5: LDO_REG5 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "ldo5"; + }; + + vdd10_lcd: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd10_lcd"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc_18: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_18"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca_33: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcca_33"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vccio_wl: SWITCH_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vccio_wl"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_lcd: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_lcd"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + }; + }; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + + ak8963: ak8963@0d { + compatible = "asahi-kasei,ak8975"; + reg = <0x0d>; + interrupt-parent = <&gpio8>; + interrupts = <1 IRQ_TYPE_EDGE_RISING>; + pinctrl-names = "default"; + pinctrl-0 = <&comp_int>; + }; + + l3g4200d: l3g4200d@68 { + compatible = "st,l3g4200d-gyro"; + st,drdy-int-pin = <2>; + reg = <0x6b>; + }; + + mma8452: mma8452@1d { + compatible = "fsl,mma8452"; + reg = <0x1d>; + interrupt-parent = <&gpio8>; + interrupts = <0 IRQ_TYPE_EDGE_RISING>; + pinctrl-names = "default"; + pinctrl-0 = <&gsensor_int>; + }; +}; + +&i2c2 { + status = "okay"; +}; + +&i2c3 { + status = "okay"; +}; + +&i2c4 { + status = "okay"; +}; + +&i2c5 { + status = "okay"; +}; + +&pinctrl { + ak8963 { + comp_int: comp-int { + rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + buttons { + pwrbtn: pwrbtn { + rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + dvp { + dvp_pwr: dvp-pwr { + rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + ir { + ir_int: ir-int { + rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + mma8452 { + gsensor_int: gsensor-int { + rockchip,pins = <8 0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + pmic { + pmic_int: pmic-int { + rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdmmc { + sdmmc_pwr: sdmmc-pwr { + rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&tsadc { + rockchip,hw-tshut-mode = <0>; + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&uart4 { + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index 4bfd78b..8ec1920 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -24,6 +24,15 @@ config TARGET_FENNEC_RK3288 includes on-board eMMC and 2GB of SDRAM. Expansion connectors provide access to display pins, I2C, SPI, UART and GPIOs.
+config TARGET_POPMETAL_RK3288 + bool "PopMetal-RK3288" + help + PopMetal is a RK3288-based development board with 3 USB host ports, + 1 micro USB OTG port, HDMI, VGA, micro-SD card, audio, WiFi, Gigabit + Ethernet and lots of sensors. It also includes on-board 8 GeMMC and + 2GB DDR3. Expansion connectors provide access to I2C, SPI, UART, + GPIOs and display interface. + config TARGET_CHROMEBOOK_JERRY bool "Google/Rockchip Veyron-Jerry Chromebook" help @@ -65,4 +74,6 @@ source "board/rockchip/evb_rk3288/Kconfig"
source "board/rockchip/fennec_rk3288/Kconfig"
+source "board/chipspark/popmetal_rk3288/Kconfig" + endif diff --git a/board/chipspark/popmetal_rk3288/Kconfig b/board/chipspark/popmetal_rk3288/Kconfig new file mode 100644 index 0000000..a5f4043 --- /dev/null +++ b/board/chipspark/popmetal_rk3288/Kconfig @@ -0,0 +1,15 @@ +if TARGET_POPMETAL_RK3288 + +config SYS_BOARD + default "popmetal_rk3288" + +config SYS_VENDOR + default "chipspark" + +config SYS_CONFIG_NAME + default "popmetal_rk3288" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + +endif diff --git a/board/chipspark/popmetal_rk3288/MAINTAINERS b/board/chipspark/popmetal_rk3288/MAINTAINERS new file mode 100644 index 0000000..1a6a1bb --- /dev/null +++ b/board/chipspark/popmetal_rk3288/MAINTAINERS @@ -0,0 +1,6 @@ +POPMETAL-RK3288 +M: Lin Huang hl@rock-chips.com +S: Maintained +F: board/chipspark/popmetal_rk3288 +F: include/configs/popmetal_rk3288.h +F: configs/popmetal-rk3288_defconfig diff --git a/board/chipspark/popmetal_rk3288/Makefile b/board/chipspark/popmetal_rk3288/Makefile new file mode 100644 index 0000000..86d66b0 --- /dev/null +++ b/board/chipspark/popmetal_rk3288/Makefile @@ -0,0 +1,7 @@ +# +# (C) Copyright 2016 Rockchip Electronics Co., Ltd +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += popmetal-rk3288.o diff --git a/board/chipspark/popmetal_rk3288/popmetal-rk3288.c b/board/chipspark/popmetal_rk3288/popmetal-rk3288.c new file mode 100644 index 0000000..aad74ef --- /dev/null +++ b/board/chipspark/popmetal_rk3288/popmetal-rk3288.c @@ -0,0 +1,15 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <spl.h> + +void board_boot_order(u32 *spl_boot_list) +{ + /* eMMC prior to sdcard */ + spl_boot_list[0] = BOOT_DEVICE_MMC2; + spl_boot_list[1] = BOOT_DEVICE_MMC1; +} diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig new file mode 100644 index 0000000..653bfed --- /dev/null +++ b/configs/popmetal-rk3288_defconfig @@ -0,0 +1,65 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_ROCKCHIP_RK3288=y +CONFIG_TARGET_POPMETAL_RK3288=y +CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal" +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_I2C=y +CONFIG_CMD_GPIO=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +# CONFIG_SPL_SIMPLE_BUS is not set +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_SYSRESET=y +CONFIG_DM_MMC=y +CONFIG_ROCKCHIP_DWMMC=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +# CONFIG_SPL_PINCTRL_FULL is not set +CONFIG_ROCKCHIP_RK3288_PINCTRL=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK808=y +CONFIG_DM_REGULATOR=y +CONFIG_REGULATOR_RK808=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_PWM=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_BASE=0xff690000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550=y +CONFIG_USE_PRIVATE_LIBGCC=y +CONFIG_USE_TINY_PRINTF=y +CONFIG_CMD_DHRYSTONE=y +CONFIG_ERRNO_STR=y diff --git a/doc/README.rockchip b/doc/README.rockchip index 1e44917..1b3a602 100644 --- a/doc/README.rockchip +++ b/doc/README.rockchip @@ -36,13 +36,14 @@ You will need: Building ========
-At present five RK3288 boards are supported: +At present six RK3288 boards are supported:
- Firefly RK3288 - use firefly-rk3288 configuration - Radxa Rock 2 - use rock2 configuration - Hisense Chromebook - use chromebook_jerry configuration - EVB RK3288 - use evb-rk3288 configuration - Fennec RK3288 - use fennec-rk3288 configuration + - PopMetal RK3288 - use popmetal-rk3288 configuration
Two RK3036 board are supported:
diff --git a/include/configs/popmetal_rk3288.h b/include/configs/popmetal_rk3288.h new file mode 100644 index 0000000..342557f --- /dev/null +++ b/include/configs/popmetal_rk3288.h @@ -0,0 +1,26 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define ROCKCHIP_DEVICE_SETTINGS +#include <configs/rk3288_common.h> + +#define CONFIG_SPL_MMC_SUPPORT + +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 1 +/* SPL @ 32k for ~36k + * ENV @ 96k + * u-boot @ 128K + */ +#define CONFIG_ENV_OFFSET (96 * 1024) + +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_CONSOLE_SCROLL_LINES 10 + +#endif
On 26 July 2016 at 04:28, Ziyuan Xu jk.kernel@gmail.com wrote:
PopMetal is a rockchip rk3288 based board made by ChipSpark, which has many interface such as HDMI, VGA, USB, micro-SD card, WiFi, Audio and Gigabit Ethernet.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com
Changes in v2: None
arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3288-popmetal.dts | 61 +++ arch/arm/dts/rk3288-popmetal.dtsi | 520 ++++++++++++++++++++++ arch/arm/mach-rockchip/rk3288/Kconfig | 11 + board/chipspark/popmetal_rk3288/Kconfig | 15 + board/chipspark/popmetal_rk3288/MAINTAINERS | 6 + board/chipspark/popmetal_rk3288/Makefile | 7 + board/chipspark/popmetal_rk3288/popmetal-rk3288.c | 15 + configs/popmetal-rk3288_defconfig | 65 +++ doc/README.rockchip | 3 +- include/configs/popmetal_rk3288.h | 26 ++ 11 files changed, 729 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/rk3288-popmetal.dts create mode 100644 arch/arm/dts/rk3288-popmetal.dtsi create mode 100644 board/chipspark/popmetal_rk3288/Kconfig create mode 100644 board/chipspark/popmetal_rk3288/MAINTAINERS create mode 100644 board/chipspark/popmetal_rk3288/Makefile create mode 100644 board/chipspark/popmetal_rk3288/popmetal-rk3288.c create mode 100644 configs/popmetal-rk3288_defconfig create mode 100644 include/configs/popmetal_rk3288.h
Acked-by: Simon Glass sjg@chromium.org
On 27 July 2016 at 21:11, Simon Glass sjg@chromium.org wrote:
On 26 July 2016 at 04:28, Ziyuan Xu jk.kernel@gmail.com wrote:
PopMetal is a rockchip rk3288 based board made by ChipSpark, which has many interface such as HDMI, VGA, USB, micro-SD card, WiFi, Audio and Gigabit Ethernet.
Signed-off-by: Ziyuan Xu xzy.xu@rock-chips.com
Changes in v2: None
arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3288-popmetal.dts | 61 +++ arch/arm/dts/rk3288-popmetal.dtsi | 520 ++++++++++++++++++++++ arch/arm/mach-rockchip/rk3288/Kconfig | 11 + board/chipspark/popmetal_rk3288/Kconfig | 15 + board/chipspark/popmetal_rk3288/MAINTAINERS | 6 + board/chipspark/popmetal_rk3288/Makefile | 7 + board/chipspark/popmetal_rk3288/popmetal-rk3288.c | 15 + configs/popmetal-rk3288_defconfig | 65 +++ doc/README.rockchip | 3 +- include/configs/popmetal_rk3288.h | 26 ++ 11 files changed, 729 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/rk3288-popmetal.dts create mode 100644 arch/arm/dts/rk3288-popmetal.dtsi create mode 100644 board/chipspark/popmetal_rk3288/Kconfig create mode 100644 board/chipspark/popmetal_rk3288/MAINTAINERS create mode 100644 board/chipspark/popmetal_rk3288/Makefile create mode 100644 board/chipspark/popmetal_rk3288/popmetal-rk3288.c create mode 100644 configs/popmetal-rk3288_defconfig create mode 100644 include/configs/popmetal_rk3288.h
Acked-by: Simon Glass sjg@chromium.org
Applied to u-boot-rockchip, thanks!
participants (2)
-
Simon Glass -
Ziyuan Xu