[U-Boot] [PATCH v2 0/3] arm: lpc32xx: use driver model serial console drivers
The changeset switches 14-clock UART driver to DM and enables DM versions of NXP LPC32xx standard (NS16550) and 14-clock UART drivers for both ordinary and SPL U-boot images.
The change increases sizes of SPL images from about 10KB to 15KB.
Changes from v1 to v2: * included 14-clock UART driver change to DM to the series (v1 1/3), * moved dm/platform_data/lpc32xx_hsuart.h include down in v2 2/3 change * removed ambiguity from a commit message in v2 3/3 change * added CONFIG_SPL_SYS_MALLOC_SIMPLE to defconfigs
Vladimir Zapolskiy (3): serial: lpc32xx hsuart: port driver to driver model arm: lpc32xx: switch serial console to driver model arm: lpc32xx: switch SPL builds to driver model
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 37 ++++++++++- arch/arm/include/asm/arch-lpc32xx/config.h | 32 +++------ configs/devkit3250_defconfig | 3 + configs/work_92105_defconfig | 3 + drivers/serial/lpc32xx_hsuart.c | 103 ++++++++++++++++++----------- include/dm/platform_data/lpc32xx_hsuart.h | 18 +++++ 6 files changed, 132 insertions(+), 64 deletions(-) create mode 100644 include/dm/platform_data/lpc32xx_hsuart.h
The change ports NXP LPC32xx 14-clock UART device driver to driver model.
Signed-off-by: Vladimir Zapolskiy vz@mleia.com Reviewed-by: Simon Glass sjg@chromium.org --- Changes from v1 to v2: * moved dm/platform_data/lpc32xx_hsuart.h include down
drivers/serial/lpc32xx_hsuart.c | 103 +++++++++++++++++++----------- include/dm/platform_data/lpc32xx_hsuart.h | 18 ++++++ 2 files changed, 82 insertions(+), 39 deletions(-) create mode 100644 include/dm/platform_data/lpc32xx_hsuart.h
diff --git a/drivers/serial/lpc32xx_hsuart.c b/drivers/serial/lpc32xx_hsuart.c index c8926a8..b425375 100644 --- a/drivers/serial/lpc32xx_hsuart.c +++ b/drivers/serial/lpc32xx_hsuart.c @@ -1,89 +1,114 @@ /* - * Copyright (C) 2011 Vladimir Zapolskiy vz@mleia.com + * Copyright (C) 2011-2015 Vladimir Zapolskiy vz@mleia.com * * SPDX-License-Identifier: GPL-2.0+ */
#include <common.h> -#include <asm/arch/cpu.h> -#include <asm/arch/clk.h> -#include <asm/arch/uart.h> -#include <asm/io.h> +#include <dm.h> #include <serial.h> +#include <dm/platform_data/lpc32xx_hsuart.h> + +#include <asm/arch/uart.h> #include <linux/compiler.h>
DECLARE_GLOBAL_DATA_PTR;
-static struct hsuart_regs *hsuart = (struct hsuart_regs *)HS_UART_BASE; +struct lpc32xx_hsuart_priv { + struct hsuart_regs *hsuart; +};
-static void lpc32xx_serial_setbrg(void) +static int lpc32xx_serial_setbrg(struct udevice *dev, int baudrate) { + struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev); + struct hsuart_regs *hsuart = priv->hsuart; u32 div;
/* UART rate = PERIPH_CLK / ((HSU_RATE + 1) x 14) */ - div = (get_serial_clock() / 14 + gd->baudrate / 2) / gd->baudrate - 1; + div = (get_serial_clock() / 14 + baudrate / 2) / baudrate - 1; if (div > 255) div = 255;
writel(div, &hsuart->rate); + + return 0; }
-static int lpc32xx_serial_getc(void) +static int lpc32xx_serial_getc(struct udevice *dev) { - while (!(readl(&hsuart->level) & HSUART_LEVEL_RX)) - /* NOP */; + struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev); + struct hsuart_regs *hsuart = priv->hsuart; + + if (!(readl(&hsuart->level) & HSUART_LEVEL_RX)) + return -EAGAIN;
return readl(&hsuart->rx) & HSUART_RX_DATA; }
-static void lpc32xx_serial_putc(const char c) +static int lpc32xx_serial_putc(struct udevice *dev, const char c) { - if (c == '\n') - serial_putc('\r'); + struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev); + struct hsuart_regs *hsuart = priv->hsuart; + + /* Wait for empty FIFO */ + if (readl(&hsuart->level) & HSUART_LEVEL_TX) + return -EAGAIN;
writel(c, &hsuart->tx);
- /* Wait for character to be sent */ - while (readl(&hsuart->level) & HSUART_LEVEL_TX) - /* NOP */; + return 0; }
-static int lpc32xx_serial_tstc(void) +static int lpc32xx_serial_pending(struct udevice *dev, bool input) { - if (readl(&hsuart->level) & HSUART_LEVEL_RX) - return 1; + struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev); + struct hsuart_regs *hsuart = priv->hsuart; + + if (input) { + if (readl(&hsuart->level) & HSUART_LEVEL_RX) + return 1; + } else { + if (readl(&hsuart->level) & HSUART_LEVEL_TX) + return 1; + }
return 0; }
-static int lpc32xx_serial_init(void) +static int lpc32xx_serial_init(struct hsuart_regs *hsuart) { - lpc32xx_serial_setbrg(); - /* Disable hardware RTS and CTS flow control, set up RX and TX FIFO */ writel(HSUART_CTRL_TMO_16 | HSUART_CTRL_HSU_OFFSET(20) | HSUART_CTRL_HSU_RX_TRIG_32 | HSUART_CTRL_HSU_TX_TRIG_0, &hsuart->ctrl); + return 0; }
-static struct serial_device lpc32xx_serial_drv = { - .name = "lpc32xx_serial", - .start = lpc32xx_serial_init, - .stop = NULL, +static int lpc32xx_hsuart_probe(struct udevice *dev) +{ + struct lpc32xx_hsuart_platdata *platdata = dev_get_platdata(dev); + struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev); + + priv->hsuart = (struct hsuart_regs *)platdata->base; + + lpc32xx_serial_init(priv->hsuart); + + return 0; +} + +static const struct dm_serial_ops lpc32xx_hsuart_ops = { .setbrg = lpc32xx_serial_setbrg, - .putc = lpc32xx_serial_putc, - .puts = default_serial_puts, .getc = lpc32xx_serial_getc, - .tstc = lpc32xx_serial_tstc, + .putc = lpc32xx_serial_putc, + .pending = lpc32xx_serial_pending, };
-void lpc32xx_serial_initialize(void) -{ - serial_register(&lpc32xx_serial_drv); -} - -__weak struct serial_device *default_serial_console(void) -{ - return &lpc32xx_serial_drv; -} +U_BOOT_DRIVER(lpc32xx_hsuart) = { + .name = "lpc32xx_hsuart", + .id = UCLASS_SERIAL, + .probe = lpc32xx_hsuart_probe, + .ops = &lpc32xx_hsuart_ops, + .priv_auto_alloc_size = sizeof(struct lpc32xx_hsuart_priv), + .flags = DM_FLAG_PRE_RELOC, +}; diff --git a/include/dm/platform_data/lpc32xx_hsuart.h b/include/dm/platform_data/lpc32xx_hsuart.h new file mode 100644 index 0000000..fd191b5 --- /dev/null +++ b/include/dm/platform_data/lpc32xx_hsuart.h @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2015 Vladimir Zapolskiy vz@mleia.com + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _LPC32XX_HSUART_PLAT_H +#define _LPC32XX_HSUART_PLAT_H + +/** + * struct lpc32xx_hsuart_platdata - NXP LPC32xx HSUART platform data + * + * @base: Base register address + */ +struct lpc32xx_hsuart_platdata { + unsigned long base; +}; + +#endif
On Sat, Dec 19, 2015 at 11:29:24PM +0200, Vladimir Zapolskiy wrote:
The change ports NXP LPC32xx 14-clock UART device driver to driver model.
Signed-off-by: Vladimir Zapolskiy vz@mleia.com Reviewed-by: Simon Glass sjg@chromium.org
Applied to u-boot/master, thanks!
On NXP LPC32xx platform for non-SPL builds the change adds standard (NS16550) and high-speed UARTs to driver model. Due to specific of DM NS16550 device description UART clock can not be got in runtime and by default it is set to 13MHz, if board PERIPH_CLK is different, this should be specified in board configuration file.
For SPL builds HSUARTs are disabled and non-DM NS16550 driver is compiled, if needed.
The change also updates default configs of devkit3250 and work_92105 boards to reflect updates in platform files.
Signed-off-by: Vladimir Zapolskiy vz@mleia.com Reviewed-by: Simon Glass sjg@chromium.org --- Changes from v1 to v2: * rebased the change * moved included dm/platform_data/lpc32xx_hsuart.h down
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 37 ++++++++++++++++++++++++++++-- arch/arm/include/asm/arch-lpc32xx/config.h | 33 ++++++++++++++------------ configs/devkit3250_defconfig | 1 + configs/work_92105_defconfig | 1 + 4 files changed, 55 insertions(+), 17 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c index b1c3f8f..6f10186 100644 --- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c +++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c @@ -5,12 +5,14 @@ */
#include <common.h> -#include <asm/arch/cpu.h> +#include <dm.h> +#include <ns16550.h> +#include <dm/platform_data/lpc32xx_hsuart.h> + #include <asm/arch/clk.h> #include <asm/arch/uart.h> #include <asm/arch/mux.h> #include <asm/io.h> -#include <dm.h>
static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE; static struct uart_ctrl_regs *ctrl = (struct uart_ctrl_regs *)UART_CTRL_BASE; @@ -41,6 +43,37 @@ void lpc32xx_uart_init(unsigned int uart_id) &clk->u3clk + (uart_id - 3)); }
+#if !CONFIG_IS_ENABLED(OF_CONTROL) && !defined(CONFIG_SPL_BUILD) +static const struct ns16550_platdata lpc32xx_uart[] = { + { UART3_BASE, 2, CONFIG_SYS_NS16550_CLK }, + { UART4_BASE, 2, CONFIG_SYS_NS16550_CLK }, + { UART5_BASE, 2, CONFIG_SYS_NS16550_CLK }, + { UART6_BASE, 2, CONFIG_SYS_NS16550_CLK }, +}; + +#if defined(CONFIG_LPC32XX_HSUART) +static const struct lpc32xx_hsuart_platdata lpc32xx_hsuart[] = { + { HS_UART1_BASE, }, + { HS_UART2_BASE, }, + { HS_UART7_BASE, }, +}; +#endif + +U_BOOT_DEVICES(lpc32xx_uarts) = { +#if defined(CONFIG_LPC32XX_HSUART) + { "lpc32xx_hsuart", &lpc32xx_hsuart[0], }, + { "lpc32xx_hsuart", &lpc32xx_hsuart[1], }, +#endif + { "ns16550_serial", &lpc32xx_uart[0], }, + { "ns16550_serial", &lpc32xx_uart[1], }, + { "ns16550_serial", &lpc32xx_uart[2], }, + { "ns16550_serial", &lpc32xx_uart[3], }, +#if defined(CONFIG_LPC32XX_HSUART) + { "lpc32xx_hsuart", &lpc32xx_hsuart[2], }, +#endif +}; +#endif + void lpc32xx_dma_init(void) { /* Enable DMA interface */ diff --git a/arch/arm/include/asm/arch-lpc32xx/config.h b/arch/arm/include/asm/arch-lpc32xx/config.h index d76514e..27e60e1 100644 --- a/arch/arm/include/asm/arch-lpc32xx/config.h +++ b/arch/arm/include/asm/arch-lpc32xx/config.h @@ -16,18 +16,21 @@ #define CONFIG_NR_DRAM_BANKS_MAX 2
/* UART configuration */ -#if (CONFIG_SYS_LPC32XX_UART >= 3) && (CONFIG_SYS_LPC32XX_UART <= 6) -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_CONS_INDEX (CONFIG_SYS_LPC32XX_UART - 2) -#elif (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \ +#if (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \ (CONFIG_SYS_LPC32XX_UART == 7) -#define CONFIG_LPC32XX_HSUART -#else -#error "define CONFIG_SYS_LPC32XX_UART in the range from 1 to 7" +#if defined(CONFIG_SPL_BUILD) +/* SPL images do not support LPC32xx HSUART, UART5 is selected for SPL */ +#undef CONFIG_SYS_LPC32XX_UART +#define CONFIG_SYS_LPC32XX_UART 5 #endif
-#if defined(CONFIG_SYS_NS16550_SERIAL) +#if !defined(CONFIG_LPC32XX_HSUART) +#define CONFIG_LPC32XX_HSUART +#endif +#endif
+#if defined(CONFIG_SPL_BUILD) +#define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE -4 #define CONFIG_SYS_NS16550_CLK get_serial_clock()
@@ -37,14 +40,14 @@ #define CONFIG_SYS_NS16550_COM4 UART6_BASE #endif
-#if defined(CONFIG_LPC32XX_HSUART) -#if CONFIG_SYS_LPC32XX_UART == 1 -#define HS_UART_BASE HS_UART1_BASE -#elif CONFIG_SYS_LPC32XX_UART == 2 -#define HS_UART_BASE HS_UART2_BASE -#else /* CONFIG_SYS_LPC32XX_UART == 7 */ -#define HS_UART_BASE HS_UART7_BASE +#if !defined(CONFIG_SYS_NS16550_CLK) +#define CONFIG_SYS_NS16550_CLK 13000000 #endif + +#if !defined(CONFIG_LPC32XX_HSUART) || defined(CONFIG_SPL_BUILD) +#define CONFIG_CONS_INDEX (CONFIG_SYS_LPC32XX_UART - 2) +#else +#define CONFIG_CONS_INDEX CONFIG_SYS_LPC32XX_UART #endif
#define CONFIG_SYS_BAUDRATE_TABLE \ diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index 64a0fb0..0abb8e0 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_DEVKIT3250=y +CONFIG_DM_SERIAL=y CONFIG_DM_GPIO=y CONFIG_SPL=y # CONFIG_CMD_FPGA is not set diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index 1cad3a2..a5a108e 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_WORK_92105=y +CONFIG_DM_SERIAL=y CONFIG_DM_GPIO=y CONFIG_SPL=y # CONFIG_CMD_IMLS is not set
On Sat, Dec 19, 2015 at 11:29:25PM +0200, Vladimir Zapolskiy wrote:
On NXP LPC32xx platform for non-SPL builds the change adds standard (NS16550) and high-speed UARTs to driver model. Due to specific of DM NS16550 device description UART clock can not be got in runtime and by default it is set to 13MHz, if board PERIPH_CLK is different, this should be specified in board configuration file.
For SPL builds HSUARTs are disabled and non-DM NS16550 driver is compiled, if needed.
The change also updates default configs of devkit3250 and work_92105 boards to reflect updates in platform files.
Signed-off-by: Vladimir Zapolskiy vz@mleia.com Reviewed-by: Simon Glass sjg@chromium.org
Applied to u-boot/master, thanks!
For NXP LPC32xx boards the change enables SPL_DM option, this allows to use any driver model UART driver in SPL images, hence a restriction on HSUART in SPL image is removed and well as definitions for non-DM NS16550 driver, its DM version is used instead.
Because SPL_DM requires malloc(), enable CONFIG_SPL_SYS_MALLOC_SIMPLE for LPC32xx boards.
The change adds about 5KB to the resulting SPL image (for devkit3250 board SPL image is increased from 10672 to 15608 bytes).
Signed-off-by: Vladimir Zapolskiy vz@mleia.com --- Changes from v1 to v2: * added CONFIG_SPL_SYS_MALLOC_SIMPLE to defconfigs * removed ambiguity from a commit message
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 2 +- arch/arm/include/asm/arch-lpc32xx/config.h | 19 +------------------ configs/devkit3250_defconfig | 2 ++ configs/work_92105_defconfig | 2 ++ 4 files changed, 6 insertions(+), 19 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c index 6f10186..b6db23e 100644 --- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c +++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c @@ -43,7 +43,7 @@ void lpc32xx_uart_init(unsigned int uart_id) &clk->u3clk + (uart_id - 3)); }
-#if !CONFIG_IS_ENABLED(OF_CONTROL) && !defined(CONFIG_SPL_BUILD) +#if !CONFIG_IS_ENABLED(OF_CONTROL) static const struct ns16550_platdata lpc32xx_uart[] = { { UART3_BASE, 2, CONFIG_SYS_NS16550_CLK }, { UART4_BASE, 2, CONFIG_SYS_NS16550_CLK }, diff --git a/arch/arm/include/asm/arch-lpc32xx/config.h b/arch/arm/include/asm/arch-lpc32xx/config.h index 27e60e1..3b7f6bd 100644 --- a/arch/arm/include/asm/arch-lpc32xx/config.h +++ b/arch/arm/include/asm/arch-lpc32xx/config.h @@ -18,33 +18,16 @@ /* UART configuration */ #if (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \ (CONFIG_SYS_LPC32XX_UART == 7) -#if defined(CONFIG_SPL_BUILD) -/* SPL images do not support LPC32xx HSUART, UART5 is selected for SPL */ -#undef CONFIG_SYS_LPC32XX_UART -#define CONFIG_SYS_LPC32XX_UART 5 -#endif - #if !defined(CONFIG_LPC32XX_HSUART) #define CONFIG_LPC32XX_HSUART #endif #endif
-#if defined(CONFIG_SPL_BUILD) -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE -4 -#define CONFIG_SYS_NS16550_CLK get_serial_clock() - -#define CONFIG_SYS_NS16550_COM1 UART3_BASE -#define CONFIG_SYS_NS16550_COM2 UART4_BASE -#define CONFIG_SYS_NS16550_COM3 UART5_BASE -#define CONFIG_SYS_NS16550_COM4 UART6_BASE -#endif - #if !defined(CONFIG_SYS_NS16550_CLK) #define CONFIG_SYS_NS16550_CLK 13000000 #endif
-#if !defined(CONFIG_LPC32XX_HSUART) || defined(CONFIG_SPL_BUILD) +#if !defined(CONFIG_LPC32XX_HSUART) #define CONFIG_CONS_INDEX (CONFIG_SYS_LPC32XX_UART - 2) #else #define CONFIG_CONS_INDEX CONFIG_SYS_LPC32XX_UART diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index 0abb8e0..ddf09fe 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -1,5 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_DEVKIT3250=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_DM=y CONFIG_DM_SERIAL=y CONFIG_DM_GPIO=y CONFIG_SPL=y diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index a5a108e..1a9097a 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -1,5 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_WORK_92105=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_DM=y CONFIG_DM_SERIAL=y CONFIG_DM_GPIO=y CONFIG_SPL=y
On 19 December 2015 at 14:29, Vladimir Zapolskiy vz@mleia.com wrote:
For NXP LPC32xx boards the change enables SPL_DM option, this allows to use any driver model UART driver in SPL images, hence a restriction on HSUART in SPL image is removed and well as definitions for non-DM NS16550 driver, its DM version is used instead.
Because SPL_DM requires malloc(), enable CONFIG_SPL_SYS_MALLOC_SIMPLE for LPC32xx boards.
The change adds about 5KB to the resulting SPL image (for devkit3250 board SPL image is increased from 10672 to 15608 bytes).
Signed-off-by: Vladimir Zapolskiy vz@mleia.com
Changes from v1 to v2:
- added CONFIG_SPL_SYS_MALLOC_SIMPLE to defconfigs
- removed ambiguity from a commit message
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 2 +- arch/arm/include/asm/arch-lpc32xx/config.h | 19 +------------------ configs/devkit3250_defconfig | 2 ++ configs/work_92105_defconfig | 2 ++ 4 files changed, 6 insertions(+), 19 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org
On Sat, Dec 19, 2015 at 11:29:26PM +0200, Vladimir Zapolskiy wrote:
For NXP LPC32xx boards the change enables SPL_DM option, this allows to use any driver model UART driver in SPL images, hence a restriction on HSUART in SPL image is removed and well as definitions for non-DM NS16550 driver, its DM version is used instead.
Because SPL_DM requires malloc(), enable CONFIG_SPL_SYS_MALLOC_SIMPLE for LPC32xx boards.
The change adds about 5KB to the resulting SPL image (for devkit3250 board SPL image is increased from 10672 to 15608 bytes).
Signed-off-by: Vladimir Zapolskiy vz@mleia.com Reviewed-by: Simon Glass sjg@chromium.org
Applied to u-boot/master, thanks!
participants (3)
-
Simon Glass -
Tom Rini -
Vladimir Zapolskiy