[PATCH 0/3] board: fsl: ls1046afrwy: complete DM_ETH enablement
With DM_ETH enabled by default, the FMan Ethernet isn't configured at present. This patch set adds the missing dts nodes, enables remaining build configs and initializes PCI devices.
Camelia Groza (3): arm: dts: ls1046afrwy: add the FMan Ethernet nodes board: freescale: ls1046afrwy: enumerate PCI devices configs: ls1046afrwy: enable DM_MDIO and DM_CMD
arch/arm/dts/fsl-ls1046a-frwy.dts | 48 ++++++++++++++++++- board/freescale/ls1046afrwy/ls1046afrwy.c | 3 ++ configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig | 2 + configs/ls1046afrwy_tfa_defconfig | 2 + 4 files changed, 54 insertions(+), 1 deletion(-)
-- 2.17.1
Describe the FMan Ethernet interfaces present on the board.
Signed-off-by: Camelia Groza camelia.groza@nxp.com --- arch/arm/dts/fsl-ls1046a-frwy.dts | 48 ++++++++++++++++++++++++++++++- 1 file changed, 47 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/fsl-ls1046a-frwy.dts b/arch/arm/dts/fsl-ls1046a-frwy.dts index cda05411d881..1e656d496025 100644 --- a/arch/arm/dts/fsl-ls1046a-frwy.dts +++ b/arch/arm/dts/fsl-ls1046a-frwy.dts @@ -2,7 +2,7 @@ /* * Device Tree Include file for NXP Layerscape-1046A family SoC. * - * Copyright 2019 NXP + * Copyright 2019-2023 NXP * */
@@ -34,3 +34,49 @@ &i2c0 { status = "okay"; }; + +#include "fsl-ls1046-post.dtsi" + +&fman0 { + ethernet@e0000 { + phy-handle = <&qsgmii_phy4>; + phy-connection-type = "qsgmii"; + status = "okay"; + }; + + ethernet@e8000 { + phy-handle = <&qsgmii_phy2>; + phy-connection-type = "qsgmii"; + status = "okay"; + }; + + ethernet@ea000 { + phy-handle = <&qsgmii_phy1>; + phy-connection-type = "qsgmii"; + status = "okay"; + }; + + ethernet@f2000 { + phy-handle = <&qsgmii_phy3>; + phy-connection-type = "qsgmii"; + status = "okay"; + }; + + mdio@fd000 { + qsgmii_phy1: ethernet-phy@1c { + reg = <0x1c>; + }; + + qsgmii_phy2: ethernet-phy@1d { + reg = <0x1d>; + }; + + qsgmii_phy3: ethernet-phy@1e { + reg = <0x1e>; + }; + + qsgmii_phy4: ethernet-phy@1f { + reg = <0x1f>; + }; + }; +};
Call pci_init() from board_init() to force PCI enumeration at probe time.
Signed-off-by: Camelia Groza camelia.groza@nxp.com --- board/freescale/ls1046afrwy/ls1046afrwy.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/board/freescale/ls1046afrwy/ls1046afrwy.c b/board/freescale/ls1046afrwy/ls1046afrwy.c index f6e5c122ead6..899c22a367e6 100644 --- a/board/freescale/ls1046afrwy/ls1046afrwy.c +++ b/board/freescale/ls1046afrwy/ls1046afrwy.c @@ -134,6 +134,9 @@ val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK); out_le32(SMMU_NSCR0, val); #endif
+ if (!IS_ENABLED(CONFIG_SYS_EARLY_PCI_INIT)) + pci_init(); + select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0); return 0; }
With DM_ETH configured by default, complete the Ethernet enablement for LS1046AFRWY by activating DM_MDIO.
Signed-off-by: Camelia Groza camelia.groza@nxp.com --- configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig | 2 ++ configs/ls1046afrwy_tfa_defconfig | 2 ++ 2 files changed, 4 insertions(+)
diff --git a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig index 8d6a1371acb7..da1b18a8050a 100644 --- a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig @@ -30,6 +30,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -61,6 +62,7 @@ CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_VITESSE=y +CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/ls1046afrwy_tfa_defconfig b/configs/ls1046afrwy_tfa_defconfig index e5d2b556f783..71142af25c74 100644 --- a/configs/ls1046afrwy_tfa_defconfig +++ b/configs/ls1046afrwy_tfa_defconfig @@ -34,6 +34,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=532 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -67,6 +68,7 @@ CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_VITESSE=y +CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y
participants (1)
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Camelia Groza