dcbi instruction has been used to clear D-cache lock. However, the cache lock is presistent for e6500 core. Use dcblc to clear the lock explicitly.

Signed-off-by: York Sun yorksun@freescale.com --- arch/powerpc/cpu/mpc85xx/start.S | 1 + 1 file changed, 1 insertion(+)

diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 9359d83..bb568a2 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -2049,6 +2049,7 @@ unlock_ram_in_cache: slwi r4,r4,(10 - 1 - L1_CACHE_SHIFT) mtctr r4 1: dcbi r0,r3 + dcblc r0,r3 addi r3,r3,CONFIG_SYS_CACHELINE_SIZE bdnz 1b sync