[U-Boot] [PATCH 1/4] i2c: rcar_i2c: Remove the driver
Remove the rcar_i2c driver, since it's no longer used by any board and will be superseded by a DM and DT capable variant.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Heiko Schocher hs@denx.de Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org --- drivers/i2c/Makefile | 1 - drivers/i2c/rcar_i2c.c | 293 ------------------------------------------------- 2 files changed, 294 deletions(-) delete mode 100644 drivers/i2c/rcar_i2c.c
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index 169a2f1d7a..4a6e06fbc5 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile @@ -30,7 +30,6 @@ obj-$(CONFIG_SYS_I2C_MVTWSI) += mvtwsi.o obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o obj-$(CONFIG_SYS_I2C_MXS) += mxs_i2c.o obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o -obj-$(CONFIG_SYS_I2C_RCAR) += rcar_i2c.o obj-$(CONFIG_SYS_I2C_RCAR_IIC) += rcar_iic.o obj-$(CONFIG_SYS_I2C_ROCKCHIP) += rk_i2c.o obj-$(CONFIG_SYS_I2C_S3C24X0) += s3c24x0_i2c.o exynos_hs_i2c.o diff --git a/drivers/i2c/rcar_i2c.c b/drivers/i2c/rcar_i2c.c deleted file mode 100644 index bfba443f62..0000000000 --- a/drivers/i2c/rcar_i2c.c +++ /dev/null @@ -1,293 +0,0 @@ -/* - * drivers/i2c/rcar_i2c.c - * - * Copyright (C) 2013 Renesas Electronics Corporation - * Copyright (C) 2013 Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com - * - * SPDX-License-Identifier: GPL-2.0 - * - * NOTE: This driver should be converted to driver model before June 2017. - * Please see doc/driver-model/i2c-howto.txt for instructions. - */ - -#include <common.h> -#include <i2c.h> -#include <asm/io.h> - -DECLARE_GLOBAL_DATA_PTR; - -struct rcar_i2c { - u32 icscr; - u32 icmcr; - u32 icssr; - u32 icmsr; - u32 icsier; - u32 icmier; - u32 icccr; - u32 icsar; - u32 icmar; - u32 icrxdtxd; - u32 icccr2; - u32 icmpr; - u32 ichpr; - u32 iclpr; -}; - -#define MCR_MDBS 0x80 /* non-fifo mode switch */ -#define MCR_FSCL 0x40 /* override SCL pin */ -#define MCR_FSDA 0x20 /* override SDA pin */ -#define MCR_OBPC 0x10 /* override pins */ -#define MCR_MIE 0x08 /* master if enable */ -#define MCR_TSBE 0x04 -#define MCR_FSB 0x02 /* force stop bit */ -#define MCR_ESG 0x01 /* en startbit gen. */ - -#define MSR_MASK 0x7f -#define MSR_MNR 0x40 /* nack received */ -#define MSR_MAL 0x20 /* arbitration lost */ -#define MSR_MST 0x10 /* sent a stop */ -#define MSR_MDE 0x08 -#define MSR_MDT 0x04 -#define MSR_MDR 0x02 -#define MSR_MAT 0x01 /* slave addr xfer done */ - -static const struct rcar_i2c *i2c_dev[CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS] = { - (struct rcar_i2c *)CONFIG_SYS_RCAR_I2C0_BASE, - (struct rcar_i2c *)CONFIG_SYS_RCAR_I2C1_BASE, - (struct rcar_i2c *)CONFIG_SYS_RCAR_I2C2_BASE, - (struct rcar_i2c *)CONFIG_SYS_RCAR_I2C3_BASE, -}; - -static void rcar_i2c_raw_rw_common(struct rcar_i2c *dev, u8 chip, uint addr) -{ - /* set slave address */ - writel(chip << 1, &dev->icmar); - /* set register address */ - writel(addr, &dev->icrxdtxd); - /* clear status */ - writel(0, &dev->icmsr); - /* start master send */ - writel(MCR_MDBS | MCR_MIE | MCR_ESG, &dev->icmcr); - - while ((readl(&dev->icmsr) & (MSR_MAT | MSR_MDE)) - != (MSR_MAT | MSR_MDE)) - udelay(10); - - /* clear ESG */ - writel(MCR_MDBS | MCR_MIE, &dev->icmcr); - /* start SCLclk */ - writel(~(MSR_MAT | MSR_MDE), &dev->icmsr); - - while (!(readl(&dev->icmsr) & MSR_MDE)) - udelay(10); -} - -static void rcar_i2c_raw_rw_finish(struct rcar_i2c *dev) -{ - while (!(readl(&dev->icmsr) & MSR_MST)) - udelay(10); - - writel(0, &dev->icmcr); -} - -static int -rcar_i2c_raw_write(struct rcar_i2c *dev, u8 chip, uint addr, u8 *val, int size) -{ - rcar_i2c_raw_rw_common(dev, chip, addr); - - /* set send date */ - writel(*val, &dev->icrxdtxd); - /* start SCLclk */ - writel(~MSR_MDE, &dev->icmsr); - - while (!(readl(&dev->icmsr) & MSR_MDE)) - udelay(10); - - /* set stop condition */ - writel(MCR_MDBS | MCR_MIE | MCR_FSB, &dev->icmcr); - /* start SCLclk */ - writel(~MSR_MDE, &dev->icmsr); - - rcar_i2c_raw_rw_finish(dev); - - return 0; -} - -static u8 -rcar_i2c_raw_read(struct rcar_i2c *dev, u8 chip, uint addr) -{ - u8 ret; - - rcar_i2c_raw_rw_common(dev, chip, addr); - - /* set slave address, receive */ - writel((chip << 1) | 1, &dev->icmar); - /* start master receive */ - writel(MCR_MDBS | MCR_MIE | MCR_ESG, &dev->icmcr); - /* clear status */ - writel(0, &dev->icmsr); - - while ((readl(&dev->icmsr) & (MSR_MAT | MSR_MDR)) - != (MSR_MAT | MSR_MDR)) - udelay(10); - - /* clear ESG */ - writel(MCR_MDBS | MCR_MIE, &dev->icmcr); - /* prepare stop condition */ - writel(MCR_MDBS | MCR_MIE | MCR_FSB, &dev->icmcr); - /* start SCLclk */ - writel(~(MSR_MAT | MSR_MDR), &dev->icmsr); - - while (!(readl(&dev->icmsr) & MSR_MDR)) - udelay(10); - - /* get receive data */ - ret = (u8)readl(&dev->icrxdtxd); - /* start SCLclk */ - writel(~MSR_MDR, &dev->icmsr); - - rcar_i2c_raw_rw_finish(dev); - - return ret; -} - -/* - * SCL = iicck / (20 + SCGD * 8 + F[(ticf + tr + intd) * iicck]) - * iicck : I2C internal clock < 20 MHz - * ticf : I2C SCL falling time: 35 ns - * tr : I2C SCL rising time: 200 ns - * intd : LSI internal delay: I2C0: 50 ns I2C1-3: 5 - * F[n] : n rounded up to an integer - */ -static u32 rcar_clock_gen(int i2c_no, u32 bus_speed) -{ - u32 iicck, f, scl, scgd; - u32 intd = 5; - - int bit = 0, cdf_width = 3; - for (bit = 0; bit < (1 << cdf_width); bit++) { - iicck = CONFIG_HP_CLK_FREQ / (1 + bit); - if (iicck < 20000000) - break; - } - - if (bit > (1 << cdf_width)) { - puts("rcar-i2c: Can not get CDF\n"); - return 0; - } - - if (i2c_no == 0) - intd = 50; - - f = (35 + 200 + intd) * (iicck / 1000000000); - - for (scgd = 0; scgd < 0x40; scgd++) { - scl = iicck / (20 + (scgd * 8) + f); - if (scl <= bus_speed) - break; - } - - if (scgd > 0x40) { - puts("rcar-i2c: Can not get SDGB\n"); - return 0; - } - - debug("%s: scl: %d\n", __func__, scl); - debug("%s: bit %x\n", __func__, bit); - debug("%s: scgd %x\n", __func__, scgd); - debug("%s: iccr %x\n", __func__, (scgd << (cdf_width) | bit)); - - return scgd << (cdf_width) | bit; -} - -static void -rcar_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd) -{ - struct rcar_i2c *dev = (struct rcar_i2c *)i2c_dev[adap->hwadapnr]; - u32 icccr = 0; - - /* No i2c support prior to relocation */ - if (!(gd->flags & GD_FLG_RELOC)) - return; - - /* - * reset slave mode. - * slave mode is not used on this driver - */ - writel(0, &dev->icsier); - writel(0, &dev->icsar); - writel(0, &dev->icscr); - writel(0, &dev->icssr); - - /* reset master mode */ - writel(0, &dev->icmier); - writel(0, &dev->icmcr); - writel(0, &dev->icmsr); - writel(0, &dev->icmar); - - icccr = rcar_clock_gen(adap->hwadapnr, adap->speed); - if (icccr == 0) - puts("I2C: Init failed\n"); - else - writel(icccr, &dev->icccr); -} - -static int rcar_i2c_read(struct i2c_adapter *adap, uint8_t chip, - uint addr, int alen, u8 *data, int len) -{ - struct rcar_i2c *dev = (struct rcar_i2c *)i2c_dev[adap->hwadapnr]; - int i; - - for (i = 0; i < len; i++) - data[i] = rcar_i2c_raw_read(dev, chip, addr + i); - - return 0; -} - -static int rcar_i2c_write(struct i2c_adapter *adap, uint8_t chip, uint addr, - int alen, u8 *data, int len) -{ - struct rcar_i2c *dev = (struct rcar_i2c *)i2c_dev[adap->hwadapnr]; - return rcar_i2c_raw_write(dev, chip, addr, data, len); -} - -static int -rcar_i2c_probe(struct i2c_adapter *adap, u8 dev) -{ - return rcar_i2c_read(adap, dev, 0, 0, NULL, 0); -} - -static unsigned int rcar_i2c_set_bus_speed(struct i2c_adapter *adap, - unsigned int speed) -{ - struct rcar_i2c *dev = (struct rcar_i2c *)i2c_dev[adap->hwadapnr]; - u32 icccr; - int ret = 0; - - rcar_i2c_raw_rw_finish(dev); - - icccr = rcar_clock_gen(adap->hwadapnr, speed); - if (icccr == 0) { - puts("I2C: Init failed\n"); - ret = -1; - } else { - writel(icccr, &dev->icccr); - } - return ret; -} - -/* - * Register RCAR i2c adapters - */ -U_BOOT_I2C_ADAP_COMPLETE(rcar_0, rcar_i2c_init, rcar_i2c_probe, rcar_i2c_read, - rcar_i2c_write, rcar_i2c_set_bus_speed, - CONFIG_SYS_RCAR_I2C0_SPEED, 0, 0) -U_BOOT_I2C_ADAP_COMPLETE(rcar_1, rcar_i2c_init, rcar_i2c_probe, rcar_i2c_read, - rcar_i2c_write, rcar_i2c_set_bus_speed, - CONFIG_SYS_RCAR_I2C1_SPEED, 0, 1) -U_BOOT_I2C_ADAP_COMPLETE(rcar_2, rcar_i2c_init, rcar_i2c_probe, rcar_i2c_read, - rcar_i2c_write, rcar_i2c_set_bus_speed, - CONFIG_SYS_RCAR_I2C2_SPEED, 0, 2) -U_BOOT_I2C_ADAP_COMPLETE(rcar_3, rcar_i2c_init, rcar_i2c_probe, rcar_i2c_read, - rcar_i2c_write, rcar_i2c_set_bus_speed, - CONFIG_SYS_RCAR_I2C3_SPEED, 0, 3)
Add derivative of the rcar_i2c driver which is capable of probing itself from DM and uses DT.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Heiko Schocher hs@denx.de Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org --- drivers/i2c/Kconfig | 6 + drivers/i2c/Makefile | 1 + drivers/i2c/rcar_i2c.c | 355 +++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 362 insertions(+) create mode 100644 drivers/i2c/rcar_i2c.c
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 7fb201d8e6..5eceab9ea8 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -339,6 +339,12 @@ config SYS_OMAP24_I2C_SPEED OMAP24xx Slave speed channel 0 endif
+config SYS_I2C_RCAR_I2C + bool "Renesas RCar I2C driver" + depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C + help + Support for Renesas RCar I2C controller. + config SYS_I2C_RCAR_IIC bool "Renesas RCar Gen3 IIC driver" depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index 4a6e06fbc5..4e9f233cda 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile @@ -30,6 +30,7 @@ obj-$(CONFIG_SYS_I2C_MVTWSI) += mvtwsi.o obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o obj-$(CONFIG_SYS_I2C_MXS) += mxs_i2c.o obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o +obj-$(CONFIG_SYS_I2C_RCAR_I2C) += rcar_i2c.o obj-$(CONFIG_SYS_I2C_RCAR_IIC) += rcar_iic.o obj-$(CONFIG_SYS_I2C_ROCKCHIP) += rk_i2c.o obj-$(CONFIG_SYS_I2C_S3C24X0) += s3c24x0_i2c.o exynos_hs_i2c.o diff --git a/drivers/i2c/rcar_i2c.c b/drivers/i2c/rcar_i2c.c new file mode 100644 index 0000000000..6010ccde61 --- /dev/null +++ b/drivers/i2c/rcar_i2c.c @@ -0,0 +1,355 @@ +/* + * drivers/i2c/rcar_i2c.c + * + * Copyright (C) 2018 Marek Vasut marek.vasut@gmail.com + * + * Clock configuration based on Linux i2c-rcar.c: + * Copyright (C) 2014-15 Wolfram Sang wsa@sang-engineering.com + * Copyright (C) 2011-2015 Renesas Electronics Corporation + * Copyright (C) 2012-14 Renesas Solutions Corp. + * Kuninori Morimoto kuninori.morimoto.gx@renesas.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <clk.h> +#include <dm.h> +#include <i2c.h> +#include <asm/io.h> +#include <wait_bit.h> + +#define RCAR_I2C_ICSCR 0x00 +#define RCAR_I2C_ICMCR 0x04 +#define RCAR_I2C_ICMCR_MDBS BIT(7) +#define RCAR_I2C_ICMCR_FSCL BIT(6) +#define RCAR_I2C_ICMCR_FSDA BIT(5) +#define RCAR_I2C_ICMCR_OBPC BIT(4) +#define RCAR_I2C_ICMCR_MIE BIT(3) +#define RCAR_I2C_ICMCR_TSBE BIT(2) +#define RCAR_I2C_ICMCR_FSB BIT(1) +#define RCAR_I2C_ICMCR_ESG BIT(0) +#define RCAR_I2C_ICSSR 0x08 +#define RCAR_I2C_ICMSR 0x0c +#define RCAR_I2C_ICMSR_MASK 0x7f +#define RCAR_I2C_ICMSR_MNR BIT(6) +#define RCAR_I2C_ICMSR_MAL BIT(5) +#define RCAR_I2C_ICMSR_MST BIT(4) +#define RCAR_I2C_ICMSR_MDE BIT(3) +#define RCAR_I2C_ICMSR_MDT BIT(2) +#define RCAR_I2C_ICMSR_MDR BIT(1) +#define RCAR_I2C_ICMSR_MAT BIT(0) +#define RCAR_I2C_ICSIER 0x10 +#define RCAR_I2C_ICMIER 0x14 +#define RCAR_I2C_ICCCR 0x18 +#define RCAR_I2C_ICCCR_SCGD_OFF 3 +#define RCAR_I2C_ICSAR 0x1c +#define RCAR_I2C_ICMAR 0x20 +#define RCAR_I2C_ICRXD_ICTXD 0x24 + +struct rcar_i2c_priv { + void __iomem *base; + struct clk clk; + u32 intdelay; + u32 icccr; +}; + +static int rcar_i2c_finish(struct udevice *dev) +{ + struct rcar_i2c_priv *priv = dev_get_priv(dev); + int ret; + + ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMSR, RCAR_I2C_ICMSR_MST, + true, 10, true); + + writel(0, priv->base + RCAR_I2C_ICSSR); + writel(0, priv->base + RCAR_I2C_ICMSR); + writel(0, priv->base + RCAR_I2C_ICMCR); + + return ret; +} + +static void rcar_i2c_recover(struct udevice *dev) +{ + struct rcar_i2c_priv *priv = dev_get_priv(dev); + u32 mcr = RCAR_I2C_ICMCR_MDBS | RCAR_I2C_ICMCR_OBPC; + u32 mcra = mcr | RCAR_I2C_ICMCR_FSDA; + int i; + + /* Send 9 SCL pulses */ + for (i = 0; i < 9; i++) { + writel(mcra | RCAR_I2C_ICMCR_FSCL, priv->base + RCAR_I2C_ICMCR); + udelay(5); + writel(mcra, priv->base + RCAR_I2C_ICMCR); + udelay(5); + } + + /* Send stop condition */ + udelay(5); + writel(mcra, priv->base + RCAR_I2C_ICMCR); + udelay(5); + writel(mcr, priv->base + RCAR_I2C_ICMCR); + udelay(5); + writel(mcr | RCAR_I2C_ICMCR_FSCL, priv->base + RCAR_I2C_ICMCR); + udelay(5); + writel(mcra | RCAR_I2C_ICMCR_FSCL, priv->base + RCAR_I2C_ICMCR); + udelay(5); +} + +static int rcar_i2c_set_addr(struct udevice *dev, u8 chip, u8 read) +{ + struct rcar_i2c_priv *priv = dev_get_priv(dev); + u32 mask = RCAR_I2C_ICMSR_MAT | + (read ? RCAR_I2C_ICMSR_MDR : RCAR_I2C_ICMSR_MDE); + u32 val; + int ret; + + writel(0, priv->base + RCAR_I2C_ICMIER); + writel(RCAR_I2C_ICMCR_MDBS, priv->base + RCAR_I2C_ICMCR); + writel(0, priv->base + RCAR_I2C_ICMSR); + writel(priv->icccr, priv->base + RCAR_I2C_ICCCR); + + ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMCR, + RCAR_I2C_ICMCR_FSDA, false, 2, true); + if (ret) { + rcar_i2c_recover(dev); + val = readl(priv->base + RCAR_I2C_ICMSR); + if (val & RCAR_I2C_ICMCR_FSDA) { + dev_err(dev, "Bus busy, aborting\n"); + return ret; + } + } + + writel((chip << 1) | read, priv->base + RCAR_I2C_ICMAR); + writel(0, priv->base + RCAR_I2C_ICMSR); + writel(RCAR_I2C_ICMCR_MDBS | RCAR_I2C_ICMCR_MIE | RCAR_I2C_ICMCR_ESG, + priv->base + RCAR_I2C_ICMCR); + + ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMSR, mask, + true, 100, true); + if (ret) + return ret; + + /* Check NAK */ + if (readl(priv->base + RCAR_I2C_ICMSR) & RCAR_I2C_ICMSR_MNR) + return -EREMOTEIO; + + return 0; +} + +static int rcar_i2c_read_common(struct udevice *dev, struct i2c_msg *msg) +{ + struct rcar_i2c_priv *priv = dev_get_priv(dev); + u32 icmcr = RCAR_I2C_ICMCR_MDBS | RCAR_I2C_ICMCR_MIE; + int i, ret = -EREMOTEIO; + + ret = rcar_i2c_set_addr(dev, msg->addr, 1); + if (ret) + return ret; + + for (i = 0; i < msg->len; i++) { + + if (msg->len - 1 == i) + icmcr |= RCAR_I2C_ICMCR_FSB; + + writel(icmcr, priv->base + RCAR_I2C_ICMCR); + writel(~RCAR_I2C_ICMSR_MDR, priv->base + RCAR_I2C_ICMSR); + + ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMSR, + RCAR_I2C_ICMSR_MDR, true, 100, true); + if (ret) + return ret; + + msg->buf[i] = readl(priv->base + RCAR_I2C_ICRXD_ICTXD) & 0xff; + } + + writel(~RCAR_I2C_ICMSR_MDR, priv->base + RCAR_I2C_ICMSR); + + return rcar_i2c_finish(dev); +} + +static int rcar_i2c_write_common(struct udevice *dev, struct i2c_msg *msg) +{ + struct rcar_i2c_priv *priv = dev_get_priv(dev); + u32 icmcr = RCAR_I2C_ICMCR_MDBS | RCAR_I2C_ICMCR_MIE; + int i, ret = -EREMOTEIO; + + ret = rcar_i2c_set_addr(dev, msg->addr, 0); + if (ret) + return ret; + + for (i = 0; i < msg->len; i++) { + writel(msg->buf[i], priv->base + RCAR_I2C_ICRXD_ICTXD); + writel(icmcr, priv->base + RCAR_I2C_ICMCR); + writel(~RCAR_I2C_ICMSR_MDE, priv->base + RCAR_I2C_ICMSR); + + ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMSR, + RCAR_I2C_ICMSR_MDE, true, 100, true); + if (ret) + return ret; + } + + writel(~RCAR_I2C_ICMSR_MDE, priv->base + RCAR_I2C_ICMSR); + icmcr |= RCAR_I2C_ICMCR_FSB; + writel(icmcr, priv->base + RCAR_I2C_ICMCR); + + return rcar_i2c_finish(dev); +} + +static int rcar_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs) +{ + int ret; + + for (; nmsgs > 0; nmsgs--, msg++) { + if (msg->flags & I2C_M_RD) + ret = rcar_i2c_read_common(dev, msg); + else + ret = rcar_i2c_write_common(dev, msg); + + if (ret) + return -EREMOTEIO; + } + + return ret; +} + +static int rcar_i2c_probe_chip(struct udevice *dev, uint addr, uint flags) +{ + struct rcar_i2c_priv *priv = dev_get_priv(dev); + int ret; + + /* Ignore address 0, slave address */ + if (addr == 0) + return -EINVAL; + + ret = rcar_i2c_set_addr(dev, addr, 1); + writel(0, priv->base + RCAR_I2C_ICMSR); + return ret; +} + +static int rcar_i2c_set_speed(struct udevice *dev, uint bus_freq_hz) +{ + struct rcar_i2c_priv *priv = dev_get_priv(dev); + u32 scgd, cdf, round, ick, sum, scl; + unsigned long rate; + + /* + * calculate SCL clock + * see + * ICCCR + * + * ick = clkp / (1 + CDF) + * SCL = ick / (20 + SCGD * 8 + F[(ticf + tr + intd) * ick]) + * + * ick : I2C internal clock < 20 MHz + * ticf : I2C SCL falling time + * tr : I2C SCL rising time + * intd : LSI internal delay + * clkp : peripheral_clk + * F[] : integer up-valuation + */ + rate = clk_get_rate(&priv->clk); + cdf = rate / 20000000; + if (cdf >= 8) { + dev_err(dev, "Input clock %lu too high\n", rate); + return -EIO; + } + ick = rate / (cdf + 1); + + /* + * it is impossible to calculate large scale + * number on u32. separate it + * + * F[(ticf + tr + intd) * ick] with sum = (ticf + tr + intd) + * = F[sum * ick / 1000000000] + * = F[(ick / 1000000) * sum / 1000] + */ + sum = 35 + 200 + priv->intdelay; + round = (ick + 500000) / 1000000 * sum; + round = (round + 500) / 1000; + + /* + * SCL = ick / (20 + SCGD * 8 + F[(ticf + tr + intd) * ick]) + * + * Calculation result (= SCL) should be less than + * bus_speed for hardware safety + * + * We could use something along the lines of + * div = ick / (bus_speed + 1) + 1; + * scgd = (div - 20 - round + 7) / 8; + * scl = ick / (20 + (scgd * 8) + round); + * (not fully verified) but that would get pretty involved + */ + for (scgd = 0; scgd < 0x40; scgd++) { + scl = ick / (20 + (scgd * 8) + round); + if (scl <= bus_freq_hz) + goto scgd_find; + } + dev_err(dev, "it is impossible to calculate best SCL\n"); + return -EIO; + +scgd_find: + dev_dbg(dev, "clk %d/%d(%lu), round %u, CDF:0x%x, SCGD: 0x%x\n", + scl, bus_freq_hz, clk_get_rate(&priv->clk), round, cdf, scgd); + + priv->icccr = (scgd << RCAR_I2C_ICCCR_SCGD_OFF) | cdf; + writel(priv->icccr, priv->base + RCAR_I2C_ICCCR); + + return 0; +} + +static int rcar_i2c_probe(struct udevice *dev) +{ + struct rcar_i2c_priv *priv = dev_get_priv(dev); + int ret; + + priv->base = dev_read_addr_ptr(dev); + priv->intdelay = dev_read_u32_default(dev, + "i2c-scl-internal-delay-ns", 5); + + ret = clk_get_by_index(dev, 0, &priv->clk); + if (ret) + return ret; + + ret = clk_enable(&priv->clk); + if (ret) + return ret; + + /* reset slave mode */ + writel(0, priv->base + RCAR_I2C_ICSIER); + writel(0, priv->base + RCAR_I2C_ICSAR); + writel(0, priv->base + RCAR_I2C_ICSCR); + writel(0, priv->base + RCAR_I2C_ICSSR); + + /* reset master mode */ + writel(0, priv->base + RCAR_I2C_ICMIER); + writel(0, priv->base + RCAR_I2C_ICMCR); + writel(0, priv->base + RCAR_I2C_ICMSR); + writel(0, priv->base + RCAR_I2C_ICMAR); + + ret = rcar_i2c_set_speed(dev, 100000); + if (ret) + clk_disable(&priv->clk); + + return ret; +} + +static const struct dm_i2c_ops rcar_i2c_ops = { + .xfer = rcar_i2c_xfer, + .probe_chip = rcar_i2c_probe_chip, + .set_bus_speed = rcar_i2c_set_speed, +}; + +static const struct udevice_id rcar_i2c_ids[] = { + { .compatible = "renesas,rcar-gen2-i2c" }, + { } +}; + +U_BOOT_DRIVER(i2c_rcar) = { + .name = "i2c_rcar", + .id = UCLASS_I2C, + .of_match = rcar_i2c_ids, + .probe = rcar_i2c_probe, + .priv_auto_alloc_size = sizeof(struct rcar_i2c_priv), + .ops = &rcar_i2c_ops, +};
Hello Marek,
Am 01.05.2018 um 09:03 schrieb Marek Vasut:
Add derivative of the rcar_i2c driver which is capable of probing itself from DM and uses DT.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Heiko Schocher hs@denx.de Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org
drivers/i2c/Kconfig | 6 + drivers/i2c/Makefile | 1 + drivers/i2c/rcar_i2c.c | 355 +++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 362 insertions(+) create mode 100644 drivers/i2c/rcar_i2c.c
I fixed patch 1/4 and tried to apply this patch, but checkpatch says:
--2018-05-10 09:16:48-- http://patchwork.ozlabs.org/patch/906952/mbox Auflösen des Hostnamens patchwork.ozlabs.org (patchwork.ozlabs.org)… 203.11.71.1, 2401:3900:2:1::2 Verbindungsaufbau zu patchwork.ozlabs.org (patchwork.ozlabs.org)|203.11.71.1|:80 … verbunden. HTTP-Anforderung gesendet, auf Antwort wird gewartet … 301 Moved Permanently Platz: /patch/906952/mbox/ [folgend] --2018-05-10 09:16:49-- http://patchwork.ozlabs.org/patch/906952/mbox/ Wiederverwendung der bestehenden Verbindung zu patchwork.ozlabs.org:80. HTTP-Anforderung gesendet, auf Antwort wird gewartet … 200 OK Länge: nicht spezifiziert [text/plain] Wird in »mbox« gespeichert.
mbox [ <=> ] 11,38K --.-KB/s in 0,01s
2018-05-10 09:16:50 (933 KB/s) - »mbox« gespeichert [11653]
WARNING: please write a paragraph that describes the config symbol fully #37: FILE: drivers/i2c/Kconfig:342: +config SYS_I2C_RCAR_I2C
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #59: new file mode 100644
WARNING: Missing or malformed SPDX-License-Identifier tag in line 1 #64: FILE: drivers/i2c/rcar_i2c.c:1: +/*
CHECK: Blank lines aren't necessary after an open brace '{' #214: FILE: drivers/i2c/rcar_i2c.c:151: + for (i = 0; i < msg->len; i++) { +
total: 0 errors, 3 warnings, 1 checks, 374 lines checked
NOTE: For some of the reported defects, checkpatch may be able to mechanically convert to the typical style using --fix or --fix-inplace.
mbox has style problems, please review.
NOTE: Ignored message types: COMPLEX_MACRO CONSIDER_KSTRTO MINMAX MULTISTATEMENT_MACRO_USE_DO_WHILE NETWORKING_BLOCK_COMMENT_STYLE PREFER_ETHER_ADDR_COPY USLEEP_RANGE
NOTE: If any of the errors are false positives, please report them to the maintainer, see CHECKPATCH in MAINTAINERS. Wende an: i2c: rcar_i2c: Add DM and DT capable I2C driver
Coukd you please send a rebased version of the patchset?
Thanks!
Beside of this, you can add my to patch 1 and 2:
Reviewed-by: Heiko Schocher hs@denx.de
bye, Heiko
Enable the DM capable driver instead of the legacy one.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org --- configs/lager_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/lager_defconfig b/configs/lager_defconfig index 1071da24d2..7dcd9b7dd8 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -53,6 +53,7 @@ CONFIG_CLK_RENESAS=y CONFIG_DM_GPIO=y CONFIG_RCAR_GPIO=y CONFIG_DM_I2C=y +CONFIG_SYS_I2C_RCAR_I2C=y CONFIG_SYS_I2C_RCAR_IIC=y CONFIG_DM_MMC=y CONFIG_SH_MMCIF=y
Hello Marek,
Am 01.05.2018 um 09:03 schrieb Marek Vasut:
Enable the DM capable driver instead of the legacy one.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org
configs/lager_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/lager_defconfig b/configs/lager_defconfig index 1071da24d2..7dcd9b7dd8 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -53,6 +53,7 @@ CONFIG_CLK_RENESAS=y CONFIG_DM_GPIO=y CONFIG_RCAR_GPIO=y CONFIG_DM_I2C=y +CONFIG_SYS_I2C_RCAR_I2C=y CONFIG_SYS_I2C_RCAR_IIC=y
Isn;t CONFIG_SYS_I2C_RCAR_IIC also a i2c driver?
Has this SoC 2 different i2c drivers?
If so, you can add my
Reviewed-by: Heiko Schocher hs@denx.de
(Also to patch 4)
CONFIG_DM_MMC=y CONFIG_SH_MMCIF=y
bye, Heiko
On 05/10/2018 09:23 AM, Heiko Schocher wrote:
Hello Marek,
Hi,
Am 01.05.2018 um 09:03 schrieb Marek Vasut:
Enable the DM capable driver instead of the legacy one.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org
configs/lager_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/lager_defconfig b/configs/lager_defconfig index 1071da24d2..7dcd9b7dd8 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -53,6 +53,7 @@ CONFIG_CLK_RENESAS=y CONFIG_DM_GPIO=y CONFIG_RCAR_GPIO=y CONFIG_DM_I2C=y +CONFIG_SYS_I2C_RCAR_I2C=y CONFIG_SYS_I2C_RCAR_IIC=y
Isn;t CONFIG_SYS_I2C_RCAR_IIC also a i2c driver?
Has this SoC 2 different i2c drivers?
Yes :)
If so, you can add my
Reviewed-by: Heiko Schocher hs@denx.de
(Also to patch 4)
CONFIG_DM_MMC=y CONFIG_SH_MMCIF=y
bye, Heiko
Enable the DM capable driver instead of the legacy one.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org --- configs/silk_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/silk_defconfig b/configs/silk_defconfig index 4cb1179a68..70c5219502 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -53,6 +53,7 @@ CONFIG_CLK_RENESAS=y CONFIG_DM_GPIO=y CONFIG_RCAR_GPIO=y CONFIG_DM_I2C=y +CONFIG_SYS_I2C_RCAR_I2C=y CONFIG_SYS_I2C_RCAR_IIC=y CONFIG_DM_MMC=y CONFIG_SH_MMCIF=y
Hello Marek,
Am 01.05.2018 um 09:03 schrieb Marek Vasut:
Remove the rcar_i2c driver, since it's no longer used by any board and will be superseded by a DM and DT capable variant.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Heiko Schocher hs@denx.de Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org
drivers/i2c/Makefile | 1 - drivers/i2c/rcar_i2c.c | 293 ------------------------------------------------- 2 files changed, 294 deletions(-) delete mode 100644 drivers/i2c/rcar_i2c.c
checkpatch says:
2018-05-08 03:12:02,870:CON :tbotlib # tb_ctrl: [33mWARNING:[0m added, moved or deleted file(s), does MAINTAINERS need updating? #41: deleted file mode 100644
total: 0 errors, 1 warnings, 0 checks, 7 lines checked
NOTE: For some of the reported defects, checkpatch may be able to mechanically convert to the typical style using --fix or --fix-inplace.
mbox has style problems, please review.
And applying patch to current mainline fails:
2018-05-08 03:12:04,014:CON :tbotlib # tb_ctrl: git am -3 mbox 2018-05-08 03:12:04,156:CON :tbotlib # tb_ctrl: Applying: i2c: rcar_i2c: Remove the driver Using index info to reconstruct a base tree... M drivers/i2c/Makefile M drivers/i2c/rcar_i2c.c Falling back to patching base and 3-way merge... CONFLICT (modify/delete): drivers/i2c/rcar_i2c.c deleted in i2c: rcar_i2c: Remove the driver and modified in HEAD. Version HEAD of drivers/i2c/rcar_i2c.c left in tree. Auto-merging drivers/i2c/Makefile error: Failed to merge in the changes. Patch failed at 0001 i2c: rcar_i2c: Remove the driver The copy of the patch that failed is found in: .git/rebase-apply/patch When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". hs@pollux [ 5:12:04] ttbott>
see full log: http://xeidos.ddns.net/tbot/id_740/tbot.txt
Before I make a dummy mistake, can you please rebase your patchset?
Thanks!
Hmm.. why do you remove the driver in this patch, and add it again in patch 2 ?
Isn;t it better to squash this 2 patches into one, so we see your changes?
bye, Heiko
On 05/08/2018 10:14 AM, Heiko Schocher wrote:
Hello Marek,
Am 01.05.2018 um 09:03 schrieb Marek Vasut:
Remove the rcar_i2c driver, since it's no longer used by any board and will be superseded by a DM and DT capable variant.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Heiko Schocher hs@denx.de Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org
drivers/i2c/Makefile | 1 - drivers/i2c/rcar_i2c.c | 293
2 files changed, 294 deletions(-) delete mode 100644 drivers/i2c/rcar_i2c.c
checkpatch says:
2018-05-08 03:12:02,870:CON :tbotlib # tb_ctrl: [33mWARNING:[0m added, moved or deleted file(s), does MAINTAINERS need updating? #41: deleted file mode 100644
total: 0 errors, 1 warnings, 0 checks, 7 lines checked
NOTE: For some of the reported defects, checkpatch may be able to mechanically convert to the typical style using --fix or --fix-inplace.
mbox has style problems, please review.
And applying patch to current mainline fails:
2018-05-08 03:12:04,014:CON :tbotlib # tb_ctrl: git am -3 mbox 2018-05-08 03:12:04,156:CON :tbotlib # tb_ctrl: Applying: i2c: rcar_i2c: Remove the driver Using index info to reconstruct a base tree... M drivers/i2c/Makefile M drivers/i2c/rcar_i2c.c Falling back to patching base and 3-way merge... CONFLICT (modify/delete): drivers/i2c/rcar_i2c.c deleted in i2c: rcar_i2c: Remove the driver and modified in HEAD. Version HEAD of drivers/i2c/rcar_i2c.c left in tree. Auto-merging drivers/i2c/Makefile error: Failed to merge in the changes. Patch failed at 0001 i2c: rcar_i2c: Remove the driver The copy of the patch that failed is found in: .git/rebase-apply/patch When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". hs@pollux [ 5:12:04] ttbott>
see full log: http://xeidos.ddns.net/tbot/id_740/tbot.txt
Before I make a dummy mistake, can you please rebase your patchset?
Thanks!
Hmm.. why do you remove the driver in this patch, and add it again in patch 2 ?
I am replacing it with a different/new driver, since the old one is broken.
Isn;t it better to squash this 2 patches into one, so we see your changes?
No, that'd be just unreviewable mess. Review 2/4 as a new driver.
participants (2)
-
Heiko Schocher -
Marek Vasut