[PATCH 1/5] bcm6753: add initial support
This add the initial support of the broadcom bcm6753 SoC family.
Signed-off-by: Philippe Reynes philippe.reynes@softathome.com --- arch/arm/Kconfig | 7 ++ arch/arm/dts/bcm6753.dtsi | 201 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 208 insertions(+) create mode 100644 arch/arm/dts/bcm6753.dtsi
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 8053394389..07a1b713cb 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -617,6 +617,13 @@ config ARCH_BCM63158 select OF_CONTROL imply CMD_DM
+config ARCH_BCM6753 + bool "Broadcom BCM6753 family" + select CPU_V7A + select DM + select OF_CONTROL + imply CMD_DM + config ARCH_BCM68360 bool "Broadcom BCM68360 family" select DM diff --git a/arch/arm/dts/bcm6753.dtsi b/arch/arm/dts/bcm6753.dtsi new file mode 100644 index 0000000000..bcbb8e17da --- /dev/null +++ b/arch/arm/dts/bcm6753.dtsi @@ -0,0 +1,201 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Philippe Reynes philippe.reynes@softathome.com + */ + +#include "skeleton.dtsi" + +/ { + compatible = "brcm,bcm6753"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + u-boot,dm-pre-reloc; + + cpu0: cpu@0 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0x0>; + next-level-cache = <&l2>; + u-boot,dm-pre-reloc; + }; + + cpu1: cpu@1 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0x1>; + next-level-cache = <&l2>; + u-boot,dm-pre-reloc; + }; + + cpu2: cpu@2 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0x2>; + next-level-cache = <&l2>; + u-boot,dm-pre-reloc; + }; + + l2: l2-cache0 { + compatible = "cache"; + u-boot,dm-pre-reloc; + }; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + u-boot,dm-pre-reloc; + + periph_osc: periph-osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + u-boot,dm-pre-reloc; + }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&periph_osc>; + clock-mult = <2>; + clock-div = <1>; + }; + + refclk50mhz: refclk50mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + }; + }; + + ubus { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + u-boot,dm-pre-reloc; + + uart0: serial@ff812000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0xff812000 0x1000>; + clock = <50000000>; + + status = "disabled"; + }; + + wdt1: watchdog@ff800480 { + compatible = "brcm,bcm6345-wdt"; + reg = <0xff800480 0x14>; + clocks = <&refclk50mhz>; + }; + + wdt2: watchdog@ff8004c0 { + compatible = "brcm,bcm6345-wdt"; + reg = <0xff8004c0 0x14>; + clocks = <&refclk50mhz>; + }; + + wdt-reboot { + compatible = "wdt-reboot"; + wdt = <&wdt1>; + }; + + gpio0: gpio-controller@0xff800500 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800500 0x4>, + <0xff800520 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio1: gpio-controller@0xff800504 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800504 0x4>, + <0xff800524 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio2: gpio-controller@0xff800508 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800508 0x4>, + <0xff800528 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio3: gpio-controller@0xff80050c { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff80050c 0x4>, + <0xff80052c 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio4: gpio-controller@0xff800510 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800510 0x4>, + <0xff800530 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio5: gpio-controller@0xff800514 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800514 0x4>, + <0xff800534 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio6: gpio-controller@0xff800518 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800518 0x4>, + <0xff800538 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio7: gpio-controller@0xff80051c { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff80051c 0x4>, + <0xff80053c 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + nand: nand-controller@ff801800 { + compatible = "brcm,nand-bcm6753", + "brcm,brcmnand-v5.0", + "brcm,brcmnand"; + reg-names = "nand", "nand-int-base", "nand-cache"; + reg = <0xff801800 0x180>, + <0xff802000 0x10>, + <0xff801c00 0x200>; + parameter-page-big-endian = <0>; + + status = "disabled"; + }; + }; +};
This IP is also used on some arm SoC, so we allow to use it on arm bcm6753 too.
Signed-off-by: Philippe Reynes philippe.reynes@softathome.com --- drivers/gpio/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 8d0e47c67d..1c963c2c53 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -87,7 +87,8 @@ config ALTERA_PIO config BCM6345_GPIO bool "BCM6345 GPIO driver" depends on DM_GPIO && (ARCH_BMIPS || ARCH_BCM68360 || \ - ARCH_BCM6858 || ARCH_BCM63158) + ARCH_BCM6858 || ARCH_BCM63158 || \ + ARCH_BCM6753) help This driver supports the GPIO banks on BCM6345 SoCs.
On Fri, Feb 11, 2022 at 07:18:35PM +0100, Philippe Reynes wrote:
This IP is also used on some arm SoC, so we allow to use it on arm bcm6753 too.
Signed-off-by: Philippe Reynes philippe.reynes@softathome.com
Applied to u-boot/next, thanks!
This adds the nand support for chipset bcm6753.
Signed-off-by: Philippe Reynes philippe.reynes@softathome.com --- drivers/mtd/nand/raw/Kconfig | 6 + drivers/mtd/nand/raw/brcmnand/Makefile | 1 + drivers/mtd/nand/raw/brcmnand/bcm6753_nand.c | 124 +++++++++++++++++++ 3 files changed, 131 insertions(+) create mode 100644 drivers/mtd/nand/raw/brcmnand/bcm6753_nand.c
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 0e826c1929..1eab21e206 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -91,6 +91,12 @@ config NAND_BRCMNAND_6368 help Enable support for broadcom nand driver on bcm6368.
+config NAND_BRCMNAND_6753 + bool "Support Broadcom NAND controller on bcm6753" + depends on NAND_BRCMNAND && ARCH_BCM6753 + help + Enable support for broadcom nand driver on bcm6753. + config NAND_BRCMNAND_68360 bool "Support Broadcom NAND controller on bcm68360" depends on NAND_BRCMNAND && ARCH_BCM68360 diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile index 5d9e7e3f3b..f46a7edae3 100644 --- a/drivers/mtd/nand/raw/brcmnand/Makefile +++ b/drivers/mtd/nand/raw/brcmnand/Makefile @@ -2,6 +2,7 @@
obj-$(CONFIG_NAND_BRCMNAND_6368) += bcm6368_nand.o obj-$(CONFIG_NAND_BRCMNAND_63158) += bcm63158_nand.o +obj-$(CONFIG_NAND_BRCMNAND_6753) += bcm6753_nand.o obj-$(CONFIG_NAND_BRCMNAND_68360) += bcm68360_nand.o obj-$(CONFIG_NAND_BRCMNAND_6838) += bcm6838_nand.o obj-$(CONFIG_NAND_BRCMNAND_6858) += bcm6858_nand.o diff --git a/drivers/mtd/nand/raw/brcmnand/bcm6753_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm6753_nand.c new file mode 100644 index 0000000000..feae66ef25 --- /dev/null +++ b/drivers/mtd/nand/raw/brcmnand/bcm6753_nand.c @@ -0,0 +1,124 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <common.h> +#include <asm/io.h> +#include <memalign.h> +#include <nand.h> +#include <linux/bitops.h> +#include <linux/errno.h> +#include <linux/io.h> +#include <linux/ioport.h> +#include <dm.h> + +#include "brcmnand.h" + +struct bcm6753_nand_soc { + struct brcmnand_soc soc; + void __iomem *base; +}; + +#define BCM6753_NAND_INT 0x00 +#define BCM6753_NAND_STATUS_SHIFT 0 +#define BCM6753_NAND_STATUS_MASK (0xfff << BCM6753_NAND_STATUS_SHIFT) + +#define BCM6753_NAND_INT_EN 0x04 +#define BCM6753_NAND_ENABLE_SHIFT 0 +#define BCM6753_NAND_ENABLE_MASK (0xffff << BCM6753_NAND_ENABLE_SHIFT) + +enum { + BCM6753_NP_READ = BIT(0), + BCM6753_BLOCK_ERASE = BIT(1), + BCM6753_COPY_BACK = BIT(2), + BCM6753_PAGE_PGM = BIT(3), + BCM6753_CTRL_READY = BIT(4), + BCM6753_DEV_RBPIN = BIT(5), + BCM6753_ECC_ERR_UNC = BIT(6), + BCM6753_ECC_ERR_CORR = BIT(7), +}; + +static bool bcm6753_nand_intc_ack(struct brcmnand_soc *soc) +{ + struct bcm6753_nand_soc *priv = + container_of(soc, struct bcm6753_nand_soc, soc); + void __iomem *mmio = priv->base + BCM6753_NAND_INT; + u32 val = brcmnand_readl(mmio); + + if (val & (BCM6753_CTRL_READY << BCM6753_NAND_STATUS_SHIFT)) { + /* Ack interrupt */ + val &= ~BCM6753_NAND_STATUS_MASK; + val |= BCM6753_CTRL_READY << BCM6753_NAND_STATUS_SHIFT; + brcmnand_writel(val, mmio); + return true; + } + + return false; +} + +static void bcm6753_nand_intc_set(struct brcmnand_soc *soc, bool en) +{ + struct bcm6753_nand_soc *priv = + container_of(soc, struct bcm6753_nand_soc, soc); + void __iomem *mmio = priv->base + BCM6753_NAND_INT_EN; + u32 val = brcmnand_readl(mmio); + + /* Don't ack any interrupts */ + val &= ~BCM6753_NAND_STATUS_MASK; + + if (en) + val |= BCM6753_CTRL_READY << BCM6753_NAND_ENABLE_SHIFT; + else + val &= ~(BCM6753_CTRL_READY << BCM6753_NAND_ENABLE_SHIFT); + + brcmnand_writel(val, mmio); +} + +static int bcm6753_nand_probe(struct udevice *dev) +{ + struct udevice *pdev = dev; + struct bcm6753_nand_soc *priv = dev_get_priv(dev); + struct brcmnand_soc *soc; + struct resource res; + + soc = &priv->soc; + + dev_read_resource_byname(pdev, "nand-int-base", &res); + priv->base = devm_ioremap(dev, res.start, resource_size(&res)); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + soc->ctlrdy_ack = bcm6753_nand_intc_ack; + soc->ctlrdy_set_enabled = bcm6753_nand_intc_set; + + /* Disable and ack all interrupts */ + brcmnand_writel(0, priv->base + BCM6753_NAND_INT_EN); + brcmnand_writel(0, priv->base + BCM6753_NAND_INT); + + return brcmnand_probe(pdev, soc); +} + +static const struct udevice_id bcm6753_nand_dt_ids[] = { + { + .compatible = "brcm,nand-bcm6753", + }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(bcm6753_nand) = { + .name = "bcm6753-nand", + .id = UCLASS_MTD, + .of_match = bcm6753_nand_dt_ids, + .probe = bcm6753_nand_probe, + .priv_auto = sizeof(struct bcm6753_nand_soc), +}; + +void board_nand_init(void) +{ + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MTD, + DM_DRIVER_GET(bcm6753_nand), &dev); + if (ret && ret != -ENODEV) + pr_err("Failed to initialize %s. (error %d)\n", dev->name, + ret); +}
On Fri, Feb 11, 2022 at 07:18:36PM +0100, Philippe Reynes wrote:
This adds the nand support for chipset bcm6753.
Signed-off-by: Philippe Reynes philippe.reynes@softathome.com
Applied to u-boot/next, thanks!
This IP is also used on some arm SoC, so we allow to use it on arm bcm6753 too.
Signed-off-by: Philippe Reynes philippe.reynes@softathome.com --- drivers/watchdog/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index cabac29053..1f3ca99f9a 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -129,7 +129,8 @@ config WDT_AT91 config WDT_BCM6345 bool "BCM6345 watchdog timer support" depends on WDT && (ARCH_BMIPS || ARCH_BCM68360 || \ - ARCH_BCM6858 || ARCH_BCM63158) + ARCH_BCM6858 || ARCH_BCM63158 || \ + ARCH_BCM6753) help Select this to enable watchdog timer for BCM6345 SoCs. The watchdog timer is stopped when initialized.
On Fri, Feb 11, 2022 at 07:18:37PM +0100, Philippe Reynes wrote:
This IP is also used on some arm SoC, so we allow to use it on arm bcm6753 too.
Signed-off-by: Philippe Reynes philippe.reynes@softathome.com
Applied to u-boot/next, thanks!
This add the initial support of the broadcom reference board bcm96753ref with a bcm6753 SoC.
This board has 1 GB of RAM, 256 MB of flash (nand), 2 USB port, 1 UART, and 4 ethernet ports.
Signed-off-by: Philippe Reynes philippe.reynes@softathome.com --- arch/arm/Kconfig | 1 + arch/arm/dts/Makefile | 3 + arch/arm/dts/bcm96753ref.dts | 80 +++++++++++++++++++++++ board/broadcom/bcm96753ref/Kconfig | 16 +++++ board/broadcom/bcm96753ref/MAINTAINERS | 6 ++ board/broadcom/bcm96753ref/Makefile | 3 + board/broadcom/bcm96753ref/bcm96753ref.c | 40 ++++++++++++ configs/bcm96753ref_ram_defconfig | 81 ++++++++++++++++++++++++ include/configs/broadcom_bcm96753ref.h | 34 ++++++++++ 9 files changed, 264 insertions(+) create mode 100644 arch/arm/dts/bcm96753ref.dts create mode 100644 board/broadcom/bcm96753ref/Kconfig create mode 100644 board/broadcom/bcm96753ref/MAINTAINERS create mode 100644 board/broadcom/bcm96753ref/Makefile create mode 100644 board/broadcom/bcm96753ref/bcm96753ref.c create mode 100644 configs/bcm96753ref_ram_defconfig create mode 100644 include/configs/broadcom_bcm96753ref.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 07a1b713cb..40fb2e1d5c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -2213,6 +2213,7 @@ source "board/armltd/vexpress/Kconfig" source "board/armltd/vexpress64/Kconfig" source "board/cortina/presidio-asic/Kconfig" source "board/broadcom/bcm963158/Kconfig" +source "board/broadcom/bcm96753ref/Kconfig" source "board/broadcom/bcm968360bg/Kconfig" source "board/broadcom/bcm968580xref/Kconfig" source "board/broadcom/bcmns3/Kconfig" diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index c1cec726cf..03f7e91612 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1101,6 +1101,9 @@ dtb-$(CONFIG_ARCH_BCM63158) += \ dtb-$(CONFIG_ARCH_BCM68360) += \ bcm968360bg.dtb
+dtb-$(CONFIG_ARCH_BCM6753) += \ + bcm96753ref.dtb + dtb-$(CONFIG_ARCH_BCM6858) += \ bcm968580xref.dtb
diff --git a/arch/arm/dts/bcm96753ref.dts b/arch/arm/dts/bcm96753ref.dts new file mode 100644 index 0000000000..e27a5b552f --- /dev/null +++ b/arch/arm/dts/bcm96753ref.dts @@ -0,0 +1,80 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Philippe Reynes philippe.reynes@softathome.com + */ + +/dts-v1/; + +#include "bcm6753.dtsi" + +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "Broadcom bcm6753ref"; + compatible = "broadcom,bcm6753ref", "brcm,bcm6753"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; +}; + +&uart0 { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + +&gpio3 { + status = "okay"; +}; + +&gpio4 { + status = "okay"; +}; + +&gpio5 { + status = "okay"; +}; + +&gpio6 { + status = "okay"; +}; + +&gpio7 { + status = "okay"; +}; + +&nand { + status = "okay"; + write-protect = <0>; + #address-cells = <1>; + #size-cells = <0>; + + nandcs@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + brcm,nand-oob-sector-size = <16>; + }; +}; diff --git a/board/broadcom/bcm96753ref/Kconfig b/board/broadcom/bcm96753ref/Kconfig new file mode 100644 index 0000000000..479e790578 --- /dev/null +++ b/board/broadcom/bcm96753ref/Kconfig @@ -0,0 +1,16 @@ +if TARGET_BCM96753REF + +config SYS_VENDOR + default "broadcom" + +config SYS_BOARD + default "bcm96753ref" + +config SYS_CONFIG_NAME + default "broadcom_bcm96753ref" + +endif + +config TARGET_BCM96753REF + bool "Support Broadcom bcm96753ref" + depends on ARCH_BCM6753 diff --git a/board/broadcom/bcm96753ref/MAINTAINERS b/board/broadcom/bcm96753ref/MAINTAINERS new file mode 100644 index 0000000000..be060f5a70 --- /dev/null +++ b/board/broadcom/bcm96753ref/MAINTAINERS @@ -0,0 +1,6 @@ +BROADCOM BCM96753REF +M: Philippe Reynes philippe.reynes@softathome.com +S: Maintained +F: board/broadcom/bcm96753ref +F: include/configs/broadcom_bcm96753ref.h +F: configs/bcm96753ref_ram_defconfig diff --git a/board/broadcom/bcm96753ref/Makefile b/board/broadcom/bcm96753ref/Makefile new file mode 100644 index 0000000000..a1fa2bff86 --- /dev/null +++ b/board/broadcom/bcm96753ref/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y += bcm96753ref.o diff --git a/board/broadcom/bcm96753ref/bcm96753ref.c b/board/broadcom/bcm96753ref/bcm96753ref.c new file mode 100644 index 0000000000..bf78d843aa --- /dev/null +++ b/board/broadcom/bcm96753ref/bcm96753ref.c @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Philippe Reynes philippe.reynes@softathome.com + */ + +#include <common.h> +#include <fdtdec.h> +#include <linux/io.h> +#include <cpu_func.h> + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + if (fdtdec_setup_mem_size_base() != 0) + printf("fdtdec_setup_mem_size_base() has failed\n"); + + return 0; +} + +int dram_init_banksize(void) +{ + fdtdec_setup_memory_banksize(); + + return 0; +} + +int print_cpuinfo(void) +{ + return 0; +} + +void enable_caches(void) +{ + icache_enable(); + dcache_enable(); +} diff --git a/configs/bcm96753ref_ram_defconfig b/configs/bcm96753ref_ram_defconfig new file mode 100644 index 0000000000..4474797e3d --- /dev/null +++ b/configs/bcm96753ref_ram_defconfig @@ -0,0 +1,81 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y +CONFIG_ARCH_BCM6753=y +CONFIG_SYS_TEXT_BASE=0x1000000 +CONFIG_SYS_MALLOC_F_LEN=0x1000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x20000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="bcm96753ref" +CONFIG_ARMV7_LPAE=y +CONFIG_TARGET_BCM96753REF=y +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_SYS_LOAD_ADDR=0x1000000 +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_CIPHER=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +# CONFIG_AUTOBOOT is not set +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_BOOTD is not set +# CONFIG_BOOTM_NETBSD is not set +# CONFIG_BOOTM_PLAN9 is not set +# CONFIG_BOOTM_RTEMS is not set +# CONFIG_BOOTM_VXWORKS is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_CRC32 is not set +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_CLK=y +CONFIG_CMD_GPIO=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MTD=y +CONFIG_CMD_NAND=y +CONFIG_CMD_SPI=y +CONFIG_CMD_WDT=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_CACHE=y +CONFIG_CMD_MTDPARTS=y +CONFIG_CMD_UBI=y +# CONFIG_CMD_UBIFS is not set +# CONFIG_NET is not set +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_BUTTON=y +CONFIG_BUTTON_GPIO=y +CONFIG_CLK=y +CONFIG_BCM6345_GPIO=y +# CONFIG_INPUT is not set +CONFIG_LED=y +CONFIG_LED_BLINK=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +# CONFIG_MMC is not set +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_RAW_NAND=y +CONFIG_NAND_BRCMNAND=y +CONFIG_NAND_BRCMNAND_6753=y +CONFIG_PINCTRL=y +CONFIG_PINCONF=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_DM_SERIAL=y +CONFIG_PL01X_SERIAL=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_SPI_MEM=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_WATCHDOG=y +CONFIG_WDT_BCM6345=y +CONFIG_REGEX=y diff --git a/include/configs/broadcom_bcm96753ref.h b/include/configs/broadcom_bcm96753ref.h new file mode 100644 index 0000000000..c002985cf4 --- /dev/null +++ b/include/configs/broadcom_bcm96753ref.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2022 Philippe Reynes philippe.reynes@softathome.com + */ + +#include <linux/sizes.h> + +/* + * common + */ + +/* UART */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ + 230400, 500000, 1500000 } +/* Memory usage */ +#define CONFIG_SYS_MAXARGS 24 + +/* + * 6853 + */ + +/* RAM */ +#define CONFIG_SYS_SDRAM_BASE 0x00000000 + +/* U-Boot */ +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_16M) + +#ifdef CONFIG_MTD_RAW_NAND +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#endif /* CONFIG_MTD_RAW_NAND */ + +/* + * 96753ref + */
On Fri, Feb 11, 2022 at 07:18:38PM +0100, Philippe Reynes wrote:
This add the initial support of the broadcom reference board bcm96753ref with a bcm6753 SoC.
This board has 1 GB of RAM, 256 MB of flash (nand), 2 USB port, 1 UART, and 4 ethernet ports.
Signed-off-by: Philippe Reynes philippe.reynes@softathome.com
Applied to u-boot/next, thanks!
On Fri, Feb 11, 2022 at 07:18:34PM +0100, Philippe Reynes wrote:
This add the initial support of the broadcom bcm6753 SoC family.
Signed-off-by: Philippe Reynes philippe.reynes@softathome.com
Applied to u-boot/next, thanks!
participants (2)
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Philippe Reynes -
Tom Rini