[U-Boot] [PATCH 1/3] sunxi: sun4i: add missing 912MHz clock divisors
clock divisors table was missing an entry for 912MHz. The same table is used for sun7i where the default boot clock is 912MHz, resulting in A20 boards being overclocked to 960MHz
Signed-off-by: Iain Paton ipaton0@gmail.com --- arch/arm/cpu/armv7/sunxi/clock_sun4i.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c index 49f4032..c720e96 100644 --- a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c +++ b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c @@ -102,6 +102,7 @@ static struct { /* This array must be ordered by frequency. */ { PLL1_CFG(16, 0, 0, 0), 384000000 }, { PLL1_CFG(16, 1, 0, 0), 768000000 }, + { PLL1_CFG(19, 1, 0, 0), 912000000 }, { PLL1_CFG(20, 1, 0, 0), 960000000 }, { PLL1_CFG(21, 1, 0, 0), 1008000000}, { PLL1_CFG(22, 1, 0, 0), 1056000000},
in order to allow for this to be set differently per board, remove the define from the associated soc headers and allow the user to choose a value through a Kconfig setting
Signed-off-by: Iain Paton ipaton0@gmail.com --- board/sunxi/Kconfig | 8 ++++++++ include/configs/sun4i.h | 1 - include/configs/sun5i.h | 1 - include/configs/sun6i.h | 1 - include/configs/sun7i.h | 1 - include/configs/sun8i.h | 1 - 6 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 9d0eb91..d0905a7 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -33,6 +33,14 @@ config MACH_SUN8I
endchoice
+config CLK_FULL_SPEED + int "sunxi cpu clock speed" + default 912000000 if MACH_SUN7I + default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I + ---help--- + Set the cpu clock speed in Hz, valid values 384, 768, 912, 1008 MHz + must be a multiple of 48MHz + config DRAM_CLK int "sunxi dram clock speed" default 312 if MACH_SUN6I || MACH_SUN8I diff --git a/include/configs/sun4i.h b/include/configs/sun4i.h index 1537e53..7cd5c69 100644 --- a/include/configs/sun4i.h +++ b/include/configs/sun4i.h @@ -11,7 +11,6 @@ /* * A10 specific configuration */ -#define CONFIG_CLK_FULL_SPEED 1008000000
#ifdef CONFIG_USB_EHCI #define CONFIG_USB_EHCI_SUNXI diff --git a/include/configs/sun5i.h b/include/configs/sun5i.h index e755531..e0470d4 100644 --- a/include/configs/sun5i.h +++ b/include/configs/sun5i.h @@ -11,7 +11,6 @@ /* * High Level Configuration Options */ -#define CONFIG_CLK_FULL_SPEED 1008000000
#ifdef CONFIG_USB_EHCI #define CONFIG_USB_EHCI_SUNXI diff --git a/include/configs/sun6i.h b/include/configs/sun6i.h index f5e11dd..617c1cd 100644 --- a/include/configs/sun6i.h +++ b/include/configs/sun6i.h @@ -14,7 +14,6 @@ /* * A31 specific configuration */ -#define CONFIG_CLK_FULL_SPEED 1008000000
#ifdef CONFIG_USB_EHCI #define CONFIG_USB_EHCI_SUNXI diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index f817f73..0bb756f 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -12,7 +12,6 @@ /* * A20 specific configuration */ -#define CONFIG_CLK_FULL_SPEED 912000000
#ifdef CONFIG_USB_EHCI #define CONFIG_USB_EHCI_SUNXI diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h index 3bdedb3..79796d7 100644 --- a/include/configs/sun8i.h +++ b/include/configs/sun8i.h @@ -12,7 +12,6 @@ /* * A23 specific configuration */ -#define CONFIG_CLK_FULL_SPEED 1008000000
#ifdef CONFIG_USB_EHCI #define CONFIG_USB_EHCI_SUNXI
Hi,
On 27-03-15 01:12, Iain Paton wrote:
in order to allow for this to be set differently per board, remove the define from the associated soc headers and allow the user to choose a value through a Kconfig setting
Signed-off-by: Iain Paton ipaton0@gmail.com
Thanks, but if we're going to do this, then can you please rename CLK_FULL_SPEED to SYS_CLK_FREQ, as that is already defined in
./Kconfig
Change the "depends on ARC" in .Kconfig to "depends on ARC || ARCH_SUNXI", and add an entry for it to board/sunxi/Kconfig only setting a default, like we do for SYS_CONFIG_NAME / SYS_BOARD / SYS_SOC already
Regards,
Hans
board/sunxi/Kconfig | 8 ++++++++ include/configs/sun4i.h | 1 - include/configs/sun5i.h | 1 - include/configs/sun6i.h | 1 - include/configs/sun7i.h | 1 - include/configs/sun8i.h | 1 - 6 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 9d0eb91..d0905a7 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -33,6 +33,14 @@ config MACH_SUN8I
endchoice
+config CLK_FULL_SPEED
- int "sunxi cpu clock speed"
- default 912000000 if MACH_SUN7I
- default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
- ---help---
- Set the cpu clock speed in Hz, valid values 384, 768, 912, 1008 MHz
- must be a multiple of 48MHz
- config DRAM_CLK int "sunxi dram clock speed" default 312 if MACH_SUN6I || MACH_SUN8I
diff --git a/include/configs/sun4i.h b/include/configs/sun4i.h index 1537e53..7cd5c69 100644 --- a/include/configs/sun4i.h +++ b/include/configs/sun4i.h @@ -11,7 +11,6 @@ /*
- A10 specific configuration
*/ -#define CONFIG_CLK_FULL_SPEED 1008000000
#ifdef CONFIG_USB_EHCI #define CONFIG_USB_EHCI_SUNXI diff --git a/include/configs/sun5i.h b/include/configs/sun5i.h index e755531..e0470d4 100644 --- a/include/configs/sun5i.h +++ b/include/configs/sun5i.h @@ -11,7 +11,6 @@ /*
- High Level Configuration Options
*/ -#define CONFIG_CLK_FULL_SPEED 1008000000
#ifdef CONFIG_USB_EHCI #define CONFIG_USB_EHCI_SUNXI diff --git a/include/configs/sun6i.h b/include/configs/sun6i.h index f5e11dd..617c1cd 100644 --- a/include/configs/sun6i.h +++ b/include/configs/sun6i.h @@ -14,7 +14,6 @@ /*
- A31 specific configuration
*/ -#define CONFIG_CLK_FULL_SPEED 1008000000
#ifdef CONFIG_USB_EHCI #define CONFIG_USB_EHCI_SUNXI diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index f817f73..0bb756f 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -12,7 +12,6 @@ /*
- A20 specific configuration
*/ -#define CONFIG_CLK_FULL_SPEED 912000000
#ifdef CONFIG_USB_EHCI #define CONFIG_USB_EHCI_SUNXI diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h index 3bdedb3..79796d7 100644 --- a/include/configs/sun8i.h +++ b/include/configs/sun8i.h @@ -12,7 +12,6 @@ /*
- A23 specific configuration
*/ -#define CONFIG_CLK_FULL_SPEED 1008000000
#ifdef CONFIG_USB_EHCI #define CONFIG_USB_EHCI_SUNXI
On 27/03/15 13:57, Hans de Goede wrote:
Hi,
On 27-03-15 01:12, Iain Paton wrote:
in order to allow for this to be set differently per board, remove the define from the associated soc headers and allow the user to choose a value through a Kconfig setting
Signed-off-by: Iain Paton ipaton0@gmail.com
Thanks, but if we're going to do this, then can you please rename CLK_FULL_SPEED to SYS_CLK_FREQ, as that is already defined in
./Kconfig
Sure thing, I'd missed that there was already a suitable variable. Updated version on the way.
Rgds, Iain
following kernel patches to reduce the cpu clock to 912MHz due to reported instability at 1008MHz, select 912MHz as the boot speed for the a10-lime
Signed-off-by: Iain Paton ipaton0@gmail.com --- configs/A10-OLinuXino-Lime_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig index 48a0705..d017e36 100644 --- a/configs/A10-OLinuXino-Lime_defconfig +++ b/configs/A10-OLinuXino-Lime_defconfig @@ -7,3 +7,4 @@ CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=480 CONFIG_DRAM_ZQ=123 CONFIG_DRAM_EMR1=4 +CONFIG_CLK_FULL_SPEED=912000000
On Fri, 2015-03-27 at 00:10 +0000, Iain Paton wrote:
clock divisors table was missing an entry for 912MHz. The same table is used for sun7i where the default boot clock is 912MHz, resulting in A20 boards being overclocked to 960MHz
Apart from the missing entry, should it not be the case that we pick the highest frequency <= than the requested frequency, rather than the next available (potentially higher) frequency?
IOW I'd expect things to be underclocked at 768MHz without this change, which would mean that clock_set_pll1 is buggy.
Ian.
Signed-off-by: Iain Paton ipaton0@gmail.com
arch/arm/cpu/armv7/sunxi/clock_sun4i.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c index 49f4032..c720e96 100644 --- a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c +++ b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c @@ -102,6 +102,7 @@ static struct { /* This array must be ordered by frequency. */ { PLL1_CFG(16, 0, 0, 0), 384000000 }, { PLL1_CFG(16, 1, 0, 0), 768000000 },
- { PLL1_CFG(19, 1, 0, 0), 912000000 }, { PLL1_CFG(20, 1, 0, 0), 960000000 }, { PLL1_CFG(21, 1, 0, 0), 1008000000}, { PLL1_CFG(22, 1, 0, 0), 1056000000},
On 27/03/15 14:04, Ian Campbell wrote:
On Fri, 2015-03-27 at 00:10 +0000, Iain Paton wrote:
clock divisors table was missing an entry for 912MHz. The same table is used for sun7i where the default boot clock is 912MHz, resulting in A20 boards being overclocked to 960MHz
Apart from the missing entry, should it not be the case that we pick the highest frequency <= than the requested frequency, rather than the next available (potentially higher) frequency?
IOW I'd expect things to be underclocked at 768MHz without this change, which would mean that clock_set_pll1 is buggy.
Perhaps, however the selection algorithm is so trivial that I have difficulty beleiving that picking next highest was anything other than deliberate and the intended outcome.
I'll send a revised version that changes it to next lowest.
Rgds, Iain
participants (3)
-
Hans de Goede -
Iain Paton -
Ian Campbell