[PATCH] pinctrl: sunxi: add SPI1 pinmuxes for f1c100s

SPI1 is also usable on port A.
But there's nothing about SPI1 pinmux there for now.
This should be set when you are using SPI1.
According to the manual, the mux value would be 6.
Signed-off-by: Iota Hydrae writeforever@foxmail.com --- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c index e5102180902..c448e40ab07 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c @@ -240,6 +240,7 @@ static const struct sunxi_pinctrl_function suniv_f1c100s_pinctrl_functions[] = { { "mmc0", 2 }, /* PF0-PF5 */ { "mmc1", 3 }, /* PC0-PC2 */ { "spi0", 2 }, /* PC0-PC3 */ + { "spi1", 6 }, /* PA0-PA3 */ #if IS_ENABLED(CONFIG_UART0_PORT_F) { "uart0", 3 }, /* PF2-PF4 */ #else

On Wed, 23 Aug 2023 14:47:16 +0800 Iota Hydrae writeforever@foxmail.com wrote:
Hi,
SPI1 is also usable on port A.
But there's nothing about SPI1 pinmux there for now.
This should be set when you are using SPI1.
According to the manual, the mux value would be 6.
So technically that looks alright, but what do you need that for? We try to not add pinmux values to that table unless they are used somewhere, especially if there are potential conflicting values: SPI1 on PE is on pinmux 4. So do you have a board that needs that? Any chance you could upstream the DT (to the kernel list!) and defconfig for that board? That would it make it a no-brainer to merge this patch.
Cheers, Andre
Signed-off-by: Iota Hydrae writeforever@foxmail.com
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c index e5102180902..c448e40ab07 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c @@ -240,6 +240,7 @@ static const struct sunxi_pinctrl_function suniv_f1c100s_pinctrl_functions[] = { { "mmc0", 2 }, /* PF0-PF5 */ { "mmc1", 3 }, /* PC0-PC2 */ { "spi0", 2 }, /* PC0-PC3 */
- { "spi1", 6 }, /* PA0-PA3 */
#if IS_ENABLED(CONFIG_UART0_PORT_F) { "uart0", 3 }, /* PF2-PF4 */ #else
participants (2)
-
Andre Przywara
-
Iota Hydrae