[U-Boot] [PATCH v3 1/3] SECURE_BOOT: Unify memory map for Layerscape based platforms
Unify memory map for Layerscape based platforms. This patch includes changes in bootscript, bootscript header and PPA header addresses change as per unified memory map.
Signed-off-by: Sumit Garg sumit.garg@nxp.com Tested-by: Vinitha Pillai vinitha.pillai@nxp.com ---
Changes in v3: Rebasing of the patch on top commit. This patch supersedes https://patchwork.ozlabs.org/patch/756260/
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 12 +++---- arch/arm/include/asm/fsl_secure_boot.h | 54 +++++++++++++------------------ 2 files changed, 28 insertions(+), 38 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 5825f9b..b7549a0 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -194,12 +194,12 @@ config SYS_LS_PPA_FW_ADDR config SYS_LS_PPA_ESBC_ADDR hex "hdr address of PPA firmware loading from" depends on FSL_LS_PPA && CHAIN_OF_TRUST - default 0x600c0000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1043A - default 0x40740000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1046A - default 0x40480000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1012A - default 0x580c40000 if SYS_LS_PPA_FW_IN_XIP && FSL_LSCH3 - default 0x700000 if SYS_LS_PPA_FW_IN_MMC - default 0x700000 if SYS_LS_PPA_FW_IN_NAND + default 0x60680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1043A + default 0x40680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1046A + default 0x40680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1012A + default 0x580680000 if SYS_LS_PPA_FW_IN_XIP && FSL_LSCH3 + default 0x680000 if SYS_LS_PPA_FW_IN_MMC + default 0x680000 if SYS_LS_PPA_FW_IN_NAND help If the PPA header firmware locate at XIP flash, such as NOR or QSPI flash, this address is a directly memory-mapped. diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index b0b3b93..63845a2 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -1,5 +1,6 @@ /* * Copyright 2015 Freescale Semiconductor, Inc. + * Copyright 2017 NXP * * SPDX-License-Identifier: GPL-2.0+ */ @@ -71,55 +72,44 @@ * DDR memory map */ #ifdef CONFIG_FSL_LSCH3 -#define CONFIG_BS_HDR_ADDR_DEVICE 0x580d00000 -#define CONFIG_BS_ADDR_DEVICE 0x580e00000 -#define CONFIG_BS_HDR_ADDR_RAM 0xa0d00000 -#define CONFIG_BS_ADDR_RAM 0xa0e00000 -#define CONFIG_BS_HDR_SIZE 0x00002000 +#define CONFIG_BS_ADDR_DEVICE 0x580600000 +#define CONFIG_BS_HDR_ADDR_DEVICE 0x580640000 #define CONFIG_BS_SIZE 0x00001000 +#define CONFIG_BS_HDR_SIZE 0x00004000 +#define CONFIG_BS_ADDR_RAM 0xa0600000 +#define CONFIG_BS_HDR_ADDR_RAM 0xa0640000 #else #ifdef CONFIG_SD_BOOT /* For SD boot address and size are assigned in terms of sector * offset and no. of sectors respectively. */ -#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) -#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000920 -#else -#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000900 -#endif -#define CONFIG_BS_ADDR_DEVICE 0x00000940 -#define CONFIG_BS_HDR_SIZE 0x00000010 +#define CONFIG_BS_ADDR_DEVICE 0x00003000 +#define CONFIG_BS_HDR_ADDR_DEVICE 0x00003200 #define CONFIG_BS_SIZE 0x00000008 +#define CONFIG_BS_HDR_SIZE 0x00000010 #elif defined(CONFIG_NAND_BOOT) -#define CONFIG_BS_HDR_ADDR_DEVICE 0x00800000 -#define CONFIG_BS_ADDR_DEVICE 0x00802000 -#define CONFIG_BS_HDR_SIZE 0x00002000 -#define CONFIG_BS_SIZE 0x00001000 -#elif defined(CONFIG_QSPI_BOOT) -#ifdef CONFIG_ARCH_LS1046A -#define CONFIG_BS_HDR_ADDR_DEVICE 0x40780000 -#define CONFIG_BS_ADDR_DEVICE 0x40800000 -#elif defined(CONFIG_ARCH_LS1012A) -#define CONFIG_BS_HDR_ADDR_DEVICE 0x400c0000 -#define CONFIG_BS_ADDR_DEVICE 0x40060000 -#else -#error "Platform not supported" -#endif +#define CONFIG_BS_ADDR_DEVICE 0x00600000 +#define CONFIG_BS_HDR_ADDR_DEVICE 0x00640000 +#define CONFIG_BS_SIZE 0x00001000 #define CONFIG_BS_HDR_SIZE 0x00002000 +#elif defined(CONFIG_QSPI_BOOT) +#define CONFIG_BS_ADDR_DEVICE 0x40600000 +#define CONFIG_BS_HDR_ADDR_DEVICE 0x40640000 #define CONFIG_BS_SIZE 0x00001000 -#else /* Default NOR Boot */ -#define CONFIG_BS_HDR_ADDR_DEVICE 0x600a0000 -#define CONFIG_BS_ADDR_DEVICE 0x60060000 #define CONFIG_BS_HDR_SIZE 0x00002000 +#else /* Default NOR Boot */ +#define CONFIG_BS_ADDR_DEVICE 0x60600000 +#define CONFIG_BS_HDR_ADDR_DEVICE 0x60640000 #define CONFIG_BS_SIZE 0x00001000 +#define CONFIG_BS_HDR_SIZE 0x00002000 #endif -#define CONFIG_BS_HDR_ADDR_RAM 0x81000000 -#define CONFIG_BS_ADDR_RAM 0x81020000 +#define CONFIG_BS_ADDR_RAM 0x81000000 +#define CONFIG_BS_HDR_ADDR_RAM 0x81020000 #endif
#ifdef CONFIG_BOOTSCRIPT_COPY_RAM -#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM #define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM +#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM #else #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_DEVICE /* BOOTSCRIPT_ADDR is not required */
From: Udit Agarwal udit.agarwal@nxp.com
Adds header address for PPA to be validated during ESBC phase for ARCH_LS2088 and QSPI_BOOT.
Moves sec_init prior to ppa_init as for validation of PPA, sec must be initialised before the PPA is initialised.
Signed-off-by: Udit Agarwal udit.agarwal@nxp.com ---
Changes in v3: Rebasing of the patches on the top commit and removes conflict on CONFIG_EXTRA_ENV_SETTINGS. This patch supersedes https://patchwork.ozlabs.org/patch/767679/
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 3 ++- arch/arm/include/asm/fsl_secure_boot.h | 5 +++++ board/freescale/ls2080aqds/ls2080aqds.c | 7 +++---- board/freescale/ls2080ardb/ls2080ardb.c | 4 ++++ 4 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index b7549a0..f14b1c8 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -197,7 +197,8 @@ config SYS_LS_PPA_ESBC_ADDR default 0x60680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1043A default 0x40680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1046A default 0x40680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1012A - default 0x580680000 if SYS_LS_PPA_FW_IN_XIP && FSL_LSCH3 + default 0x20680000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT && ARCH_LS2080A + default 0x580680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A default 0x680000 if SYS_LS_PPA_FW_IN_MMC default 0x680000 if SYS_LS_PPA_FW_IN_NAND help diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index 63845a2..ec6463d 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -72,8 +72,13 @@ * DDR memory map */ #ifdef CONFIG_FSL_LSCH3 +#ifdef CONFIG_QSPI_BOOT +#define CONFIG_BS_ADDR_DEVICE 0x20600000 +#define CONFIG_BS_HDR_ADDR_DEVICE 0x20640000 +#else /* NOR BOOT */ #define CONFIG_BS_ADDR_DEVICE 0x580600000 #define CONFIG_BS_HDR_ADDR_DEVICE 0x580640000 +#endif /*ifdef CONFIG_QSPI_BOOT */ #define CONFIG_BS_SIZE 0x00001000 #define CONFIG_BS_HDR_SIZE 0x00004000 #define CONFIG_BS_ADDR_RAM 0xa0600000 diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c index f36fb98..be4e8ee 100644 --- a/board/freescale/ls2080aqds/ls2080aqds.c +++ b/board/freescale/ls2080aqds/ls2080aqds.c @@ -226,15 +226,14 @@ int board_init(void) #endif select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); rtc_enable_32khz_output(); +#ifdef CONFIG_FSL_CAAM + sec_init(); +#endif
#ifdef CONFIG_FSL_LS_PPA ppa_init(); #endif
-#ifdef CONFIG_FSL_CAAM - sec_init(); -#endif - return 0; }
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index df2d768..4c42c73 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -231,6 +231,10 @@ int board_init(void) #ifdef CONFIG_FSL_QIXIS QIXIS_WRITE(rst_ctl, QIXIS_RST_CTL_RESET_EN); #endif + +#ifdef CONFIG_FSL_CAAM + sec_init(); +#endif #ifdef CONFIG_FSL_LS_PPA ppa_init(); #endif
On 08/15/2017 09:45 PM, Sumit Garg wrote:
From: Udit Agarwal udit.agarwal@nxp.com
Adds header address for PPA to be validated during ESBC phase for ARCH_LS2088 and QSPI_BOOT.
Moves sec_init prior to ppa_init as for validation of PPA, sec must be initialised before the PPA is initialised.
Signed-off-by: Udit Agarwal udit.agarwal@nxp.com
Changes in v3: Rebasing of the patches on the top commit and removes conflict on CONFIG_EXTRA_ENV_SETTINGS. This patch supersedes https://patchwork.ozlabs.org/patch/767679/
Slightly revised commit message. Applied to fsl-qoriq master. Thanks.
York
From: Udit Agarwal udit.agarwal@nxp.com
Add the secure boot defconfig for QSPI boot on LS2088ARDB platform.
Signed-off-by: Udit Agarwal udit.agarwal@nxp.com ---
Changes in v3: Rebasing of the patch on top commit. This patch supersedes https://patchwork.ozlabs.org/patch/767680/
board/freescale/ls2080ardb/MAINTAINERS | 5 +++ configs/ls2088ardb_qspi_SECURE_BOOT_defconfig | 48 +++++++++++++++++++++++++++ 2 files changed, 53 insertions(+) create mode 100644 configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
diff --git a/board/freescale/ls2080ardb/MAINTAINERS b/board/freescale/ls2080ardb/MAINTAINERS index 91f13ea..8da1c6d 100644 --- a/board/freescale/ls2080ardb/MAINTAINERS +++ b/board/freescale/ls2080ardb/MAINTAINERS @@ -21,3 +21,8 @@ LS2080A_SECURE_BOOT BOARD M: Saksham Jain saksham.jain@nxp.freescale.com S: Maintained F: configs/ls2080ardb_SECURE_BOOT_defconfig + +LS2088A_QSPI_SECURE_BOOT BOARD +M: Udit Agarwal udit.agarwal@nxp.com +S: Maintained +F: configs/ls2088ardb_qspi_SECURE_BOOT_defconfig diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig new file mode 100644 index 0000000..05c799d --- /dev/null +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig @@ -0,0 +1,48 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS2080ARDB=y +CONFIG_FSL_LS_PPA=y +CONFIG_QSPI_AHB_INIT=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" +# CONFIG_SYS_MALLOC_F is not set +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_QSPI_BOOT=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_BOOTDELAY=10 +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_GREPENV=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_CACHE=y +CONFIG_OF_CONTROL=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y +CONFIG_FSL_CAAM=y +CONFIG_DM_SPI_FLASH=y +CONFIG_PHYLIB=y +CONFIG_NETDEVICES=y +CONFIG_PHY_GIGE=y +CONFIG_E1000=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE=y +CONFIG_SYS_NS16550=y +CONFIG_DM_SPI=y +CONFIG_FSL_DSPI=y +CONFIG_FSL_QSPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_STORAGE=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_SECURE_BOOT=y +CONFIG_RSA=y +CONFIG_RSA_SOFTWARE_EXP=y
On 08/15/2017 09:45 PM, Sumit Garg wrote:
From: Udit Agarwal udit.agarwal@nxp.com
Add the secure boot defconfig for QSPI boot on LS2088ARDB platform.
Signed-off-by: Udit Agarwal udit.agarwal@nxp.com
Changes in v3: Rebasing of the patch on top commit. This patch supersedes https://patchwork.ozlabs.org/patch/767680/
Dropped redundant commit message. Applied to fsl-qoriq master. Thanks.
York
On 08/15/2017 09:45 PM, Sumit Garg wrote:
Unify memory map for Layerscape based platforms. This patch includes changes in bootscript, bootscript header and PPA header addresses change as per unified memory map.
Signed-off-by: Sumit Garg sumit.garg@nxp.com Tested-by: Vinitha Pillai vinitha.pillai@nxp.com
Changes in v3: Rebasing of the patch on top commit. This patch supersedes https://patchwork.ozlabs.org/patch/756260/
Applied to fsl-qoriq master. Thanks.
York
participants (2)
-
Sumit Garg -
York Sun