[U-Boot-Users] [PATCH 1/3] ppc_4xx: Add MCU25 board. Infrastructure
Modify global files to include new PPC405GPr based MCU25 board
Signed-off-by: Niklaus Giger niklaus.giger@netstal.com --- MAINTAINERS | 1 + MAKEALL | 1 + Makefile | 3 +++ 3 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS index c2c7075..e5449d8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -172,6 +172,7 @@ Matthias Fuchs matthias.fuchs@esd-electronics.com Niklaus Giger niklaus.giger@netstal.com
HCU4 PPC405GPr + MCU25 PPC405GPr HCU5 PPC440EPx
Frank Gottschling fgottschling@eltec.de diff --git a/MAKEALL b/MAKEALL index a7a335f..2661442 100755 --- a/MAKEALL +++ b/MAKEALL @@ -198,6 +198,7 @@ LIST_4xx=" \ luan \ lwmon5 \ makalu \ + mcu25 \ METROBOX \ MIP405 \ MIP405T \ diff --git a/Makefile b/Makefile index 647271b..4586387 100644 --- a/Makefile +++ b/Makefile @@ -1268,6 +1268,9 @@ lwmon5_config: unconfig makalu_config: unconfig @$(MKCONFIG) $(@:_config=) ppc ppc4xx makalu amcc
+mcu25_config: unconfig + @$(MKCONFIG) $(@:_config=) ppc ppc4xx mcu25 netstal + METROBOX_config: unconfig @$(MKCONFIG) $(@:_config=) ppc ppc4xx metrobox sandburst
Config for Netstal PPC405GPr based MCU25 board.
Signed-off-by: Niklaus Giger niklaus.giger@netstal.com --- include/configs/mcu25.h | 365 +++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 365 insertions(+), 0 deletions(-) create mode 100644 include/configs/mcu25.h
diff --git a/include/configs/mcu25.h b/include/configs/mcu25.h new file mode 100644 index 0000000..b0873a9 --- /dev/null +++ b/include/configs/mcu25.h @@ -0,0 +1,365 @@ +/* + *(C) Copyright 2005-2007 Netstal Maschinen AG + * Niklaus Giger (Niklaus.Giger@netstal.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/************************************************************************ + * mcu25.h - configuration for MCU25 board (similar to hcu4.h) + ***********************************************************************/ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/*----------------------------------------------------------------------- + * High Level Configuration Options + *----------------------------------------------------------------------*/ +#define CONFIG_MCU25 1 /* Board is MCU25 */ +#define CONFIG_4xx 1 /* ... PPC4xx family */ +#define CONFIG_405GPr 1 /* MCU25 has a 405GPr */ +#define CONFIG_405GP 1 +#define CONFIG_4xx 1 + +#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ + +#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ +#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ + +/*----------------------------------------------------------------------- + * Base addresses -- Note these are effective addresses where the + * actual resources get mapped (not physical addresses) +*----------------------------------------------------------------------*/ +#define CFG_MONITOR_LEN (320 * 1024) /* Reserve 320 kB for Monitor */ +#define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ + + +#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */ +#define CFG_FLASH_BASE 0xfff80000 /* start of FLASH */ +#define CFG_MONITOR_BASE TEXT_BASE + +/* ... with on-chip memory here (4KBytes) */ +#define CFG_OCM_DATA_ADDR 0xF4000000 +#define CFG_OCM_DATA_SIZE 0x00001000 +/* Do not set up locked dcache as init ram. */ +#undef CFG_INIT_DCACHE_CS + +/* Use the On-Chip-Memory (OCM) as a temporary stack for the startup code. */ +#define CFG_TEMP_STACK_OCM 1 + +#define CFG_INIT_RAM_ADDR CFG_OCM_DATA_ADDR /* OCM */ +#define CFG_INIT_RAM_END CFG_OCM_DATA_SIZE +#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */ +#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) +#define CFG_INIT_SP_OFFSET CFG_POST_WORD_ADDR + +/*----------------------------------------------------------------------- + * Serial Port + *----------------------------------------------------------------------*/ +/* + * If CFG_EXT_SERIAL_CLOCK, then the UART divisor is 1. + * If CFG_405_UART_ERRATA_59, then UART divisor is 31. + * Otherwise, UART divisor is determined by CPU Clock and CFG_BASE_BAUD value. + * The Linux BASE_BAUD define should match this configuration. + * baseBaud = cpuClock/(uartDivisor*16) + * If CFG_405_UART_ERRATA_59 and 200MHz CPU clock, + * set Linux BASE_BAUD to 403200. + */ +#undef CFG_EXT_SERIAL_CLOCK /* external serial clock */ +#define CONFIG_SERIAL_MULTI 1 +/* needed to be able to define CONFIG_SERIAL_SOFTWARE_FIFO */ +#undef CFG_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */ +#define CFG_BASE_BAUD 691200 + +/* Size (bytes) of interrupt driven serial port buffer. + * Set to 0 to use polling instead of interrupts. + * Setting to 0 will also disable RTS/CTS handshaking. + */ +#undef CONFIG_SERIAL_SOFTWARE_FIFO + +/* Set console baudrate to 9600 */ +#define CONFIG_BAUDRATE 9600 + + +#define CFG_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} + +/*----------------------------------------------------------------------- + * Flash + *----------------------------------------------------------------------*/ + +#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CFG_MAX_FLASH_SECT 8 /* max number of sectors on one chip */ + +#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ + +#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ +#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ + +/*----------------------------------------------------------------------- + * Environment + *----------------------------------------------------------------------*/ + +#undef CFG_ENV_IS_IN_NVRAM +#define CFG_ENV_IS_IN_FLASH +#undef CFG_ENV_IS_IN_EEPROM +#undef CFG_ENV_IS_NOWHERE + +#ifdef CFG_ENV_IS_IN_EEPROM +/* Put the environment after the SDRAM configuration */ +#define PROM_SIZE 2048 +#define CFG_ENV_OFFSET 512 +#define CFG_ENV_SIZE (PROM_SIZE-CFG_ENV_OFFSET) +#endif + +#ifdef CFG_ENV_IS_IN_FLASH +/* Put the environment in Flash */ +#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ +#define CFG_ENV_ADDR ((-CFG_MONITOR_LEN)-CFG_ENV_SECT_SIZE) +#define CFG_ENV_SIZE 8*1024 /* 8 KB Environment Sector */ + +/* Address and size of Redundant Environment Sector */ +#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE) +#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) +#endif + +/*----------------------------------------------------------------------- + * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the + * the first internal I2C controller of the PPC440EPx + *----------------------------------------------------------------------*/ +#define CFG_SPD_BUS_NUM 0 + +#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ +#undef CONFIG_SOFT_I2C /* I2C bit-banged */ +#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CFG_I2C_SLAVE 0x7F + +/* This is the 7bit address of the device, not including P. */ +#define CFG_I2C_EEPROM_ADDR 0x50 +#define CFG_I2C_EEPROM_ADDR_LEN 1 + +/* The EEPROM can do 16byte ( 1 << 4 ) page writes. */ +#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07 +#define CFG_EEPROM_PAGE_WRITE_BITS 4 +#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 +#define CFG_EEPROM_PAGE_WRITE_ENABLE +#undef CFG_I2C_MULTI_EEPROMS + + +#define CONFIG_PREBOOT "echo;" \ + "echo Type "run flash_nfs" to mount root filesystem over NFS;" \ + "echo" + +#undef CONFIG_BOOTARGS + +/* Setup some board specific values for the default environment variables */ +#define CONFIG_HOSTNAME mcu25 +#define CONFIG_IPADDR 172.25.1.99 +#define CONFIG_ETHADDR 00:60:13:00:00:00 /* Netstal Machines AG MAC */ +#define CONFIG_OVERWRITE_ETHADDR_ONCE +#define CONFIG_SERVERIP 172.25.1.3 + +#define CFG_TFTP_LOADADDR 0x01000000 /* @16 MB */ + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "loadaddr=0x01000000\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "ramargs=setenv bootargs root=/dev/ram rw\0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off panic=1\0" \ + "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\ + "nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \ + "bootm\0" \ + "rootpath=/home/diagnose/eldk/ppc_4xx\0" \ + "bootfile=/tftpboot/mcu25/uImage\0" \ + "load=tftp 100000 mcu25/u-boot.bin\0" \ + "update=protect off FFFB0000 FFFFFFFF;era FFFB0000 FFFFFFFF;" \ + "cp.b 100000 FFFB0000 50000\0" \ + "upd=run load;run update\0" \ + "vx=tftp ${loadaddr} mcu25/mcu25_vx_rom;" \ + "setenv bootargs emac(0,0)c:mcu25/mcu25_vx_rom e=${ipaddr} " \ + " h=${serverip} u=dpu pw=netstal8752 tn=mcu25 f=0x3008;" \ + "bootvx ${loadaddr}\0" \ + "" +#define CONFIG_BOOTCOMMAND "run vx" + +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ + +#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ +#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ + +#define CONFIG_MII 1 /* MII PHY management */ +#define CONFIG_PHY_ADDR 1 /* PHY address */ + +#define CONFIG_PHY_RESET 1 /* reset phy upon startup */ + +#define CONFIG_HAS_ETH0 +#define CFG_RX_ETH_BUFFER 16 /* Number of ethernet rx buffers & descr */ + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_CMD_PING +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SDRAM + +/* SPD EEPROM (sdram speed config) disabled */ +#define CONFIG_SPD_EEPROM 1 +#define SPD_EEPROM_ADDRESS 0x50 + +/* POST support */ +#define CONFIG_POST (CFG_POST_MEMORY | \ + CFG_POST_CPU | \ + CFG_POST_UART | \ + CFG_POST_I2C | \ + CFG_POST_CACHE | \ + CFG_POST_ETHER | \ + CFG_POST_SPR) + +#define CFG_POST_UART_TABLE {UART0_BASE} +#define CFG_POST_WORD_ADDR (CFG_GBL_DATA_OFFSET - 0x4) +#define CFG_POST_CACHE_ADDR 0x00800000 /* free virtual address */ +#define CFG_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */ + +/*----------------------------------------------------------------------- + * Miscellaneous configurable options + *----------------------------------------------------------------------*/ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "=> " /* Monitor Command Prompt */ +#if defined(CONFIG_CMD_KGDB) + #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#else + #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_MEMTEST_START 0x0400000 /* memtest works on */ +#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ + + +#define CFG_LOAD_ADDR 0x100000 /* default load address */ +#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ + +#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ + +#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_LOOPW 1 /* enable loopw command */ +#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ + +/*----------------------------------------------------------------------- + * External Bus Controller (EBC) Setup + */ + +#define CFG_EBC_CFG 0x98400000 + +/* Memory Bank 0 (Flash Bank 0) initialization */ +#define CFG_EBC_PB0AP 0x02005400 +#define CFG_EBC_PB0CR 0xFFF18000 /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit*/ + +#define CFG_EBC_PB1AP 0x03041200 +#define CFG_EBC_PB1CR 0x7009A000 /* BAS=,BS=MB,BU=R/W,BW=bit */ + +#define CFG_EBC_PB2AP 0x01845200u /* BAS=,BS=MB,BU=R/W,BW=bit */ +#define CFG_EBC_PB2CR 0x7A09A000u + +#define CFG_EBC_PB3AP 0x01845200u /* BAS=,BS=MB,BU=R/W,BW=bit */ +#define CFG_EBC_PB3CR 0x7B09A000u + +#define CFG_EBC_PB4AP 0x01845200u /* BAS=,BS=MB,BU=R/W,BW=bit */ +#define CFG_EBC_PB4CR 0x7C09A000u + +#define CFG_EBC_PB5AP 0x00800200u +#define CFG_EBC_PB5CR 0x7D81A000u + +#define CFG_EBC_PB6AP 0x01040200u +#define CFG_EBC_PB6CR 0x7D91A000u + +#define CFG_GPIO0_OR 0x087FFFFF /* GPIO value */ +#define CFG_GPIO0_TCR 0x7FFF8000 /* GPIO value */ +#define CFG_GPIO0_ODR 0xFFFF0000 /* GPIO value */ +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ + +/* Init Memory Controller: + * + * BR0/1 and OR0/1 (FLASH) + */ + +#define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */ +#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */ + + +/* Configuration Port location */ +#define CONFIG_PORT_ADDR 0xF0000500 + +/* + * Internal Definitions + * + * Boot Flags + */ +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +#define CFG_HUSH_PARSER /* use "hush" command parser */ +#ifdef CFG_HUSH_PARSER +#define CFG_PROMPT_HUSH_PS2 "> " +#endif + +#if defined(CONFIG_CMD_KGDB) +#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ +#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ +#endif + +/* pass open firmware flat tree */ +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 + +#endif /* __CONFIG_H */ +
Add PPC405GPr based MCU25 board from Netstal.
Signed-off-by: Niklaus Giger niklaus.giger@netstal.com --- board/netstal/mcu25/Makefile | 60 +++++++++++ board/netstal/mcu25/README.txt | 60 +++++++++++ board/netstal/mcu25/config.mk | 29 ++++++ board/netstal/mcu25/config.mk~ | 29 ++++++ board/netstal/mcu25/makefile~ | 56 +++++++++++ board/netstal/mcu25/mcu25.c | 212 ++++++++++++++++++++++++++++++++++++++++ board/netstal/mcu25/mcu25.c~ | 212 ++++++++++++++++++++++++++++++++++++++++ board/netstal/mcu25/u-boot.lds | 141 ++++++++++++++++++++++++++ 8 files changed, 799 insertions(+), 0 deletions(-) create mode 100644 board/netstal/mcu25/Makefile create mode 100644 board/netstal/mcu25/README.txt create mode 100644 board/netstal/mcu25/config.mk create mode 100644 board/netstal/mcu25/config.mk~ create mode 100644 board/netstal/mcu25/makefile~ create mode 100644 board/netstal/mcu25/mcu25.c create mode 100644 board/netstal/mcu25/mcu25.c~ create mode 100644 board/netstal/mcu25/u-boot.lds
diff --git a/board/netstal/mcu25/Makefile b/board/netstal/mcu25/Makefile new file mode 100644 index 0000000..f367f34 --- /dev/null +++ b/board/netstal/mcu25/Makefile @@ -0,0 +1,60 @@ +# +# (C) Copyright 2008 Netstal Maschinen AG +# Niklaus Giger (ng@netstal.com) +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +vpath fixed_sdram.c ../common +vpath hcu_flash.c ../common +vpath nm_bsp.c ../common + +# NOBJS : Netstal common objects +NOBJS = fixed_sdram.o hcu_flash.o nm_bsp.o +COBJS = $(BOARD).o +SOBJS = + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) ../common/$(NOBJS:.o=.c) +COBJS = $(BOARD).o +SOBJS = + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) ../common/$(NOBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +NOBJS := $(addprefix $(obj),$(NOBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(OBJS) $(SOBJS) $(NOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) $(NOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### + diff --git a/board/netstal/mcu25/README.txt b/board/netstal/mcu25/README.txt new file mode 100644 index 0000000..0b10342 --- /dev/null +++ b/board/netstal/mcu25/README.txt @@ -0,0 +1,60 @@ +MCU25 Configuration Details + +Memory Bank 0 -- Flash chip +--------------------------- + +0xfff00000 - 0xffffffff + +The flash chip is really only 512Kbytes, but the high address bit of +the 1Meg region is ignored, so the flash is replicated through the +region. Thus, this is consistent with a flash base address 0xfff80000. + +The placement at the end is to be consistent with reset behavior, +where the processor itself initially uses this bus to load the branch +vector and start running. + +On-Chip Memory +-------------- + +0xf4000000 - 0xf4000fff + +The 405GPr includes a 4K on-chip memory that can be placed however +software chooses. I choose to place the memory at this address, to +keep it out of the cachable areas. + + +Internal Peripherals +-------------------- + +0xef600300 - 0xef6008ff + +These are scattered various peripherals internal to the PPC405GPr +chip. + +Chip-Select 2: Flash Memory +--------------------------- + +0x70000000 + +Chip-Select 3: CAN Interface +---------------------------- +0x7800000 + + +Chip-Select 4: IMC-bus standard +------------------------------- + +Our IO-Bus (slow version) + + +Chip-Select 5: IMC-bus fast (inactive) +-------------------------------------- + +Our IO-Bus (fast, but not yet use) + + +Memory Bank 1 -- SDRAM +------------------------------------- + +0x00000000 - 0x2ffffff # Default 64 MB + diff --git a/board/netstal/mcu25/config.mk b/board/netstal/mcu25/config.mk new file mode 100644 index 0000000..12f61e7 --- /dev/null +++ b/board/netstal/mcu25/config.mk @@ -0,0 +1,29 @@ +# +# (C) Copyright 2005 Netstal Maschinen AG +# Niklaus Giger (ng@netstal.com) +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# Netstal Maschinen AG: MCU25 board +# + +TEXT_BASE = 0xFFFB0000 + +ifeq ($(debug),1) +PLATFORM_CPPFLAGS += -DDEBUG -g +endif + diff --git a/board/netstal/mcu25/config.mk~ b/board/netstal/mcu25/config.mk~ new file mode 100644 index 0000000..2bb8e6d --- /dev/null +++ b/board/netstal/mcu25/config.mk~ @@ -0,0 +1,29 @@ +# +# (C) Copyright 2005 Netstal Maschinen AG +# Niklaus Giger (ng@netstal.com) +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# Netstal Maschinen AG: HCU4 boards +# + +TEXT_BASE = 0xFFFB0000 + +ifeq ($(debug),1) +PLATFORM_CPPFLAGS += -DDEBUG -g +endif + diff --git a/board/netstal/mcu25/makefile~ b/board/netstal/mcu25/makefile~ new file mode 100644 index 0000000..7d65343 --- /dev/null +++ b/board/netstal/mcu25/makefile~ @@ -0,0 +1,56 @@ +# +# (C) Copyright 2007 Netstal Maschinen AG +# Niklaus Giger (ng@netstal.com) +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +vpath hcu_flash.c ../common +vpath fixed_sdram.c ../common +vpath nm_bsp.c ../common + +# NOBJS : Netstal common objects +NOBJS = fixed_sdram.o hcu_flash.o nm_bsp.o +COBJS = $(BOARD).o +SOBJS = + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) ../common/$(NOBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +NOBJS := $(addprefix $(obj),$(NOBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(OBJS) $(SOBJS) $(NOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) $(NOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### + diff --git a/board/netstal/mcu25/mcu25.c b/board/netstal/mcu25/mcu25.c new file mode 100644 index 0000000..da1d816 --- /dev/null +++ b/board/netstal/mcu25/mcu25.c @@ -0,0 +1,212 @@ +/* + *(C) Copyright 2005-2008 Netstal Maschinen AG + * Niklaus Giger (Niklaus.Giger@netstal.com) + * + * This source code is free software; you can redistribute it + * and/or modify it in source code form under the terms of the GNU + * General Public License as published by the Free Software + * Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +#include <common.h> +#include <ppc4xx.h> +#include <asm/processor.h> +#include <asm/io.h> +#include <asm-ppc/u-boot.h> +#include "../common/nm.h" + +DECLARE_GLOBAL_DATA_PTR; + +#define MCU25_SLOT_ADDRESS (0x7A000000 + 0x0A) +#define MCU25_DIGITAL_IO_REGISTER (0x7A000000 + 0xc0) + +#define MCU25_LED_REGISTER_ADDRESS (0x7C000000 + 0x10) +#define MCU25_VERSIONS_REGISTER (0x7C000000 + 0x0C) +#define MCU25_IO_CONFIGURATION (0x7C000000 + 0x0e) +#define MCU_SW_INSTALL_REQUESTED 0x08 +#define HW_GENERATION_MCU25 0x09 + +#define SDRAM_LEN 32*1024*1024 /* 32 MB -RAM */ + +#undef DEBUG +/* + * This function is run very early, out of flash, and before devices are + * initialized. It is called by lib_ppc/board.c:board_init_f by virtue + * of being in the init_sequence array. + * + * The SDRAM has been initialized already -- start.S:start called + * init.S:init_sdram early on -- but it is not yet being used for + * anything, not even stack. So be careful. + */ + +#define CPC0_CR0 0xb1 /* Chip control register 0 */ +#define CPC0_CR1 0xb2 /* Chip control register 1 */ +/* Attention: If you want 1 microsecs times from the external oscillator + * 0x00004051 is okay for u-boot/linux, but different from old vxworks values + * 0x00804051 causes problems with u-boot and linux! + */ +#define CPC0_CR0_VALUE 0x0007F03C +#define CPC0_CR1_VALUE 0x00004051 +#define CPC0_ECR 0xaa /* Edge condition register */ +#define EBC0_CFG 0x23 /* External Peripheral Control Register */ +#define CPC0_EIRR 0xb6 /* External Interrupt Register */ + +#if defined(DEBUG) +void show_sdram_registers(void); +#endif +long int fixed_hcu4_sdram (unsigned int dram_size); + +int board_early_init_f (void) +{ + /* Documented in A-1171 + * + * Interrupt controller setup for the MCU25 board. + * Note: IRQ 0-15 405GP internally generated; high; level sensitive + * IRQ 16 405GP internally generated; low; level sensitive + * IRQ 17-24 RESERVED/UNUSED + * IRQ 31 (EXT IRQ 6) (unused) + */ + mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ + mtdcr (uicer, 0x00000000); /* disable all ints */ + mtdcr (uiccr, 0x00000000); /* set all to be non-critical */ + mtdcr (uicpr, 0xFFFFE000); /* set int polarities */ + mtdcr (uictr, 0x00000000); /* set int trigger levels */ + mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ + + mtdcr(CPC0_CR1, CPC0_CR1_VALUE); + mtdcr(CPC0_ECR, 0x60606000); + mtdcr(CPC0_EIRR, 0x7C000000); + out32(GPIO0_OR, CFG_GPIO0_OR ); + out32(GPIO0_TCR, CFG_GPIO0_TCR); + out32(GPIO0_ODR, CFG_GPIO0_ODR); + mtspr(ccr0, 0x00700000); + + return 0; +} + +#ifdef CONFIG_BOARD_PRE_INIT +int board_pre_init (void) +{ + return board_early_init_f (); +} +#endif + +int sys_install_requested(void) +{ + u16 *ioValuePtr = (u16 *)MCU25_DIGITAL_IO_REGISTER; + return (*ioValuePtr & MCU_SW_INSTALL_REQUESTED) != 0; +} + +int checkboard (void) +{ + u16 *boardVersReg = (u16 *) MCU25_VERSIONS_REGISTER; + u16 *hwConfig = (u16 *) MCU25_IO_CONFIGURATION; + u16 generation = *boardVersReg & 0x0f; + u16 index = *boardVersReg & 0xf0; + mtdcr(CPC0_CR0, CPC0_CR0_VALUE); + + /* Force /RTS to active. The board it not wired quite + correctly to use cts/rtc flow control, so just force the + /RST active and forget about it. */ + writeb (readb (0xef600404) | 0x03, 0xef600404); + /* reset ANSI terminal color mode */ + nm_show_print(generation, index, *hwConfig); + return 0; +} + +u32 hcu_led_get(void) +{ + return (*(u16 *)MCU25_LED_REGISTER_ADDRESS)& 0x3ff; +} + +/* + * hcu_led_set value to be placed into the LEDs (max 6 bit) + */ +void hcu_led_set(u32 value) +{ + *(u16 *)MCU25_LED_REGISTER_ADDRESS = value; +} + +/* + * sdram_init - Dummy implementation for start.S, spd_sdram or initdram + * used for HCUx + */ +void sdram_init(void) +{ + return; +} + +/* + * hcu_get_slot + */ +u32 hcu_get_slot(void) +{ + u16 *slot = (u16 *)MCU25_SLOT_ADDRESS; + return (*slot) & 0x7f; +} + +/* + * get_serial_number + */ +u32 get_serial_number(void) +{ + u32 *serial = (u32 *)CFG_FLASH_BASE; + + if (*serial == 0xffffffff) + return 0; + + return *serial; +} + + +/* + * misc_init_r. + */ + +int misc_init_r(void) +{ + common_misc_init_r(); + set_params_for_sw_install( sys_install_requested(), "mcu25" ); + return 0; +} + +long int initdram(int board_type) +{ + long int dram_size = 64*1024*1024; + fixed_hcu4_sdram(dram_size); + +#ifdef DEBUG + show_sdram_registers(); +#endif + + return dram_size; +} + +#if defined(CONFIG_POST) +/* + * Returns 1 if keys pressed to start the power-on long-running tests + * Called from board_init_f(). + */ +int post_hotkeys_pressed(void) +{ + return 0; /* No hotkeys supported */ +} +#endif /* CONFIG_POST */ + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +void ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup(blob, bd); + +} +#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ diff --git a/board/netstal/mcu25/mcu25.c~ b/board/netstal/mcu25/mcu25.c~ new file mode 100644 index 0000000..3219f9e --- /dev/null +++ b/board/netstal/mcu25/mcu25.c~ @@ -0,0 +1,212 @@ +/* + *(C) Copyright 2005-2007 Netstal Maschinen AG + * Niklaus Giger (Niklaus.Giger@netstal.com) + * + * This source code is free software; you can redistribute it + * and/or modify it in source code form under the terms of the GNU + * General Public License as published by the Free Software + * Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +#include <common.h> +#include <ppc4xx.h> +#include <asm/processor.h> +#include <asm/io.h> +#include <asm-ppc/u-boot.h> +#include "../common/nm.h" + +DECLARE_GLOBAL_DATA_PTR; + +#define MCU25_SLOT_ADDRESS (0x7A000000 + 0x0A) +#define MCU25_DIGITAL_IO_REGISTER (0x7A000000 + 0xc0) + +#define MCU25_LED_REGISTER_ADDRESS (0x7C000000 + 0x10) +#define MCU25_VERSIONS_REGISTER (0x7C000000 + 0x0C) +#define MCU25_IO_CONFIGURATION (0x7C000000 + 0x0e) +#define MCU_SW_INSTALL_REQUESTED 0x08 +#define HW_GENERATION_MCU25 0x09 + +#define SDRAM_LEN 32*1024*1024 /* 32 MB -RAM */ + +#undef DEBUG +#if defined(DEBUG) +void show_sdram_registers(void); +#endif + +/* + * This function is run very early, out of flash, and before devices are + * initialized. It is called by lib_ppc/board.c:board_init_f by virtue + * of being in the init_sequence array. + * + * The SDRAM has been initialized already -- start.S:start called + * init.S:init_sdram early on -- but it is not yet being used for + * anything, not even stack. So be careful. + */ + +#define CPC0_CR0 0xb1 /* Chip control register 0 */ +#define CPC0_CR1 0xb2 /* Chip control register 1 */ +/* Attention: If you want 1 microsecs times from the external oscillator + * 0x00004051 is okay for u-boot/linux, but different from old vxworks values + * 0x00804051 causes problems with u-boot and linux! + */ +#define CPC0_CR0_VALUE 0x0007F03C +#define CPC0_CR1_VALUE 0x00004051 +#define CPC0_ECR 0xaa /* Edge condition register */ +#define EBC0_CFG 0x23 /* External Peripheral Control Register */ +#define CPC0_EIRR 0xb6 /* External Interrupt Register */ + + +int board_early_init_f (void) +{ + /* Documented in A-1171 */ + /*-------------------------------------------------------------------+ + | Interrupt controller setup for the MCU25 board. + | Note: IRQ 0-15 405GP internally generated; high; level sensitive + | IRQ 16 405GP internally generated; low; level sensitive + | IRQ 17-24 RESERVED/UNUSED + | IRQ 31 (EXT IRQ 6) (unused) + +-------------------------------------------------------------------*/ + mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ + mtdcr (uicer, 0x00000000); /* disable all ints */ + mtdcr (uiccr, 0x00000000); /* set all to be non-critical */ + mtdcr (uicpr, 0xFFFFE000); /* set int polarities */ + mtdcr (uictr, 0x00000000); /* set int trigger levels */ + mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ + + mtdcr(CPC0_CR1, CPC0_CR1_VALUE); + mtdcr(CPC0_ECR, 0x60606000); + mtdcr(CPC0_EIRR, 0x7C000000); + out32(GPIO0_OR, CFG_GPIO0_OR ); + out32(GPIO0_TCR, CFG_GPIO0_TCR); + out32(GPIO0_ODR, CFG_GPIO0_ODR); + mtspr(ccr0, 0x00700000); + + return 0; +} + +#ifdef CONFIG_BOARD_PRE_INIT +int board_pre_init (void) +{ + return board_early_init_f (); +} +#endif + +int sys_install_requested(void) +{ + u16 *ioValuePtr = (u16 *)MCU25_DIGITAL_IO_REGISTER; + return (*ioValuePtr & MCU_SW_INSTALL_REQUESTED) != 0; +} + +int checkboard (void) +{ + u16 *boardVersReg = (u16 *) MCU25_VERSIONS_REGISTER; + u16 *hwConfig = (u16 *) MCU25_IO_CONFIGURATION; + u16 generation = *boardVersReg & 0x0f; + u16 index = *boardVersReg & 0xf0; + mtdcr(CPC0_CR0, CPC0_CR0_VALUE); + + /* Force /RTS to active. The board it not wired quite + correctly to use cts/rtc flow control, so just force the + /RST active and forget about it. */ + writeb (readb (0xef600404) | 0x03, 0xef600404); + /* reset ANSI terminal color mode */ + nm_show_print(generation, index, *hwConfig); + return 0; +} + +u32 hcu_led_get(void) +{ + return (*(u16 *)MCU25_LED_REGISTER_ADDRESS)& 0x3ff; +} + +/*---------------------------------------------------------------------------+ + * hcu_led_set value to be placed into the LEDs (max 6 bit) + *---------------------------------------------------------------------------*/ +void hcu_led_set(u32 value) +{ + *(u16 *)MCU25_LED_REGISTER_ADDRESS = value; +} + +/* + * sdram_init - Dummy implementation for start.S, spd_sdram or initdram + * used for HCUx + */ +void sdram_init(void) +{ + return; +} + +/*---------------------------------------------------------------------------+ + * hcu_get_slot + *---------------------------------------------------------------------------*/ +u32 hcu_get_slot(void) +{ + u16 *slot = (u16 *)MCU25_SLOT_ADDRESS; + return (*slot) & 0x7f; +} + +/*---------------------------------------------------------------------------+ + * get_serial_number + *---------------------------------------------------------------------------*/ +u32 get_serial_number(void) +{ + u32 *serial = (u32 *)CFG_FLASH_BASE; + + if (*serial == 0xffffffff) + return 0; + + return *serial; +} + + +/*---------------------------------------------------------------------------+ + * misc_init_r. + *---------------------------------------------------------------------------*/ + +int misc_init_r(void) +{ + common_misc_init_r(); + set_params_for_sw_install( sys_install_requested(), "mcu25" ); + return 0; +} + +long int initdram(int board_type) +{ + long int dram_size = 64*1024*1024; + fixed_hcu4_sdram(dram_size); + +#ifdef DEBUG + show_sdram_registers(); +#endif + + return dram_size; +} + +#if defined(CONFIG_POST) +/* + * Returns 1 if keys pressed to start the power-on long-running tests + * Called from board_init_f(). + */ +int post_hotkeys_pressed(void) +{ + return 0; /* No hotkeys supported */ +} +#endif /* CONFIG_POST */ + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +void ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup(blob, bd); + +} +#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ diff --git a/board/netstal/mcu25/u-boot.lds b/board/netstal/mcu25/u-boot.lds new file mode 100644 index 0000000..bfa0a47 --- /dev/null +++ b/board/netstal/mcu25/u-boot.lds @@ -0,0 +1,141 @@ +/* + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + .resetvec 0xFFFFFFFC : + { + *(.resetvec) + } = 0xffff + + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : { + /* The start.o file includes the initial jump vector that + must be located in the beginning. It is the basic run- + time function that calls all other functions. */ + cpu/ppc4xx/start.o (.text) + +/* . = env_offset;*/ +/* common/environment.o(.text)*/ + + *(.text) + *(.fixup) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + *(.rodata.str1.4) + *(.eh_frame) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + _end = . ; + PROVIDE (end = .); +} +
On 10:56 Fri 18 Jan , Niklaus Giger wrote:
Add PPC405GPr based MCU25 board from Netstal.
Signed-off-by: Niklaus Giger niklaus.giger@netstal.com
board/netstal/mcu25/Makefile | 60 +++++++++++ board/netstal/mcu25/README.txt | 60 +++++++++++ board/netstal/mcu25/config.mk | 29 ++++++ board/netstal/mcu25/config.mk~ | 29 ++++++
backup file,
board/netstal/mcu25/makefile~ | 56 +++++++++++
backup file,
board/netstal/mcu25/mcu25.c | 212 ++++++++++++++++++++++++++++++++++++++++ board/netstal/mcu25/mcu25.c~ | 212 ++++++++++++++++++++++++++++++++++++++++
backup file,
board/netstal/mcu25/u-boot.lds | 141 ++++++++++++++++++++++++++ 8 files changed, 799 insertions(+), 0 deletions(-) create mode 100644 board/netstal/mcu25/Makefile create mode 100644 board/netstal/mcu25/README.txt create mode 100644 board/netstal/mcu25/config.mk create mode 100644 board/netstal/mcu25/config.mk~
backup file,
create mode 100644 board/netstal/mcu25/makefile~
backup file,
create mode 100644 board/netstal/mcu25/mcu25.c create mode 100644 board/netstal/mcu25/mcu25.c~
backup file, please remove
Best Regards, J.
Jean-Christophe PLAGNIOL-VILLARD wrote:
create mode 100644 board/netstal/mcu25/mcu25.c create mode 100644 board/netstal/mcu25/mcu25.c~
backup file, please remove
Hmm. Perhaps we shoul add *~ to the .gitignore file?
jdl
Ack
Best Regards, J.
Le 21 janv. 08 à 16:25, Jon Loeliger jdl@freescale.com a écrit :
Jean-Christophe PLAGNIOL-VILLARD wrote:
create mode 100644 board/netstal/mcu25/mcu25.c create mode 100644 board/netstal/mcu25/mcu25.c~
backup file, please remove
Hmm. Perhaps we shoul add *~ to the .gitignore file?
jdl
This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/ _______________________________________________ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
participants (3)
-
Jean-Christophe PLAGNIOL-VILLARD -
Jon Loeliger -
Niklaus Giger