On 12.01.21 16:21, Fabio Estevam wrote:

Hi Stefano,

On Tue, Jan 12, 2021 at 12:03 PM Stefano Babic sbabic@denx.de wrote:

...

Hi Peng, Fabio,

I accidental saw this code:

arch/arm/mach-imx/imx8m/soc.c:#if defined(CONFIG_IMX_HAB)

but then arch/arm/mach-imx/Kconfig :

config IMX_HAB bool "Support i.MX HAB features" depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX5

this does not match. As I understand from manual, Habv4 is the same as in mx6. Should we simply enable HAB for imx8m, too ?

You are right. This should be enabled for i.MX8M too.

The vendor U-Boot code does like this:

config IMX_HAB bool "Support i.MX HAB features" depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX5 || ARCH_MX7ULP || ARCH_IMX8M

I can submit a patch adding mx7ulp and imx8m if you want.

Nice, thanks !

Stefano

Thanks

Hi Frieder,

On Thu, Mar 4, 2021 at 5:23 AM Frieder Schrempf frieder.schrempf@kontron.de wrote:

Is this still on your list? It would be great if you could send a patch for this.

Thanks for the reminder. I have just sent the patch.

Hi all,

On 04.03.2021 12:24, Stefano Babic wrote:

On 04.03.21 12:18, Fabio Estevam wrote:

...

Hi Frieder,

On Thu, Mar 4, 2021 at 5:23 AM Frieder Schrempf frieder.schrempf@kontron.de wrote:

...

Is this still on your list? It would be great if you could send a patch for this.

Thanks for the reminder. I have just sent the patch.

I forgot it as well, it is just to extend the defconfig. I pick up Fabio's patch, it will be merged into 2021.04

Stefano

I tested the patch with CONFIG_IMX_HAB=y for an IMX8m and I got some compiler errors.

A part of the output (in german): ... CC drivers/crypto/fsl/sec.o CC drivers/crypto/fsl/jr.o drivers/crypto/fsl/jr.c:28:21: Fehler: »CONFIG_SYS_FSL_MAX_NUM_OF_SEC« ist hier nicht deklariert (nicht in einer Funktion) 28 | uint32_t sec_offset[CONFIG_SYS_FSL_MAX_NUM_OF_SEC] = { | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/crypto/fsl/jr.c: In Funktion »start_jr0«: drivers/crypto/fsl/jr.c:47:2: Fehler: unbekannter Typname: »ccsr_sec_t« 47 | ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx); | ^~~~~~~~~~ drivers/crypto/fsl/jr.c:37:4: Fehler: »CONFIG_SYS_FSL_SEC_ADDR« nicht deklariert (erstmalige Verwendung in dieser Funktion); meinten Sie »CONFIG_SYS_FSL_ESDHC_ADDR«? 37 | ((CONFIG_SYS_FSL_SEC_ADDR + sec_offset[idx])) | ^~~~~~~~~~~~~~~~~~~~~~~ ... The list is long and mostly the compiler cannot found some defines: CONFIG_SYS_FSL_SEC_ADDR CONFIG_SYS_FSL_JR0_OFFSET CONFIG_SYS_FSL_SEC_OFFSET

RDSTA_SKVN RTSDCTL_ENT_DLY_MIN RTSDCTL_ENT_DLY_MAX

And this type: ccsr_sec_t

I used for the test: - Das U-Boot master branch - Cross compiler: aarch64-linux-gnu- - This documentation: https://github.com/u-boot/u-boot/blob/master/doc/board/freescale/imx8mm_evk.... - I enable in the menuconfig CONFIG_IMX_HAB and SYS_FSL_SEC_LE

Florian

Hi Frieder,

On Mon, Mar 8, 2021 at 8:07 AM Frieder Schrempf frieder.schrempf@kontron.de wrote:

There are still multiple issues with HAB and CAAM for ARM64/i.MX8M. I did some quick fixups for the most obvious ones here: [1].

There are still warnings for pointer size mismatches in the drivers as they apparently haven't been made ready for 64-bit archs yet.

And there might be more issues. I don't have time to work on this more at the moment, so I hope someone can add the missing bits and do some tests.

[1] https://git.kontron-electronics.de/linux/u-boot/-/commits/caam_hab_mx8m

Yes, it seems that someone needs to take a look at the NXP U-Boot implementation and upstream the CAAM support for i.MX8M.

For example: https://source.codeaurora.org/external/imx/uboot-imx/commit/?h=imx_v2020.04_...

Regards,

Fabio Estevam