Signed-off-by: Michael Schwingen michael@schwingen.org --- arch/arm/cpu/ixp/npe/npe.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/arm/cpu/ixp/npe/npe.c b/arch/arm/cpu/ixp/npe/npe.c index 2e68689..9d1090e 100644 --- a/arch/arm/cpu/ixp/npe/npe.c +++ b/arch/arm/cpu/ixp/npe/npe.c @@ -621,8 +621,9 @@ int npe_initialize(bd_t * bis) if (ixFeatureCtrlDeviceRead() == IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X) { switch (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK) { case IX_FEATURE_CTRL_SILICON_TYPE_B0: + default: /* newer than B0 */ /* - * If it is B0 Silicon, we only enable port when its corresponding + * If it is B0 or newer Silicon, we only enable port when its corresponding * Eth Coprocessor is available. */ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH0) ==

Signed-off-by: Michael Schwingen michael@schwingen.org --- arch/arm/cpu/ixp/cpu.c | 5 -- arch/arm/cpu/ixp/start.S | 59 ++-------------- arch/arm/cpu/ixp/timer.c | 125 +++++++++++++++----------------- arch/arm/include/asm/arch-ixp/ixp425.h | 5 +- 4 files changed, 66 insertions(+), 128 deletions(-)

diff --git a/arch/arm/cpu/ixp/cpu.c b/arch/arm/cpu/ixp/cpu.c index ce275e5..942845d 100644 --- a/arch/arm/cpu/ixp/cpu.c +++ b/arch/arm/cpu/ixp/cpu.c @@ -36,8 +36,6 @@ #include <asm/arch/ixp425.h> #include <asm/system.h>

-ulong loops_per_jiffy; - static void cache_flush(void);

#if defined(CONFIG_DISPLAY_CPUINFO) @@ -51,17 +49,14 @@ int print_cpuinfo (void) puts("CPU: Intel IXP425 at "); switch ((id & 0x000003f0) >> 4) { case 0x1c: - loops_per_jiffy = 887467; speed = 533; break;

case 0x1d: - loops_per_jiffy = 666016; speed = 400; break;

case 0x1f: - loops_per_jiffy = 442901; speed = 266; break; } diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S index 9f8c15b..2c49aa4 100644 --- a/arch/arm/cpu/ixp/start.S +++ b/arch/arm/cpu/ixp/start.S @@ -65,7 +65,8 @@ .endm

.globl _start -_start: b reset +_start: + ldr pc, _reset ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort @@ -74,6 +75,7 @@ _start: b reset ldr pc, _irq ldr pc, _fiq

+_reset: .word reset _undefined_instruction: .word undefined_instruction _software_interrupt: .word software_interrupt _prefetch_abort: .word prefetch_abort @@ -163,12 +165,6 @@ reset: str r1, [r2]

/* make sure flash is visible at 0 */ -#if 0 - ldr r2, =IXP425_EXP_CFG0 - ldr r1, [r2] - orr r1, r1, #0x80000000 - str r1, [r2] -#endif mov r1, #CONFIG_SYS_SDR_CONFIG ldr r2, =IXP425_SDR_CONFIG str r1, [r2] @@ -212,19 +208,6 @@ reset: str r1, [r4] DELAY_FOR 0x4000, r0

- /* copy */ - mov r0, #0 - mov r4, r0 - add r2, r0, #CONFIG_SYS_MONITOR_LEN - mov r1, #0x10000000 - mov r5, r1 - - 30: - ldr r3, [r0], #4 - str r3, [r1], #4 - cmp r0, r2 - bne 30b - /* invalidate I & D caches & BTB */ mcr p15, 0, r0, c7, c7, 0 CPWAIT r0 @@ -237,19 +220,12 @@ reset: mcr p15, 0, r0, c7, c10, 4 CPWAIT r0

- /* move flash to 0x50000000 */ + /* remove flash mirror at 0x00000000 */ ldr r2, =IXP425_EXP_CFG0 ldr r1, [r2] bic r1, r1, #0x80000000 str r1, [r2]

- nop - nop - nop - nop - nop - nop - /* invalidate I & Data TLB */ mcr p15, 0, r0, c8, c7, 0 CPWAIT r0 @@ -265,7 +241,7 @@ reset: orr r0,r0,#0x13 msr cpsr,r0

-/* Set stackpointer in internal RAM to call board_init_f */ +/* Set initial stackpointer in SDRAM to call board_init_f */ call_board_init_f: ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ @@ -578,28 +554,3 @@ reset_endless:

b reset_endless

-#ifdef CONFIG_USE_IRQ - -.LC0: .word loops_per_jiffy - -/* - * 0 <= r0 <= 2000 - */ -.globl __udelay -__udelay: - mov r2, #0x6800 - orr r2, r2, #0x00db - mul r0, r2, r0 - ldr r2, .LC0 - ldr r2, [r2] @ max = 0x0fffffff - mov r0, r0, lsr #11 @ max = 0x00003fff - mov r2, r2, lsr #11 @ max = 0x0003ffff - mul r0, r2, r0 @ max = 2^32-1 - movs r0, r0, lsr #6 - -delay_loop: - subs r0, r0, #1 - bne delay_loop - mov pc, lr - -#endif /* CONFIG_USE_IRQ */ diff --git a/arch/arm/cpu/ixp/timer.c b/arch/arm/cpu/ixp/timer.c index edf341f..54a7a55 100644 --- a/arch/arm/cpu/ixp/timer.c +++ b/arch/arm/cpu/ixp/timer.c @@ -1,4 +1,7 @@ /* + * (C) Copyright 2010 + * Michael Schwingen, michael@schwingen.org + * * (C) Copyright 2006 * Stefan Roese, DENX Software Engineering, sr@denx.de. * @@ -31,105 +34,95 @@

#include <common.h> #include <asm/arch/ixp425.h> - -#ifdef CONFIG_TIMER_IRQ - -#define FREQ 66666666 -#define CLOCK_TICK_RATE (((FREQ / CONFIG_SYS_HZ & ~IXP425_OST_RELOAD_MASK) + 1) * CONFIG_SYS_HZ) -#define LATCH ((CLOCK_TICK_RATE + CONFIG_SYS_HZ/2) / CONFIG_SYS_HZ) /* For divider */ +#include <div64.h>

/* - * When interrupts are enabled, use timer 2 for time/delay generation... + * The IXP42x time-stamp timer runs at 2*OSC_IN (66.666MHz when using a + * 33.333MHz crystal). */ - -static volatile ulong timestamp; - -static void timer_isr(void *data) +static inline unsigned long long tick_to_time(unsigned long long tick) { - unsigned int *pTime = (unsigned int *)data; - - (*pTime)++; - - /* - * Reset IRQ source - */ - *IXP425_OSST = IXP425_OSST_TIMER_2_PEND; + tick *= CONFIG_SYS_HZ; + do_div(tick, CONFIG_IXP425_TIMER_CLK); + return tick; }

-ulong get_timer (ulong base) +static inline unsigned long long time_to_tick(unsigned long long time) { - return timestamp - base; + time *= CONFIG_IXP425_TIMER_CLK; + do_div(time, CONFIG_SYS_HZ); + return time; }

-void reset_timer (void) +static inline unsigned long long us_to_tick(unsigned long long us) { - timestamp = 0; + us = us * CONFIG_IXP425_TIMER_CLK + 999999; + do_div(us, 1000000); + return us; }

-int timer_init (void) +static ulong timestamp; +static ulong lastinc; + +unsigned long long get_ticks (void) { - /* install interrupt handler for timer */ - irq_install_handler(IXP425_TIMER_2_IRQ, timer_isr, (void *)&timestamp); + ulong now = *IXP425_OSTS_B;

- /* setup the Timer counter value */ - *IXP425_OSRT2 = (LATCH & ~IXP425_OST_RELOAD_MASK) | IXP425_OST_ENABLE; + if (*IXP425_OSST & IXP425_OSST_TIMER_TS_PEND) { + /* rollover of timestamp timer register */ + timestamp += (0xFFFFFFFF - lastinc) + now + 1; + *IXP425_OSST = IXP425_OSST_TIMER_TS_PEND; + } + else { + /* move stamp forward with absolut diff ticks */ + timestamp += (now - lastinc); + } + lastinc = now; + return timestamp; +}

- /* enable timer irq */ - *IXP425_ICMR = (1 << IXP425_TIMER_2_IRQ);

- return 0; -} -#else -ulong get_timer (ulong base) +void reset_timer_masked (void) { - return get_timer_masked () - base; + /* reset time */ + lastinc = *IXP425_OSTS_B; /* capture current timestamp counter */ + timestamp = 0; /* start "advancing" time stamp from 0 */ }

-void ixp425_udelay(unsigned long usec) +void reset_timer(void) { - /* - * This function has a max usec, but since it is called from udelay - * we should not have to worry... be happy - */ - unsigned long usecs = CONFIG_SYS_HZ/1000000L & ~IXP425_OST_RELOAD_MASK; - - *IXP425_OSST = IXP425_OSST_TIMER_1_PEND; - usecs |= IXP425_OST_ONE_SHOT | IXP425_OST_ENABLE; - *IXP425_OSRT1 = usecs; - while (!(*IXP425_OSST & IXP425_OSST_TIMER_1_PEND)); + reset_timer_masked(); }

-void __udelay (unsigned long usec) +ulong get_timer_masked (void) { - while (usec--) ixp425_udelay(1); + return tick_to_time(get_ticks()); }

-static ulong reload_constant = 0xfffffff0; - -void reset_timer_masked (void) +ulong get_timer (ulong base) { - ulong reload = reload_constant | IXP425_OST_ONE_SHOT | IXP425_OST_ENABLE; + return get_timer_masked() - base; +}

- *IXP425_OSST = IXP425_OSST_TIMER_1_PEND; - *IXP425_OSRT1 = reload; +void set_timer (ulong t) +{ + timestamp = time_to_tick(t); }

-ulong get_timer_masked (void) +/* delay x useconds AND preserve advance timestamp value */ +void __udelay (unsigned long usec) { - /* - * Note that it is possible for this to wrap! - * In this case we return max. - */ - ulong current = *IXP425_OST1; - if (*IXP425_OSST & IXP425_OSST_TIMER_1_PEND) - { - return reload_constant; - } - return (reload_constant - current); + unsigned long long tmp; + + tmp = get_ticks() + us_to_tick(usec); + + while (get_ticks() < tmp) + ; }

+ int timer_init(void) { + *IXP425_OSST = IXP425_OSST_TIMER_TS_PEND; return 0; } -#endif diff --git a/arch/arm/include/asm/arch-ixp/ixp425.h b/arch/arm/include/asm/arch-ixp/ixp425.h index 2114437..ddbf713 100644 --- a/arch/arm/include/asm/arch-ixp/ixp425.h +++ b/arch/arm/include/asm/arch-ixp/ixp425.h @@ -391,9 +391,8 @@ #define IXP425_TIMER_REG(x) (IXP425_TIMER_BASE_PHYS+(x)) #endif

-#if 0 /* test-only: also defined in npe/include/... */ -#define IXP425_OSTS IXP425_TIMER_REG(IXP425_OSTS_OFFSET) -#endif +/* _B to avoid collision: also defined in npe/include/... */ +#define IXP425_OSTS_B IXP425_TIMER_REG(IXP425_OSTS_OFFSET) #define IXP425_OST1 IXP425_TIMER_REG(IXP425_OST1_OFFSET) #define IXP425_OSRT1 IXP425_TIMER_REG(IXP425_OSRT1_OFFSET) #define IXP425_OST2 IXP425_TIMER_REG(IXP425_OST2_OFFSET)

Signed-off-by: Michael Schwingen michael@schwingen.org --- arch/arm/cpu/ixp/npe/Makefile | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/ixp/npe/Makefile b/arch/arm/cpu/ixp/npe/Makefile index c756a1d..14ab3c7 100644 --- a/arch/arm/cpu/ixp/npe/Makefile +++ b/arch/arm/cpu/ixp/npe/Makefile @@ -27,6 +27,7 @@ LIB := $(obj)libnpe.o

LOCAL_CFLAGS += -I$(TOPDIR)/arch/arm/cpu/ixp/npe/include -DCONFIG_IXP425_COMPONENT_ETHDB -D__linux CFLAGS += $(LOCAL_CFLAGS) +CPPFLAGS += $(LOCAL_CFLAGS) # needed for depend HOSTCFLAGS += $(LOCAL_CFLAGS)

COBJS-$(CONFIG_IXP4XX_NPE) := npe.o \

Signed-off-by: Michael Schwingen michael@schwingen.org --- board/actux2/actux2.c | 26 ++++++++++++++------------ board/actux2/config.mk | 2 -- board/actux2/u-boot.lds | 45 ++++++++++++++++++++++++++++----------------- include/configs/actux2.h | 21 ++++++++++++++++----- 4 files changed, 58 insertions(+), 36 deletions(-)

diff --git a/board/actux2/actux2.c b/board/actux2/actux2.c index d6aaad6..634553f 100644 --- a/board/actux2/actux2.c +++ b/board/actux2/actux2.c @@ -43,6 +43,19 @@

DECLARE_GLOBAL_DATA_PTR;

+int board_early_init_f (void) +{ + /* CS1: IPAC-X */ + *IXP425_EXP_CS1 = 0x94d10013; + /* CS5: Debug port */ + *IXP425_EXP_CS5 = 0x9d520003; + /* CS6: HW release register */ + *IXP425_EXP_CS6 = 0x81860001; + /* CS7: LEDs */ + *IXP425_EXP_CS7 = 0x80900003; + return 0; +} + int board_init (void) { gd->bd->bi_arch_number = MACH_TYPE_ACTUX2; @@ -70,15 +83,6 @@ int board_init (void) GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_EXTBUS_CLK); *IXP425_GPIO_GPCLKR = 0x011001FF;

- /* CS1: IPAC-X */ - *IXP425_EXP_CS1 = 0x94d10013; - /* CS5: Debug port */ - *IXP425_EXP_CS5 = 0x9d520003; - /* CS6: HW release register */ - *IXP425_EXP_CS6 = 0x81860001; - /* CS7: LEDs */ - *IXP425_EXP_CS7 = 0x80900003; - udelay (533); GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST); GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_ETHRST); @@ -112,9 +116,7 @@ int checkboard (void)

int dram_init (void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - + gd->ram_size = PHYS_SDRAM_1_SIZE; return (0); }

diff --git a/board/actux2/config.mk b/board/actux2/config.mk index 88634f7..b98b909 100644 --- a/board/actux2/config.mk +++ b/board/actux2/config.mk @@ -1,5 +1,3 @@ -CONFIG_SYS_TEXT_BASE = 0x00e00000 - # include NPE ethernet driver BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.o

diff --git a/board/actux2/u-boot.lds b/board/actux2/u-boot.lds index 707c027..5f289a1 100644 --- a/board/actux2/u-boot.lds +++ b/board/actux2/u-boot.lds @@ -30,34 +30,29 @@ SECTIONS

. = ALIGN (4); .text : { - arch/arm/cpu/ixp/start.o(.text) - lib/string.o(.text) - lib/vsprintf.o(.text) - arch/arm/lib/board.o(.text) - common/dlmalloc.o(.text) - arch/arm/cpu/ixp/cpu.o(.text) + arch/arm/cpu/ixp/start.o(.text*) + net/libnet.o(.text*) + board/actux2/libactux2.o(.text*) + arch/arm/cpu/ixp/libixp.o(.text*) + drivers/serial/libserial.o(.text*)

. = env_offset; - common/env_embedded.o (.ppcenv) - - * (.text) + common/env_embedded.o(.ppcenv) + *(.text*) }

. = ALIGN (4); .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } - . = ALIGN (4); .data : { - *(.data) + *(.data*) } - . = ALIGN (4); .got : { *(.got) } - . =.; __u_boot_cmd_start =.; .u_boot_cmd : { @@ -66,10 +61,26 @@ SECTIONS __u_boot_cmd_end =.;

. = ALIGN (4); - __bss_start =.; - .bss (NOLOAD): { + .rel.dyn : { + __rel_dyn_start = .; + *(.rel*) + __rel_dyn_end = .; + } + + .dynsym : { + __dynsym_start = .; + *(.dynsym) + } + + .bss __rel_dyn_start (OVERLAY) : { + __bss_start = .; *(.bss) - . = ALIGN(4); + . = ALIGN(4); + _end = .; } - _end =.; + /DISCARD/ : { *(.dynstr*) } + /DISCARD/ : { *(.dynamic*) } + /DISCARD/ : { *(.plt*) } + /DISCARD/ : { *(.interp*) } + /DISCARD/ : { *(.gnu*) } } diff --git a/include/configs/actux2.h b/include/configs/actux2.h index 756279e..4ba3ce0 100644 --- a/include/configs/actux2.h +++ b/include/configs/actux2.h @@ -37,6 +37,7 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTDELAY 5 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ +#define CONFIG_BOARD_EARLY_INIT_F 1

/*************************************************************** * U-boot generic defines start here. @@ -45,7 +46,6 @@

/* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) -/* size in bytes reserved for initial data */

/* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -85,8 +85,9 @@ #define CONFIG_SYS_MEMTEST_START 0x00400000 #define CONFIG_SYS_MEMTEST_END 0x00800000

-/* spec says 66.666 MHz, but it appears to be 33 */ -#define CONFIG_SYS_HZ 3333333 +/* timer clock - 2* OSC_IN system clock */ +#define CONFIG_IXP425_TIMER_CLK 66666666 +#define CONFIG_SYS_HZ 1000

/* default load address */ #define CONFIG_SYS_LOAD_ADDR 0x00010000 @@ -112,7 +113,7 @@ /* SDRAM settings */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 0x00000000 -#define CONFIG_SYS_DRAM_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_BASE 0x00000000

/* 16MB SDRAM */ #define CONFIG_SYS_SDR_CONFIG 0x3A @@ -122,6 +123,7 @@ #define CONFIG_SYS_DRAM_SIZE 0x01000000

/* FLASH organization */ +#define CONFIG_SYS_TEXT_BASE 0x50000000 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of sectors on one chip */ #define CONFIG_SYS_MAX_FLASH_SECT 140 @@ -184,13 +186,15 @@ "npe_ucode=50040000\0" \ "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \ "kerneladdr=50050000\0" \ + "kernelfile=actux2/uImage\0" \ + "rootfile=actux2/rootfs\0" \ "rootaddr=50170000\0" \ "loadaddr=10000\0" \ "updateboot_ser=mw.b 10000 ff 40000;" \ " loady ${loadaddr};" \ " run eraseboot writeboot\0" \ "updateboot_net=mw.b 10000 ff 40000;" \ - " tftp ${loadaddr} u-boot.bin;" \ + " tftp ${loadaddr} actux2/u-boot.bin;" \ " run eraseboot writeboot\0" \ "eraseboot=protect off 50000000 50003fff;" \ " protect off 50006000 5003ffff;" \ @@ -200,6 +204,9 @@ " cp.b 16000 50006000 3a000\0" \ "eraseenv=protect off 50004000 50005fff;" \ " erase 50004000 50005fff\0" \ + "updateucode=loady;" \ + " era ${npe_ucode} +${filesize};" \ + " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \ "updateroot=tftp ${loadaddr} ${rootfile};" \ " era ${rootaddr} +${filesize};" \ " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \ @@ -218,4 +225,8 @@ " tftpboot ${loadaddr} ${kernelfile};" \ " bootm\0"

+/* additions for new relocation code, must be added to all boards */ +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) + #endif /* __CONFIG_H */

Signed-off-by: Michael Schwingen michael@schwingen.org --- board/actux4/actux4.c | 12 +++++++----- board/actux4/config.mk | 4 ---- include/configs/actux4.h | 22 +++++++++++++++++----- 3 files changed, 24 insertions(+), 14 deletions(-) delete mode 100644 board/actux4/config.mk

diff --git a/board/actux4/actux4.c b/board/actux4/actux4.c index f373b58..f66acd8 100644 --- a/board/actux4/actux4.c +++ b/board/actux4/actux4.c @@ -42,6 +42,12 @@

DECLARE_GLOBAL_DATA_PTR;

+int board_early_init_f (void) +{ + *IXP425_EXP_CS1 = 0xbd113c42; + return 0; +} + int board_init (void) { gd->bd->bi_arch_number = MACH_TYPE_ACTUX4; @@ -88,8 +94,6 @@ int board_init (void) GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_EXTBUS_CLK); GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_PCI_CLK);

- *IXP425_EXP_CS1 = 0xbd113c42; - udelay (10000); GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST); udelay (10000); @@ -109,9 +113,7 @@ int checkboard (void)

int dram_init (void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - + gd->ram_size = PHYS_SDRAM_1_SIZE; return (0); }

diff --git a/board/actux4/config.mk b/board/actux4/config.mk deleted file mode 100644 index 9cb838b..0000000 --- a/board/actux4/config.mk +++ /dev/null @@ -1,4 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x00e00000 - -# include NPE ethernet driver -BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.o diff --git a/include/configs/actux4.h b/include/configs/actux4.h index 04145c3..ac7d1ba 100644 --- a/include/configs/actux4.h +++ b/include/configs/actux4.h @@ -37,6 +37,7 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTDELAY 3 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ +#define CONFIG_BOARD_EARLY_INIT_F 1

/*************************************************************** * U-boot generic defines start here. @@ -45,7 +46,6 @@

/* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) -/* size in bytes reserved for initial data */

/* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -82,8 +82,9 @@ #define CONFIG_SYS_MEMTEST_START 0x00400000 #define CONFIG_SYS_MEMTEST_END 0x00800000

-/* spec says 66.666 MHz, but it appears to be 33 */ -#define CONFIG_SYS_HZ 3333333 +/* timer clock - 2* OSC_IN system clock */ +#define CONFIG_IXP425_TIMER_CLK 66000000 +#define CONFIG_SYS_HZ 1000

/* default load address */ #define CONFIG_SYS_LOAD_ADDR 0x00010000 @@ -109,7 +110,7 @@ /* SDRAM settings */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 0x00000000 -#define CONFIG_SYS_DRAM_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_BASE 0x00000000

/* 32MB SDRAM */ #define CONFIG_SYS_SDR_CONFIG 0x18 @@ -119,6 +120,7 @@ #define CONFIG_SYS_DRAM_SIZE 0x02000000

/* FLASH organization */ +#define CONFIG_SYS_TEXT_BASE 0x50000000 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max # of sectors per chip */ #define CONFIG_SYS_MAX_FLASH_SECT 70 @@ -153,6 +155,7 @@ #define CONFIG_PHY_ADDR 0x1C /* MII PHY management */ #define CONFIG_MII 1 + /* Number of ethernet rx buffers & descriptors */ #define CONFIG_SYS_RX_ETH_BUFFER 16

@@ -181,19 +184,24 @@ "mtd=IXP4XX-Flash.0:252k(uboot),4k(uboot_env);" \ "IXP4XX-Flash.1:128k(ucode),1280k(linux),-(root)\0" \ "kerneladdr=51020000\0" \ + "kernelfile=actux4/uImage\0" \ + "rootfile=actux4/rootfs\0" \ "rootaddr=51160000\0" \ "loadaddr=10000\0" \ "updateboot_ser=mw.b 10000 ff 40000;" \ " loady ${loadaddr};" \ " run eraseboot writeboot\0" \ "updateboot_net=mw.b 10000 ff 40000;" \ - " tftp ${loadaddr} u-boot.bin;" \ + " tftp ${loadaddr} actux4/u-boot.bin;" \ " run eraseboot writeboot\0" \ "eraseboot=protect off 50000000 5003efff;" \ " erase 50000000 +${filesize}\0" \ "writeboot=cp.b 10000 50000000 ${filesize}\0" \ "eraseenv=protect off 5003f000 5003ffff;" \ " erase 5003f000 5003ffff\0" \ + "updateucode=loady;" \ + " era ${npe_ucode} +${filesize};" \ + " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \ "updateroot=tftp ${loadaddr} ${rootfile};" \ " era ${rootaddr} +${filesize};" \ " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \ @@ -212,4 +220,8 @@ " tftpboot ${loadaddr} ${kernelfile};" \ " bootm\0"

+/* additions for new relocation code, must be added to all boards */ +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) + #endif /* __CONFIG_H */

Signed-off-by: Michael Schwingen michael@schwingen.org --- MAINTAINERS | 1 + board/dvlhost/Makefile | 50 +++++++++ board/dvlhost/config.mk | 5 + board/dvlhost/dvlhost.c | 118 +++++++++++++++++++++ board/dvlhost/dvlhost_hw.h | 47 +++++++++ board/dvlhost/u-boot.lds | 86 +++++++++++++++ board/dvlhost/watchdog.c | 40 +++++++ boards.cfg | 1 + include/configs/dvlhost.h | 248 ++++++++++++++++++++++++++++++++++++++++++++ 9 files changed, 596 insertions(+), 0 deletions(-) create mode 100644 board/dvlhost/Makefile create mode 100644 board/dvlhost/config.mk create mode 100644 board/dvlhost/dvlhost.c create mode 100644 board/dvlhost/dvlhost_hw.h create mode 100644 board/dvlhost/u-boot.lds create mode 100644 board/dvlhost/watchdog.c create mode 100644 include/configs/dvlhost.h

diff --git a/MAINTAINERS b/MAINTAINERS index 5fc3de1..7b1c707 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -795,6 +795,7 @@ Michael Schwingen michael@schwingen.org actux2 xscale/ixp actux3 xscale/ixp actux4 xscale/ixp + dvlhost xscale/ixp

Andrea Scian andrea.scian@dave-tech.it

diff --git a/board/dvlhost/Makefile b/board/dvlhost/Makefile new file mode 100644 index 0000000..af9a644 --- /dev/null +++ b/board/dvlhost/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := dvlhost.o watchdog.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/dvlhost/config.mk b/board/dvlhost/config.mk new file mode 100644 index 0000000..6b249bb --- /dev/null +++ b/board/dvlhost/config.mk @@ -0,0 +1,5 @@ +# include NPE ethernet driver +BOARDLIBS = cpu/ixp/npe/libnpe.a + +LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds + diff --git a/board/dvlhost/dvlhost.c b/board/dvlhost/dvlhost.c new file mode 100644 index 0000000..33a74a4 --- /dev/null +++ b/board/dvlhost/dvlhost.c @@ -0,0 +1,118 @@ +/* + * (C) Copyright 2009 + * Michael Schwingen, michael@schwingen.org + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <config.h> +#include <command.h> +#include <malloc.h> +#include <asm/arch/ixp425.h> +#include <asm/io.h> + +#include <miiphy.h> + +#include "dvlhost_hw.h" + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f (void) +{ + /* CS1: LED Latch */ + *IXP425_EXP_CS1 = 0xBFFF0002; + return 0; +} + +int board_init (void) +{ + gd->bd->bi_arch_number = MACH_TYPE_DVLHOST; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = 0x00000100; + + /* Setup GPIOs used as output */ + GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_WDGTRIGGER); + GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_DLAN_PAIRING); + GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_PCIRST); + + /* LED latch enable and watchdog enable are tied to the same GPIO, + so we need to trigger the watchdog if we want to enable the LEDs. */ +#ifdef CONFIG_HW_WATCHDOG + GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_WDG_LED_EN); +#else + GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_WDG_LED_EN); +#endif + + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_WDGTRIGGER); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DLAN_PAIRING); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_WDG_LED_EN); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCIRST); + + /* Setup GPIOs for Interrupt inputs */ + GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_BTN_WLAN); + GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_BTN_PAIRING); + GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_BTN_RESET); + GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_IRQA); + GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_IRQB); + + /* Setup GPIO's for 33MHz clock output */ + GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_PCI_CLK); + GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_EXTBUS_CLK); + *IXP425_GPIO_GPCLKR = 0x01FF01FF; + + /* turn off all LEDs */ + writew(0x0000, DVLHOST_LED_LATCH); + + udelay (533); + GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_PCIRST); + + return 0; +} + +/* + * Check Board Identity + */ +int checkboard (void) +{ + char *s = getenv ("serial#"); + + puts ("Board: dLAN 200AV (dvlhost)"); + + if (s != NULL) { + puts (", serial# "); + puts (s); + } + putc ('\n'); + + return (0); +} + +int dram_init (void) +{ + gd->ram_size = PHYS_SDRAM_1_SIZE; + return (0); +} + +void reset_phy (void) +{ + /* init IcPlus IP175C ethernet switch to native IP175C mode */ + miiphy_write ("NPE1", 29, 31, 0x175C); +} diff --git a/board/dvlhost/dvlhost_hw.h b/board/dvlhost/dvlhost_hw.h new file mode 100644 index 0000000..5e2d0b0 --- /dev/null +++ b/board/dvlhost/dvlhost_hw.h @@ -0,0 +1,47 @@ +/* + * (C) Copyright 2009 + * Michael Schwingen, michael@schwingen.org + * + * hardware register definitions for the + * dLAN200 AV Wireless G ("dvlhost") board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _DVLHOST_HW_H +#define _DVLHOST_HW_H + +/* + * GPIO settings + */ +#define CONFIG_SYS_GPIO_WDGTRIGGER 0 /* Out */ +#define CONFIG_SYS_GPIO_BTN_WLAN 1 +#define CONFIG_SYS_GPIO_BTN_PAIRING 6 +#define CONFIG_SYS_GPIO_DLAN_PAIRING 7 /* Out */ +#define CONFIG_SYS_GPIO_BTN_RESET 9 +#define CONFIG_SYS_GPIO_IRQB 10 +#define CONFIG_SYS_GPIO_IRQA 11 +#define CONFIG_SYS_GPIO_WDG_LED_EN 12 /* Out */ +#define CONFIG_SYS_GPIO_PCIRST 13 /* Out */ +#define CONFIG_SYS_GPIO_PCI_CLK 14 /* Out */ +#define CONFIG_SYS_GPIO_EXTBUS_CLK 15 /* Out */ + +#define DVLHOST_LED_LATCH IXP425_EXP_BUS_CS1_BASE_PHYS + +#endif diff --git a/board/dvlhost/u-boot.lds b/board/dvlhost/u-boot.lds new file mode 100644 index 0000000..69b595c --- /dev/null +++ b/board/dvlhost/u-boot.lds @@ -0,0 +1,86 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT ("elf32-bigarm", "elf32-bigarm", "elf32-bigarm") +OUTPUT_ARCH (arm) +ENTRY (_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN (4); + .text : { + arch/arm/cpu/ixp/start.o(.text*) + net/libnet.o(.text*) + board/dvlhost/libdvlhost.o(.text*) + arch/arm/cpu/ixp/libixp.o(.text*) + drivers/serial/libserial.o(.text*) + + . = env_offset; + common/env_embedded.o(.ppcenv) + *(.text*) + } + + . = ALIGN (4); + .rodata : { + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + } + . = ALIGN (4); + .data : { + *(.data*) + } + . = ALIGN (4); + .got : { + *(.got) + } + . =.; + __u_boot_cmd_start =.; + .u_boot_cmd : { + *(.u_boot_cmd) + } + __u_boot_cmd_end =.; + + . = ALIGN (4); + .rel.dyn : { + __rel_dyn_start = .; + *(.rel*) + __rel_dyn_end = .; + } + + .dynsym : { + __dynsym_start = .; + *(.dynsym) + } + + .bss __rel_dyn_start (OVERLAY) : { + __bss_start = .; + *(.bss) + . = ALIGN(4); + _end = .; + } + /DISCARD/ : { *(.dynstr*) } + /DISCARD/ : { *(.dynamic*) } + /DISCARD/ : { *(.plt*) } + /DISCARD/ : { *(.interp*) } + /DISCARD/ : { *(.gnu*) } +} diff --git a/board/dvlhost/watchdog.c b/board/dvlhost/watchdog.c new file mode 100644 index 0000000..10ec821 --- /dev/null +++ b/board/dvlhost/watchdog.c @@ -0,0 +1,40 @@ +/* + * (C) Copyright 2009 + * Michael Schwingen, michael@schwingen.org + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <config.h> + +#include "dvlhost_hw.h" + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_HW_WATCHDOG +#include <watchdog.h> +#include <asm/arch/ixp425.h> + +void hw_watchdog_reset(void) +{ + *IXP425_GPIO_GPOUTR ^= (1 << (CONFIG_SYS_GPIO_WDGTRIGGER)); +} + +#endif /* CONFIG_HW_WATCHDOG */ diff --git a/boards.cfg b/boards.cfg index b0fc38a..3612d61 100644 --- a/boards.cfg +++ b/boards.cfg @@ -129,6 +129,7 @@ actux1_8_32 arm ixp actux1 - actux2 arm ixp actux3 arm ixp actux4 arm ixp +dvlhost arm ixp ixdp425 arm ixp ixdpg425 arm ixp ixdp425 lpd7a400 arm lh7a40x lpd7a40x diff --git a/include/configs/dvlhost.h b/include/configs/dvlhost.h new file mode 100644 index 0000000..0121a29 --- /dev/null +++ b/include/configs/dvlhost.h @@ -0,0 +1,248 @@ +/* + * (C) Copyright 2009 + * Michael Schwingen, michael@schwingen.org + * + * Configuration settings for the + * dLAN200 AV Wireless G ("dvlhost") board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_IXP425 1 +#define CONFIG_DVLHOST 1 +#define CONFIG_USE_FUNCTION_SECTIONS 1 + +#define CONFIG_DISPLAY_CPUINFO 1 +#define CONFIG_DISPLAY_BOARDINFO 1 + +#define CONFIG_IXP_SERIAL +#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_BOOTDELAY 3 +#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ +#define CONFIG_BOARD_EARLY_INIT_F 1 + +#undef CONFIG_HW_WATCHDOG /* HW Watchdog, board specific */ + +/*************************************************************** + * U-boot generic defines start here. + ***************************************************************/ +#undef CONFIG_USE_IRQ + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +/* Command line configuration. */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_ELF + +#define CONFIG_BOOTCOMMAND "run boot_flash" +/* enable passing of ATAGs */ +#define CONFIG_CMDLINE_TAG 1 +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#if defined(CONFIG_CMD_KGDB) +# define CONFIG_KGDB_BAUDRATE 230400 +/* which serial port to use */ +# define CONFIG_KGDB_SER_INDEX 1 +#endif + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "=> " +/* Console I/O Buffer Size */ +#define CONFIG_SYS_CBSIZE 256 +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) +/* max number of command args */ +#define CONFIG_SYS_MAXARGS 16 +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x00000000 +#define CONFIG_SYS_MEMTEST_END 0x01D80000 + +/* timer clock - 2* OSC_IN system clock */ +#define CONFIG_IXP425_TIMER_CLK 66666666 +#define CONFIG_SYS_HZ 1000 + +/* default load address */ +#define CONFIG_SYS_LOAD_ADDR 0x00010000 + +/* valid baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ + 115200, 230400 } +#define CONFIG_SERIAL_RTS_ACTIVE 1 + +/* + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128*1024) /* regular stack */ +#ifdef CONFIG_USE_IRQ +# define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ +# define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ +#endif + +/* Expansion bus settings */ +#define CONFIG_SYS_EXP_CS0 0xbd113442 + +/* SDRAM settings */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 0x00000000 +#define CONFIG_SYS_SDRAM_BASE 0x00000000 + +/* 32MB SDRAM: 2* 8Mx16, CL3 */ +#define CONFIG_SYS_SDR_CONFIG 0x18 +#define PHYS_SDRAM_1_SIZE 0x02000000 +#define CONFIG_SYS_SDRAM_REFRESH_CNT 0x800 +#define CONFIG_SYS_SDR_MODE_CONFIG 0x1 +#define CONFIG_SYS_DRAM_SIZE PHYS_SDRAM_1_SIZE + +/* FLASH organization: one Spansion S29AL032D-04 Flash */ +#define CONFIG_SYS_TEXT_BASE 0x50000000 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +/* max number of sectors on one chip */ +#define CONFIG_SYS_MAX_FLASH_SECT 140 +#define PHYS_FLASH_1 0x50000000 +#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 } + +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 +#define CONFIG_SYS_MONITOR_LEN (256 << 10) + +/* Use common CFI driver */ +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER +/* no byte writes on IXP4xx */ +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT + +/* print 'E' for empty sector on flinfo */ +#define CONFIG_SYS_FLASH_EMPTY_INFO + +/* Ethernet */ + +/* include IXP4xx NPE support */ +#define CONFIG_IXP4XX_NPE 1 + +#define CONFIG_NET_MULTI 1 +/* NPE0 PHY: MII dLAN200 AVmodule, 100BaseT-FDX fixed */ +#define CONFIG_PHY_ADDR 0x18 +/* NPE1 PHY: MII IP175 switch, port 5 is host port */ +#define CONFIG_PHY1_ADDR 0x05 +/* MII PHY management */ +#define CONFIG_MII 1 +/* fixed-speed powerline modem without standard PHY registers on MII */ +#define CONFIG_MII_NPE0_FIXEDLINK 1 +#define CONFIG_MII_NPE0_SPEED 100 +#define CONFIG_MII_NPE0_FULLDUPLEX 1 +/* fixed-speed switch without standard PHY registers on MII */ +#define CONFIG_MII_NPE1_FIXEDLINK 1 +#define CONFIG_MII_NPE1_SPEED 100 +#define CONFIG_MII_NPE1_FULLDUPLEX 1 + +/* Number of ethernet rx buffers & descriptors */ +#define CONFIG_SYS_RX_ETH_BUFFER 16 +#define CONFIG_RESET_PHY_R 1 +/* ethernet switch connected to MII port */ +#define CONFIG_MII_ETHSWITCH 1 +#define CONFIG_HAS_ETH1 1 + +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_NET +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#undef CONFIG_CMD_NFS + +/* BOOTP options */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + +/* Cache Configuration */ +#define CONFIG_SYS_CACHELINE_SIZE 32 + +/* + * environment organization: + * one flash sector, embedded in uboot area (bottom bootblock flash) + */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000) +#define CONFIG_SYS_USE_PPCENV 1 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "npe_ucode=50040000\0" \ + "ethact=NPE1\0" \ + "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root),\0" \ + "kerneladdr=50050000\0" \ + "kernelfile=dvlhost/uImage\0" \ + "rootfile=dvlhost/rootfs\0" \ + "rootaddr=50170000\0" \ + "loadaddr=10000\0" \ + "updateboot_ser=mw.b 10000 ff 40000;" \ + " loady ${loadaddr};" \ + " run eraseboot writeboot\0" \ + "updateboot_net=mw.b 10000 ff 40000;" \ + " tftp ${loadaddr} dvlhost/u-boot.bin;" \ + " run eraseboot writeboot\0" \ + "eraseboot=protect off 50000000 50003fff;" \ + " protect off 50006000 5003ffff;" \ + " erase 50000000 50003fff;" \ + " erase 50006000 5003ffff\0" \ + "writeboot=cp.b 10000 50000000 4000;" \ + " cp.b 16000 50006000 3a000\0" \ + "eraseenv=protect off 50004000 50005fff;" \ + " erase 50004000 50005fff\0" \ + "updateucode=loady;" \ + " era ${npe_ucode} +${filesize};" \ + " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \ + "updateroot=tftp ${loadaddr} ${rootfile};" \ + " era ${rootaddr} +${filesize};" \ + " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \ + "updatekern=tftp ${loadaddr} ${kernelfile};" \ + " era ${kerneladdr} +${filesize};" \ + " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \ + "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \ + " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ + "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \ + " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ + "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \ + "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ + "boot_flash=run flashargs addtty addeth;" \ + " bootm ${kerneladdr}\0" \ + "boot_net=run netargs addtty addeth;" \ + " tftpboot ${loadaddr} ${kernelfile};" \ + " bootm\0" + +/* additions for new relocation code, must be added to all boards */ +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) + +#endif /* __CONFIG_H */