[U-Boot] [PATCH 1/2] ARM: dts: import meerkat96 board support
It imports device tree source of meerkat96 board from Linux Kernel.
Signed-off-by: Shawn Guo shawn.guo@linaro.org --- arch/arm/dts/Makefile | 1 + arch/arm/dts/imx7d-meerkat96.dts | 375 +++++++++++++++++++++++++++++++ 2 files changed, 376 insertions(+) create mode 100644 arch/arm/dts/imx7d-meerkat96.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index e0c54bfa767e..4a37c661c441 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -598,6 +598,7 @@ dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \ imx7-colibri-emmc.dtb \ imx7-colibri-rawnand.dtb \ imx7s-warp.dtb \ + imx7d-meerkat96.dtb \ imx7d-pico-pi.dtb \ imx7d-pico-hobbit.dtb
diff --git a/arch/arm/dts/imx7d-meerkat96.dts b/arch/arm/dts/imx7d-meerkat96.dts new file mode 100644 index 000000000000..dd8003bd1fc0 --- /dev/null +++ b/arch/arm/dts/imx7d-meerkat96.dts @@ -0,0 +1,375 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2019 Linaro Ltd. + */ + +/dts-v1/; + +#include "imx7d.dtsi" + +/ { + model = "96Boards Meerkat96 Board"; + compatible = "novtech,imx7d-meerkat96", "fsl,imx7d"; + + chosen { + stdout-path = &uart6; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x20000000>; /* 512MB */ + }; + + reg_wlreg_on: regulator-wlreg-on { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wlreg_on>; + regulator-name = "wlreg_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100>; + gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_usb_otg1_vbus: regulator-usb-otg1-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + reg_usb_otg2_vbus: regulator-usb-otg2-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg2_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_leds>; + + led1 { + label = "green:user1"; + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; + + led2 { + label = "green:user2"; + gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; + linux,default-trigger = "mmc0"; + default-state = "off"; + }; + + led3 { + label = "green:user3"; + gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + linux,default-trigger = "mmc1"; + default-state = "off"; + }; + + led4 { + label = "green:user4"; + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + linux,default-trigger = "none"; + default-state = "off"; + panic-indicator; + }; + + led5 { + label = "yellow:wlan"; + gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tx"; + default-state = "off"; + }; + + led6 { + label = "blue:bt"; + gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "bluetooth-power"; + default-state = "off"; + }; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + status = "okay"; +}; + +&lcdif { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcdif>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; + uart-has-rtscts; + status = "okay"; +}; + +&uart6 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart6>; + assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; + status = "okay"; +}; + +&uart7 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart7 &pinctrl_bt_gpios>; + assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; + uart-has-rtscts; + fsl,dte-mode; + status = "okay"; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + device-wakeup-gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; + host-wakeup-gpios = <&gpio4 17 GPIO_ACTIVE_HIGH>; + }; +}; + +&usbotg1 { + vbus-supply = <®_usb_otg1_vbus>; + status = "okay"; +}; + +&usbotg2 { + vbus-supply = <®_usb_otg2_vbus>; + dr_mode = "host"; + status = "okay"; +}; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + keep-power-in-suspend; + fsl,tuning-step = <2>; + vmmc-supply = <®_3p3v>; + no-1-8-v; + broken-cd; + status = "okay"; +}; + +&usdhc3 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + bus-width = <4>; + no-1-8-v; + no-mmc; + non-removable; + keep-power-in-suspend; + wakeup-source; + vmmc-supply = <®_wlreg_on>; + vqmmc-supply =<®_3p3v>; + status = "okay"; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wlan_irq>; + interrupt-parent = <&gpio6>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "host-wake"; + }; +}; + +&iomuxc { + pinctrl_bt_gpios: btgpiosgrp { + fsl,pins = < + MX7D_PAD_SAI1_TX_BCLK__GPIO6_IO13 0x59 + MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17 0x1f + >; + }; + + pinctrl_gpio_leds: gpioledsgrp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59 + MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x59 + MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x59 + MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x59 + MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x59 + MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f + MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f + MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX7D_PAD_ENET1_RGMII_RD1__I2C3_SDA 0x4000007f + MX7D_PAD_ENET1_RGMII_RD0__I2C3_SCL 0x4000007f + >; + }; + + pinctrl_i2c4: i2c4grp { + fsl,pins = < + MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f + MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f + >; + }; + + pinctrl_lcdif: lcdifgrp { + fsl,pins = < + MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 + MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 + MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79 + MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79 + MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79 + MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79 + MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79 + MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79 + MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79 + MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79 + MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79 + MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79 + MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79 + MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79 + MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79 + MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79 + MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79 + MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79 + MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79 + MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79 + MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79 + MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79 + MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79 + MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79 + MX7D_PAD_LCD_CLK__LCD_CLK 0x79 + MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 + MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 + MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 + MX7D_PAD_LCD_RESET__LCD_RESET 0x79 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79 + MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX7D_PAD_SD3_DATA4__UART3_DCE_RX 0x79 + MX7D_PAD_SD3_DATA5__UART3_DCE_TX 0x79 + MX7D_PAD_SD3_DATA6__UART3_DCE_RTS 0x79 + MX7D_PAD_SD3_DATA7__UART3_DCE_CTS 0x79 + >; + }; + + pinctrl_uart6: uart6grp { + fsl,pins = < + MX7D_PAD_SD1_CD_B__UART6_DCE_RX 0x79 + MX7D_PAD_SD1_WP__UART6_DCE_TX 0x79 + >; + }; + + pinctrl_uart7: uart7grp { + fsl,pins = < + MX7D_PAD_ECSPI2_SCLK__UART7_DTE_TX 0x79 + MX7D_PAD_ECSPI2_MOSI__UART7_DTE_RX 0x79 + MX7D_PAD_ECSPI2_MISO__UART7_DTE_CTS 0x79 + MX7D_PAD_ECSPI2_SS0__UART7_DTE_RTS 0x79 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX7D_PAD_SD1_CMD__SD1_CMD 0x59 + MX7D_PAD_SD1_CLK__SD1_CLK 0x19 + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x59 + MX7D_PAD_SD3_CLK__SD3_CLK 0x0D + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 + >; + }; + + pinctrl_wlan_irq: wlanirqgrp { + fsl,pins = < + MX7D_PAD_SAI1_TX_SYNC__GPIO6_IO14 0x19 + >; + }; + + pinctrl_wlreg_on: wlregongrp { + fsl,pins = < + MX7D_PAD_SAI1_TX_DATA__GPIO6_IO15 0x19 + >; + }; +};
The Meerkat96 board, based on the NXP i.MX7D SoC, is a member of 96Boards community and complies with all Consumer Edition board specifications.
https://www.novtech.com/products/meerkat96.html https://www.96boards.org/product/imx7-96/
The initial supported/tested devices include: - Debug serial - SD - USB Host (with Ethernet)
With these support, it's good enough for loading Linux Kernel from SD or Ethernet over USB.
Signed-off-by: Shawn Guo shawn.guo@linaro.org --- arch/arm/mach-imx/mx7/Kconfig | 10 +++ board/novtech/meerkat96/Kconfig | 12 +++ board/novtech/meerkat96/MAINTAINERS | 6 ++ board/novtech/meerkat96/Makefile | 1 + board/novtech/meerkat96/README | 18 ++++ board/novtech/meerkat96/imximage.cfg | 127 +++++++++++++++++++++++++++ board/novtech/meerkat96/meerkat96.c | 71 +++++++++++++++ configs/meerkat96_defconfig | 52 +++++++++++ include/configs/meerkat96.h | 48 ++++++++++ 9 files changed, 345 insertions(+) create mode 100644 board/novtech/meerkat96/Kconfig create mode 100644 board/novtech/meerkat96/MAINTAINERS create mode 100644 board/novtech/meerkat96/Makefile create mode 100644 board/novtech/meerkat96/README create mode 100644 board/novtech/meerkat96/imximage.cfg create mode 100644 board/novtech/meerkat96/meerkat96.c create mode 100644 configs/meerkat96_defconfig create mode 100644 include/configs/meerkat96.h
diff --git a/arch/arm/mach-imx/mx7/Kconfig b/arch/arm/mach-imx/mx7/Kconfig index 232f33285d40..286d36589d0b 100644 --- a/arch/arm/mach-imx/mx7/Kconfig +++ b/arch/arm/mach-imx/mx7/Kconfig @@ -28,6 +28,15 @@ config TARGET_CL_SOM_IMX7 select SUPPORT_SPL imply CMD_DM
+config TARGET_MEERKAT96 + bool "NovTech Meerkat96 board" + select BOARD_LATE_INIT + select DM + select DM_SERIAL + select DM_THERMAL + select MX7D + imply CMD_DM + config TARGET_MX7DSABRESD bool "mx7dsabresd" select BOARD_LATE_INIT @@ -67,6 +76,7 @@ config SYS_SOC
source "board/compulab/cl-som-imx7/Kconfig" source "board/freescale/mx7dsabresd/Kconfig" +source "board/novtech/meerkat96/Kconfig" source "board/technexion/pico-imx7d/Kconfig" source "board/toradex/colibri_imx7/Kconfig" source "board/warp7/Kconfig" diff --git a/board/novtech/meerkat96/Kconfig b/board/novtech/meerkat96/Kconfig new file mode 100644 index 000000000000..b0e46fcc1b3f --- /dev/null +++ b/board/novtech/meerkat96/Kconfig @@ -0,0 +1,12 @@ +if TARGET_MEERKAT96 + +config SYS_BOARD + default "meerkat96" + +config SYS_VENDOR + default "novtech" + +config SYS_CONFIG_NAME + default "meerkat96" + +endif diff --git a/board/novtech/meerkat96/MAINTAINERS b/board/novtech/meerkat96/MAINTAINERS new file mode 100644 index 000000000000..0eca2940d5c0 --- /dev/null +++ b/board/novtech/meerkat96/MAINTAINERS @@ -0,0 +1,6 @@ +MEERKAT96 BOARD +M: Shawn Guo shawn.guo@kernel.org +S: Maintained +F: board/novtech/meerkat96 +F: include/configs/meerkat96.h +F: configs/meerkat96_defconfig diff --git a/board/novtech/meerkat96/Makefile b/board/novtech/meerkat96/Makefile new file mode 100644 index 000000000000..f27e05641b98 --- /dev/null +++ b/board/novtech/meerkat96/Makefile @@ -0,0 +1 @@ +obj-y := meerkat96.o diff --git a/board/novtech/meerkat96/README b/board/novtech/meerkat96/README new file mode 100644 index 000000000000..bca2fad5a21f --- /dev/null +++ b/board/novtech/meerkat96/README @@ -0,0 +1,18 @@ +* Build U-Boot for Meerkat96 board + + $ make mrproper + $ make meerkat96_defconfig + $ make + + It will generate the U-Boot binary called u-boot-dtb.imx + +* Install U-Boot to MicroSD card + + Plug MicroSD card to a Linux machine (with card reader), find the + device name and replace sd[x] with the name in the following command. + + $ sudo dd if=u-boot-dtb.imx of=/dev/sd[x] bs=512 seek=2 + + It will install U-Boot to MicroSD card at 1KiB offset. Insert the + card to Meerkat96 MicroSD slot, power up the board, and U-Boot should + boot from the card. diff --git a/board/novtech/meerkat96/imximage.cfg b/board/novtech/meerkat96/imximage.cfg new file mode 100644 index 000000000000..3bd8cc55e53c --- /dev/null +++ b/board/novtech/meerkat96/imximage.cfg @@ -0,0 +1,127 @@ +/* + * Copyright (C) 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +#define __ASSEMBLY__ +#include <config.h> + +/* image version */ + +IMAGE_VERSION 2 + +/* + * Boot Device : sd + */ + +BOOT_FROM sd + +/* + * Secure boot support + */ +#ifdef CONFIG_SECURE_BOOT +CSF CONFIG_CSF_SIZE +#endif + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* Enable OCRAM EPDC */ +DATA 4 0x30340004 0x4F400005 + +/* ============================================================================= + * DDR Controller Registers + * ============================================================================= + * Memory type: DDR3 + * Manufacturer: ISSI + * Device Part Number: IS43TR16256AL-125KBL + * Clock Freq.: 533MHz + * Density per CS in Gb: 4 + * Chip Selects used: 1 + * Number of Banks: 8 + * Row address: 15 + * Column address: 10 + * Data bus width: 16 + * ROW-BANK interleave: ENABLED + * ============================================================================= + */ + +DATA 4 0x30391000 0x00000002 // deassert presetn +DATA 4 0x307A0000 0x01041001 // DDRC_MSTR +DATA 4 0x307A0064 0x00400046 // DDRC_RFSHTMG +DATA 4 0x307a0490 0x00000001 // DDRC_PCTRL_0 +DATA 4 0x307A00D4 0x00690000 // DDRC_INIT1 +DATA 4 0x307A00D0 0x00020083 // DDRC_INIT0 +DATA 4 0x307A00DC 0x09300004 // DDRC_INIT3 +DATA 4 0x307A00E0 0x04080000 // DDRC_INIT4 +DATA 4 0x307A00E4 0x00100004 // DDRC_INIT5 +DATA 4 0x307A00F4 0x0000033F // DDRC_RANKCTL +DATA 4 0x307A0100 0x090B1109 // DDRC_DRAMTMG0 +DATA 4 0x307A0104 0x0007020D // DDRC_DRAMTMG1 +DATA 4 0x307A0108 0x03040407 // DDRC_DRAMTMG2 +DATA 4 0x307A010C 0x00002006 // DDRC_DRAMTMG3 +DATA 4 0x307A0110 0x04020205 // DDRC_DRAMTMG4 +DATA 4 0x307A0114 0x03030202 // DDRC_DRAMTMG5 +DATA 4 0x307A0120 0x00000803 // DDRC_DRAMTMG8 +DATA 4 0x307A0180 0x00800020 // DDRC_ZQCTL0 +DATA 4 0x307A0190 0x02098204 // DDRC_DFITMG0 +DATA 4 0x307A0194 0x00030303 // DDRC_DFITMG1 +DATA 4 0x307A01A0 0x80400003 // DDRC_DFIUPD0 +DATA 4 0x307A01A4 0x00100020 // DDRC_DFIUPD1 +DATA 4 0x307A01A8 0x80100004 // DDRC_DFIUPD2 +DATA 4 0x307A0200 0x00000015 // DDRC_ADDRMAP0 +DATA 4 0x307A0204 0x00070707 // DDRC_ADDRMAP1 +DATA 4 0x307A0210 0x00000F0F // DDRC_ADDRMAP4 +DATA 4 0x307A0214 0x06060606 // DDRC_ADDRMAP5 +DATA 4 0x307A0218 0x0F060606 // DDRC_ADDRMAP6 +DATA 4 0x307A0240 0x06000604 // DDRC_ODTCFG +DATA 4 0x307A0244 0x00000001 // DDRC_ODTMAP + + +/* ============================================================================= + * PHY Control Register + * ============================================================================= + */ + +DATA 4 0x30391000 0x00000000 // deassert presetn +DATA 4 0x30790000 0x17420F40 // DDR_PHY_PHY_CON0 +DATA 4 0x30790004 0x10210100 // DDR_PHY_PHY_CON1 +DATA 4 0x30790010 0x00060807 // DDR_PHY_PHY_CON4 +DATA 4 0x307900B0 0x1010007E // DDR_PHY_MDLL_CON0 +DATA 4 0x3079009C 0x00000D6E // DDR_PHY_DRVDS_CON0 +DATA 4 0x30790030 0x08080808 // DDR_PHY_OFFSET_WR_CON0 +DATA 4 0x30790020 0x08080808 // DDR_PHY_OFFSET_RD_CON0 +DATA 4 0x30790050 0x01000010 // DDR_PHY_OFFSETD_CON0 +DATA 4 0x30790050 0x00000010 // DDR_PHY_OFFSETD_CON0 +DATA 4 0x30790018 0x0000000F // DDR_PHY_LP_CON0 +DATA 4 0x307900C0 0x0E407304 // DDR_PHY_ZQ_CON0 - Start Manual ZQ +DATA 4 0x307900C0 0x0E447304 +DATA 4 0x307900C0 0x0E447306 +DATA 4 0x307900C0 0x0E447304 // <= NOTE: Depending on JTAG device used, may need ~ 7 us pause at this point. +DATA 4 0x307900C0 0x0E407304 // DDR_PHY_ZQ_CON0 - End Manual ZQ + + +/* ============================================================================= + * Final Initialization start sequence + * ============================================================================= + */ + +DATA 4 0x30384130 0x00000000 // Disable Clock +DATA 4 0x30340020 0x00000178 // IOMUX_GRP_GRP8 - Start input to PHY +DATA 4 0x30384130 0x00000002 // Enable Clock +/* <= NOTE: Depending on JTAG device used, may need ~ 250 us pause at this point. */ diff --git a/board/novtech/meerkat96/meerkat96.c b/board/novtech/meerkat96/meerkat96.c new file mode 100644 index 000000000000..5fb4d43997dd --- /dev/null +++ b/board/novtech/meerkat96/meerkat96.c @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Linaro Ltd. + * Copyright (C) 2016 NXP Semiconductors + */ + +#include <asm/arch/clock.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/mx7-pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/mach-imx/iomux-v3.h> +#include <asm/io.h> +#include <common.h> +#include <linux/sizes.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \ + PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS) + +static iomux_v3_cfg_t const meerkat96_pads[] = { + /* UART6 as debug serial */ + MX7D_PAD_SD1_CD_B__UART6_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), + MX7D_PAD_SD1_WP__UART6_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), + /* WDOG1 for reset */ + MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +int dram_init(void) +{ + gd->ram_size = PHYS_SDRAM_SIZE; + + return 0; +} + +int board_early_init_f(void) +{ + imx_iomux_v3_setup_multiple_pads(meerkat96_pads, + ARRAY_SIZE(meerkat96_pads)); + + return 0; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} + +int checkboard(void) +{ + char *mode; + + if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT)) + mode = "secure"; + else + mode = "non-secure"; + + printf("Board: i.MX7D Meerkat96 in %s mode\n", mode); + + return 0; +} + +int board_late_init(void) +{ + set_wdog_reset((struct wdog_regs *)WDOG1_BASE_ADDR); + + return 0; +} diff --git a/configs/meerkat96_defconfig b/configs/meerkat96_defconfig new file mode 100644 index 000000000000..a2b51946798c --- /dev/null +++ b/configs/meerkat96_defconfig @@ -0,0 +1,52 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX7=y +CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_TARGET_MEERKAT96=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ARMV7_BOOT_SEC_DEFAULT=y +# CONFIG_ARMV7_VIRT is not set +CONFIG_IMX_RDC=y +CONFIG_IMX_BOOTAUX=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/novtech/meerkat96/imximage.cfg" +CONFIG_BOUNCE_BUFFER=y +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_BOOTD is not set +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-meerkat96" +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM_GPIO=y +CONFIG_MMC_BROKEN_CD=y +CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX7=y +CONFIG_DM_PMIC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y diff --git a/include/configs/meerkat96.h b/include/configs/meerkat96.h new file mode 100644 index 000000000000..d0450af9542f --- /dev/null +++ b/include/configs/meerkat96.h @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2019 Linaro Ltd. + * Copyright (C) 2016 NXP Semiconductors + * + * Configuration settings for Meerkat96 board. + */ + +#ifndef __MEERKAT96_CONFIG_H +#define __MEERKAT96_CONFIG_H + +#include "mx7_common.h" +#include <imximage.h> + +#define PHYS_SDRAM_SIZE SZ_512M + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) + +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +/* Physical Memory Map */ +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* Environment configs */ +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 0 +#define CONFIG_ENV_SIZE SZ_8K +#define CONFIG_ENV_OFFSET (8 * SZ_64K) + +/* USB configs */ +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) + +#endif
Subject: [PATCH 2/2] Add i.MX7D based Meerkat96 board support
The Meerkat96 board, based on the NXP i.MX7D SoC, is a member of 96Boards community and complies with all Consumer Edition board specifications.
https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww. novtech.com%2Fproducts%2Fmeerkat96.html&data=02%7C01%7Cpeng. fan%40nxp.com%7C176214b98ffa4e56554d08d702db2627%7C686ea1d3bc2 b4c6fa92cd99c5c301635%7C0%7C0%7C636981012574168813&sdata= 0GHIrcX%2BUQuG6O%2Fnnk8VtmAvGpD6VHBkTmfBP%2F3drgM%3D&r eserved=0 https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww. 96boards.org%2Fproduct%2Fimx7-96%2F&data=02%7C01%7Cpeng.fan %40nxp.com%7C176214b98ffa4e56554d08d702db2627%7C686ea1d3bc2b4c 6fa92cd99c5c301635%7C0%7C0%7C636981012574168813&sdata=Y15J bYp3e6E2hojGgO2NiW5ZQ5QLOY4gW03ewuvdB4g%3D&reserved=0
The initial supported/tested devices include:
- Debug serial
- SD
- USB Host (with Ethernet)
With these support, it's good enough for loading Linux Kernel from SD or Ethernet over USB.
Signed-off-by: Shawn Guo shawn.guo@linaro.org
arch/arm/mach-imx/mx7/Kconfig | 10 +++ board/novtech/meerkat96/Kconfig | 12 +++ board/novtech/meerkat96/MAINTAINERS | 6 ++ board/novtech/meerkat96/Makefile | 1 + board/novtech/meerkat96/README | 18 ++++ board/novtech/meerkat96/imximage.cfg | 127 +++++++++++++++++++++++++++ board/novtech/meerkat96/meerkat96.c | 71 +++++++++++++++ configs/meerkat96_defconfig | 52 +++++++++++ include/configs/meerkat96.h | 48 ++++++++++ 9 files changed, 345 insertions(+) create mode 100644 board/novtech/meerkat96/Kconfig create mode 100644 board/novtech/meerkat96/MAINTAINERS create mode 100644 board/novtech/meerkat96/Makefile create mode 100644 board/novtech/meerkat96/README create mode 100644 board/novtech/meerkat96/imximage.cfg create mode 100644 board/novtech/meerkat96/meerkat96.c create mode 100644 configs/meerkat96_defconfig create mode 100644 include/configs/meerkat96.h
diff --git a/arch/arm/mach-imx/mx7/Kconfig b/arch/arm/mach-imx/mx7/Kconfig index 232f33285d40..286d36589d0b 100644 --- a/arch/arm/mach-imx/mx7/Kconfig +++ b/arch/arm/mach-imx/mx7/Kconfig @@ -28,6 +28,15 @@ config TARGET_CL_SOM_IMX7 select SUPPORT_SPL imply CMD_DM
+config TARGET_MEERKAT96
- bool "NovTech Meerkat96 board"
- select BOARD_LATE_INIT
- select DM
- select DM_SERIAL
- select DM_THERMAL
- select MX7D
- imply CMD_DM
config TARGET_MX7DSABRESD bool "mx7dsabresd" select BOARD_LATE_INIT @@ -67,6 +76,7 @@ config SYS_SOC
source "board/compulab/cl-som-imx7/Kconfig" source "board/freescale/mx7dsabresd/Kconfig" +source "board/novtech/meerkat96/Kconfig" source "board/technexion/pico-imx7d/Kconfig" source "board/toradex/colibri_imx7/Kconfig" source "board/warp7/Kconfig" diff --git a/board/novtech/meerkat96/Kconfig b/board/novtech/meerkat96/Kconfig new file mode 100644 index 000000000000..b0e46fcc1b3f --- /dev/null +++ b/board/novtech/meerkat96/Kconfig @@ -0,0 +1,12 @@ +if TARGET_MEERKAT96
+config SYS_BOARD
- default "meerkat96"
+config SYS_VENDOR
- default "novtech"
+config SYS_CONFIG_NAME
- default "meerkat96"
+endif diff --git a/board/novtech/meerkat96/MAINTAINERS b/board/novtech/meerkat96/MAINTAINERS new file mode 100644 index 000000000000..0eca2940d5c0 --- /dev/null +++ b/board/novtech/meerkat96/MAINTAINERS @@ -0,0 +1,6 @@ +MEERKAT96 BOARD +M: Shawn Guo shawn.guo@kernel.org +S: Maintained +F: board/novtech/meerkat96 +F: include/configs/meerkat96.h +F: configs/meerkat96_defconfig diff --git a/board/novtech/meerkat96/Makefile b/board/novtech/meerkat96/Makefile new file mode 100644 index 000000000000..f27e05641b98 --- /dev/null +++ b/board/novtech/meerkat96/Makefile @@ -0,0 +1 @@ +obj-y := meerkat96.o diff --git a/board/novtech/meerkat96/README b/board/novtech/meerkat96/README new file mode 100644 index 000000000000..bca2fad5a21f --- /dev/null +++ b/board/novtech/meerkat96/README @@ -0,0 +1,18 @@ +* Build U-Boot for Meerkat96 board
- $ make mrproper
- $ make meerkat96_defconfig
- $ make
- It will generate the U-Boot binary called u-boot-dtb.imx
+* Install U-Boot to MicroSD card
- Plug MicroSD card to a Linux machine (with card reader), find the
- device name and replace sd[x] with the name in the following command.
- $ sudo dd if=u-boot-dtb.imx of=/dev/sd[x] bs=512 seek=2
- It will install U-Boot to MicroSD card at 1KiB offset. Insert the
- card to Meerkat96 MicroSD slot, power up the board, and U-Boot should
- boot from the card.
diff --git a/board/novtech/meerkat96/imximage.cfg b/board/novtech/meerkat96/imximage.cfg new file mode 100644 index 000000000000..3bd8cc55e53c --- /dev/null +++ b/board/novtech/meerkat96/imximage.cfg @@ -0,0 +1,127 @@ +/*
- Copyright (C) 2014 Freescale Semiconductor, Inc.
- SPDX-License-Identifier: GPL-2.0+
- Refer docs/README.imxmage for more details about how-to configure
- and create imximage boot image
- The syntax is taken as close as possible with the kwbimage */
+#define __ASSEMBLY__ +#include <config.h>
+/* image version */
+IMAGE_VERSION 2
+/*
- Boot Device : sd
- */
+BOOT_FROM sd
+/*
- Secure boot support
- */
+#ifdef CONFIG_SECURE_BOOT +CSF CONFIG_CSF_SIZE +#endif
+/*
- Device Configuration Data (DCD)
- Each entry must have the format:
- Addr-type Address Value
- where:
- Addr-type register length (1,2 or 4 bytes)
- Address absolute address of the register
- value value to be stored in the register
- */
+/* Enable OCRAM EPDC */ +DATA 4 0x30340004 0x4F400005
+/*
+=============================================================
+======
- DDR Controller Registers
==============================================================
- Memory type: DDR3
- Manufacturer: ISSI
- Device Part Number: IS43TR16256AL-125KBL
- Clock Freq.: 533MHz
- Density per CS in Gb: 4
- Chip Selects used: 1
- Number of Banks: 8
- Row address: 15
- Column address: 10
- Data bus width: 16
- ROW-BANK interleave: ENABLED
+=============================================================
+======
- */
+DATA 4 0x30391000 0x00000002 // deassert presetn +DATA 4 0x307A0000 0x01041001 // DDRC_MSTR +DATA 4 0x307A0064 0x00400046 // DDRC_RFSHTMG +DATA 4 0x307a0490 0x00000001 // DDRC_PCTRL_0 +DATA 4 0x307A00D4 0x00690000 // DDRC_INIT1 +DATA 4 0x307A00D0 0x00020083 // DDRC_INIT0 +DATA 4 0x307A00DC 0x09300004 // DDRC_INIT3 +DATA 4 0x307A00E0 0x04080000 // DDRC_INIT4 +DATA 4 0x307A00E4 0x00100004 // DDRC_INIT5 +DATA 4 0x307A00F4 0x0000033F // DDRC_RANKCTL +DATA 4 0x307A0100 0x090B1109 // DDRC_DRAMTMG0 +DATA 4 0x307A0104 0x0007020D // DDRC_DRAMTMG1 +DATA 4 0x307A0108 0x03040407 // DDRC_DRAMTMG2 +DATA 4 0x307A010C 0x00002006 // DDRC_DRAMTMG3 +DATA 4 0x307A0110 0x04020205 // DDRC_DRAMTMG4 +DATA 4 0x307A0114 0x03030202 // DDRC_DRAMTMG5 +DATA 4 0x307A0120 0x00000803 // DDRC_DRAMTMG8 +DATA 4 0x307A0180 0x00800020 // DDRC_ZQCTL0 +DATA 4 0x307A0190 0x02098204 // DDRC_DFITMG0 +DATA 4 0x307A0194 0x00030303 // DDRC_DFITMG1 +DATA 4 0x307A01A0 0x80400003 // DDRC_DFIUPD0 +DATA 4 0x307A01A4 0x00100020 // DDRC_DFIUPD1 +DATA 4 0x307A01A8 0x80100004 // DDRC_DFIUPD2 +DATA 4 0x307A0200 0x00000015 // DDRC_ADDRMAP0 +DATA 4 0x307A0204 0x00070707 // DDRC_ADDRMAP1 +DATA 4 0x307A0210 0x00000F0F // DDRC_ADDRMAP4 +DATA 4 0x307A0214 0x06060606 // DDRC_ADDRMAP5 +DATA 4 0x307A0218 0x0F060606 // DDRC_ADDRMAP6 +DATA 4 0x307A0240 0x06000604 // DDRC_ODTCFG +DATA 4 0x307A0244 0x00000001 // DDRC_ODTMAP
+/*
+=============================================================
+======
- PHY Control Register
+=============================================================
+======
- */
+DATA 4 0x30391000 0x00000000 // deassert presetn +DATA 4 0x30790000 0x17420F40 // DDR_PHY_PHY_CON0 +DATA 4 0x30790004 0x10210100 // DDR_PHY_PHY_CON1 +DATA 4 0x30790010 0x00060807 // DDR_PHY_PHY_CON4 +DATA 4 0x307900B0 0x1010007E // DDR_PHY_MDLL_CON0 +DATA 4 0x3079009C 0x00000D6E // DDR_PHY_DRVDS_CON0 +DATA 4 0x30790030 0x08080808 // DDR_PHY_OFFSET_WR_CON0 +DATA 4 0x30790020 0x08080808 // DDR_PHY_OFFSET_RD_CON0 +DATA 4 0x30790050 0x01000010 // DDR_PHY_OFFSETD_CON0 +DATA 4 0x30790050 0x00000010 // DDR_PHY_OFFSETD_CON0 +DATA 4 0x30790018 0x0000000F // DDR_PHY_LP_CON0 +DATA 4 0x307900C0 0x0E407304 // DDR_PHY_ZQ_CON0 - Start Manual ZQ +DATA 4 0x307900C0 0x0E447304 +DATA 4 0x307900C0 0x0E447306 +DATA 4 0x307900C0 0x0E447304 // <= NOTE: Depending on JTAG device used, may need ~ 7 us pause at this point. +DATA 4 0x307900C0 0x0E407304 // DDR_PHY_ZQ_CON0 - End Manual ZQ
+/*
+=============================================================
+======
- Final Initialization start sequence
+=============================================================
+======
- */
+DATA 4 0x30384130 0x00000000 // Disable Clock +DATA 4 0x30340020 0x00000178 // IOMUX_GRP_GRP8 - Start input to PHY +DATA 4 0x30384130 0x00000002 // Enable Clock +/* <= NOTE: Depending on JTAG device used, may need ~ 250 us pause at +this point. */ diff --git a/board/novtech/meerkat96/meerkat96.c b/board/novtech/meerkat96/meerkat96.c new file mode 100644 index 000000000000..5fb4d43997dd --- /dev/null +++ b/board/novtech/meerkat96/meerkat96.c @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Copyright (C) 2019 Linaro Ltd.
- Copyright (C) 2016 NXP Semiconductors */
+#include <asm/arch/clock.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/mx7-pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/mach-imx/iomux-v3.h> +#include <asm/io.h> +#include <common.h> +#include <linux/sizes.h>
+DECLARE_GLOBAL_DATA_PTR;
+#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \
PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS)+static iomux_v3_cfg_t const meerkat96_pads[] = {
- /* UART6 as debug serial */
- MX7D_PAD_SD1_CD_B__UART6_DCE_RX |
MUX_PAD_CTRL(UART_PAD_CTRL),
- MX7D_PAD_SD1_WP__UART6_DCE_TX |
MUX_PAD_CTRL(UART_PAD_CTRL),
- /* WDOG1 for reset */
- MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B |
MUX_PAD_CTRL(NO_PAD_CTRL), };
+int dram_init(void) +{
- gd->ram_size = PHYS_SDRAM_SIZE;
- return 0;
+}
+int board_early_init_f(void) +{
- imx_iomux_v3_setup_multiple_pads(meerkat96_pads,
ARRAY_SIZE(meerkat96_pads));- return 0;
+}
+int board_init(void) +{
- /* address of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
- return 0;
+}
+int checkboard(void) +{
- char *mode;
- if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT))
mode = "secure";- else
mode = "non-secure";- printf("Board: i.MX7D Meerkat96 in %s mode\n", mode);
- return 0;
+}
+int board_late_init(void) +{
- set_wdog_reset((struct wdog_regs *)WDOG1_BASE_ADDR);
- return 0;
+} diff --git a/configs/meerkat96_defconfig b/configs/meerkat96_defconfig new file mode 100644 index 000000000000..a2b51946798c --- /dev/null +++ b/configs/meerkat96_defconfig @@ -0,0 +1,52 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX7=y +CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_TARGET_MEERKAT96=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ARMV7_BOOT_SEC_DEFAULT=y +# CONFIG_ARMV7_VIRT is not set +CONFIG_IMX_RDC=y +CONFIG_IMX_BOOTAUX=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/novtech/meerkat96/i mximage.cfg" +CONFIG_BOUNCE_BUFFER=y +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_BOOTD is not set +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-meerkat96" +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM_GPIO=y +CONFIG_MMC_BROKEN_CD=y +CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX7=y +CONFIG_DM_PMIC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y diff --git a/include/configs/meerkat96.h b/include/configs/meerkat96.h new file mode 100644 index 000000000000..d0450af9542f --- /dev/null +++ b/include/configs/meerkat96.h @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/*
- Copyright (C) 2019 Linaro Ltd.
- Copyright (C) 2016 NXP Semiconductors
- Configuration settings for Meerkat96 board.
- */
+#ifndef __MEERKAT96_CONFIG_H +#define __MEERKAT96_CONFIG_H
+#include "mx7_common.h" +#include <imximage.h>
+#define PHYS_SDRAM_SIZE SZ_512M
+/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
+#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000)
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000
+/* Physical Memory Map */ +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define
+CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+/* Environment configs */ +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 0 +#define CONFIG_ENV_SIZE SZ_8K +#define CONFIG_ENV_OFFSET (8 * SZ_64K)
+/* USB configs */ +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#endif
Reviewed-by: Peng Fan peng.fan@nxp.com
-- 2.18.0
Hi Shawn,
Thanks for the patch!
On Sun, Jul 07, 2019 at 08:59:55PM +0800, Shawn Guo wrote:
The Meerkat96 board, based on the NXP i.MX7D SoC, is a member of 96Boards community and complies with all Consumer Edition board specifications.
https://www.novtech.com/products/meerkat96.html https://www.96boards.org/product/imx7-96/
The initial supported/tested devices include:
- Debug serial
- SD
- USB Host (with Ethernet)
While testing, I encountered below error when starting usb:
=> usb start starting USB... Bus usb@30b10000: usb dr_mode not found Error enabling VBUS supply probe failed, error -38 Bus usb@30b20000: data abort pc : [<9ffaf574>] lr : [<9ffaf560>] reloc pc : [<87828574>] lr : [<87828560>] sp : 9df7d1b0 ip : 431bde82 fp : 9ff9dc8c r10: 00000000 r9 : 9df84ed8 r8 : 00000000 r7 : 9df865d8 r6 : 9df86578 r5 : 9df87680 r4 : 00000080 r3 : 00000000 r2 : 0196f7b6 r1 : 31310000 r0 : 00000000 Flags: nZCv IRQs off FIQs off Mode SVC_32 Code: 18bd8010 e2841dc2 e2811031 e1a01801 (e5913234) Resetting CPU ...
resetting ...
Did I miss anything? Sorry, don't have time to debug much...
Regards, Mani
With these support, it's good enough for loading Linux Kernel from SD or Ethernet over USB.
Signed-off-by: Shawn Guo shawn.guo@linaro.org
arch/arm/mach-imx/mx7/Kconfig | 10 +++ board/novtech/meerkat96/Kconfig | 12 +++ board/novtech/meerkat96/MAINTAINERS | 6 ++ board/novtech/meerkat96/Makefile | 1 + board/novtech/meerkat96/README | 18 ++++ board/novtech/meerkat96/imximage.cfg | 127 +++++++++++++++++++++++++++ board/novtech/meerkat96/meerkat96.c | 71 +++++++++++++++ configs/meerkat96_defconfig | 52 +++++++++++ include/configs/meerkat96.h | 48 ++++++++++ 9 files changed, 345 insertions(+) create mode 100644 board/novtech/meerkat96/Kconfig create mode 100644 board/novtech/meerkat96/MAINTAINERS create mode 100644 board/novtech/meerkat96/Makefile create mode 100644 board/novtech/meerkat96/README create mode 100644 board/novtech/meerkat96/imximage.cfg create mode 100644 board/novtech/meerkat96/meerkat96.c create mode 100644 configs/meerkat96_defconfig create mode 100644 include/configs/meerkat96.h
diff --git a/arch/arm/mach-imx/mx7/Kconfig b/arch/arm/mach-imx/mx7/Kconfig index 232f33285d40..286d36589d0b 100644 --- a/arch/arm/mach-imx/mx7/Kconfig +++ b/arch/arm/mach-imx/mx7/Kconfig @@ -28,6 +28,15 @@ config TARGET_CL_SOM_IMX7 select SUPPORT_SPL imply CMD_DM
+config TARGET_MEERKAT96
- bool "NovTech Meerkat96 board"
- select BOARD_LATE_INIT
- select DM
- select DM_SERIAL
- select DM_THERMAL
- select MX7D
- imply CMD_DM
config TARGET_MX7DSABRESD bool "mx7dsabresd" select BOARD_LATE_INIT @@ -67,6 +76,7 @@ config SYS_SOC
source "board/compulab/cl-som-imx7/Kconfig" source "board/freescale/mx7dsabresd/Kconfig" +source "board/novtech/meerkat96/Kconfig" source "board/technexion/pico-imx7d/Kconfig" source "board/toradex/colibri_imx7/Kconfig" source "board/warp7/Kconfig" diff --git a/board/novtech/meerkat96/Kconfig b/board/novtech/meerkat96/Kconfig new file mode 100644 index 000000000000..b0e46fcc1b3f --- /dev/null +++ b/board/novtech/meerkat96/Kconfig @@ -0,0 +1,12 @@ +if TARGET_MEERKAT96
+config SYS_BOARD
- default "meerkat96"
+config SYS_VENDOR
- default "novtech"
+config SYS_CONFIG_NAME
- default "meerkat96"
+endif diff --git a/board/novtech/meerkat96/MAINTAINERS b/board/novtech/meerkat96/MAINTAINERS new file mode 100644 index 000000000000..0eca2940d5c0 --- /dev/null +++ b/board/novtech/meerkat96/MAINTAINERS @@ -0,0 +1,6 @@ +MEERKAT96 BOARD +M: Shawn Guo shawn.guo@kernel.org +S: Maintained +F: board/novtech/meerkat96 +F: include/configs/meerkat96.h +F: configs/meerkat96_defconfig diff --git a/board/novtech/meerkat96/Makefile b/board/novtech/meerkat96/Makefile new file mode 100644 index 000000000000..f27e05641b98 --- /dev/null +++ b/board/novtech/meerkat96/Makefile @@ -0,0 +1 @@ +obj-y := meerkat96.o diff --git a/board/novtech/meerkat96/README b/board/novtech/meerkat96/README new file mode 100644 index 000000000000..bca2fad5a21f --- /dev/null +++ b/board/novtech/meerkat96/README @@ -0,0 +1,18 @@ +* Build U-Boot for Meerkat96 board
- $ make mrproper
- $ make meerkat96_defconfig
- $ make
- It will generate the U-Boot binary called u-boot-dtb.imx
+* Install U-Boot to MicroSD card
- Plug MicroSD card to a Linux machine (with card reader), find the
- device name and replace sd[x] with the name in the following command.
- $ sudo dd if=u-boot-dtb.imx of=/dev/sd[x] bs=512 seek=2
- It will install U-Boot to MicroSD card at 1KiB offset. Insert the
- card to Meerkat96 MicroSD slot, power up the board, and U-Boot should
- boot from the card.
diff --git a/board/novtech/meerkat96/imximage.cfg b/board/novtech/meerkat96/imximage.cfg new file mode 100644 index 000000000000..3bd8cc55e53c --- /dev/null +++ b/board/novtech/meerkat96/imximage.cfg @@ -0,0 +1,127 @@ +/*
- Copyright (C) 2014 Freescale Semiconductor, Inc.
- SPDX-License-Identifier: GPL-2.0+
- Refer docs/README.imxmage for more details about how-to configure
- and create imximage boot image
- The syntax is taken as close as possible with the kwbimage
- */
+#define __ASSEMBLY__ +#include <config.h>
+/* image version */
+IMAGE_VERSION 2
+/*
- Boot Device : sd
- */
+BOOT_FROM sd
+/*
- Secure boot support
- */
+#ifdef CONFIG_SECURE_BOOT +CSF CONFIG_CSF_SIZE +#endif
+/*
- Device Configuration Data (DCD)
- Each entry must have the format:
- Addr-type Address Value
- where:
- Addr-type register length (1,2 or 4 bytes)
- Address absolute address of the register
- value value to be stored in the register
- */
+/* Enable OCRAM EPDC */ +DATA 4 0x30340004 0x4F400005
+/* =============================================================================
- DDR Controller Registers
- =============================================================================
- Memory type: DDR3
- Manufacturer: ISSI
- Device Part Number: IS43TR16256AL-125KBL
- Clock Freq.: 533MHz
- Density per CS in Gb: 4
- Chip Selects used: 1
- Number of Banks: 8
- Row address: 15
- Column address: 10
- Data bus width: 16
- ROW-BANK interleave: ENABLED
- =============================================================================
- */
+DATA 4 0x30391000 0x00000002 // deassert presetn +DATA 4 0x307A0000 0x01041001 // DDRC_MSTR +DATA 4 0x307A0064 0x00400046 // DDRC_RFSHTMG +DATA 4 0x307a0490 0x00000001 // DDRC_PCTRL_0 +DATA 4 0x307A00D4 0x00690000 // DDRC_INIT1 +DATA 4 0x307A00D0 0x00020083 // DDRC_INIT0 +DATA 4 0x307A00DC 0x09300004 // DDRC_INIT3 +DATA 4 0x307A00E0 0x04080000 // DDRC_INIT4 +DATA 4 0x307A00E4 0x00100004 // DDRC_INIT5 +DATA 4 0x307A00F4 0x0000033F // DDRC_RANKCTL +DATA 4 0x307A0100 0x090B1109 // DDRC_DRAMTMG0 +DATA 4 0x307A0104 0x0007020D // DDRC_DRAMTMG1 +DATA 4 0x307A0108 0x03040407 // DDRC_DRAMTMG2 +DATA 4 0x307A010C 0x00002006 // DDRC_DRAMTMG3 +DATA 4 0x307A0110 0x04020205 // DDRC_DRAMTMG4 +DATA 4 0x307A0114 0x03030202 // DDRC_DRAMTMG5 +DATA 4 0x307A0120 0x00000803 // DDRC_DRAMTMG8 +DATA 4 0x307A0180 0x00800020 // DDRC_ZQCTL0 +DATA 4 0x307A0190 0x02098204 // DDRC_DFITMG0 +DATA 4 0x307A0194 0x00030303 // DDRC_DFITMG1 +DATA 4 0x307A01A0 0x80400003 // DDRC_DFIUPD0 +DATA 4 0x307A01A4 0x00100020 // DDRC_DFIUPD1 +DATA 4 0x307A01A8 0x80100004 // DDRC_DFIUPD2 +DATA 4 0x307A0200 0x00000015 // DDRC_ADDRMAP0 +DATA 4 0x307A0204 0x00070707 // DDRC_ADDRMAP1 +DATA 4 0x307A0210 0x00000F0F // DDRC_ADDRMAP4 +DATA 4 0x307A0214 0x06060606 // DDRC_ADDRMAP5 +DATA 4 0x307A0218 0x0F060606 // DDRC_ADDRMAP6 +DATA 4 0x307A0240 0x06000604 // DDRC_ODTCFG +DATA 4 0x307A0244 0x00000001 // DDRC_ODTMAP
+/* =============================================================================
- PHY Control Register
- =============================================================================
- */
+DATA 4 0x30391000 0x00000000 // deassert presetn +DATA 4 0x30790000 0x17420F40 // DDR_PHY_PHY_CON0 +DATA 4 0x30790004 0x10210100 // DDR_PHY_PHY_CON1 +DATA 4 0x30790010 0x00060807 // DDR_PHY_PHY_CON4 +DATA 4 0x307900B0 0x1010007E // DDR_PHY_MDLL_CON0 +DATA 4 0x3079009C 0x00000D6E // DDR_PHY_DRVDS_CON0 +DATA 4 0x30790030 0x08080808 // DDR_PHY_OFFSET_WR_CON0 +DATA 4 0x30790020 0x08080808 // DDR_PHY_OFFSET_RD_CON0 +DATA 4 0x30790050 0x01000010 // DDR_PHY_OFFSETD_CON0 +DATA 4 0x30790050 0x00000010 // DDR_PHY_OFFSETD_CON0 +DATA 4 0x30790018 0x0000000F // DDR_PHY_LP_CON0 +DATA 4 0x307900C0 0x0E407304 // DDR_PHY_ZQ_CON0 - Start Manual ZQ +DATA 4 0x307900C0 0x0E447304 +DATA 4 0x307900C0 0x0E447306 +DATA 4 0x307900C0 0x0E447304 // <= NOTE: Depending on JTAG device used, may need ~ 7 us pause at this point. +DATA 4 0x307900C0 0x0E407304 // DDR_PHY_ZQ_CON0 - End Manual ZQ
+/* =============================================================================
- Final Initialization start sequence
- =============================================================================
- */
+DATA 4 0x30384130 0x00000000 // Disable Clock +DATA 4 0x30340020 0x00000178 // IOMUX_GRP_GRP8 - Start input to PHY +DATA 4 0x30384130 0x00000002 // Enable Clock +/* <= NOTE: Depending on JTAG device used, may need ~ 250 us pause at this point. */ diff --git a/board/novtech/meerkat96/meerkat96.c b/board/novtech/meerkat96/meerkat96.c new file mode 100644 index 000000000000..5fb4d43997dd --- /dev/null +++ b/board/novtech/meerkat96/meerkat96.c @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Copyright (C) 2019 Linaro Ltd.
- Copyright (C) 2016 NXP Semiconductors
- */
+#include <asm/arch/clock.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/mx7-pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/mach-imx/iomux-v3.h> +#include <asm/io.h> +#include <common.h> +#include <linux/sizes.h>
+DECLARE_GLOBAL_DATA_PTR;
+#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \
PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS)+static iomux_v3_cfg_t const meerkat96_pads[] = {
- /* UART6 as debug serial */
- MX7D_PAD_SD1_CD_B__UART6_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX7D_PAD_SD1_WP__UART6_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
- /* WDOG1 for reset */
- MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+int dram_init(void) +{
- gd->ram_size = PHYS_SDRAM_SIZE;
- return 0;
+}
+int board_early_init_f(void) +{
- imx_iomux_v3_setup_multiple_pads(meerkat96_pads,
ARRAY_SIZE(meerkat96_pads));- return 0;
+}
+int board_init(void) +{
- /* address of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
- return 0;
+}
+int checkboard(void) +{
- char *mode;
- if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT))
mode = "secure";- else
mode = "non-secure";- printf("Board: i.MX7D Meerkat96 in %s mode\n", mode);
- return 0;
+}
+int board_late_init(void) +{
- set_wdog_reset((struct wdog_regs *)WDOG1_BASE_ADDR);
- return 0;
+} diff --git a/configs/meerkat96_defconfig b/configs/meerkat96_defconfig new file mode 100644 index 000000000000..a2b51946798c --- /dev/null +++ b/configs/meerkat96_defconfig @@ -0,0 +1,52 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX7=y +CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_TARGET_MEERKAT96=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ARMV7_BOOT_SEC_DEFAULT=y +# CONFIG_ARMV7_VIRT is not set +CONFIG_IMX_RDC=y +CONFIG_IMX_BOOTAUX=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/novtech/meerkat96/imximage.cfg" +CONFIG_BOUNCE_BUFFER=y +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_BOOTD is not set +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-meerkat96" +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM_GPIO=y +CONFIG_MMC_BROKEN_CD=y +CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX7=y +CONFIG_DM_PMIC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y diff --git a/include/configs/meerkat96.h b/include/configs/meerkat96.h new file mode 100644 index 000000000000..d0450af9542f --- /dev/null +++ b/include/configs/meerkat96.h @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/*
- Copyright (C) 2019 Linaro Ltd.
- Copyright (C) 2016 NXP Semiconductors
- Configuration settings for Meerkat96 board.
- */
+#ifndef __MEERKAT96_CONFIG_H +#define __MEERKAT96_CONFIG_H
+#include "mx7_common.h" +#include <imximage.h>
+#define PHYS_SDRAM_SIZE SZ_512M
+/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
+#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000)
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000
+/* Physical Memory Map */ +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+/* Environment configs */ +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 0 +#define CONFIG_ENV_SIZE SZ_8K +#define CONFIG_ENV_OFFSET (8 * SZ_64K)
+/* USB configs */ +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#endif
2.18.0
On Mon, Jul 08, 2019 at 02:42:54PM +0530, Manivannan Sadhasivam wrote:
Hi Shawn,
Thanks for the patch!
On Sun, Jul 07, 2019 at 08:59:55PM +0800, Shawn Guo wrote:
The Meerkat96 board, based on the NXP i.MX7D SoC, is a member of 96Boards community and complies with all Consumer Edition board specifications.
https://www.novtech.com/products/meerkat96.html https://www.96boards.org/product/imx7-96/
The initial supported/tested devices include:
- Debug serial
- SD
- USB Host (with Ethernet)
While testing, I encountered below error when starting usb:
=> usb start starting USB... Bus usb@30b10000: usb dr_mode not found Error enabling VBUS supply probe failed, error -38
This is expected, as there are some properties missing from DT for USBOTG1, and I haven't put effort on it yet.
Bus usb@30b20000: data abort pc : [<9ffaf574>] lr : [<9ffaf560>] reloc pc : [<87828574>] lr : [<87828560>] sp : 9df7d1b0 ip : 431bde82 fp : 9ff9dc8c r10: 00000000 r9 : 9df84ed8 r8 : 00000000 r7 : 9df865d8 r6 : 9df86578 r5 : 9df87680 r4 : 00000080 r3 : 00000000 r2 : 0196f7b6 r1 : 31310000 r0 : 00000000 Flags: nZCv IRQs off FIQs off Mode SVC_32 Code: 18bd8010 e2841dc2 e2811031 e1a01801 (e5913234) Resetting CPU ...
resetting ...
It looks the exception comes from USBOTG2 which backs both Host ports on Meerkat96 board. I have never seen this in my testing. Do you have any USB device connected to the Host port, when this happens?
Did I miss anything? Sorry, don't have time to debug much...
If you can help me reproduce it on my end, I will debug it.
Shawn
On Mon, Jul 08, 2019 at 05:59:04PM +0800, Shawn Guo wrote:
On Mon, Jul 08, 2019 at 02:42:54PM +0530, Manivannan Sadhasivam wrote:
Hi Shawn,
Thanks for the patch!
On Sun, Jul 07, 2019 at 08:59:55PM +0800, Shawn Guo wrote:
The Meerkat96 board, based on the NXP i.MX7D SoC, is a member of 96Boards community and complies with all Consumer Edition board specifications.
https://www.novtech.com/products/meerkat96.html https://www.96boards.org/product/imx7-96/
The initial supported/tested devices include:
- Debug serial
- SD
- USB Host (with Ethernet)
While testing, I encountered below error when starting usb:
=> usb start starting USB... Bus usb@30b10000: usb dr_mode not found Error enabling VBUS supply probe failed, error -38
This is expected, as there are some properties missing from DT for USBOTG1, and I haven't put effort on it yet.
This is fine.
Bus usb@30b20000: data abort pc : [<9ffaf574>] lr : [<9ffaf560>] reloc pc : [<87828574>] lr : [<87828560>] sp : 9df7d1b0 ip : 431bde82 fp : 9ff9dc8c r10: 00000000 r9 : 9df84ed8 r8 : 00000000 r7 : 9df865d8 r6 : 9df86578 r5 : 9df87680 r4 : 00000080 r3 : 00000000 r2 : 0196f7b6 r1 : 31310000 r0 : 00000000 Flags: nZCv IRQs off FIQs off Mode SVC_32 Code: 18bd8010 e2841dc2 e2811031 e1a01801 (e5913234) Resetting CPU ...
resetting ...
It looks the exception comes from USBOTG2 which backs both Host ports on Meerkat96 board. I have never seen this in my testing. Do you have any USB device connected to the Host port, when this happens?
Digged into this issue and found that the below commit is causing regression:
501547cec1 ("usb: ehci-mx6: Fix bus enumeration for DM case")
But as mentioned in the commit message, that commit was incomplete and this issue might be expected. Reverting the commit makes usb work again. And the reason you are not seeing this issue is, your tree might not be updated with mainline u-boot ;-)
Copied Marek who was the author of that commit.
With that, you can have my tested tag:
Tested-by: Manivannan Sadhasivam manivannan.sadhasivam@linaro.org
Thanks, Mani
Did I miss anything? Sorry, don't have time to debug much...
If you can help me reproduce it on my end, I will debug it.
Shawn
On Mon, Jul 08, 2019 at 04:05:13PM +0530, Manivannan Sadhasivam wrote:
On Mon, Jul 08, 2019 at 05:59:04PM +0800, Shawn Guo wrote:
On Mon, Jul 08, 2019 at 02:42:54PM +0530, Manivannan Sadhasivam wrote:
Hi Shawn,
Thanks for the patch!
On Sun, Jul 07, 2019 at 08:59:55PM +0800, Shawn Guo wrote:
The Meerkat96 board, based on the NXP i.MX7D SoC, is a member of 96Boards community and complies with all Consumer Edition board specifications.
https://www.novtech.com/products/meerkat96.html https://www.96boards.org/product/imx7-96/
The initial supported/tested devices include:
- Debug serial
- SD
- USB Host (with Ethernet)
While testing, I encountered below error when starting usb:
=> usb start starting USB... Bus usb@30b10000: usb dr_mode not found Error enabling VBUS supply probe failed, error -38
This is expected, as there are some properties missing from DT for USBOTG1, and I haven't put effort on it yet.
This is fine.
Bus usb@30b20000: data abort pc : [<9ffaf574>] lr : [<9ffaf560>] reloc pc : [<87828574>] lr : [<87828560>] sp : 9df7d1b0 ip : 431bde82 fp : 9ff9dc8c r10: 00000000 r9 : 9df84ed8 r8 : 00000000 r7 : 9df865d8 r6 : 9df86578 r5 : 9df87680 r4 : 00000080 r3 : 00000000 r2 : 0196f7b6 r1 : 31310000 r0 : 00000000 Flags: nZCv IRQs off FIQs off Mode SVC_32 Code: 18bd8010 e2841dc2 e2811031 e1a01801 (e5913234) Resetting CPU ...
resetting ...
It looks the exception comes from USBOTG2 which backs both Host ports on Meerkat96 board. I have never seen this in my testing. Do you have any USB device connected to the Host port, when this happens?
Digged into this issue and found that the below commit is causing regression:
501547cec1 ("usb: ehci-mx6: Fix bus enumeration for DM case")
But as mentioned in the commit message, that commit was incomplete and this issue might be expected. Reverting the commit makes usb work again. And the reason you are not seeing this issue is, your tree might not be updated with mainline u-boot ;-)
Ah, that's the reason. I started my work on v2019.07-rc4 which doesn't include Marek's commit.
Shawn
The Meerkat96 board, based on the NXP i.MX7D SoC, is a member of 96Boards community and complies with all Consumer Edition board specifications. https://www.novtech.com/products/meerkat96.html https://www.96boards.org/product/imx7-96/ The initial supported/tested devices include:
- Debug serial
- SD
- USB Host (with Ethernet)
With these support, it's good enough for loading Linux Kernel from SD or Ethernet over USB. Signed-off-by: Shawn Guo shawn.guo@linaro.org Reviewed-by: Peng Fan peng.fan@nxp.com Tested-by: Manivannan Sadhasivam manivannan.sadhasivam@linaro.org
Applied to u-boot-imx, master, thanks !
Best regards, Stefano Babic
participants (4)
-
Manivannan Sadhasivam -
Peng Fan -
sbabic＠denx.de -
Shawn Guo