[U-Boot] [PATCH v2 0/5] arm: at91/spl: make matrix and saic redirect sharing with others
This patches is to make matix initialization and saic redirect code sharing with other SoCs, move them to seperate files from SAMA5D4 particular file.
Changes in v2: 1./ split the version 1 [PATCH 2/3] into three patches for more legible.
Wenyou Yang (5): arm: at91/spl: matrix: move matrix init to separate file arm: at91/spl: matrix: remove matrix write protection code arm: at91/spl: matrix: remove security peripheral select code arm: at91/spl: matrix: use matrix slave id macros arm: at91/spl: atmel_sfr: move saic redirect to separate file
arch/arm/mach-at91/Makefile | 2 +- arch/arm/mach-at91/armv7/sama5d4_devices.c | 55 --------------------------- arch/arm/mach-at91/atmel_sfr.c | 21 ++++++++++ arch/arm/mach-at91/include/mach/sama5_sfr.h | 1 - arch/arm/mach-at91/include/mach/sama5d4.h | 28 ++++++++++++++ arch/arm/mach-at91/matrix.c | 34 +++++++++++++++++ 6 files changed, 84 insertions(+), 57 deletions(-) create mode 100644 arch/arm/mach-at91/atmel_sfr.c create mode 100644 arch/arm/mach-at91/matrix.c
To make the matrix initialization code sharing with other SoCs, move it from SAMA5D4 particular file, mach-at91/armv7/sama5d4_devices.c to a separate file, mach-at91/matrix.c
Signed-off-by: Wenyou Yang wenyou.yang@atmel.com ---
Changes in v2: None
arch/arm/mach-at91/Makefile | 2 +- arch/arm/mach-at91/armv7/sama5d4_devices.c | 42 ----------------------- arch/arm/mach-at91/matrix.c | 51 ++++++++++++++++++++++++++++ 3 files changed, 52 insertions(+), 43 deletions(-) create mode 100644 arch/arm/mach-at91/matrix.c
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 313eb47..649aff2 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -6,7 +6,7 @@ obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o spl_at91.o obj-$(CONFIG_AT91SAM9N12) += mpddrc.o spl_at91.o obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o -obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o +obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o obj-y += spl.o endif
diff --git a/arch/arm/mach-at91/armv7/sama5d4_devices.c b/arch/arm/mach-at91/armv7/sama5d4_devices.c index 76301d6..52f4862 100644 --- a/arch/arm/mach-at91/armv7/sama5d4_devices.c +++ b/arch/arm/mach-at91/armv7/sama5d4_devices.c @@ -10,7 +10,6 @@ #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/clk.h> -#include <asm/arch/sama5_matrix.h> #include <asm/arch/sama5_sfr.h> #include <asm/arch/sama5d4.h>
@@ -48,47 +47,6 @@ void at91_udp_hw_init(void) #endif
#ifdef CONFIG_SPL_BUILD -void matrix_init(void) -{ - struct atmel_matrix *h64mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX0; - struct atmel_matrix *h32mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX1; - int i; - - /* Disable the write protect */ - writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr); - writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr); - - /* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */ - for (i = 4; i <= 10; i++) { - writel(0x000f0f0f, &h64mx->ssr[i]); - writel(0x0000ffff, &h64mx->sassr[i]); - writel(0x0000000f, &h64mx->srtsr[i]); - } - - /* CS3 */ - writel(0x00c0c0c0, &h32mx->ssr[3]); - writel(0xff000000, &h32mx->sassr[3]); - writel(0xff000000, &h32mx->srtsr[3]); - - /* NFC SRAM */ - writel(0x00010101, &h32mx->ssr[4]); - writel(0x00000001, &h32mx->sassr[4]); - writel(0x00000001, &h32mx->srtsr[4]); - - /* Configure Programmable Security peripherals on matrix 64 */ - writel(readl(&h64mx->spselr[0]) | 0x00080000, &h64mx->spselr[0]); - writel(readl(&h64mx->spselr[1]) | 0x00180000, &h64mx->spselr[1]); - writel(readl(&h64mx->spselr[2]) | 0x00000008, &h64mx->spselr[2]); - - /* Configure Programmable Security peripherals on matrix 32 */ - writel(readl(&h32mx->spselr[0]) | 0xFFC00000, &h32mx->spselr[0]); - writel(readl(&h32mx->spselr[1]) | 0x60E3FFFF, &h32mx->spselr[1]); - - /* Enable the write protect */ - writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr); - writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr); -} - void redirect_int_from_saic_to_aic(void) { struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR; diff --git a/arch/arm/mach-at91/matrix.c b/arch/arm/mach-at91/matrix.c new file mode 100644 index 0000000..cf36386 --- /dev/null +++ b/arch/arm/mach-at91/matrix.c @@ -0,0 +1,51 @@ +/* + * Copyright (C) 2015 Atmel Corporation + * Wenyou Yang wenyou.yang@atmel.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/sama5_matrix.h> + +void matrix_init(void) +{ + struct atmel_matrix *h64mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX0; + struct atmel_matrix *h32mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX1; + int i; + + /* Disable the write protect */ + writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr); + writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr); + + /* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */ + for (i = 4; i <= 10; i++) { + writel(0x000f0f0f, &h64mx->ssr[i]); + writel(0x0000ffff, &h64mx->sassr[i]); + writel(0x0000000f, &h64mx->srtsr[i]); + } + + /* CS3 */ + writel(0x00c0c0c0, &h32mx->ssr[3]); + writel(0xff000000, &h32mx->sassr[3]); + writel(0xff000000, &h32mx->srtsr[3]); + + /* NFC SRAM */ + writel(0x00010101, &h32mx->ssr[4]); + writel(0x00000001, &h32mx->sassr[4]); + writel(0x00000001, &h32mx->srtsr[4]); + + /* Configure Programmable Security peripherals on matrix 64 */ + writel(readl(&h64mx->spselr[0]) | 0x00080000, &h64mx->spselr[0]); + writel(readl(&h64mx->spselr[1]) | 0x00180000, &h64mx->spselr[1]); + writel(readl(&h64mx->spselr[2]) | 0x00000008, &h64mx->spselr[2]); + + /* Configure Programmable Security peripherals on matrix 32 */ + writel(readl(&h32mx->spselr[0]) | 0xFFC00000, &h32mx->spselr[0]); + writel(readl(&h32mx->spselr[1]) | 0x60E3FFFF, &h32mx->spselr[1]); + + /* Enable the write protect */ + writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr); + writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr); +}
On 05.11.15 09:37, Wenyou Yang wrote:
To make the matrix initialization code sharing with other SoCs, move it from SAMA5D4 particular file, mach-at91/armv7/sama5d4_devices.c to a separate file, mach-at91/matrix.c
Signed-off-by: Wenyou Yang wenyou.yang@atmel.com
Reviewed-by: Andreas Bießmann andreas.devel@googlemail.com
Changes in v2: None
arch/arm/mach-at91/Makefile | 2 +- arch/arm/mach-at91/armv7/sama5d4_devices.c | 42 ----------------------- arch/arm/mach-at91/matrix.c | 51 ++++++++++++++++++++++++++++ 3 files changed, 52 insertions(+), 43 deletions(-) create mode 100644 arch/arm/mach-at91/matrix.c
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 313eb47..649aff2 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -6,7 +6,7 @@ obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o spl_at91.o obj-$(CONFIG_AT91SAM9N12) += mpddrc.o spl_at91.o obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o -obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o +obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o obj-y += spl.o endif
diff --git a/arch/arm/mach-at91/armv7/sama5d4_devices.c b/arch/arm/mach-at91/armv7/sama5d4_devices.c index 76301d6..52f4862 100644 --- a/arch/arm/mach-at91/armv7/sama5d4_devices.c +++ b/arch/arm/mach-at91/armv7/sama5d4_devices.c @@ -10,7 +10,6 @@ #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/clk.h> -#include <asm/arch/sama5_matrix.h> #include <asm/arch/sama5_sfr.h> #include <asm/arch/sama5d4.h>
@@ -48,47 +47,6 @@ void at91_udp_hw_init(void) #endif
#ifdef CONFIG_SPL_BUILD -void matrix_init(void) -{
- struct atmel_matrix *h64mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX0;
- struct atmel_matrix *h32mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX1;
- int i;
- /* Disable the write protect */
- writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);
- writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr);
- /* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */
- for (i = 4; i <= 10; i++) {
writel(0x000f0f0f, &h64mx->ssr[i]);writel(0x0000ffff, &h64mx->sassr[i]);writel(0x0000000f, &h64mx->srtsr[i]);- }
- /* CS3 */
- writel(0x00c0c0c0, &h32mx->ssr[3]);
- writel(0xff000000, &h32mx->sassr[3]);
- writel(0xff000000, &h32mx->srtsr[3]);
- /* NFC SRAM */
- writel(0x00010101, &h32mx->ssr[4]);
- writel(0x00000001, &h32mx->sassr[4]);
- writel(0x00000001, &h32mx->srtsr[4]);
- /* Configure Programmable Security peripherals on matrix 64 */
- writel(readl(&h64mx->spselr[0]) | 0x00080000, &h64mx->spselr[0]);
- writel(readl(&h64mx->spselr[1]) | 0x00180000, &h64mx->spselr[1]);
- writel(readl(&h64mx->spselr[2]) | 0x00000008, &h64mx->spselr[2]);
- /* Configure Programmable Security peripherals on matrix 32 */
- writel(readl(&h32mx->spselr[0]) | 0xFFC00000, &h32mx->spselr[0]);
- writel(readl(&h32mx->spselr[1]) | 0x60E3FFFF, &h32mx->spselr[1]);
- /* Enable the write protect */
- writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);
- writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr);
-}
void redirect_int_from_saic_to_aic(void) { struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR; diff --git a/arch/arm/mach-at91/matrix.c b/arch/arm/mach-at91/matrix.c new file mode 100644 index 0000000..cf36386 --- /dev/null +++ b/arch/arm/mach-at91/matrix.c @@ -0,0 +1,51 @@ +/*
- Copyright (C) 2015 Atmel Corporation
Wenyou Yang <wenyou.yang@atmel.com>
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <asm/io.h> +#include <asm/arch/sama5_matrix.h>
+void matrix_init(void) +{
- struct atmel_matrix *h64mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX0;
- struct atmel_matrix *h32mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX1;
- int i;
- /* Disable the write protect */
- writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);
- writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr);
- /* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */
- for (i = 4; i <= 10; i++) {
writel(0x000f0f0f, &h64mx->ssr[i]);writel(0x0000ffff, &h64mx->sassr[i]);writel(0x0000000f, &h64mx->srtsr[i]);- }
- /* CS3 */
- writel(0x00c0c0c0, &h32mx->ssr[3]);
- writel(0xff000000, &h32mx->sassr[3]);
- writel(0xff000000, &h32mx->srtsr[3]);
- /* NFC SRAM */
- writel(0x00010101, &h32mx->ssr[4]);
- writel(0x00000001, &h32mx->sassr[4]);
- writel(0x00000001, &h32mx->srtsr[4]);
- /* Configure Programmable Security peripherals on matrix 64 */
- writel(readl(&h64mx->spselr[0]) | 0x00080000, &h64mx->spselr[0]);
- writel(readl(&h64mx->spselr[1]) | 0x00180000, &h64mx->spselr[1]);
- writel(readl(&h64mx->spselr[2]) | 0x00000008, &h64mx->spselr[2]);
- /* Configure Programmable Security peripherals on matrix 32 */
- writel(readl(&h32mx->spselr[0]) | 0xFFC00000, &h32mx->spselr[0]);
- writel(readl(&h32mx->spselr[1]) | 0x60E3FFFF, &h32mx->spselr[1]);
- /* Enable the write protect */
- writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);
- writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr);
+}
Dear Wenyou Yang,
Wenyou Yang wenyou.yang@atmel.com writes:
To make the matrix initialization code sharing with other SoCs, move it from SAMA5D4 particular file, mach-at91/armv7/sama5d4_devices.c to a separate file, mach-at91/matrix.c
Signed-off-by: Wenyou Yang wenyou.yang@atmel.com Reviewed-by: Andreas Bießmann andreas.devel@googlemail.com
Changes in v2: None
arch/arm/mach-at91/Makefile | 2 +- arch/arm/mach-at91/armv7/sama5d4_devices.c | 42 ----------------------- arch/arm/mach-at91/matrix.c | 51 ++++++++++++++++++++++++++++ 3 files changed, 52 insertions(+), 43 deletions(-) create mode 100644 arch/arm/mach-at91/matrix.c
applied to u-boot-atmel/master, thanks!
Best regards, Andreas Bießmann
Dear Andreas,
Thank you for your review and apply for series.
-----Original Message----- From: Andreas Bießmann [mailto:andreas.devel@googlemail.com] Sent: 2015年12月1日 5:29 To: u-boot@lists.denx.de; Yang, Wenyou Subject: Re: [U-Boot, v2, 1/5] arm: at91/spl: matrix: move matrix init to separate file
Dear Wenyou Yang,
Wenyou Yang wenyou.yang@atmel.com writes:
To make the matrix initialization code sharing with other SoCs, move it from SAMA5D4 particular file, mach-at91/armv7/sama5d4_devices.c to a separate file, mach-at91/matrix.c
Signed-off-by: Wenyou Yang wenyou.yang@atmel.com Reviewed-by: Andreas Bießmann andreas.devel@googlemail.com
Changes in v2: None
arch/arm/mach-at91/Makefile | 2 +- arch/arm/mach-at91/armv7/sama5d4_devices.c | 42 ----------------------- arch/arm/mach-at91/matrix.c | 51
++++++++++++++++++++++++++++
3 files changed, 52 insertions(+), 43 deletions(-) create mode 100644 arch/arm/mach-at91/matrix.c
applied to u-boot-atmel/master, thanks!
Best regards, Andreas Bießmann
Best Regards Wenyou Yang
On processor reset, the matrix write protection is disabled, so no need to disable/enable write protection when writing the matrix registers.
Signed-off-by: Wenyou Yang wenyou.yang@atmel.com ---
Changes in v2: None
arch/arm/mach-at91/matrix.c | 8 -------- 1 file changed, 8 deletions(-)
diff --git a/arch/arm/mach-at91/matrix.c b/arch/arm/mach-at91/matrix.c index cf36386..452a6b9 100644 --- a/arch/arm/mach-at91/matrix.c +++ b/arch/arm/mach-at91/matrix.c @@ -15,10 +15,6 @@ void matrix_init(void) struct atmel_matrix *h32mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX1; int i;
- /* Disable the write protect */ - writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr); - writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr); - /* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */ for (i = 4; i <= 10; i++) { writel(0x000f0f0f, &h64mx->ssr[i]); @@ -44,8 +40,4 @@ void matrix_init(void) /* Configure Programmable Security peripherals on matrix 32 */ writel(readl(&h32mx->spselr[0]) | 0xFFC00000, &h32mx->spselr[0]); writel(readl(&h32mx->spselr[1]) | 0x60E3FFFF, &h32mx->spselr[1]); - - /* Enable the write protect */ - writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr); - writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr); }
On 05.11.15 09:37, Wenyou Yang wrote:
On processor reset, the matrix write protection is disabled, so no need to disable/enable write protection when writing the matrix registers.
Signed-off-by: Wenyou Yang wenyou.yang@atmel.com
Reviewed-by: Andreas Bießmann andreas.devel@googlemail.com
Changes in v2: None
arch/arm/mach-at91/matrix.c | 8 -------- 1 file changed, 8 deletions(-)
diff --git a/arch/arm/mach-at91/matrix.c b/arch/arm/mach-at91/matrix.c index cf36386..452a6b9 100644 --- a/arch/arm/mach-at91/matrix.c +++ b/arch/arm/mach-at91/matrix.c @@ -15,10 +15,6 @@ void matrix_init(void) struct atmel_matrix *h32mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX1; int i;
- /* Disable the write protect */
- writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);
- writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr);
- /* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */ for (i = 4; i <= 10; i++) { writel(0x000f0f0f, &h64mx->ssr[i]);
@@ -44,8 +40,4 @@ void matrix_init(void) /* Configure Programmable Security peripherals on matrix 32 */ writel(readl(&h32mx->spselr[0]) | 0xFFC00000, &h32mx->spselr[0]); writel(readl(&h32mx->spselr[1]) | 0x60E3FFFF, &h32mx->spselr[1]);
- /* Enable the write protect */
- writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);
- writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr);
}
Dear Wenyou Yang,
Wenyou Yang wenyou.yang@atmel.com writes:
On processor reset, the matrix write protection is disabled, so no need to disable/enable write protection when writing the matrix registers.
Signed-off-by: Wenyou Yang wenyou.yang@atmel.com Reviewed-by: Andreas Bießmann andreas.devel@googlemail.com
Changes in v2: None
arch/arm/mach-at91/matrix.c | 8 -------- 1 file changed, 8 deletions(-)
applied to u-boot-atmel/master, thanks!
Best regards, Andreas Bießmann
Remove the security peripheral select code, keep the default value in these registers, that is, the peripheral address space is configured as "Secured" access, it is suitable for SPL.
Signed-off-by: Wenyou Yang wenyou.yang@atmel.com ---
Changes in v2: None
arch/arm/mach-at91/matrix.c | 9 --------- 1 file changed, 9 deletions(-)
diff --git a/arch/arm/mach-at91/matrix.c b/arch/arm/mach-at91/matrix.c index 452a6b9..e4780d6 100644 --- a/arch/arm/mach-at91/matrix.c +++ b/arch/arm/mach-at91/matrix.c @@ -31,13 +31,4 @@ void matrix_init(void) writel(0x00010101, &h32mx->ssr[4]); writel(0x00000001, &h32mx->sassr[4]); writel(0x00000001, &h32mx->srtsr[4]); - - /* Configure Programmable Security peripherals on matrix 64 */ - writel(readl(&h64mx->spselr[0]) | 0x00080000, &h64mx->spselr[0]); - writel(readl(&h64mx->spselr[1]) | 0x00180000, &h64mx->spselr[1]); - writel(readl(&h64mx->spselr[2]) | 0x00000008, &h64mx->spselr[2]); - - /* Configure Programmable Security peripherals on matrix 32 */ - writel(readl(&h32mx->spselr[0]) | 0xFFC00000, &h32mx->spselr[0]); - writel(readl(&h32mx->spselr[1]) | 0x60E3FFFF, &h32mx->spselr[1]); }
On 05.11.15 09:37, Wenyou Yang wrote:
Remove the security peripheral select code, keep the default value in these registers, that is, the peripheral address space is configured as "Secured" access, it is suitable for SPL.
Signed-off-by: Wenyou Yang wenyou.yang@atmel.com
Reviewed-by: Andreas Bießmann andreas.devel@googlemail.com
Changes in v2: None
arch/arm/mach-at91/matrix.c | 9 --------- 1 file changed, 9 deletions(-)
diff --git a/arch/arm/mach-at91/matrix.c b/arch/arm/mach-at91/matrix.c index 452a6b9..e4780d6 100644 --- a/arch/arm/mach-at91/matrix.c +++ b/arch/arm/mach-at91/matrix.c @@ -31,13 +31,4 @@ void matrix_init(void) writel(0x00010101, &h32mx->ssr[4]); writel(0x00000001, &h32mx->sassr[4]); writel(0x00000001, &h32mx->srtsr[4]);
- /* Configure Programmable Security peripherals on matrix 64 */
- writel(readl(&h64mx->spselr[0]) | 0x00080000, &h64mx->spselr[0]);
- writel(readl(&h64mx->spselr[1]) | 0x00180000, &h64mx->spselr[1]);
- writel(readl(&h64mx->spselr[2]) | 0x00000008, &h64mx->spselr[2]);
- /* Configure Programmable Security peripherals on matrix 32 */
- writel(readl(&h32mx->spselr[0]) | 0xFFC00000, &h32mx->spselr[0]);
- writel(readl(&h32mx->spselr[1]) | 0x60E3FFFF, &h32mx->spselr[1]);
}
Dear Wenyou Yang,
Wenyou Yang wenyou.yang@atmel.com writes:
Remove the security peripheral select code, keep the default value in these registers, that is, the peripheral address space is configured as "Secured" access, it is suitable for SPL.
Signed-off-by: Wenyou Yang wenyou.yang@atmel.com Reviewed-by: Andreas Bießmann andreas.devel@googlemail.com
Changes in v2: None
arch/arm/mach-at91/matrix.c | 9 --------- 1 file changed, 9 deletions(-)
applied to u-boot-atmel/master, thanks!
Best regards, Andreas Bießmann
To make matrix initialization code sharing with others, use the matrix slave id macros, instead of hard-coding.
Signed-off-by: Wenyou Yang wenyou.yang@atmel.com ---
Changes in v2: None
arch/arm/mach-at91/include/mach/sama5d4.h | 25 +++++++++++++++++++++++++ arch/arm/mach-at91/matrix.c | 18 +++++++++--------- 2 files changed, 34 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-at91/include/mach/sama5d4.h b/arch/arm/mach-at91/include/mach/sama5d4.h index 3da8aff..449cf0e 100644 --- a/arch/arm/mach-at91/include/mach/sama5d4.h +++ b/arch/arm/mach-at91/include/mach/sama5d4.h @@ -179,6 +179,31 @@ #define CPU_HAS_PCR #define CPU_HAS_H32MXDIV
+/* MATRIX0(H64MX) slave id definitions */ +#define H64MX_SLAVE_AXIMX_BRIDGE 0 /* Bridge from H64MX to AXIMX */ +#define H64MX_SLAVE_PERIPH_BRIDGE 1 /* H64MX Peripheral Bridge */ +#define H64MX_SLAVE_VDEC 2 /* Video Decoder */ +#define H64MX_SLAVE_DDRC_PORT0 3 /* DDR2 Port0-AESOTF */ +#define H64MX_SLAVE_DDRC_PORT1 4 /* DDR2 Port1 */ +#define H64MX_SLAVE_DDRC_PORT2 5 /* DDR2 Port2 */ +#define H64MX_SLAVE_DDRC_PORT3 6 /* DDR2 Port3 */ +#define H64MX_SLAVE_DDRC_PORT4 7 /* DDR2 Port4 */ +#define H64MX_SLAVE_DDRC_PORT5 8 /* DDR2 Port5 */ +#define H64MX_SLAVE_DDRC_PORT6 9 /* DDR2 Port6 */ +#define H64MX_SLAVE_DDRC_PORT7 10 /* DDR2 Port7 */ +#define H64MX_SLAVE_SRAM 11 /* Internal SRAM 128K */ +#define H64MX_SLAVE_H32MX_BRIDGE 12 /* Bridge from H64MX to H32MX */ + +/* MATRIX1(H32MX) slave id definitions */ +#define H32MX_SLAVE_H64MX_BRIDGE 0 /* Bridge from H32MX to H64MX */ +#define H32MX_SLAVE_PERIPH_BRIDGE0 1 /* H32MX Peripheral Bridge 0 */ +#define H32MX_SLAVE_PERIPH_BRIDGE1 2 /* H32MX Peripheral Bridge 1 */ +#define H32MX_SLAVE_EBI 3 /* External Bus Interface */ +#define H32MX_SLAVE_NFC_CMD 3 /* NFC command Register */ +#define H32MX_SLAVE_NFC_SRAM 4 /* NFC SRAM */ +#define H32MX_SLAVE_USB 5 /* USB Device & Host */ +#define H32MX_SLAVE_SMD 6 /* Soft Modem (SMD) */ + /* sama5d4 series chip id definitions */ #define ARCH_ID_SAMA5D4 0x8a5c07c0 #define ARCH_EXID_SAMA5D41 0x00000001 diff --git a/arch/arm/mach-at91/matrix.c b/arch/arm/mach-at91/matrix.c index e4780d6..57d7270 100644 --- a/arch/arm/mach-at91/matrix.c +++ b/arch/arm/mach-at91/matrix.c @@ -15,20 +15,20 @@ void matrix_init(void) struct atmel_matrix *h32mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX1; int i;
- /* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */ - for (i = 4; i <= 10; i++) { + /* DDR port 1 ~ port 7 */ + for (i = H64MX_SLAVE_DDRC_PORT1; i <= H64MX_SLAVE_DDRC_PORT7; i++) { writel(0x000f0f0f, &h64mx->ssr[i]); writel(0x0000ffff, &h64mx->sassr[i]); writel(0x0000000f, &h64mx->srtsr[i]); }
- /* CS3 */ - writel(0x00c0c0c0, &h32mx->ssr[3]); - writel(0xff000000, &h32mx->sassr[3]); - writel(0xff000000, &h32mx->srtsr[3]); + /* EBI CS3 (NANDFlash 128M) and NFC Command Registers(128M) */ + writel(0x00c0c0c0, &h32mx->ssr[H32MX_SLAVE_EBI]); + writel(0xff000000, &h32mx->sassr[H32MX_SLAVE_EBI]); + writel(0xff000000, &h32mx->srtsr[H32MX_SLAVE_EBI]);
/* NFC SRAM */ - writel(0x00010101, &h32mx->ssr[4]); - writel(0x00000001, &h32mx->sassr[4]); - writel(0x00000001, &h32mx->srtsr[4]); + writel(0x00010101, &h32mx->ssr[H32MX_SLAVE_NFC_SRAM]); + writel(0x00000001, &h32mx->sassr[H32MX_SLAVE_NFC_SRAM]); + writel(0x00000001, &h32mx->srtsr[H32MX_SLAVE_NFC_SRAM]); }
On 05.11.15 09:37, Wenyou Yang wrote:
To make matrix initialization code sharing with others, use the matrix slave id macros, instead of hard-coding.
Signed-off-by: Wenyou Yang wenyou.yang@atmel.com
Reviewed-by: Andreas Bießmann andreas.devel@googlemail.com
Changes in v2: None
arch/arm/mach-at91/include/mach/sama5d4.h | 25 +++++++++++++++++++++++++ arch/arm/mach-at91/matrix.c | 18 +++++++++--------- 2 files changed, 34 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-at91/include/mach/sama5d4.h b/arch/arm/mach-at91/include/mach/sama5d4.h index 3da8aff..449cf0e 100644 --- a/arch/arm/mach-at91/include/mach/sama5d4.h +++ b/arch/arm/mach-at91/include/mach/sama5d4.h @@ -179,6 +179,31 @@ #define CPU_HAS_PCR #define CPU_HAS_H32MXDIV
+/* MATRIX0(H64MX) slave id definitions */ +#define H64MX_SLAVE_AXIMX_BRIDGE 0 /* Bridge from H64MX to AXIMX */ +#define H64MX_SLAVE_PERIPH_BRIDGE 1 /* H64MX Peripheral Bridge */ +#define H64MX_SLAVE_VDEC 2 /* Video Decoder */ +#define H64MX_SLAVE_DDRC_PORT0 3 /* DDR2 Port0-AESOTF */ +#define H64MX_SLAVE_DDRC_PORT1 4 /* DDR2 Port1 */ +#define H64MX_SLAVE_DDRC_PORT2 5 /* DDR2 Port2 */ +#define H64MX_SLAVE_DDRC_PORT3 6 /* DDR2 Port3 */ +#define H64MX_SLAVE_DDRC_PORT4 7 /* DDR2 Port4 */ +#define H64MX_SLAVE_DDRC_PORT5 8 /* DDR2 Port5 */ +#define H64MX_SLAVE_DDRC_PORT6 9 /* DDR2 Port6 */ +#define H64MX_SLAVE_DDRC_PORT7 10 /* DDR2 Port7 */ +#define H64MX_SLAVE_SRAM 11 /* Internal SRAM 128K */ +#define H64MX_SLAVE_H32MX_BRIDGE 12 /* Bridge from H64MX to H32MX */
+/* MATRIX1(H32MX) slave id definitions */ +#define H32MX_SLAVE_H64MX_BRIDGE 0 /* Bridge from H32MX to H64MX */ +#define H32MX_SLAVE_PERIPH_BRIDGE0 1 /* H32MX Peripheral Bridge 0 */ +#define H32MX_SLAVE_PERIPH_BRIDGE1 2 /* H32MX Peripheral Bridge 1 */ +#define H32MX_SLAVE_EBI 3 /* External Bus Interface */ +#define H32MX_SLAVE_NFC_CMD 3 /* NFC command Register */ +#define H32MX_SLAVE_NFC_SRAM 4 /* NFC SRAM */ +#define H32MX_SLAVE_USB 5 /* USB Device & Host */ +#define H32MX_SLAVE_SMD 6 /* Soft Modem (SMD) */
/* sama5d4 series chip id definitions */ #define ARCH_ID_SAMA5D4 0x8a5c07c0 #define ARCH_EXID_SAMA5D41 0x00000001 diff --git a/arch/arm/mach-at91/matrix.c b/arch/arm/mach-at91/matrix.c index e4780d6..57d7270 100644 --- a/arch/arm/mach-at91/matrix.c +++ b/arch/arm/mach-at91/matrix.c @@ -15,20 +15,20 @@ void matrix_init(void) struct atmel_matrix *h32mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX1; int i;
- /* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */
- for (i = 4; i <= 10; i++) {
- /* DDR port 1 ~ port 7 */
- for (i = H64MX_SLAVE_DDRC_PORT1; i <= H64MX_SLAVE_DDRC_PORT7; i++) { writel(0x000f0f0f, &h64mx->ssr[i]); writel(0x0000ffff, &h64mx->sassr[i]); writel(0x0000000f, &h64mx->srtsr[i]); }
- /* CS3 */
- writel(0x00c0c0c0, &h32mx->ssr[3]);
- writel(0xff000000, &h32mx->sassr[3]);
- writel(0xff000000, &h32mx->srtsr[3]);
/* EBI CS3 (NANDFlash 128M) and NFC Command Registers(128M) */
writel(0x00c0c0c0, &h32mx->ssr[H32MX_SLAVE_EBI]);
writel(0xff000000, &h32mx->sassr[H32MX_SLAVE_EBI]);
writel(0xff000000, &h32mx->srtsr[H32MX_SLAVE_EBI]);
/* NFC SRAM */
- writel(0x00010101, &h32mx->ssr[4]);
- writel(0x00000001, &h32mx->sassr[4]);
- writel(0x00000001, &h32mx->srtsr[4]);
- writel(0x00010101, &h32mx->ssr[H32MX_SLAVE_NFC_SRAM]);
- writel(0x00000001, &h32mx->sassr[H32MX_SLAVE_NFC_SRAM]);
- writel(0x00000001, &h32mx->srtsr[H32MX_SLAVE_NFC_SRAM]);
}
Dear Wenyou Yang,
Wenyou Yang wenyou.yang@atmel.com writes:
To make matrix initialization code sharing with others, use the matrix slave id macros, instead of hard-coding.
Signed-off-by: Wenyou Yang wenyou.yang@atmel.com Reviewed-by: Andreas Bießmann andreas.devel@googlemail.com
Changes in v2: None
arch/arm/mach-at91/include/mach/sama5d4.h | 25 +++++++++++++++++++++++++ arch/arm/mach-at91/matrix.c | 18 +++++++++--------- 2 files changed, 34 insertions(+), 9 deletions(-)
applied to u-boot-atmel/master, thanks!
Best regards, Andreas Bießmann
To make saic redirect code sharing with other SoCs, move the saic redirect code from SAMA5D4 particular file, mach-at91/armv7/sama5d4_devices.c to a separate file, mach-at91/atmel_sfr.c
Move ATMEL_SFR_AICREDIR_KEY definition to sama5d4.h, because each SoC has its own value.
Signed-off-by: Wenyou Yang wenyou.yang@atmel.com ---
Changes in v2: 1./ split the version 1 [PATCH 2/3] into three patches for more legible.
arch/arm/mach-at91/Makefile | 2 +- arch/arm/mach-at91/armv7/sama5d4_devices.c | 13 ------------- arch/arm/mach-at91/atmel_sfr.c | 21 +++++++++++++++++++++ arch/arm/mach-at91/include/mach/sama5_sfr.h | 1 - arch/arm/mach-at91/include/mach/sama5d4.h | 3 +++ 5 files changed, 25 insertions(+), 15 deletions(-) create mode 100644 arch/arm/mach-at91/atmel_sfr.c
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 649aff2..ca60397 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -6,7 +6,7 @@ obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o spl_at91.o obj-$(CONFIG_AT91SAM9N12) += mpddrc.o spl_at91.o obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o -obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o +obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o atmel_sfr.o obj-y += spl.o endif
diff --git a/arch/arm/mach-at91/armv7/sama5d4_devices.c b/arch/arm/mach-at91/armv7/sama5d4_devices.c index 52f4862..ce33cd4 100644 --- a/arch/arm/mach-at91/armv7/sama5d4_devices.c +++ b/arch/arm/mach-at91/armv7/sama5d4_devices.c @@ -45,16 +45,3 @@ void at91_udp_hw_init(void) at91_periph_clk_enable(ATMEL_ID_UDPHS); } #endif - -#ifdef CONFIG_SPL_BUILD -void redirect_int_from_saic_to_aic(void) -{ - struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR; - u32 key32; - - if (!(readl(&sfr->aicredir) & ATMEL_SFR_AICREDIR_NSAIC)) { - key32 = readl(&sfr->sn1) ^ ATMEL_SFR_AICREDIR_KEY; - writel((key32 | ATMEL_SFR_AICREDIR_NSAIC), &sfr->aicredir); - } -} -#endif diff --git a/arch/arm/mach-at91/atmel_sfr.c b/arch/arm/mach-at91/atmel_sfr.c new file mode 100644 index 0000000..2bccb84 --- /dev/null +++ b/arch/arm/mach-at91/atmel_sfr.c @@ -0,0 +1,21 @@ +/* + * Copyright (C) 2015 Atmel Corporation + * Wenyou Yang wenyou.yang@atmel.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/sama5_sfr.h> + +void redirect_int_from_saic_to_aic(void) +{ + struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR; + u32 key32; + + if (!(readl(&sfr->aicredir) & ATMEL_SFR_AICREDIR_NSAIC)) { + key32 = readl(&sfr->sn1) ^ ATMEL_SFR_AICREDIR_KEY; + writel((key32 | ATMEL_SFR_AICREDIR_NSAIC), &sfr->aicredir); + } +} diff --git a/arch/arm/mach-at91/include/mach/sama5_sfr.h b/arch/arm/mach-at91/include/mach/sama5_sfr.h index 3081d37..7b19a20 100644 --- a/arch/arm/mach-at91/include/mach/sama5_sfr.h +++ b/arch/arm/mach-at91/include/mach/sama5_sfr.h @@ -32,7 +32,6 @@ struct atmel_sfr { #define ATMEL_SFR_DDRCFG_FDQSIEN 0x00020000
/* Bit field in AICREDIR */ -#define ATMEL_SFR_AICREDIR_KEY 0x5F67B102 #define ATMEL_SFR_AICREDIR_NSAIC 0x00000001
#endif diff --git a/arch/arm/mach-at91/include/mach/sama5d4.h b/arch/arm/mach-at91/include/mach/sama5d4.h index 449cf0e..90085da 100644 --- a/arch/arm/mach-at91/include/mach/sama5d4.h +++ b/arch/arm/mach-at91/include/mach/sama5d4.h @@ -204,6 +204,9 @@ #define H32MX_SLAVE_USB 5 /* USB Device & Host */ #define H32MX_SLAVE_SMD 6 /* Soft Modem (SMD) */
+/* AICREDIR Unlock Key */ +#define ATMEL_SFR_AICREDIR_KEY 0x5F67B102 + /* sama5d4 series chip id definitions */ #define ARCH_ID_SAMA5D4 0x8a5c07c0 #define ARCH_EXID_SAMA5D41 0x00000001
On 05.11.15 09:37, Wenyou Yang wrote:
To make saic redirect code sharing with other SoCs, move the saic redirect code from SAMA5D4 particular file, mach-at91/armv7/sama5d4_devices.c to a separate file, mach-at91/atmel_sfr.c
Move ATMEL_SFR_AICREDIR_KEY definition to sama5d4.h, because each SoC has its own value.
Signed-off-by: Wenyou Yang wenyou.yang@atmel.com
Reviewed-by: Andreas Bießmann andreas.devel@googlemail.com
Changes in v2: 1./ split the version 1 [PATCH 2/3] into three patches for more legible.
arch/arm/mach-at91/Makefile | 2 +- arch/arm/mach-at91/armv7/sama5d4_devices.c | 13 ------------- arch/arm/mach-at91/atmel_sfr.c | 21 +++++++++++++++++++++ arch/arm/mach-at91/include/mach/sama5_sfr.h | 1 - arch/arm/mach-at91/include/mach/sama5d4.h | 3 +++ 5 files changed, 25 insertions(+), 15 deletions(-) create mode 100644 arch/arm/mach-at91/atmel_sfr.c
Dear Wenyou Yang,
Wenyou Yang wenyou.yang@atmel.com writes:
To make saic redirect code sharing with other SoCs, move the saic redirect code from SAMA5D4 particular file, mach-at91/armv7/sama5d4_devices.c to a separate file, mach-at91/atmel_sfr.c
Move ATMEL_SFR_AICREDIR_KEY definition to sama5d4.h, because each SoC has its own value.
Signed-off-by: Wenyou Yang wenyou.yang@atmel.com Reviewed-by: Andreas Bießmann andreas.devel@googlemail.com
Changes in v2: 1./ split the version 1 [PATCH 2/3] into three patches for more legible.
arch/arm/mach-at91/Makefile | 2 +- arch/arm/mach-at91/armv7/sama5d4_devices.c | 13 ------------- arch/arm/mach-at91/atmel_sfr.c | 21 +++++++++++++++++++++ arch/arm/mach-at91/include/mach/sama5_sfr.h | 1 - arch/arm/mach-at91/include/mach/sama5d4.h | 3 +++ 5 files changed, 25 insertions(+), 15 deletions(-) create mode 100644 arch/arm/mach-at91/atmel_sfr.c
applied to u-boot-atmel/master, thanks!
Best regards, Andreas Bießmann
participants (3)
-
Andreas Bießmann -
Wenyou Yang -
Yang, Wenyou