Convert to using the common config files. This requires a little more flexibility in the common files than we had been using before.

Signed-off-by: Tom Rini trini@ti.com --- boards.cfg | 2 +- include/configs/omap3_beagle.h | 184 +++---------------------------------- include/configs/ti_armv7_common.h | 8 ++ include/configs/ti_omap3_common.h | 1 + 4 files changed, 25 insertions(+), 170 deletions(-)

diff --git a/boards.cfg b/boards.cfg index 69c8936..cab6b59 100644 --- a/boards.cfg +++ b/boards.cfg @@ -346,7 +346,7 @@ Active arm armv7 omap3 technexion tao3530 Active arm armv7 omap3 technexion twister twister - Stefano Babic sbabic@denx.de Active arm armv7 omap3 teejet mt_ventoux mt_ventoux - Stefano Babic sbabic@denx.de Active arm armv7 omap3 ti am3517crane am3517_crane - Nagendra T S nagendra@mistralsolutions.com -Active arm armv7 omap3 ti beagle omap3_beagle - Tom Rini trini@ti.com +Active arm armv7 omap3 ti beagle omap3_beagle omap3_beagle:NAND Tom Rini trini@ti.com Active arm armv7 omap3 ti evm omap3_evm - Tom Rini trini@ti.com Active arm armv7 omap3 ti evm omap3_evm_quick_mmc - - Active arm armv7 omap3 ti evm omap3_evm_quick_nand - - diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 0b57421..fae0e6f 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -12,19 +12,22 @@ #ifndef __CONFIG_H #define __CONFIG_H

+#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ + /* - * High Level Configuration Options + * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM + * 64 bytes before this address should be set aside for u-boot.img's + * header. That is 0x800FFFC0--0x80100000 should not be used for any + * other needs. We use this rather than the inherited defines from + * ti_armv7_common.h for backwards compatibility. */ -#define CONFIG_OMAP 1 /* in a TI OMAP core */ -#define CONFIG_OMAP34XX 1 /* which is a 34XX */ -#define CONFIG_OMAP3_BEAGLE 1 /* working with BEAGLE */ -#define CONFIG_OMAP_GPIO -#define CONFIG_OMAP_COMMON - -#define CONFIG_SDRC /* The chip has SDRC controller */ +#define CONFIG_SYS_TEXT_BASE 0x80100000 +#define CONFIG_SPL_BSS_START_ADDR 0x80000000 +#define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x80208000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000

-#include <asm/arch/cpu.h> /* get chip and board defs */ -#include <asm/arch/omap3.h> +#include <configs/ti_omap3_common.h>

/* * Display CPU and Board information @@ -32,57 +35,10 @@ #define CONFIG_DISPLAY_CPUINFO 1 #define CONFIG_DISPLAY_BOARDINFO 1

-/* Clock Defines */ -#define V_OSCK 26000000 /* Clock output from T2 */ -#define V_SCLK (V_OSCK >> 1) - #define CONFIG_MISC_INIT_R

-#define CONFIG_OF_LIBFDT -#define CONFIG_CMD_BOOTZ - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 #define CONFIG_REVISION_TAG 1 - -/* - * Size of malloc() pool - */ -#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ - /* Sector */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) - -/* - * Hardware drivers - */ - -/* - * NS16550 Configuration - */ -#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ - -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK - -/* - * select serial console configuration - */ -#define CONFIG_CONS_INDEX 3 -#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 -#define CONFIG_SERIAL3 3 /* UART3 on Beagle Rev 2 */ - -/* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ - 115200} -#define CONFIG_GENERIC_MMC 1 -#define CONFIG_MMC 1 -#define CONFIG_OMAP_HSMMC 1 -#define CONFIG_DOS_PARTITION 1

/* Status LED */ #define CONFIG_STATUS_LED 1 @@ -134,44 +90,23 @@ #define CONFIG_CMD_ASKENV

#define CONFIG_CMD_CACHE -#define CONFIG_CMD_EXT2 /* EXT2 Support */ -#define CONFIG_CMD_FAT /* FAT support */ -#define CONFIG_CMD_FS_GENERIC /* Generic FS support */ -#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ -#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ + #define MTDIDS_DEFAULT "nand0=nand" #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ "1920k(u-boot),128k(u-boot-env),"\ "4m(kernel),-(fs)"

-#define CONFIG_CMD_I2C /* I2C serial bus support */ -#define CONFIG_CMD_MMC /* MMC support */ #define CONFIG_USB_STORAGE /* USB storage support */ #define CONFIG_CMD_NAND /* NAND support */ #define CONFIG_CMD_LED /* LED support */ -#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ -#define CONFIG_CMD_NFS /* NFS support */ -#define CONFIG_CMD_PING -#define CONFIG_CMD_DHCP #define CONFIG_CMD_SETEXPR /* Evaluate expressions */ #define CONFIG_CMD_GPIO /* Enable gpio command */

-#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMI /* iminfo */ -#undef CONFIG_CMD_IMLS /* List all found images */ - -#define CONFIG_SYS_NO_FLASH -#define CONFIG_SYS_I2C -#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 -#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 -#define CONFIG_SYS_I2C_OMAP34XX #define CONFIG_VIDEO_OMAP3 /* DSS Support */

/* * TWL4030 */ -#define CONFIG_TWL4030_POWER 1 #define CONFIG_TWL4030_LED 1

/* @@ -179,17 +114,9 @@ */ #define CONFIG_SYS_NAND_QUIET_TEST 1 #define CONFIG_NAND_OMAP_GPMC -#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ - /* to access nand */ -#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ - /* to access nand at */ - /* CS0 */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ /* devices */

-/* Environment information */ -#define CONFIG_BOOTDELAY 3 - #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x80200000\0" \ "rdaddr=0x81000000\0" \ @@ -310,46 +237,14 @@ "run mmcbootz; " \ "fi; " \

-#define CONFIG_AUTO_COMPLETE 1 -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ -#define CONFIG_SYS_PROMPT "OMAP3 beagleboard.org # " -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) - -#define CONFIG_SYS_ALT_MEMTEST 1 -#define CONFIG_SYS_MEMTEST_START (0x82000000) /* memtest */ - /* defaults */ -#define CONFIG_SYS_MEMTEST_END (0x87FFFFFF) /* 128MB */ -#define CONFIG_SYS_MEMTEST_SCRATCH (0x81000000) /* dummy address */ - -#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ - /* load address */ - /* * OMAP3 has 12 GP timers, they can be driven by the system clock * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). * This rate is divided by a local divisor. */ -#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */

/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ -#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 -#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 - -/*----------------------------------------------------------------------- * FLASH and environment organization */

@@ -359,8 +254,6 @@ #define PISMO1_NAND_SIZE GPMC_SIZE_128M #define PISMO1_ONEN_SIZE GPMC_SIZE_128M

-#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ - #if defined(CONFIG_CMD_NAND) #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE #endif @@ -370,6 +263,7 @@ #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP

#define CONFIG_ENV_IS_IN_NAND 1 +#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */

@@ -377,49 +271,12 @@ #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET

-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 -#define CONFIG_SYS_INIT_RAM_SIZE 0x800 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) - #define CONFIG_OMAP3_SPI

#define CONFIG_SYS_CACHELINE_SIZE 64

/* Defines for SPL */ -#define CONFIG_SPL -#define CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_NAND_SIMPLE -#define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ -#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK - -#define CONFIG_SPL_BSS_START_ADDR 0x80000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ - -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ -#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ -#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 -#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" - -#define CONFIG_SPL_BOARD_INIT -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBDISK_SUPPORT -#define CONFIG_SPL_I2C_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_MMC_SUPPORT -#define CONFIG_SPL_FAT_SUPPORT -#define CONFIG_SPL_SERIAL_SUPPORT -#define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_BASE -#define CONFIG_SPL_NAND_DRIVERS -#define CONFIG_SPL_NAND_ECC -#define CONFIG_SPL_GPIO_SUPPORT -#define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SPL_OMAP3_ID_NAND -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"

/* NAND boot config */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE @@ -433,17 +290,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 3 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000

-/* - * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM - * 64 bytes before this address should be set aside for u-boot.img's - * header. That is 0x800FFFC0--0x80100000 should not be used for any - * other needs. - */ -#define CONFIG_SYS_TEXT_BASE 0x80100000 -#define CONFIG_SYS_SPL_MALLOC_START 0x80208000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 - #endif /* __CONFIG_H */ diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index abfaa76..147daf9 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -91,7 +91,9 @@ */ #ifdef CONFIG_NAND #define CONFIG_NAND_OMAP_GPMC +#ifndef CONFIG_SYS_NAND_BASE #define CONFIG_SYS_NAND_BASE 0x8000000 +#endif #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_CMD_NAND #endif @@ -189,12 +191,18 @@ * We have the SPL malloc pool at the end of the BSS area. */ #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR +#ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0x80800000 +#endif +#ifndef CONFIG_SPL_BSS_START_ADDR #define CONFIG_SPL_BSS_START_ADDR 0x80a00000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ +#endif +#ifndef CONFIG_SYS_SPL_MALLOC_START #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN +#endif

/* RAW SD card / eMMC locations. */ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index 854cb78..26d3743 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -65,6 +65,7 @@ #ifdef CONFIG_NAND #define CONFIG_SPL_NAND_SUPPORT #define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SYS_NAND_BASE 0x30000000 #endif

/* Now bring in the rest of the common code. */