Signed-off-by: Marek Vasut marek.vasut@gmail.com Cc: Stefano Babic sbabic@denx.de --- MAINTAINERS | 1 + board/efikamx/imximage.cfg | 122 ----------------------------------------- board/efikamx/imximage_mx.cfg | 122 +++++++++++++++++++++++++++++++++++++++++ board/efikamx/imximage_sb.cfg | 122 +++++++++++++++++++++++++++++++++++++++++ boards.cfg | 3 +- 5 files changed, 247 insertions(+), 123 deletions(-) delete mode 100644 board/efikamx/imximage.cfg create mode 100644 board/efikamx/imximage_mx.cfg create mode 100644 board/efikamx/imximage_sb.cfg

V2: Add missing MAINTAINERS entry

diff --git a/MAINTAINERS b/MAINTAINERS index 2f60a60..86f581b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -848,6 +848,7 @@ Marek Vasut marek.vasut@gmail.com vpac270 xscale/pxa zipitz2 xscale/pxa efikamx i.MX51 + efikasb i.MX51

Hugo Villeneuve hugo.villeneuve@lyrtech.com

diff --git a/board/efikamx/imximage.cfg b/board/efikamx/imximage.cfg deleted file mode 100644 index 6fe0ff9..0000000 --- a/board/efikamx/imximage.cfg +++ /dev/null @@ -1,122 +0,0 @@ -# -# Copyright (C) 2010 Marek Vasut marek.vasut@gmail.com -# -# BASED ON: imx51evk -# -# (C) Copyright 2009 -# Stefano Babic DENX Software Engineering sbabic@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not write to the Free Software -# Foundation Inc. 51 Franklin Street Fifth Floor Boston, -# MA 02110-1301 USA -# -# Refer docs/README.imxmage for more details about how-to configure -# and create imximage boot image -# -# The syntax is taken as close as possible with the kwbimage - -# Boot Device : one of -# spi, sd (the board has no nand neither onenand) -BOOT_FROM spi - -# Device Configuration Data (DCD) -# -# Each entry must have the format: -# Addr-type Address Value -# -# where: -# Addr-type register length (1,2 or 4 bytes) -# Address absolute address of the register -# value value to be stored in the register - -# Setting IOMUXC -DATA 4 0x73fa88a0 0x000 -DATA 4 0x73fa850c 0x20c5 -DATA 4 0x73fa8510 0x20c5 -DATA 4 0x73fa883c 0x5 -DATA 4 0x73fa8848 0x5 -DATA 4 0x73fa84b8 0xe7 -DATA 4 0x73fa84bc 0x45 -DATA 4 0x73fa84c0 0x45 -DATA 4 0x73fa84c4 0x45 -DATA 4 0x73fa84c8 0x45 -DATA 4 0x73fa8820 0x0 -DATA 4 0x73fa84a4 0x5 -DATA 4 0x73fa84a8 0x5 -DATA 4 0x73fa84ac 0xe5 -DATA 4 0x73fa84b0 0xe5 -DATA 4 0x73fa84b4 0xe5 -DATA 4 0x73fa84cc 0xe5 -DATA 4 0x73fa84d0 0xe4 - -DATA 4 0x73fa882c 0x4 -DATA 4 0x73fa88a4 0x4 -DATA 4 0x73fa88ac 0x4 -DATA 4 0x73fa88b8 0x4 - -# Setting DDR for micron -# 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model -# CAS=3 BL=4 -# ESDCTL_ESDCTL0 -DATA 4 0x83fd9000 0x82a20000 -# ESDCTL_ESDCTL1 -DATA 4 0x83fd9008 0x82a20000 -# ESDCTL_ESDMISC -DATA 4 0x83fd9010 0xcaaaf6d0 -# ESDCTL_ESDCFG0 -DATA 4 0x83fd9004 0x3f3574aa -# ESDCTL_ESDCFG1 -DATA 4 0x83fd900c 0x3f3574aa - -# Init DRAM on CS0 -# ESDCTL_ESDSCR -DATA 4 0x83fd9014 0x04008008 -DATA 4 0x83fd9014 0x0000801a -DATA 4 0x83fd9014 0x0000801b -DATA 4 0x83fd9014 0x00448019 -DATA 4 0x83fd9014 0x07328018 -DATA 4 0x83fd9014 0x04008008 -DATA 4 0x83fd9014 0x00008010 -DATA 4 0x83fd9014 0x00008010 -DATA 4 0x83fd9014 0x06328018 -DATA 4 0x83fd9014 0x03808019 -DATA 4 0x83fd9014 0x00408019 -DATA 4 0x83fd9014 0x00008000 - -# Init DRAM on CS1 -DATA 4 0x83fd9014 0x0400800c -DATA 4 0x83fd9014 0x0000801e -DATA 4 0x83fd9014 0x0000801f -DATA 4 0x83fd9014 0x0000801d -DATA 4 0x83fd9014 0x0732801c -DATA 4 0x83fd9014 0x0400800c -DATA 4 0x83fd9014 0x00008014 -DATA 4 0x83fd9014 0x00008014 -DATA 4 0x83fd9014 0x0632801c -DATA 4 0x83fd9014 0x0380801d -DATA 4 0x83fd9014 0x0040801d -DATA 4 0x83fd9014 0x00008004 - -# Write to CTL0 -DATA 4 0x83fd9000 0xb2a20000 -# Write to CTL1 -DATA 4 0x83fd9008 0xb2a20000 -# ESDMISC -DATA 4 0x83fd9010 0x000ad6d0 -#ESDCTL_ESDCDLYGD -DATA 4 0x83fd9034 0x90000000 -DATA 4 0x83fd9014 0x00000000 diff --git a/board/efikamx/imximage_mx.cfg b/board/efikamx/imximage_mx.cfg new file mode 100644 index 0000000..6fe0ff9 --- /dev/null +++ b/board/efikamx/imximage_mx.cfg @@ -0,0 +1,122 @@ +# +# Copyright (C) 2010 Marek Vasut marek.vasut@gmail.com +# +# BASED ON: imx51evk +# +# (C) Copyright 2009 +# Stefano Babic DENX Software Engineering sbabic@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not write to the Free Software +# Foundation Inc. 51 Franklin Street Fifth Floor Boston, +# MA 02110-1301 USA +# +# Refer docs/README.imxmage for more details about how-to configure +# and create imximage boot image +# +# The syntax is taken as close as possible with the kwbimage + +# Boot Device : one of +# spi, sd (the board has no nand neither onenand) +BOOT_FROM spi + +# Device Configuration Data (DCD) +# +# Each entry must have the format: +# Addr-type Address Value +# +# where: +# Addr-type register length (1,2 or 4 bytes) +# Address absolute address of the register +# value value to be stored in the register + +# Setting IOMUXC +DATA 4 0x73fa88a0 0x000 +DATA 4 0x73fa850c 0x20c5 +DATA 4 0x73fa8510 0x20c5 +DATA 4 0x73fa883c 0x5 +DATA 4 0x73fa8848 0x5 +DATA 4 0x73fa84b8 0xe7 +DATA 4 0x73fa84bc 0x45 +DATA 4 0x73fa84c0 0x45 +DATA 4 0x73fa84c4 0x45 +DATA 4 0x73fa84c8 0x45 +DATA 4 0x73fa8820 0x0 +DATA 4 0x73fa84a4 0x5 +DATA 4 0x73fa84a8 0x5 +DATA 4 0x73fa84ac 0xe5 +DATA 4 0x73fa84b0 0xe5 +DATA 4 0x73fa84b4 0xe5 +DATA 4 0x73fa84cc 0xe5 +DATA 4 0x73fa84d0 0xe4 + +DATA 4 0x73fa882c 0x4 +DATA 4 0x73fa88a4 0x4 +DATA 4 0x73fa88ac 0x4 +DATA 4 0x73fa88b8 0x4 + +# Setting DDR for micron +# 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model +# CAS=3 BL=4 +# ESDCTL_ESDCTL0 +DATA 4 0x83fd9000 0x82a20000 +# ESDCTL_ESDCTL1 +DATA 4 0x83fd9008 0x82a20000 +# ESDCTL_ESDMISC +DATA 4 0x83fd9010 0xcaaaf6d0 +# ESDCTL_ESDCFG0 +DATA 4 0x83fd9004 0x3f3574aa +# ESDCTL_ESDCFG1 +DATA 4 0x83fd900c 0x3f3574aa + +# Init DRAM on CS0 +# ESDCTL_ESDSCR +DATA 4 0x83fd9014 0x04008008 +DATA 4 0x83fd9014 0x0000801a +DATA 4 0x83fd9014 0x0000801b +DATA 4 0x83fd9014 0x00448019 +DATA 4 0x83fd9014 0x07328018 +DATA 4 0x83fd9014 0x04008008 +DATA 4 0x83fd9014 0x00008010 +DATA 4 0x83fd9014 0x00008010 +DATA 4 0x83fd9014 0x06328018 +DATA 4 0x83fd9014 0x03808019 +DATA 4 0x83fd9014 0x00408019 +DATA 4 0x83fd9014 0x00008000 + +# Init DRAM on CS1 +DATA 4 0x83fd9014 0x0400800c +DATA 4 0x83fd9014 0x0000801e +DATA 4 0x83fd9014 0x0000801f +DATA 4 0x83fd9014 0x0000801d +DATA 4 0x83fd9014 0x0732801c +DATA 4 0x83fd9014 0x0400800c +DATA 4 0x83fd9014 0x00008014 +DATA 4 0x83fd9014 0x00008014 +DATA 4 0x83fd9014 0x0632801c +DATA 4 0x83fd9014 0x0380801d +DATA 4 0x83fd9014 0x0040801d +DATA 4 0x83fd9014 0x00008004 + +# Write to CTL0 +DATA 4 0x83fd9000 0xb2a20000 +# Write to CTL1 +DATA 4 0x83fd9008 0xb2a20000 +# ESDMISC +DATA 4 0x83fd9010 0x000ad6d0 +#ESDCTL_ESDCDLYGD +DATA 4 0x83fd9034 0x90000000 +DATA 4 0x83fd9014 0x00000000 diff --git a/board/efikamx/imximage_sb.cfg b/board/efikamx/imximage_sb.cfg new file mode 100644 index 0000000..878146f --- /dev/null +++ b/board/efikamx/imximage_sb.cfg @@ -0,0 +1,122 @@ +# +# Copyright (C) 2010 Marek Vasut marek.vasut@gmail.com +# +# BASED ON: imx51evk +# +# (C) Copyright 2009 +# Stefano Babic DENX Software Engineering sbabic@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not write to the Free Software +# Foundation Inc. 51 Franklin Street Fifth Floor Boston, +# MA 02110-1301 USA +# +# Refer docs/README.imxmage for more details about how-to configure +# and create imximage boot image +# +# The syntax is taken as close as possible with the kwbimage + +# Boot Device : one of +# spi, sd (the board has no nand neither onenand) +BOOT_FROM spi + +# Device Configuration Data (DCD) +# +# Each entry must have the format: +# Addr-type Address Value +# +# where: +# Addr-type register length (1,2 or 4 bytes) +# Address absolute address of the register +# value value to be stored in the register + +# Setting IOMUXC +DATA 4 0x73fa88a0 0x200 +DATA 4 0x73fa850c 0x20c3 +DATA 4 0x73fa8510 0x20c3 +DATA 4 0x73fa883c 0x2 +DATA 4 0x73fa8848 0x2 +DATA 4 0x73fa84b8 0xe7 +DATA 4 0x73fa84bc 0x45 +DATA 4 0x73fa84c0 0x45 +DATA 4 0x73fa84c4 0x45 +DATA 4 0x73fa84c8 0x45 +DATA 4 0x73fa8820 0x0 +DATA 4 0x73fa84a4 0x5 +DATA 4 0x73fa84a8 0x5 +DATA 4 0x73fa84ac 0xe3 +DATA 4 0x73fa84b0 0xe3 +DATA 4 0x73fa84b4 0xe3 +DATA 4 0x73fa84cc 0xe3 +DATA 4 0x73fa84d0 0xe2 + +DATA 4 0x73fa882c 0x4 +DATA 4 0x73fa88a4 0x4 +DATA 4 0x73fa88ac 0x4 +DATA 4 0x73fa88b8 0x4 + +# Setting DDR for micron +# 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model +# CAS=3 BL=4 +# ESDCTL_ESDCTL0 +DATA 4 0x83fd9000 0x82a20000 +# ESDCTL_ESDCTL1 +DATA 4 0x83fd9008 0x82a20000 +# ESDCTL_ESDMISC +DATA 4 0x83fd9010 0xcaaaf6d0 +# ESDCTL_ESDCFG0 +DATA 4 0x83fd9004 0x333574aa +# ESDCTL_ESDCFG1 +DATA 4 0x83fd900c 0x333574aa + +# Init DRAM on CS0 +# ESDCTL_ESDSCR +DATA 4 0x83fd9014 0x04008008 +DATA 4 0x83fd9014 0x0000801a +DATA 4 0x83fd9014 0x0000801b +DATA 4 0x83fd9014 0x00448019 +DATA 4 0x83fd9014 0x07328018 +DATA 4 0x83fd9014 0x04008008 +DATA 4 0x83fd9014 0x00008010 +DATA 4 0x83fd9014 0x00008010 +DATA 4 0x83fd9014 0x06328018 +DATA 4 0x83fd9014 0x03808019 +DATA 4 0x83fd9014 0x00408019 +DATA 4 0x83fd9014 0x00008000 + +# Init DRAM on CS1 +DATA 4 0x83fd9014 0x0400800c +DATA 4 0x83fd9014 0x0000801e +DATA 4 0x83fd9014 0x0000801f +DATA 4 0x83fd9014 0x0000801d +DATA 4 0x83fd9014 0x0732801c +DATA 4 0x83fd9014 0x0400800c +DATA 4 0x83fd9014 0x00008014 +DATA 4 0x83fd9014 0x00008014 +DATA 4 0x83fd9014 0x0632801c +DATA 4 0x83fd9014 0x0380801d +DATA 4 0x83fd9014 0x0040801d +DATA 4 0x83fd9014 0x00008004 + +# Write to CTL0 +DATA 4 0x83fd9000 0xb2a20000 +# Write to CTL1 +DATA 4 0x83fd9008 0xb2a20000 +# ESDMISC +DATA 4 0x83fd9010 0xcaaaf6d0 +#ESDCTL_ESDCDLYGD +DATA 4 0x83fd9034 0x90000000 +DATA 4 0x83fd9014 0x00000000 diff --git a/boards.cfg b/boards.cfg index 8a5bfc1..bf9e0f7 100644 --- a/boards.cfg +++ b/boards.cfg @@ -155,7 +155,8 @@ dkb arm arm926ejs - Marvell pantheon integratorap_cm946es arm arm946es integrator armltd - integratorap integratorcp_cm946es arm arm946es integrator armltd - integratorcp ca9x4_ct_vxp arm armv7 vexpress armltd -efikamx arm armv7 efikamx - mx5 efikamx:IMX_CONFIG=board/efikamx/imximage.cfg +efikamx arm armv7 efikamx - mx5 efikamx:MACH_EFIKAMX,IMX_CONFIG=board/efikamx/imximage_mx.cfg +efikasb arm armv7 efikamx - mx5 efikamx:MACH_EFIKASB,IMX_CONFIG=board/efikamx/imximage_sb.cfg mx51evk arm armv7 mx51evk freescale mx5 mx51evk:IMX_CONFIG=board/freescale/mx51evk/imximage.cfg mx53ard arm armv7 mx53ard freescale mx5 mx53ard:IMX_CONFIG=board/freescale/mx53ard/imximage_dd3.cfg mx53evk arm armv7 mx53evk freescale mx5 mx53evk:IMX_CONFIG=board/freescale/mx53evk/imximage.cfg

On 09/19/2011 12:42 PM, Marek Vasut wrote:

Signed-off-by: Marek Vasut marek.vasut@gmail.com Cc: Stefano Babic sbabic@denx.de

---

Hi Marek,

sorry for late review. I missed this patch...

Only a couple of minor issues:

+#if !defined(CONFIG_MACH_EFIKAMX) && !defined(CONFIG_MACH_EFIKASB) +#error "Missing CONFIG_MACH_EFIKAMX or CONFIG_MACH_EFIKASB in config.h!" +#endif

This seems not necessary because CONFIG_MACH_EFIKA* is set at the build time with the option in boards.cfg. With a correct boards.cfg, we cannot get this error.

@@ -284,9 +304,9 @@ int board_mmc_init(bd_t *bis) int ret;

/* SDHC1 is used on all revisions, setup control pins first */

• mxc_request_iomux(MX51_PIN_GPIO1_0,

• mxc_request_iomux(EFIKA_SD1_CD, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION);

• mxc_iomux_set_pad(MX51_PIN_GPIO1_0,

• mxc_iomux_set_pad(EFIKA_SD1_CD, PAD_CTL_DRV_HIGH | PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_KEEPER | PAD_CTL_100K_PU | PAD_CTL_ODE_OPENDRAIN_NONE |

@@ -298,11 +318,13 @@ int board_mmc_init(bd_t *bis) PAD_CTL_100K_PU | PAD_CTL_ODE_OPENDRAIN_NONE | PAD_CTL_SRE_FAST);

• gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_0));

• gpio_direction_input(IOMUX_TO_GPIO(EFIKA_SD1_CD)); gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_1));

+#ifndef CONFIG_MACH_EFIKASB

It is better to have the check consistent in the file. You mix #ifdef CONFIG_MACH_EFIKAMX with #ifndef CONFIG_MACH_EFIKASB, that is the same.

/* Internal SDHC1 IOMUX + SDHC2 IOMUX on old boards */ if (get_efika_rev() < EFIKAMX_BOARD_REV_12) { +#endif

At the moment, the #ifdef seems redundant. You hard-code the efikasb revision to zero, and then get_efika_rev() is always smaller as EFIKAMX_BOARD_REV_12. What about to introduce a macro such as board_is() to increase readability ?

This if statement really means:

if (board_is(EFIKASB) || (board_is(EFIKAMX) && get_efika_rev() < EFIKAMX_BOARD_REV_12))

/*

• Board initialization

@@ -616,7 +661,11 @@ int board_early_init_f(void)

int board_init(void) { +#ifdef CONFIG_MACH_EFIKAMX gd->bd->bi_arch_number = MACH_TYPE_MX51_EFIKAMX; +#else

• gd->bd->bi_arch_number = MACH_TYPE_MX51_EFIKASB;

+#endif gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;

Can we use the new rule to set up the MACH-ID ? You can move the #ifdef inside config.h and let common code to set it.

Best regards, Stefano Babic

Signed-off-by: Marek Vasut marek.vasut@gmail.com Cc: Stefano Babic sbabic@denx.de --- board/efikamx/efikamx.c | 124 ++++++++++++++++++++++++++++++++++++--------- include/configs/efikamx.h | 4 ++ 2 files changed, 103 insertions(+), 25 deletions(-)

V2: Introduce machine_is_efika{mx,sb}() and use where appropriate. The current implementation is temporary.

diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c index 5be1f6c..0c4e24b 100644 --- a/board/efikamx/efikamx.c +++ b/board/efikamx/efikamx.c @@ -62,10 +62,13 @@ void efikamx_toggle_led(uint32_t mask); #define EFIKAMX_BOARD_REV_13 0x3 #define EFIKAMX_BOARD_REV_14 0x4

+#define EFIKASB_BOARD_REV_13 0x1 +#define EFIKASB_BOARD_REV_20 0x2 + /* * Board identification */ -u32 get_efika_rev(void) +u32 get_efikamx_rev(void) { u32 rev = 0; /* @@ -97,6 +100,31 @@ u32 get_efika_rev(void) return (~rev & 0x7) + 1; }

+inline u32 get_efikasb_rev(void) +{ + u32 rev = 0; + + mxc_request_iomux(MX51_PIN_EIM_CS3, IOMUX_CONFIG_GPIO); + mxc_iomux_set_pad(MX51_PIN_EIM_CS3, PAD_CTL_100K_PU); + gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_EIM_CS3)); + rev |= (!!gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_EIM_CS3))) << 0; + + mxc_request_iomux(MX51_PIN_EIM_CS4, IOMUX_CONFIG_GPIO); + mxc_iomux_set_pad(MX51_PIN_EIM_CS4, PAD_CTL_100K_PU); + gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_EIM_CS4)); + rev |= (!!gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_EIM_CS4))) << 1; + + return rev; +} + +inline uint32_t get_efika_rev(void) +{ + if (machine_is_efikamx()) + return get_efikamx_rev(); + else + return get_efikasb_rev(); +} + u32 get_board_rev(void) { return get_cpu_rev() | (get_efika_rev() << 8); @@ -268,25 +296,36 @@ struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC2_BASE_ADDR, 1}, };

+static inline uint32_t efika_mmc_cd(void) +{ + if (machine_is_efikamx()) + return MX51_PIN_GPIO1_0; + else + return MX51_PIN_EIM_CS2; +} + int board_mmc_getcd(u8 *absent, struct mmc *mmc) { struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + uint32_t cd = efika_mmc_cd();

if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR) - *absent = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_0)); + *absent = gpio_get_value(IOMUX_TO_GPIO(cd)); else *absent = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_8));

return 0; } + int board_mmc_init(bd_t *bis) { int ret; + uint32_t cd = efika_mmc_cd();

/* SDHC1 is used on all revisions, setup control pins first */ - mxc_request_iomux(MX51_PIN_GPIO1_0, + mxc_request_iomux(cd, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); - mxc_iomux_set_pad(MX51_PIN_GPIO1_0, + mxc_iomux_set_pad(cd, PAD_CTL_DRV_HIGH | PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_KEEPER | PAD_CTL_100K_PU | PAD_CTL_ODE_OPENDRAIN_NONE | @@ -298,11 +337,12 @@ int board_mmc_init(bd_t *bis) PAD_CTL_100K_PU | PAD_CTL_ODE_OPENDRAIN_NONE | PAD_CTL_SRE_FAST);

- gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_0)); + gpio_direction_input(IOMUX_TO_GPIO(cd)); gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_1));

/* Internal SDHC1 IOMUX + SDHC2 IOMUX on old boards */ - if (get_efika_rev() < EFIKAMX_BOARD_REV_12) { + if (machine_is_efikasb() || (machine_is_efikamx() && + (get_efika_rev() < EFIKAMX_BOARD_REV_12))) { /* SDHC1 IOMUX */ mxc_request_iomux(MX51_PIN_SD1_CMD, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION); @@ -414,6 +454,7 @@ int board_mmc_init(bd_t *bis)

ret = fsl_esdhc_initialize(bis, &esdhc_cfg[0]); } + return ret; } #endif @@ -493,27 +534,44 @@ static inline void setup_iomux_ata(void) { } */ void setup_iomux_led(void) { - /* Blue LED */ - mxc_request_iomux(MX51_PIN_CSI1_D9, IOMUX_CONFIG_ALT3); - gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI1_D9), 0); - - /* Green LED */ - mxc_request_iomux(MX51_PIN_CSI1_VSYNC, IOMUX_CONFIG_ALT3); - gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI1_VSYNC), 0); - - /* Red LED */ - mxc_request_iomux(MX51_PIN_CSI1_HSYNC, IOMUX_CONFIG_ALT3); - gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI1_HSYNC), 0); + if (machine_is_efikamx()) { + /* Blue LED */ + mxc_request_iomux(MX51_PIN_CSI1_D9, IOMUX_CONFIG_ALT3); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI1_D9), 0); + + /* Green LED */ + mxc_request_iomux(MX51_PIN_CSI1_VSYNC, IOMUX_CONFIG_ALT3); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI1_VSYNC), 0); + + /* Red LED */ + mxc_request_iomux(MX51_PIN_CSI1_HSYNC, IOMUX_CONFIG_ALT3); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI1_HSYNC), 0); + } else { + /* CAPS-LOCK LED */ + mxc_request_iomux(MX51_PIN_EIM_CS0, IOMUX_CONFIG_GPIO); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_CS0), 0); + + /* ALARM-LED LED */ + mxc_request_iomux(MX51_PIN_GPIO1_3, IOMUX_CONFIG_GPIO); + gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_3), 0); + } }

void efikamx_toggle_led(uint32_t mask) { - gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI1_D9), - mask & EFIKAMX_LED_BLUE); - gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI1_VSYNC), - mask & EFIKAMX_LED_GREEN); - gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI1_HSYNC), - mask & EFIKAMX_LED_RED); + if (machine_is_efikamx()) { + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI1_D9), + mask & EFIKAMX_LED_BLUE); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI1_VSYNC), + mask & EFIKAMX_LED_GREEN); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI1_HSYNC), + mask & EFIKAMX_LED_RED); + } else { + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_CS0), + mask & EFIKAMX_LED_BLUE); + gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_3), + !(mask & EFIKAMX_LED_GREEN)); + } }

/* @@ -607,7 +665,6 @@ int board_early_init_f(void)

int board_init(void) { - gd->bd->bi_arch_number = MACH_TYPE_MX51_EFIKAMX; gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;

return 0; @@ -629,7 +686,24 @@ int board_late_init(void)

int checkboard(void) { - puts("Board: Efika MX\n"); + u32 rev = get_efika_rev(); + + if (machine_is_efikamx()) { + printf("Board: Efika MX, rev1.%i\n", rev & 0xf); + return 0; + } else { + switch (rev) { + case EFIKASB_BOARD_REV_13: + printf("Board: Efika SB rev1.3\n"); + break; + case EFIKASB_BOARD_REV_20: + printf("Board: Efika SB rev2.0\n"); + break; + default: + printf("Board: Efika SB, rev Unknown\n"); + break; + } + }

return 0; } diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h index fdd0a14..54f48e4 100644 --- a/include/configs/efikamx.h +++ b/include/configs/efikamx.h @@ -31,6 +31,10 @@ */ /* An i.MX51 CPU */ #define CONFIG_MX51 + +#define machine_is_efikamx() (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKAMX) +#define machine_is_efikasb() (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKASB) + #include <asm/arch/imx-regs.h>

#define CONFIG_SYS_MX5_HCLK 24000000