[PATCH 0/4] Fix arasan nand driver issues
In this patch series - Remove hardcoding of NAND_BBT_USE_FLASH in nand->bbt_options - Find and update nand ofnode. - Fix nand node in zynqmp-zc1751-xm017-dc3.dts file - Enable nand-on-flash-bbt flag in zynqmp DT's by default
Ashok Reddy Soma (4): mtd: nand: arasan: Remove hardcoded bbt option mtd: nand: arasan: Set ofnode value arm64: dts: zynqmp: Fix nand dt node arm64: dts: zynqmp: Enable nand-on-flash-bbt in DT by default
arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 2 + arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts | 119 ++++++++++++++--------- drivers/mtd/nand/raw/arasan_nfc.c | 5 +- 3 files changed, 78 insertions(+), 48 deletions(-)
Bad block table option is hardcoded to read from flash with NAND_BBT_USE_FLASH option. This decision should be done based on DT property. Remove this hardcoding, to be able to use DT property.
Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@amd.com ---
drivers/mtd/nand/raw/arasan_nfc.c | 1 - 1 file changed, 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/arasan_nfc.c b/drivers/mtd/nand/raw/arasan_nfc.c index 4621bfb03e..ddb4cb1cba 100644 --- a/drivers/mtd/nand/raw/arasan_nfc.c +++ b/drivers/mtd/nand/raw/arasan_nfc.c @@ -1248,7 +1248,6 @@ static int arasan_probe(struct udevice *dev) /* Buffer read/write routines */ nand_chip->read_buf = arasan_nand_read_buf; nand_chip->write_buf = arasan_nand_write_buf; - nand_chip->bbt_options = NAND_BBT_USE_FLASH;
writel(0x0, &info->reg->cmd_reg); writel(0x0, &info->reg->pgm_reg);
Ofnode value is not set, so all the DT properties are not being read and due to this default values are being used.
Find nand node and set chip->flash_node value.
Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@amd.com ---
drivers/mtd/nand/raw/arasan_nfc.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/mtd/nand/raw/arasan_nfc.c b/drivers/mtd/nand/raw/arasan_nfc.c index ddb4cb1cba..99e2681c14 100644 --- a/drivers/mtd/nand/raw/arasan_nfc.c +++ b/drivers/mtd/nand/raw/arasan_nfc.c @@ -1230,12 +1230,16 @@ static int arasan_probe(struct udevice *dev) struct nand_drv *info = &arasan->nand_ctrl; struct nand_config *nand = &info->config; struct mtd_info *mtd; + ofnode child; int err = -1;
info->reg = (struct nand_regs *)dev_read_addr(dev); mtd = nand_to_mtd(nand_chip); nand_set_controller_data(nand_chip, &arasan->nand_ctrl);
+ ofnode_for_each_subnode(child, dev_ofnode(dev)) + nand_set_flash_node(nand_chip, child); + #ifdef CONFIG_SYS_NAND_NO_SUBPAGE_WRITE nand_chip->options |= NAND_NO_SUBPAGE_WRITE; #endif
DC3 nand node is not correct, it is showing all partitions under controller node directly. Create two sub nand nodes with partitions for each.
Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@amd.com ---
arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts | 117 ++++++++++++++--------- 1 file changed, 70 insertions(+), 47 deletions(-)
diff --git a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts index 13812470ae..8a06c2a90a 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts @@ -128,54 +128,77 @@ arasan,has-mdma; num-cs = <2>;
- partition@0 { /* for testing purpose */ - label = "nand-fsbl-uboot"; - reg = <0x0 0x0 0x400000>; + nand@0 { + reg = <0x0>; + #address-cells = <0x2>; + #size-cells = <0x1>; + nand-ecc-mode = "soft"; + nand-ecc-algo = "bch"; + nand-rb = <0>; + label = "main-storage-0"; + nand-ecc-step-size = <1024>; + nand-ecc-strength = <24>; + + partition@0 { /* for testing purpose */ + label = "nand-fsbl-uboot"; + reg = <0x0 0x0 0x400000>; + }; + partition@1 { /* for testing purpose */ + label = "nand-linux"; + reg = <0x0 0x400000 0x1400000>; + }; + partition@2 { /* for testing purpose */ + label = "nand-device-tree"; + reg = <0x0 0x1800000 0x400000>; + }; + partition@3 { /* for testing purpose */ + label = "nand-rootfs"; + reg = <0x0 0x1C00000 0x1400000>; + }; + partition@4 { /* for testing purpose */ + label = "nand-bitstream"; + reg = <0x0 0x3000000 0x400000>; + }; + partition@5 { /* for testing purpose */ + label = "nand-misc"; + reg = <0x0 0x3400000 0xFCC00000>; + }; }; - partition@1 { /* for testing purpose */ - label = "nand-linux"; - reg = <0x0 0x400000 0x1400000>; - }; - partition@2 { /* for testing purpose */ - label = "nand-device-tree"; - reg = <0x0 0x1800000 0x400000>; - }; - partition@3 { /* for testing purpose */ - label = "nand-rootfs"; - reg = <0x0 0x1C00000 0x1400000>; - }; - partition@4 { /* for testing purpose */ - label = "nand-bitstream"; - reg = <0x0 0x3000000 0x400000>; - }; - partition@5 { /* for testing purpose */ - label = "nand-misc"; - reg = <0x0 0x3400000 0xFCC00000>; - }; - - partition@6 { /* for testing purpose */ - label = "nand1-fsbl-uboot"; - reg = <0x1 0x0 0x400000>; - }; - partition@7 { /* for testing purpose */ - label = "nand1-linux"; - reg = <0x1 0x400000 0x1400000>; - }; - partition@8 { /* for testing purpose */ - label = "nand1-device-tree"; - reg = <0x1 0x1800000 0x400000>; - }; - partition@9 { /* for testing purpose */ - label = "nand1-rootfs"; - reg = <0x1 0x1C00000 0x1400000>; - }; - partition@10 { /* for testing purpose */ - label = "nand1-bitstream"; - reg = <0x1 0x3000000 0x400000>; - }; - partition@11 { /* for testing purpose */ - label = "nand1-misc"; - reg = <0x1 0x3400000 0xFCC00000>; + nand@1 { + reg = <0x1>; + #address-cells = <0x2>; + #size-cells = <0x1>; + nand-ecc-mode = "soft"; + nand-ecc-algo = "bch"; + nand-rb = <0>; + label = "main-storage-1"; + nand-ecc-step-size = <1024>; + nand-ecc-strength = <24>; + + partition@0 { /* for testing purpose */ + label = "nand1-fsbl-uboot"; + reg = <0x0 0x0 0x400000>; + }; + partition@1 { /* for testing purpose */ + label = "nand1-linux"; + reg = <0x0 0x400000 0x1400000>; + }; + partition@2 { /* for testing purpose */ + label = "nand1-device-tree"; + reg = <0x0 0x1800000 0x400000>; + }; + partition@3 { /* for testing purpose */ + label = "nand1-rootfs"; + reg = <0x0 0x1C00000 0x1400000>; + }; + partition@4 { /* for testing purpose */ + label = "nand1-bitstream"; + reg = <0x0 0x3000000 0x400000>; + }; + partition@5 { /* for testing purpose */ + label = "nand1-misc"; + reg = <0x0 0x3400000 0xFCC00000>; + }; }; };
Hi Ashok,
On Fri, Feb 24, 2023 at 6:07 AM Ashok Reddy Soma ashok.reddy.soma@amd.com wrote:
DC3 nand node is not correct, it is showing all partitions under controller node directly. Create two sub nand nodes with partitions for each.
Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@amd.com
arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts | 117 ++++++++++++++--------- 1 file changed, 70 insertions(+), 47 deletions(-)
diff --git a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts index 13812470ae..8a06c2a90a 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts @@ -128,54 +128,77 @@ arasan,has-mdma; num-cs = <2>;
partition@0 { /* for testing purpose */label = "nand-fsbl-uboot";reg = <0x0 0x0 0x400000>;
nand@0 {reg = <0x0>;#address-cells = <0x2>;#size-cells = <0x1>;nand-ecc-mode = "soft";nand-ecc-algo = "bch";nand-rb = <0>;label = "main-storage-0";nand-ecc-step-size = <1024>;nand-ecc-strength = <24>;partition@0 { /* for testing purpose */label = "nand-fsbl-uboot";reg = <0x0 0x0 0x400000>;};partition@1 { /* for testing purpose */label = "nand-linux";reg = <0x0 0x400000 0x1400000>;};partition@2 { /* for testing purpose */label = "nand-device-tree";reg = <0x0 0x1800000 0x400000>;};partition@3 { /* for testing purpose */label = "nand-rootfs";reg = <0x0 0x1C00000 0x1400000>;};partition@4 { /* for testing purpose */label = "nand-bitstream";reg = <0x0 0x3000000 0x400000>;};partition@5 { /* for testing purpose */label = "nand-misc";reg = <0x0 0x3400000 0xFCC00000>;}; };
I don't see these partitions in the kernel dts. Can we take advantage of this opportunity to align the dts to that of the kernel by adding a new file -u-boot.dtsi where to put the partitions?
Thanks and regards,
Dario
partition@1 { /* for testing purpose */label = "nand-linux";reg = <0x0 0x400000 0x1400000>;};partition@2 { /* for testing purpose */label = "nand-device-tree";reg = <0x0 0x1800000 0x400000>;};partition@3 { /* for testing purpose */label = "nand-rootfs";reg = <0x0 0x1C00000 0x1400000>;};partition@4 { /* for testing purpose */label = "nand-bitstream";reg = <0x0 0x3000000 0x400000>;};partition@5 { /* for testing purpose */label = "nand-misc";reg = <0x0 0x3400000 0xFCC00000>;};partition@6 { /* for testing purpose */label = "nand1-fsbl-uboot";reg = <0x1 0x0 0x400000>;};partition@7 { /* for testing purpose */label = "nand1-linux";reg = <0x1 0x400000 0x1400000>;};partition@8 { /* for testing purpose */label = "nand1-device-tree";reg = <0x1 0x1800000 0x400000>;};partition@9 { /* for testing purpose */label = "nand1-rootfs";reg = <0x1 0x1C00000 0x1400000>;};partition@10 { /* for testing purpose */label = "nand1-bitstream";reg = <0x1 0x3000000 0x400000>;};partition@11 { /* for testing purpose */label = "nand1-misc";reg = <0x1 0x3400000 0xFCC00000>;
nand@1 {reg = <0x1>;#address-cells = <0x2>;#size-cells = <0x1>;nand-ecc-mode = "soft";nand-ecc-algo = "bch";nand-rb = <0>;label = "main-storage-1";nand-ecc-step-size = <1024>;nand-ecc-strength = <24>;partition@0 { /* for testing purpose */label = "nand1-fsbl-uboot";reg = <0x0 0x0 0x400000>;};partition@1 { /* for testing purpose */label = "nand1-linux";reg = <0x0 0x400000 0x1400000>;};partition@2 { /* for testing purpose */label = "nand1-device-tree";reg = <0x0 0x1800000 0x400000>;};partition@3 { /* for testing purpose */label = "nand1-rootfs";reg = <0x0 0x1C00000 0x1400000>;};partition@4 { /* for testing purpose */label = "nand1-bitstream";reg = <0x0 0x3000000 0x400000>;};partition@5 { /* for testing purpose */label = "nand1-misc";reg = <0x0 0x3400000 0xFCC00000>;}; };};
-- 2.17.1
On 2/27/23 15:58, Dario Binacchi wrote:
Hi Ashok,
On Fri, Feb 24, 2023 at 6:07 AM Ashok Reddy Soma ashok.reddy.soma@amd.com wrote:
DC3 nand node is not correct, it is showing all partitions under controller node directly. Create two sub nand nodes with partitions for each.
Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@amd.com
arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts | 117 ++++++++++++++--------- 1 file changed, 70 insertions(+), 47 deletions(-)
diff --git a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts index 13812470ae..8a06c2a90a 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts @@ -128,54 +128,77 @@ arasan,has-mdma; num-cs = <2>;
partition@0 { /* for testing purpose */label = "nand-fsbl-uboot";reg = <0x0 0x0 0x400000>;
nand@0 {reg = <0x0>;#address-cells = <0x2>;#size-cells = <0x1>;nand-ecc-mode = "soft";nand-ecc-algo = "bch";nand-rb = <0>;label = "main-storage-0";nand-ecc-step-size = <1024>;nand-ecc-strength = <24>;partition@0 { /* for testing purpose */label = "nand-fsbl-uboot";reg = <0x0 0x0 0x400000>;};partition@1 { /* for testing purpose */label = "nand-linux";reg = <0x0 0x400000 0x1400000>;};partition@2 { /* for testing purpose */label = "nand-device-tree";reg = <0x0 0x1800000 0x400000>;};partition@3 { /* for testing purpose */label = "nand-rootfs";reg = <0x0 0x1C00000 0x1400000>;};partition@4 { /* for testing purpose */label = "nand-bitstream";reg = <0x0 0x3000000 0x400000>;};partition@5 { /* for testing purpose */label = "nand-misc";reg = <0x0 0x3400000 0xFCC00000>;}; };I don't see these partitions in the kernel dts. Can we take advantage of this opportunity to align the dts to that of the kernel by adding a new file -u-boot.dtsi where to put the partitions?
I don't want any -u-boot.dtsi file. Simon is trying to get rid of it by moving u-boot specific configurations to dt binding.
But I think we should used fixed-partitions description instead. Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml
And yes the same change should be also pushed to Linux kernel.
Thanks, Michal
By default enable nand-on-flash-bbt DT flag, so that driver always refers to the bad block table(bbt) present on the flash device.
Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@amd.com ---
arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 2 ++ arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts | 2 ++ 2 files changed, 4 insertions(+)
diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts index 4e6160bcd8..b6bc2f5be0 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts @@ -142,6 +142,7 @@ label = "main-storage-0"; nand-ecc-step-size = <1024>; nand-ecc-strength = <24>; + nand-on-flash-bbt;
partition@0 { /* for testing purpose */ label = "nand-fsbl-uboot"; @@ -178,6 +179,7 @@ label = "main-storage-1"; nand-ecc-step-size = <1024>; nand-ecc-strength = <24>; + nand-on-flash-bbt;
partition@0 { /* for testing purpose */ label = "nand1-fsbl-uboot"; diff --git a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts index 8a06c2a90a..6021f8b4e1 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts @@ -138,6 +138,7 @@ label = "main-storage-0"; nand-ecc-step-size = <1024>; nand-ecc-strength = <24>; + nand-on-flash-bbt;
partition@0 { /* for testing purpose */ label = "nand-fsbl-uboot"; @@ -174,6 +175,7 @@ label = "main-storage-1"; nand-ecc-step-size = <1024>; nand-ecc-strength = <24>; + nand-on-flash-bbt;
partition@0 { /* for testing purpose */ label = "nand1-fsbl-uboot";
On 2/24/23 06:07, Ashok Reddy Soma wrote:
In this patch series
- Remove hardcoding of NAND_BBT_USE_FLASH in nand->bbt_options
- Find and update nand ofnode.
- Fix nand node in zynqmp-zc1751-xm017-dc3.dts file
- Enable nand-on-flash-bbt flag in zynqmp DT's by default
Ashok Reddy Soma (4): mtd: nand: arasan: Remove hardcoded bbt option mtd: nand: arasan: Set ofnode value arm64: dts: zynqmp: Fix nand dt node arm64: dts: zynqmp: Enable nand-on-flash-bbt in DT by default
arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 2 + arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts | 119 ++++++++++++++--------- drivers/mtd/nand/raw/arasan_nfc.c | 5 +- 3 files changed, 78 insertions(+), 48 deletions(-)
Applied, M
Hi
On Tue, Mar 7, 2023 at 2:35 PM Michal Simek michal.simek@amd.com wrote:
On 2/24/23 06:07, Ashok Reddy Soma wrote:
In this patch series
- Remove hardcoding of NAND_BBT_USE_FLASH in nand->bbt_options
- Find and update nand ofnode.
- Fix nand node in zynqmp-zc1751-xm017-dc3.dts file
- Enable nand-on-flash-bbt flag in zynqmp DT's by default
If we are not fast to pick our part, please ping us
Thank you to pick them anyway
Michael
Ashok Reddy Soma (4): mtd: nand: arasan: Remove hardcoded bbt option mtd: nand: arasan: Set ofnode value arm64: dts: zynqmp: Fix nand dt node arm64: dts: zynqmp: Enable nand-on-flash-bbt in DT by default
arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 2 + arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts | 119 ++++++++++++++--------- drivers/mtd/nand/raw/arasan_nfc.c | 5 +- 3 files changed, 78 insertions(+), 48 deletions(-)
Applied, M
Hi,
On 3/7/23 15:02, Michael Nazzareno Trimarchi wrote:
Hi
On Tue, Mar 7, 2023 at 2:35 PM Michal Simek <michal.simek@amd.com mailto:michal.simek@amd.com> wrote:
On 2/24/23 06:07, Ashok Reddy Soma wrote: > In this patch series > - Remove hardcoding of NAND_BBT_USE_FLASH in nand->bbt_options > - Find and update nand ofnode. > - Fix nand node in zynqmp-zc1751-xm017-dc3.dts file > - Enable nand-on-flash-bbt flag in zynqmp DT's by default >If we are not fast to pick our part, please ping us
Thank you to pick them anyway
I am normally taking patches related to Xilinx/AMD SOCs and these 2 were quite simply. Anyway Ashok told me that nand core is kind of our sync from upstream kernel. Do you have any plan to sync changes from the kernel back to U-Boot?
Thanks, Michal
participants (4)
-
Ashok Reddy Soma -
Dario Binacchi -
Michael Nazzareno Trimarchi -
Michal Simek