Prepare file modification for kernel alignment and rename driver to stpmic1.

Signed-off-by: Patrick Delaunay patrick.delaunay@st.com ---

arch/arm/dts/stm32mp157c-ed1.dts | 2 +- board/st/stm32mp1/board.c | 2 +- board/st/stm32mp1/spl.c | 2 +- drivers/power/pmic/Makefile | 2 +- drivers/power/pmic/{stpmu1.c => stpmic1.c} | 2 +- drivers/power/regulator/Makefile | 2 +- drivers/power/regulator/{stpmu1.c => stpmic1.c} | 2 +- include/dt-bindings/mfd/{st,stpmu1.h => st,stpmic1.h} | 0 include/power/{stpmu1.h => stpmic1.h} | 0 9 files changed, 7 insertions(+), 7 deletions(-) rename drivers/power/pmic/{stpmu1.c => stpmic1.c} (98%) rename drivers/power/regulator/{stpmu1.c => stpmic1.c} (99%) rename include/dt-bindings/mfd/{st,stpmu1.h => st,stpmic1.h} (100%) rename include/power/{stpmu1.h => stpmic1.h} (100%)

diff --git a/arch/arm/dts/stm32mp157c-ed1.dts b/arch/arm/dts/stm32mp157c-ed1.dts index 7a9b742..ddee286 100644 --- a/arch/arm/dts/stm32mp157c-ed1.dts +++ b/arch/arm/dts/stm32mp157c-ed1.dts @@ -8,7 +8,7 @@ #include "stm32mp157c.dtsi" #include "stm32mp157-pinctrl.dtsi" #include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/mfd/st,stpmu1.h> +#include <dt-bindings/mfd/st,stpmic1.h>

/ { model = "STMicroelectronics STM32MP157C eval daughter"; diff --git a/board/st/stm32mp1/board.c b/board/st/stm32mp1/board.c index 5f31ea9..1bb9779 100644 --- a/board/st/stm32mp1/board.c +++ b/board/st/stm32mp1/board.c @@ -8,7 +8,7 @@ #include <asm/io.h> #include <asm/arch/ddr.h> #include <power/pmic.h> -#include <power/stpmu1.h> +#include <power/stpmic1.h>

#ifdef CONFIG_DEBUG_UART_BOARD_INIT void board_debug_uart_init(void) diff --git a/board/st/stm32mp1/spl.c b/board/st/stm32mp1/spl.c index f3db0d6..1202297 100644 --- a/board/st/stm32mp1/spl.c +++ b/board/st/stm32mp1/spl.c @@ -11,7 +11,7 @@ #include <asm/io.h> #include <post.h> #include <power/pmic.h> -#include <power/stpmu1.h> +#include <power/stpmic1.h> #include <asm/arch/ddr.h>

void spl_board_init(void) diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile index 637352a..147ac76 100644 --- a/drivers/power/pmic/Makefile +++ b/drivers/power/pmic/Makefile @@ -23,7 +23,7 @@ obj-$(CONFIG_DM_PMIC_TPS65910) += pmic_tps65910_dm.o obj-$(CONFIG_$(SPL_)PMIC_PALMAS) += palmas.o obj-$(CONFIG_$(SPL_)PMIC_LP873X) += lp873x.o obj-$(CONFIG_$(SPL_)PMIC_LP87565) += lp87565.o -obj-$(CONFIG_PMIC_STPMU1) += stpmu1.o +obj-$(CONFIG_PMIC_STPMU1) += stpmic1.o

obj-$(CONFIG_POWER_LTC3676) += pmic_ltc3676.o obj-$(CONFIG_POWER_MAX77696) += pmic_max77696.o diff --git a/drivers/power/pmic/stpmu1.c b/drivers/power/pmic/stpmic1.c similarity index 98% rename from drivers/power/pmic/stpmu1.c rename to drivers/power/pmic/stpmic1.c index 47af012..157ce8b 100644 --- a/drivers/power/pmic/stpmu1.c +++ b/drivers/power/pmic/stpmic1.c @@ -8,7 +8,7 @@ #include <errno.h> #include <i2c.h> #include <power/pmic.h> -#include <power/stpmu1.h> +#include <power/stpmic1.h>

#define STMPU1_NUM_OF_REGS 0x100

diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile index f617ce7..cfc91e8 100644 --- a/drivers/power/regulator/Makefile +++ b/drivers/power/regulator/Makefile @@ -24,4 +24,4 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR_LP873X) += lp873x_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_LP87565) += lp87565_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_STM32_VREFBUF) += stm32-vrefbuf.o obj-$(CONFIG_DM_REGULATOR_TPS65910) += tps65910_regulator.o -obj-$(CONFIG_$(SPL_)DM_REGULATOR_STPMU1) += stpmu1.o +obj-$(CONFIG_$(SPL_)DM_REGULATOR_STPMU1) += stpmic1.o diff --git a/drivers/power/regulator/stpmu1.c b/drivers/power/regulator/stpmic1.c similarity index 99% rename from drivers/power/regulator/stpmu1.c rename to drivers/power/regulator/stpmic1.c index 2e64051..c62a19a 100644 --- a/drivers/power/regulator/stpmu1.c +++ b/drivers/power/regulator/stpmic1.c @@ -9,7 +9,7 @@ #include <errno.h> #include <power/pmic.h> #include <power/regulator.h> -#include <power/stpmu1.h> +#include <power/stpmic1.h>

struct stpmu1_range { int min_uv; diff --git a/include/dt-bindings/mfd/st,stpmu1.h b/include/dt-bindings/mfd/st,stpmic1.h similarity index 100% rename from include/dt-bindings/mfd/st,stpmu1.h rename to include/dt-bindings/mfd/st,stpmic1.h diff --git a/include/power/stpmu1.h b/include/power/stpmic1.h similarity index 100% rename from include/power/stpmu1.h rename to include/power/stpmic1.h

Alignment with kernel driver name & binding introduced by https://patchwork.kernel.org/cover/10761943/ to use the final marketing name = STPMIC1.

Signed-off-by: Patrick Delaunay patrick.delaunay@st.com ---

MAINTAINERS | 2 + arch/arm/dts/stm32mp157c-ed1.dts | 6 +- board/st/stm32mp1/README | 6 +- board/st/stm32mp1/board.c | 45 ++-- board/st/stm32mp1/spl.c | 10 +- configs/stm32mp15_basic_defconfig | 4 +- configs/stm32mp15_trusted_defconfig | 4 +- drivers/power/pmic/Kconfig | 6 +- drivers/power/pmic/Makefile | 2 +- drivers/power/pmic/stpmic1.c | 62 ++--- drivers/power/regulator/Kconfig | 14 +- drivers/power/regulator/Makefile | 2 +- drivers/power/regulator/stpmic1.c | 504 +++++++++++++++++------------------ include/dt-bindings/mfd/st,stpmic1.h | 88 +++--- include/power/stpmic1.h | 135 +++++----- 15 files changed, 446 insertions(+), 444 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS index f86fdf9..43479ca 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -264,7 +264,9 @@ F: drivers/misc/stm32mp_fuse.c F: drivers/mmc/stm32_sdmmc2.c F: drivers/phy/phy-stm32-usbphyc.c F: drivers/pinctrl/pinctrl_stm32.c +F: drivers/power/pmic/stpmic1.c F: drivers/power/regulator/stm32-vrefbuf.c +F: drivers/power/regulator/stpmic1.c F: drivers/ram/stm32mp1/ F: drivers/misc/stm32_rcc.c F: drivers/reset/stm32-reset.c diff --git a/arch/arm/dts/stm32mp157c-ed1.dts b/arch/arm/dts/stm32mp157c-ed1.dts index ddee286..1d0306e 100644 --- a/arch/arm/dts/stm32mp157c-ed1.dts +++ b/arch/arm/dts/stm32mp157c-ed1.dts @@ -54,8 +54,8 @@ i2c-scl-falling-time-ns = <20>; status = "okay";

- pmic: stpmu1@33 { - compatible = "st,stpmu1"; + pmic: stpmic1@33 { + compatible = "st,stpmic1"; reg = <0x33>; interrupts = <0 2>; interrupt-parent = <&gpioa>; @@ -68,7 +68,7 @@ st,usb_control_register = <0x30>;

regulators { - compatible = "st,stpmu1-regulators"; + compatible = "st,stpmic1-regulators";

ldo1-supply = <&v3v3>; ldo2-supply = <&v3v3>; diff --git a/board/st/stm32mp1/README b/board/st/stm32mp1/README index 1c3e865..72b28fa 100644 --- a/board/st/stm32mp1/README +++ b/board/st/stm32mp1/README @@ -28,7 +28,7 @@ Everything is supported in Linux but U-Boot is limited to:

And the necessary drivers 1. I2C -2. STPMU1 (PMIC and regulator) +2. STPMIC1 (PMIC and regulator) 3. Clock, Reset, Sysreset 4. Fuse

@@ -70,10 +70,10 @@ Each board is configurated only with the associated device tree. You need to select the appropriate device tree for your board, the supported device trees for stm32mp157 are:

-+ ev1: eval board with pmic stpmu1 (ev1 = mother board + daughter ed1) ++ ev1: eval board with pmic stpmic1 (ev1 = mother board + daughter ed1) dts: stm32mp157c-ev1

-+ ed1: daughter board with pmic stpmu1 ++ ed1: daughter board with pmic stpmic1 dts: stm32mp157c-ed1

5. Build Procedure diff --git a/board/st/stm32mp1/board.c b/board/st/stm32mp1/board.c index 1bb9779..2a94f10 100644 --- a/board/st/stm32mp1/board.c +++ b/board/st/stm32mp1/board.c @@ -37,64 +37,65 @@ void board_debug_uart_init(void) } #endif

-#ifdef CONFIG_PMIC_STPMU1 +#ifdef CONFIG_PMIC_STPMIC1 int board_ddr_power_init(void) { struct udevice *dev; int ret;

ret = uclass_get_device_by_driver(UCLASS_PMIC, - DM_GET_DRIVER(pmic_stpmu1), &dev); + DM_GET_DRIVER(pmic_stpmic1), &dev); if (ret) /* No PMIC on board */ return 0;

- /* Set LDO3 to sync mode */ - ret = pmic_reg_read(dev, STPMU1_LDOX_CTRL_REG(STPMU1_LDO3)); + /* VTT = Set LDO3 to sync mode */ + ret = pmic_reg_read(dev, STPMIC1_LDOX_CTRL_REG(STPMIC1_LDO3)); if (ret < 0) return ret;

- ret &= ~STPMU1_LDO3_MODE; - ret &= ~STPMU1_LDO12356_OUTPUT_MASK; - ret |= STPMU1_LDO3_DDR_SEL << STPMU1_LDO12356_OUTPUT_SHIFT; + ret &= ~STPMIC1_LDO3_MODE; + ret &= ~STPMIC1_LDO12356_OUTPUT_MASK; + ret |= STPMIC1_LDO3_DDR_SEL << STPMIC1_LDO12356_OUTPUT_SHIFT;

- ret = pmic_reg_write(dev, STPMU1_LDOX_CTRL_REG(STPMU1_LDO3), + ret = pmic_reg_write(dev, STPMIC1_LDOX_CTRL_REG(STPMIC1_LDO3), ret); if (ret < 0) return ret;

- /* Set BUCK2 to 1.35V */ + /* VDD_DDR = Set BUCK2 to 1.35V */ ret = pmic_clrsetbits(dev, - STPMU1_BUCKX_CTRL_REG(STPMU1_BUCK2), - STPMU1_BUCK_OUTPUT_MASK, - STPMU1_BUCK2_1350000V); + STPMIC1_BUCKX_CTRL_REG(STPMIC1_BUCK2), + STPMIC1_BUCK_OUTPUT_MASK, + STPMIC1_BUCK2_1350000V); if (ret < 0) return ret;

- /* Enable BUCK2 and VREF */ + /* Enable VDD_DDR = BUCK2 */ ret = pmic_clrsetbits(dev, - STPMU1_BUCKX_CTRL_REG(STPMU1_BUCK2), - STPMU1_BUCK_EN, STPMU1_BUCK_EN); + STPMIC1_BUCKX_CTRL_REG(STPMIC1_BUCK2), + STPMIC1_BUCK_EN, STPMIC1_BUCK_EN); if (ret < 0) return ret;

- mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS); + mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);

- ret = pmic_clrsetbits(dev, STPMU1_VREF_CTRL_REG, - STPMU1_VREF_EN, STPMU1_VREF_EN); + /* Enable VREF */ + ret = pmic_clrsetbits(dev, STPMIC1_VREF_CTRL_REG, + STPMIC1_VREF_EN, STPMIC1_VREF_EN); if (ret < 0) return ret;

- mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS); + mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);

/* Enable LDO3 */ ret = pmic_clrsetbits(dev, - STPMU1_LDOX_CTRL_REG(STPMU1_LDO3), - STPMU1_LDO_EN, STPMU1_LDO_EN); + STPMIC1_LDOX_CTRL_REG(STPMIC1_LDO3), + STPMIC1_LDO_EN, STPMIC1_LDO_EN); if (ret < 0) return ret;

- mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS); + mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);

return 0; } diff --git a/board/st/stm32mp1/spl.c b/board/st/stm32mp1/spl.c index 1202297..546a923 100644 --- a/board/st/stm32mp1/spl.c +++ b/board/st/stm32mp1/spl.c @@ -17,16 +17,16 @@ void spl_board_init(void) { /* Keep vdd on during the reset cycle */ -#if defined(CONFIG_PMIC_STPMU1) && defined(CONFIG_SPL_POWER_SUPPORT) +#if defined(CONFIG_PMIC_STPMIC1) && defined(CONFIG_SPL_POWER_SUPPORT) struct udevice *dev; int ret;

ret = uclass_get_device_by_driver(UCLASS_PMIC, - DM_GET_DRIVER(pmic_stpmu1), &dev); + DM_GET_DRIVER(pmic_stpmic1), &dev); if (!ret) pmic_clrsetbits(dev, - STPMU1_MASK_RESET_BUCK, - STPMU1_MASK_RESET_BUCK3, - STPMU1_MASK_RESET_BUCK3); + STPMIC1_MASK_RESET_BUCK, + STPMIC1_MASK_RESET_BUCK3, + STPMIC1_MASK_RESET_BUCK3); #endif } diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 304688e..ac597c7 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -46,11 +46,11 @@ CONFIG_PHY_STM32_USBPHYC=y # CONFIG_SPL_PINCTRL_FULL is not set CONFIG_DM_PMIC=y # CONFIG_SPL_PMIC_CHILDREN is not set -CONFIG_PMIC_STPMU1=y +CONFIG_PMIC_STPMIC1=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_REGULATOR_STM32_VREFBUF=y -CONFIG_DM_REGULATOR_STPMU1=y +CONFIG_DM_REGULATOR_STPMIC1=y CONFIG_SERIAL_RX_BUFFER=y CONFIG_STM32_SERIAL=y CONFIG_USB=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index e905ae1..3e8a6fd 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -37,11 +37,11 @@ CONFIG_PHY=y CONFIG_PHY_STM32_USBPHYC=y # CONFIG_PINCTRL_FULL is not set CONFIG_DM_PMIC=y -CONFIG_PMIC_STPMU1=y +CONFIG_PMIC_STPMIC1=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_REGULATOR_STM32_VREFBUF=y -CONFIG_DM_REGULATOR_STPMU1=y +CONFIG_DM_REGULATOR_STPMIC1=y CONFIG_SERIAL_RX_BUFFER=y CONFIG_STM32_SERIAL=y CONFIG_USB=y diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig index 8cf60eb..b0cd260 100644 --- a/drivers/power/pmic/Kconfig +++ b/drivers/power/pmic/Kconfig @@ -231,10 +231,10 @@ config DM_PMIC_TPS65910 DC-DC converter, 8 LDOs and a RTC. This driver binds the SMPS and LDO pmic children.

-config PMIC_STPMU1 - bool "Enable support for STMicroelectronics STPMU1 PMIC" +config PMIC_STPMIC1 + bool "Enable support for STMicroelectronics STPMIC1 PMIC" depends on DM_PMIC && DM_I2C ---help--- - The STPMU1 PMIC provides 4 BUCKs, 6 LDOs, 1 VREF and 2 power switches. + The STPMIC1 PMIC provides 4 BUCKs, 6 LDOs, 1 VREF and 2 power switches. It is accessed via an I2C interface. The device is used with STM32MP1 SoCs. This driver implements register read/write operations. diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile index 147ac76..ce250cb 100644 --- a/drivers/power/pmic/Makefile +++ b/drivers/power/pmic/Makefile @@ -23,7 +23,7 @@ obj-$(CONFIG_DM_PMIC_TPS65910) += pmic_tps65910_dm.o obj-$(CONFIG_$(SPL_)PMIC_PALMAS) += palmas.o obj-$(CONFIG_$(SPL_)PMIC_LP873X) += lp873x.o obj-$(CONFIG_$(SPL_)PMIC_LP87565) += lp87565.o -obj-$(CONFIG_PMIC_STPMU1) += stpmic1.o +obj-$(CONFIG_PMIC_STPMIC1) += stpmic1.o

obj-$(CONFIG_POWER_LTC3676) += pmic_ltc3676.o obj-$(CONFIG_POWER_MAX77696) += pmic_max77696.o diff --git a/drivers/power/pmic/stpmic1.c b/drivers/power/pmic/stpmic1.c index 157ce8b..25450eb 100644 --- a/drivers/power/pmic/stpmic1.c +++ b/drivers/power/pmic/stpmic1.c @@ -10,26 +10,26 @@ #include <power/pmic.h> #include <power/stpmic1.h>

-#define STMPU1_NUM_OF_REGS 0x100 - -#ifndef CONFIG_SPL_BUILD -static const struct pmic_child_info stpmu1_children_info[] = { - { .prefix = "ldo", .driver = "stpmu1_ldo" }, - { .prefix = "buck", .driver = "stpmu1_buck" }, - { .prefix = "vref_ddr", .driver = "stpmu1_vref_ddr" }, - { .prefix = "pwr_sw", .driver = "stpmu1_pwr_sw" }, - { .prefix = "boost", .driver = "stpmu1_boost" }, +#define STPMIC1_NUM_OF_REGS 0x100 + +#if CONFIG_IS_ENABLED(DM_REGULATOR) +static const struct pmic_child_info stpmic1_children_info[] = { + { .prefix = "ldo", .driver = "stpmic1_ldo" }, + { .prefix = "buck", .driver = "stpmic1_buck" }, + { .prefix = "vref_ddr", .driver = "stpmic1_vref_ddr" }, + { .prefix = "pwr_sw", .driver = "stpmic1_pwr_sw" }, + { .prefix = "boost", .driver = "stpmic1_boost" }, { }, }; -#endif /* CONFIG_SPL_BUILD */ +#endif /* DM_REGULATOR */

-static int stpmu1_reg_count(struct udevice *dev) +static int stpmic1_reg_count(struct udevice *dev) { - return STMPU1_NUM_OF_REGS; + return STPMIC1_NUM_OF_REGS; }

-static int stpmu1_write(struct udevice *dev, uint reg, const uint8_t *buff, - int len) +static int stpmic1_write(struct udevice *dev, uint reg, const uint8_t *buff, + int len) { int ret;

@@ -41,7 +41,7 @@ static int stpmu1_write(struct udevice *dev, uint reg, const uint8_t *buff, return ret; }

-static int stpmu1_read(struct udevice *dev, uint reg, uint8_t *buff, int len) +static int stpmic1_read(struct udevice *dev, uint reg, uint8_t *buff, int len) { int ret;

@@ -53,43 +53,43 @@ static int stpmu1_read(struct udevice *dev, uint reg, uint8_t *buff, int len) return ret; }

-static int stpmu1_bind(struct udevice *dev) +static int stpmic1_bind(struct udevice *dev) { -#ifndef CONFIG_SPL_BUILD +#if CONFIG_IS_ENABLED(DM_REGULATOR) ofnode regulators_node; int children;

regulators_node = dev_read_subnode(dev, "regulators"); if (!ofnode_valid(regulators_node)) { - dev_dbg(dev, "regulators subnode not found!\n"); + dev_dbg(dev, "regulators subnode not found!"); return -ENXIO; } dev_dbg(dev, "found regulators subnode\n");

children = pmic_bind_children(dev, regulators_node, - stpmu1_children_info); + stpmic1_children_info); if (!children) dev_dbg(dev, "no child found\n"); -#endif /* CONFIG_SPL_BUILD */ +#endif /* DM_REGULATOR */

return 0; }

-static struct dm_pmic_ops stpmu1_ops = { - .reg_count = stpmu1_reg_count, - .read = stpmu1_read, - .write = stpmu1_write, +static struct dm_pmic_ops stpmic1_ops = { + .reg_count = stpmic1_reg_count, + .read = stpmic1_read, + .write = stpmic1_write, };

-static const struct udevice_id stpmu1_ids[] = { - { .compatible = "st,stpmu1" }, +static const struct udevice_id stpmic1_ids[] = { + { .compatible = "st,stpmic1" }, { } };

-U_BOOT_DRIVER(pmic_stpmu1) = { - .name = "stpmu1_pmic", +U_BOOT_DRIVER(pmic_stpmic1) = { + .name = "stpmic1_pmic", .id = UCLASS_PMIC, - .of_match = stpmu1_ids, - .bind = stpmu1_bind, - .ops = &stpmu1_ops, + .of_match = stpmic1_ids, + .bind = stpmic1_bind, + .ops = &stpmic1_ops, }; diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig index 3ed0dd2..72dfc48 100644 --- a/drivers/power/regulator/Kconfig +++ b/drivers/power/regulator/Kconfig @@ -244,11 +244,17 @@ config DM_REGULATOR_TPS65910 regulator types of the TPS65910 (BUCK, BOOST and LDO). It implements the get/set api for value and enable.

-config DM_REGULATOR_STPMU1 - bool "Enable driver for STPMU1 regulators" - depends on DM_REGULATOR && PMIC_STPMU1 +config DM_REGULATOR_STPMIC1 + bool "Enable driver for STPMIC1 regulators" + depends on DM_REGULATOR && PMIC_STPMIC1 ---help--- - Enable support for the regulator functions of the STPMU1 PMIC. The + Enable support for the regulator functions of the STPMIC1 PMIC. The driver implements get/set api for the various BUCKS and LDOs supported by the PMIC device. This driver is controlled by a device tree node which includes voltage limits. + +config SPL_DM_REGULATOR_STPMIC1 + bool "Enable driver for STPMIC1 regulators in SPL" + depends on SPL_DM_REGULATOR && PMIC_STPMIC1 + help + Enable support for the regulator functions of the STPMIC1 PMIC in SPL. diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile index cfc91e8..8c1506c 100644 --- a/drivers/power/regulator/Makefile +++ b/drivers/power/regulator/Makefile @@ -24,4 +24,4 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR_LP873X) += lp873x_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_LP87565) += lp87565_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_STM32_VREFBUF) += stm32-vrefbuf.o obj-$(CONFIG_DM_REGULATOR_TPS65910) += tps65910_regulator.o -obj-$(CONFIG_$(SPL_)DM_REGULATOR_STPMU1) += stpmic1.o +obj-$(CONFIG_$(SPL_)DM_REGULATOR_STPMIC1) += stpmic1.o diff --git a/drivers/power/regulator/stpmic1.c b/drivers/power/regulator/stpmic1.c index c62a19a..8602583 100644 --- a/drivers/power/regulator/stpmic1.c +++ b/drivers/power/regulator/stpmic1.c @@ -11,44 +11,44 @@ #include <power/regulator.h> #include <power/stpmic1.h>

-struct stpmu1_range { +struct stpmic1_range { int min_uv; int min_sel; int max_sel; int step; };

-struct stpmu1_output_range { - const struct stpmu1_range *ranges; +struct stpmic1_output { + const struct stpmic1_range *ranges; int nbranges; };

-#define STPMU1_MODE(_id, _val, _name) { \ +#define STPMIC1_MODE(_id, _val, _name) { \ .id = _id, \ .register_value = _val, \ .name = _name, \ }

-#define STPMU1_RANGE(_min_uv, _min_sel, _max_sel, _step) { \ +#define STPMIC1_RANGE(_min_uv, _min_sel, _max_sel, _step) { \ .min_uv = _min_uv, \ .min_sel = _min_sel, \ .max_sel = _max_sel, \ .step = _step, \ }

-#define STPMU1_OUTPUT_RANGE(_ranges, _nbranges) { \ +#define STPMIC1_OUTPUT(_ranges, _nbranges) { \ .ranges = _ranges, \ .nbranges = _nbranges, \ }

-static int stpmu1_output_find_uv(int sel, - const struct stpmu1_output_range *output_range) +static int stpmic1_output_find_uv(int sel, + const struct stpmic1_output *output) { - const struct stpmu1_range *range; + const struct stpmic1_range *range; int i;

- for (i = 0, range = output_range->ranges; - i < output_range->nbranges; i++, range++) { + for (i = 0, range = output->ranges; + i < output->nbranges; i++, range++) { if (sel >= range->min_sel && sel <= range->max_sel) return range->min_uv + (sel - range->min_sel) * range->step; @@ -57,14 +57,14 @@ static int stpmu1_output_find_uv(int sel, return -EINVAL; }

-static int stpmu1_output_find_sel(int uv, - const struct stpmu1_output_range *output_range) +static int stpmic1_output_find_sel(int uv, + const struct stpmic1_output *output) { - const struct stpmu1_range *range; + const struct stpmic1_range *range; int i;

- for (i = 0, range = output_range->ranges; - i < output_range->nbranges; i++, range++) { + for (i = 0, range = output->ranges; + i < output->nbranges; i++, range++) { if (uv == range->min_uv && !range->step) return range->min_sel;

@@ -82,157 +82,157 @@ static int stpmu1_output_find_sel(int uv, * BUCK regulators */

-static const struct stpmu1_range buck1_ranges[] = { - STPMU1_RANGE(725000, 0, 4, 0), - STPMU1_RANGE(725000, 5, 36, 25000), - STPMU1_RANGE(1500000, 37, 63, 0), +static const struct stpmic1_range buck1_ranges[] = { + STPMIC1_RANGE(725000, 0, 4, 0), + STPMIC1_RANGE(725000, 5, 36, 25000), + STPMIC1_RANGE(1500000, 37, 63, 0), };

-static const struct stpmu1_range buck2_ranges[] = { - STPMU1_RANGE(1000000, 0, 17, 0), - STPMU1_RANGE(1050000, 18, 19, 0), - STPMU1_RANGE(1100000, 20, 21, 0), - STPMU1_RANGE(1150000, 22, 23, 0), - STPMU1_RANGE(1200000, 24, 25, 0), - STPMU1_RANGE(1250000, 26, 27, 0), - STPMU1_RANGE(1300000, 28, 29, 0), - STPMU1_RANGE(1350000, 30, 31, 0), - STPMU1_RANGE(1400000, 32, 33, 0), - STPMU1_RANGE(1450000, 34, 35, 0), - STPMU1_RANGE(1500000, 36, 63, 0), +static const struct stpmic1_range buck2_ranges[] = { + STPMIC1_RANGE(1000000, 0, 17, 0), + STPMIC1_RANGE(1050000, 18, 19, 0), + STPMIC1_RANGE(1100000, 20, 21, 0), + STPMIC1_RANGE(1150000, 22, 23, 0), + STPMIC1_RANGE(1200000, 24, 25, 0), + STPMIC1_RANGE(1250000, 26, 27, 0), + STPMIC1_RANGE(1300000, 28, 29, 0), + STPMIC1_RANGE(1350000, 30, 31, 0), + STPMIC1_RANGE(1400000, 32, 33, 0), + STPMIC1_RANGE(1450000, 34, 35, 0), + STPMIC1_RANGE(1500000, 36, 63, 0), };

-static const struct stpmu1_range buck3_ranges[] = { - STPMU1_RANGE(1000000, 0, 19, 0), - STPMU1_RANGE(1100000, 20, 23, 0), - STPMU1_RANGE(1200000, 24, 27, 0), - STPMU1_RANGE(1300000, 28, 31, 0), - STPMU1_RANGE(1400000, 32, 35, 0), - STPMU1_RANGE(1500000, 36, 55, 100000), - STPMU1_RANGE(3400000, 56, 63, 0), +static const struct stpmic1_range buck3_ranges[] = { + STPMIC1_RANGE(1000000, 0, 19, 0), + STPMIC1_RANGE(1100000, 20, 23, 0), + STPMIC1_RANGE(1200000, 24, 27, 0), + STPMIC1_RANGE(1300000, 28, 31, 0), + STPMIC1_RANGE(1400000, 32, 35, 0), + STPMIC1_RANGE(1500000, 36, 55, 100000), + STPMIC1_RANGE(3400000, 56, 63, 0), };

-static const struct stpmu1_range buck4_ranges[] = { - STPMU1_RANGE(600000, 0, 27, 25000), - STPMU1_RANGE(1300000, 28, 29, 0), - STPMU1_RANGE(1350000, 30, 31, 0), - STPMU1_RANGE(1400000, 32, 33, 0), - STPMU1_RANGE(1450000, 34, 35, 0), - STPMU1_RANGE(1500000, 36, 60, 100000), - STPMU1_RANGE(3900000, 61, 63, 0), +static const struct stpmic1_range buck4_ranges[] = { + STPMIC1_RANGE(600000, 0, 27, 25000), + STPMIC1_RANGE(1300000, 28, 29, 0), + STPMIC1_RANGE(1350000, 30, 31, 0), + STPMIC1_RANGE(1400000, 32, 33, 0), + STPMIC1_RANGE(1450000, 34, 35, 0), + STPMIC1_RANGE(1500000, 36, 60, 100000), + STPMIC1_RANGE(3900000, 61, 63, 0), };

/* BUCK: 1,2,3,4 - voltage ranges */ -static const struct stpmu1_output_range buck_voltage_range[] = { - STPMU1_OUTPUT_RANGE(buck1_ranges, ARRAY_SIZE(buck1_ranges)), - STPMU1_OUTPUT_RANGE(buck2_ranges, ARRAY_SIZE(buck2_ranges)), - STPMU1_OUTPUT_RANGE(buck3_ranges, ARRAY_SIZE(buck3_ranges)), - STPMU1_OUTPUT_RANGE(buck4_ranges, ARRAY_SIZE(buck4_ranges)), +static const struct stpmic1_output buck_voltage_range[] = { + STPMIC1_OUTPUT(buck1_ranges, ARRAY_SIZE(buck1_ranges)), + STPMIC1_OUTPUT(buck2_ranges, ARRAY_SIZE(buck2_ranges)), + STPMIC1_OUTPUT(buck3_ranges, ARRAY_SIZE(buck3_ranges)), + STPMIC1_OUTPUT(buck4_ranges, ARRAY_SIZE(buck4_ranges)), };

/* BUCK modes */ static const struct dm_regulator_mode buck_modes[] = { - STPMU1_MODE(STPMU1_BUCK_MODE_HP, STPMU1_BUCK_MODE_HP, "HP"), - STPMU1_MODE(STPMU1_BUCK_MODE_LP, STPMU1_BUCK_MODE_LP, "LP"), + STPMIC1_MODE(STPMIC1_BUCK_MODE_HP, STPMIC1_BUCK_MODE_HP, "HP"), + STPMIC1_MODE(STPMIC1_BUCK_MODE_LP, STPMIC1_BUCK_MODE_LP, "LP"), };

-static int stpmu1_buck_get_uv(struct udevice *dev, int buck) +static int stpmic1_buck_get_uv(struct udevice *dev, int buck) { int sel;

- sel = pmic_reg_read(dev, STPMU1_BUCKX_CTRL_REG(buck)); + sel = pmic_reg_read(dev, STPMIC1_BUCKX_CTRL_REG(buck)); if (sel < 0) return sel;

- sel &= STPMU1_BUCK_OUTPUT_MASK; - sel >>= STPMU1_BUCK_OUTPUT_SHIFT; + sel &= STPMIC1_BUCK_OUTPUT_MASK; + sel >>= STPMIC1_BUCK_OUTPUT_SHIFT;

- return stpmu1_output_find_uv(sel, &buck_voltage_range[buck]); + return stpmic1_output_find_uv(sel, &buck_voltage_range[buck]); }

-static int stpmu1_buck_get_value(struct udevice *dev) +static int stpmic1_buck_get_value(struct udevice *dev) { - return stpmu1_buck_get_uv(dev->parent, dev->driver_data - 1); + return stpmic1_buck_get_uv(dev->parent, dev->driver_data - 1); }

-static int stpmu1_buck_set_value(struct udevice *dev, int uv) +static int stpmic1_buck_set_value(struct udevice *dev, int uv) { int sel, buck = dev->driver_data - 1;

- sel = stpmu1_output_find_sel(uv, &buck_voltage_range[buck]); + sel = stpmic1_output_find_sel(uv, &buck_voltage_range[buck]); if (sel < 0) return sel;

return pmic_clrsetbits(dev->parent, - STPMU1_BUCKX_CTRL_REG(buck), - STPMU1_BUCK_OUTPUT_MASK, - sel << STPMU1_BUCK_OUTPUT_SHIFT); + STPMIC1_BUCKX_CTRL_REG(buck), + STPMIC1_BUCK_OUTPUT_MASK, + sel << STPMIC1_BUCK_OUTPUT_SHIFT); }

-static int stpmu1_buck_get_enable(struct udevice *dev) +static int stpmic1_buck_get_enable(struct udevice *dev) { int ret;

ret = pmic_reg_read(dev->parent, - STPMU1_BUCKX_CTRL_REG(dev->driver_data - 1)); + STPMIC1_BUCKX_CTRL_REG(dev->driver_data - 1)); if (ret < 0) return false;

- return ret & STPMU1_BUCK_EN ? true : false; + return ret & STPMIC1_BUCK_EN ? true : false; }

-static int stpmu1_buck_set_enable(struct udevice *dev, bool enable) +static int stpmic1_buck_set_enable(struct udevice *dev, bool enable) { struct dm_regulator_uclass_platdata *uc_pdata; - int delay = enable ? STPMU1_DEFAULT_START_UP_DELAY_MS : - STPMU1_DEFAULT_STOP_DELAY_MS; + int delay = enable ? STPMIC1_DEFAULT_START_UP_DELAY_MS : + STPMIC1_DEFAULT_STOP_DELAY_MS; int ret, uv;

/* if regulator is already in the wanted state, nothing to do */ - if (stpmu1_buck_get_enable(dev) == enable) + if (stpmic1_buck_get_enable(dev) == enable) return 0;

if (enable) { uc_pdata = dev_get_uclass_platdata(dev); - uv = stpmu1_buck_get_value(dev); - if ((uv < uc_pdata->min_uV) || (uv > uc_pdata->max_uV)) - stpmu1_buck_set_value(dev, uc_pdata->min_uV); + uv = stpmic1_buck_get_value(dev); + if (uv < uc_pdata->min_uV || uv > uc_pdata->max_uV) + stpmic1_buck_set_value(dev, uc_pdata->min_uV); }

ret = pmic_clrsetbits(dev->parent, - STPMU1_BUCKX_CTRL_REG(dev->driver_data - 1), - STPMU1_BUCK_EN, enable ? STPMU1_BUCK_EN : 0); + STPMIC1_BUCKX_CTRL_REG(dev->driver_data - 1), + STPMIC1_BUCK_EN, enable ? STPMIC1_BUCK_EN : 0); mdelay(delay);

return ret; }

-static int stpmu1_buck_get_mode(struct udevice *dev) +static int stpmic1_buck_get_mode(struct udevice *dev) { int ret;

ret = pmic_reg_read(dev->parent, - STPMU1_BUCKX_CTRL_REG(dev->driver_data - 1)); + STPMIC1_BUCKX_CTRL_REG(dev->driver_data - 1)); if (ret < 0) return ret;

- return ret & STPMU1_BUCK_MODE ? STPMU1_BUCK_MODE_LP : - STPMU1_BUCK_MODE_HP; + return ret & STPMIC1_BUCK_MODE ? STPMIC1_BUCK_MODE_LP : + STPMIC1_BUCK_MODE_HP; }

-static int stpmu1_buck_set_mode(struct udevice *dev, int mode) +static int stpmic1_buck_set_mode(struct udevice *dev, int mode) { return pmic_clrsetbits(dev->parent, - STPMU1_BUCKX_CTRL_REG(dev->driver_data - 1), - STPMU1_BUCK_MODE, - mode ? STPMU1_BUCK_MODE : 0); + STPMIC1_BUCKX_CTRL_REG(dev->driver_data - 1), + STPMIC1_BUCK_MODE, + mode ? STPMIC1_BUCK_MODE : 0); }

-static int stpmu1_buck_probe(struct udevice *dev) +static int stpmic1_buck_probe(struct udevice *dev) { struct dm_regulator_uclass_platdata *uc_pdata;

- if (!dev->driver_data || dev->driver_data > STPMU1_MAX_BUCK) + if (!dev->driver_data || dev->driver_data > STPMIC1_MAX_BUCK) return -EINVAL;

uc_pdata = dev_get_uclass_platdata(dev); @@ -244,206 +244,206 @@ static int stpmu1_buck_probe(struct udevice *dev) return 0; }

-static const struct dm_regulator_ops stpmu1_buck_ops = { - .get_value = stpmu1_buck_get_value, - .set_value = stpmu1_buck_set_value, - .get_enable = stpmu1_buck_get_enable, - .set_enable = stpmu1_buck_set_enable, - .get_mode = stpmu1_buck_get_mode, - .set_mode = stpmu1_buck_set_mode, +static const struct dm_regulator_ops stpmic1_buck_ops = { + .get_value = stpmic1_buck_get_value, + .set_value = stpmic1_buck_set_value, + .get_enable = stpmic1_buck_get_enable, + .set_enable = stpmic1_buck_set_enable, + .get_mode = stpmic1_buck_get_mode, + .set_mode = stpmic1_buck_set_mode, };

-U_BOOT_DRIVER(stpmu1_buck) = { - .name = "stpmu1_buck", +U_BOOT_DRIVER(stpmic1_buck) = { + .name = "stpmic1_buck", .id = UCLASS_REGULATOR, - .ops = &stpmu1_buck_ops, - .probe = stpmu1_buck_probe, + .ops = &stpmic1_buck_ops, + .probe = stpmic1_buck_probe, };

/* * LDO regulators */

-static const struct stpmu1_range ldo12_ranges[] = { - STPMU1_RANGE(1700000, 0, 7, 0), - STPMU1_RANGE(1700000, 8, 24, 100000), - STPMU1_RANGE(3300000, 25, 31, 0), +static const struct stpmic1_range ldo12_ranges[] = { + STPMIC1_RANGE(1700000, 0, 7, 0), + STPMIC1_RANGE(1700000, 8, 24, 100000), + STPMIC1_RANGE(3300000, 25, 31, 0), };

-static const struct stpmu1_range ldo3_ranges[] = { - STPMU1_RANGE(1700000, 0, 7, 0), - STPMU1_RANGE(1700000, 8, 24, 100000), - STPMU1_RANGE(3300000, 25, 30, 0), +static const struct stpmic1_range ldo3_ranges[] = { + STPMIC1_RANGE(1700000, 0, 7, 0), + STPMIC1_RANGE(1700000, 8, 24, 100000), + STPMIC1_RANGE(3300000, 25, 30, 0), /* Sel 31 is special case when LDO3 is in mode sync_source (BUCK2/2) */ };

-static const struct stpmu1_range ldo5_ranges[] = { - STPMU1_RANGE(1700000, 0, 7, 0), - STPMU1_RANGE(1700000, 8, 30, 100000), - STPMU1_RANGE(3900000, 31, 31, 0), +static const struct stpmic1_range ldo5_ranges[] = { + STPMIC1_RANGE(1700000, 0, 7, 0), + STPMIC1_RANGE(1700000, 8, 30, 100000), + STPMIC1_RANGE(3900000, 31, 31, 0), };

-static const struct stpmu1_range ldo6_ranges[] = { - STPMU1_RANGE(900000, 0, 24, 100000), - STPMU1_RANGE(3300000, 25, 31, 0), +static const struct stpmic1_range ldo6_ranges[] = { + STPMIC1_RANGE(900000, 0, 24, 100000), + STPMIC1_RANGE(3300000, 25, 31, 0), };

/* LDO: 1,2,3,4,5,6 - voltage ranges */ -static const struct stpmu1_output_range ldo_voltage_range[] = { - STPMU1_OUTPUT_RANGE(ldo12_ranges, ARRAY_SIZE(ldo12_ranges)), - STPMU1_OUTPUT_RANGE(ldo12_ranges, ARRAY_SIZE(ldo12_ranges)), - STPMU1_OUTPUT_RANGE(ldo3_ranges, ARRAY_SIZE(ldo3_ranges)), - STPMU1_OUTPUT_RANGE(NULL, 0), - STPMU1_OUTPUT_RANGE(ldo5_ranges, ARRAY_SIZE(ldo5_ranges)), - STPMU1_OUTPUT_RANGE(ldo6_ranges, ARRAY_SIZE(ldo6_ranges)), +static const struct stpmic1_output ldo_voltage_range[] = { + STPMIC1_OUTPUT(ldo12_ranges, ARRAY_SIZE(ldo12_ranges)), + STPMIC1_OUTPUT(ldo12_ranges, ARRAY_SIZE(ldo12_ranges)), + STPMIC1_OUTPUT(ldo3_ranges, ARRAY_SIZE(ldo3_ranges)), + STPMIC1_OUTPUT(NULL, 0), + STPMIC1_OUTPUT(ldo5_ranges, ARRAY_SIZE(ldo5_ranges)), + STPMIC1_OUTPUT(ldo6_ranges, ARRAY_SIZE(ldo6_ranges)), };

/* LDO modes */ static const struct dm_regulator_mode ldo_modes[] = { - STPMU1_MODE(STPMU1_LDO_MODE_NORMAL, - STPMU1_LDO_MODE_NORMAL, "NORMAL"), - STPMU1_MODE(STPMU1_LDO_MODE_BYPASS, - STPMU1_LDO_MODE_BYPASS, "BYPASS"), - STPMU1_MODE(STPMU1_LDO_MODE_SINK_SOURCE, - STPMU1_LDO_MODE_SINK_SOURCE, "SINK SOURCE"), + STPMIC1_MODE(STPMIC1_LDO_MODE_NORMAL, + STPMIC1_LDO_MODE_NORMAL, "NORMAL"), + STPMIC1_MODE(STPMIC1_LDO_MODE_BYPASS, + STPMIC1_LDO_MODE_BYPASS, "BYPASS"), + STPMIC1_MODE(STPMIC1_LDO_MODE_SINK_SOURCE, + STPMIC1_LDO_MODE_SINK_SOURCE, "SINK SOURCE"), };

-static int stpmu1_ldo_get_value(struct udevice *dev) +static int stpmic1_ldo_get_value(struct udevice *dev) { int sel, ldo = dev->driver_data - 1;

- sel = pmic_reg_read(dev->parent, STPMU1_LDOX_CTRL_REG(ldo)); + sel = pmic_reg_read(dev->parent, STPMIC1_LDOX_CTRL_REG(ldo)); if (sel < 0) return sel;

/* ldo4 => 3,3V */ - if (ldo == STPMU1_LDO4) - return STPMU1_LDO4_UV; + if (ldo == STPMIC1_LDO4) + return STPMIC1_LDO4_UV;

- sel &= STPMU1_LDO12356_OUTPUT_MASK; - sel >>= STPMU1_LDO12356_OUTPUT_SHIFT; + sel &= STPMIC1_LDO12356_OUTPUT_MASK; + sel >>= STPMIC1_LDO12356_OUTPUT_SHIFT;

/* ldo3, sel = 31 => BUCK2/2 */ - if (ldo == STPMU1_LDO3 && sel == STPMU1_LDO3_DDR_SEL) - return stpmu1_buck_get_uv(dev->parent, STPMU1_BUCK2) / 2; + if (ldo == STPMIC1_LDO3 && sel == STPMIC1_LDO3_DDR_SEL) + return stpmic1_buck_get_uv(dev->parent, STPMIC1_BUCK2) / 2;

- return stpmu1_output_find_uv(sel, &ldo_voltage_range[ldo]); + return stpmic1_output_find_uv(sel, &ldo_voltage_range[ldo]); }

-static int stpmu1_ldo_set_value(struct udevice *dev, int uv) +static int stpmic1_ldo_set_value(struct udevice *dev, int uv) { int sel, ldo = dev->driver_data - 1;

/* ldo4 => not possible */ - if (ldo == STPMU1_LDO4) + if (ldo == STPMIC1_LDO4) return -EINVAL;

- sel = stpmu1_output_find_sel(uv, &ldo_voltage_range[ldo]); + sel = stpmic1_output_find_sel(uv, &ldo_voltage_range[ldo]); if (sel < 0) return sel;

return pmic_clrsetbits(dev->parent, - STPMU1_LDOX_CTRL_REG(ldo), - STPMU1_LDO12356_OUTPUT_MASK, - sel << STPMU1_LDO12356_OUTPUT_SHIFT); + STPMIC1_LDOX_CTRL_REG(ldo), + STPMIC1_LDO12356_OUTPUT_MASK, + sel << STPMIC1_LDO12356_OUTPUT_SHIFT); }

-static int stpmu1_ldo_get_enable(struct udevice *dev) +static int stpmic1_ldo_get_enable(struct udevice *dev) { int ret;

ret = pmic_reg_read(dev->parent, - STPMU1_LDOX_CTRL_REG(dev->driver_data - 1)); + STPMIC1_LDOX_CTRL_REG(dev->driver_data - 1)); if (ret < 0) return false;

- return ret & STPMU1_LDO_EN ? true : false; + return ret & STPMIC1_LDO_EN ? true : false; }

-static int stpmu1_ldo_set_enable(struct udevice *dev, bool enable) +static int stpmic1_ldo_set_enable(struct udevice *dev, bool enable) { struct dm_regulator_uclass_platdata *uc_pdata; - int delay = enable ? STPMU1_DEFAULT_START_UP_DELAY_MS : - STPMU1_DEFAULT_STOP_DELAY_MS; + int delay = enable ? STPMIC1_DEFAULT_START_UP_DELAY_MS : + STPMIC1_DEFAULT_STOP_DELAY_MS; int ret, uv;

/* if regulator is already in the wanted state, nothing to do */ - if (stpmu1_ldo_get_enable(dev) == enable) + if (stpmic1_ldo_get_enable(dev) == enable) return 0;

if (enable) { uc_pdata = dev_get_uclass_platdata(dev); - uv = stpmu1_ldo_get_value(dev); - if ((uv < uc_pdata->min_uV) || (uv > uc_pdata->max_uV)) - stpmu1_ldo_set_value(dev, uc_pdata->min_uV); + uv = stpmic1_ldo_get_value(dev); + if (uv < uc_pdata->min_uV || uv > uc_pdata->max_uV) + stpmic1_ldo_set_value(dev, uc_pdata->min_uV); }

ret = pmic_clrsetbits(dev->parent, - STPMU1_LDOX_CTRL_REG(dev->driver_data - 1), - STPMU1_LDO_EN, enable ? STPMU1_LDO_EN : 0); + STPMIC1_LDOX_CTRL_REG(dev->driver_data - 1), + STPMIC1_LDO_EN, enable ? STPMIC1_LDO_EN : 0); mdelay(delay);

return ret; }

-static int stpmu1_ldo_get_mode(struct udevice *dev) +static int stpmic1_ldo_get_mode(struct udevice *dev) { int ret, ldo = dev->driver_data - 1;

- if (ldo != STPMU1_LDO3) + if (ldo != STPMIC1_LDO3) return -EINVAL;

- ret = pmic_reg_read(dev->parent, STPMU1_LDOX_CTRL_REG(ldo)); + ret = pmic_reg_read(dev->parent, STPMIC1_LDOX_CTRL_REG(ldo)); if (ret < 0) return ret;

- if (ret & STPMU1_LDO3_MODE) - return STPMU1_LDO_MODE_BYPASS; + if (ret & STPMIC1_LDO3_MODE) + return STPMIC1_LDO_MODE_BYPASS;

- ret &= STPMU1_LDO12356_OUTPUT_MASK; - ret >>= STPMU1_LDO12356_OUTPUT_SHIFT; + ret &= STPMIC1_LDO12356_OUTPUT_MASK; + ret >>= STPMIC1_LDO12356_OUTPUT_SHIFT;

- return ret == STPMU1_LDO3_DDR_SEL ? STPMU1_LDO_MODE_SINK_SOURCE : - STPMU1_LDO_MODE_NORMAL; + return ret == STPMIC1_LDO3_DDR_SEL ? STPMIC1_LDO_MODE_SINK_SOURCE : + STPMIC1_LDO_MODE_NORMAL; }

-static int stpmu1_ldo_set_mode(struct udevice *dev, int mode) +static int stpmic1_ldo_set_mode(struct udevice *dev, int mode) { int ret, ldo = dev->driver_data - 1;

- if (ldo != STPMU1_LDO3) + if (ldo != STPMIC1_LDO3) return -EINVAL;

- ret = pmic_reg_read(dev->parent, STPMU1_LDOX_CTRL_REG(ldo)); + ret = pmic_reg_read(dev->parent, STPMIC1_LDOX_CTRL_REG(ldo)); if (ret < 0) return ret;

switch (mode) { - case STPMU1_LDO_MODE_SINK_SOURCE: - ret &= ~STPMU1_LDO12356_OUTPUT_MASK; - ret |= STPMU1_LDO3_DDR_SEL << STPMU1_LDO12356_OUTPUT_SHIFT; - case STPMU1_LDO_MODE_NORMAL: - ret &= ~STPMU1_LDO3_MODE; + case STPMIC1_LDO_MODE_SINK_SOURCE: + ret &= ~STPMIC1_LDO12356_OUTPUT_MASK; + ret |= STPMIC1_LDO3_DDR_SEL << STPMIC1_LDO12356_OUTPUT_SHIFT; + case STPMIC1_LDO_MODE_NORMAL: + ret &= ~STPMIC1_LDO3_MODE; break; - case STPMU1_LDO_MODE_BYPASS: - ret |= STPMU1_LDO3_MODE; + case STPMIC1_LDO_MODE_BYPASS: + ret |= STPMIC1_LDO3_MODE; break; }

- return pmic_reg_write(dev->parent, STPMU1_LDOX_CTRL_REG(ldo), ret); + return pmic_reg_write(dev->parent, STPMIC1_LDOX_CTRL_REG(ldo), ret); }

-static int stpmu1_ldo_probe(struct udevice *dev) +static int stpmic1_ldo_probe(struct udevice *dev) { struct dm_regulator_uclass_platdata *uc_pdata;

- if (!dev->driver_data || dev->driver_data > STPMU1_MAX_LDO) + if (!dev->driver_data || dev->driver_data > STPMIC1_MAX_LDO) return -EINVAL;

uc_pdata = dev_get_uclass_platdata(dev);

uc_pdata->type = REGULATOR_TYPE_LDO; - if (dev->driver_data - 1 == STPMU1_LDO3) { + if (dev->driver_data - 1 == STPMIC1_LDO3) { uc_pdata->mode = (struct dm_regulator_mode *)ldo_modes; uc_pdata->mode_count = ARRAY_SIZE(ldo_modes); } else { @@ -453,61 +453,61 @@ static int stpmu1_ldo_probe(struct udevice *dev) return 0; }

-static const struct dm_regulator_ops stpmu1_ldo_ops = { - .get_value = stpmu1_ldo_get_value, - .set_value = stpmu1_ldo_set_value, - .get_enable = stpmu1_ldo_get_enable, - .set_enable = stpmu1_ldo_set_enable, - .get_mode = stpmu1_ldo_get_mode, - .set_mode = stpmu1_ldo_set_mode, +static const struct dm_regulator_ops stpmic1_ldo_ops = { + .get_value = stpmic1_ldo_get_value, + .set_value = stpmic1_ldo_set_value, + .get_enable = stpmic1_ldo_get_enable, + .set_enable = stpmic1_ldo_set_enable, + .get_mode = stpmic1_ldo_get_mode, + .set_mode = stpmic1_ldo_set_mode, };

-U_BOOT_DRIVER(stpmu1_ldo) = { - .name = "stpmu1_ldo", +U_BOOT_DRIVER(stpmic1_ldo) = { + .name = "stpmic1_ldo", .id = UCLASS_REGULATOR, - .ops = &stpmu1_ldo_ops, - .probe = stpmu1_ldo_probe, + .ops = &stpmic1_ldo_ops, + .probe = stpmic1_ldo_probe, };

/* * VREF DDR regulator */

-static int stpmu1_vref_ddr_get_value(struct udevice *dev) +static int stpmic1_vref_ddr_get_value(struct udevice *dev) { /* BUCK2/2 */ - return stpmu1_buck_get_uv(dev->parent, STPMU1_BUCK2) / 2; + return stpmic1_buck_get_uv(dev->parent, STPMIC1_BUCK2) / 2; }

-static int stpmu1_vref_ddr_get_enable(struct udevice *dev) +static int stpmic1_vref_ddr_get_enable(struct udevice *dev) { int ret;

- ret = pmic_reg_read(dev->parent, STPMU1_VREF_CTRL_REG); + ret = pmic_reg_read(dev->parent, STPMIC1_VREF_CTRL_REG); if (ret < 0) return false;

- return ret & STPMU1_VREF_EN ? true : false; + return ret & STPMIC1_VREF_EN ? true : false; }

-static int stpmu1_vref_ddr_set_enable(struct udevice *dev, bool enable) +static int stpmic1_vref_ddr_set_enable(struct udevice *dev, bool enable) { - int delay = enable ? STPMU1_DEFAULT_START_UP_DELAY_MS : - STPMU1_DEFAULT_STOP_DELAY_MS; + int delay = enable ? STPMIC1_DEFAULT_START_UP_DELAY_MS : + STPMIC1_DEFAULT_STOP_DELAY_MS; int ret;

/* if regulator is already in the wanted state, nothing to do */ - if (stpmu1_vref_ddr_get_enable(dev) == enable) + if (stpmic1_vref_ddr_get_enable(dev) == enable) return 0;

- ret = pmic_clrsetbits(dev->parent, STPMU1_VREF_CTRL_REG, - STPMU1_VREF_EN, enable ? STPMU1_VREF_EN : 0); + ret = pmic_clrsetbits(dev->parent, STPMIC1_VREF_CTRL_REG, + STPMIC1_VREF_EN, enable ? STPMIC1_VREF_EN : 0); mdelay(delay);

return ret; }

-static int stpmu1_vref_ddr_probe(struct udevice *dev) +static int stpmic1_vref_ddr_probe(struct udevice *dev) { struct dm_regulator_uclass_platdata *uc_pdata;

@@ -519,59 +519,59 @@ static int stpmu1_vref_ddr_probe(struct udevice *dev) return 0; }

-static const struct dm_regulator_ops stpmu1_vref_ddr_ops = { - .get_value = stpmu1_vref_ddr_get_value, - .get_enable = stpmu1_vref_ddr_get_enable, - .set_enable = stpmu1_vref_ddr_set_enable, +static const struct dm_regulator_ops stpmic1_vref_ddr_ops = { + .get_value = stpmic1_vref_ddr_get_value, + .get_enable = stpmic1_vref_ddr_get_enable, + .set_enable = stpmic1_vref_ddr_set_enable, };

-U_BOOT_DRIVER(stpmu1_vref_ddr) = { - .name = "stpmu1_vref_ddr", +U_BOOT_DRIVER(stpmic1_vref_ddr) = { + .name = "stpmic1_vref_ddr", .id = UCLASS_REGULATOR, - .ops = &stpmu1_vref_ddr_ops, - .probe = stpmu1_vref_ddr_probe, + .ops = &stpmic1_vref_ddr_ops, + .probe = stpmic1_vref_ddr_probe, };

/* * BOOST regulator */

-static int stpmu1_boost_get_enable(struct udevice *dev) +static int stpmic1_boost_get_enable(struct udevice *dev) { int ret;

- ret = pmic_reg_read(dev->parent, STPMU1_USB_CTRL_REG); + ret = pmic_reg_read(dev->parent, STPMIC1_USB_CTRL_REG); if (ret < 0) return false;

- return ret & STPMU1_USB_BOOST_EN ? true : false; + return ret & STPMIC1_USB_BOOST_EN ? true : false; }

-static int stpmu1_boost_set_enable(struct udevice *dev, bool enable) +static int stpmic1_boost_set_enable(struct udevice *dev, bool enable) { int ret;

- ret = pmic_reg_read(dev->parent, STPMU1_USB_CTRL_REG); + ret = pmic_reg_read(dev->parent, STPMIC1_USB_CTRL_REG); if (ret < 0) return ret;

- if (!enable && ret & STPMU1_USB_PWR_SW_EN) + if (!enable && ret & STPMIC1_USB_PWR_SW_EN) return -EINVAL;

/* if regulator is already in the wanted state, nothing to do */ - if (!!(ret & STPMU1_USB_BOOST_EN) == enable) + if (!!(ret & STPMIC1_USB_BOOST_EN) == enable) return 0;

- ret = pmic_clrsetbits(dev->parent, STPMU1_USB_CTRL_REG, - STPMU1_USB_BOOST_EN, - enable ? STPMU1_USB_BOOST_EN : 0); + ret = pmic_clrsetbits(dev->parent, STPMIC1_USB_CTRL_REG, + STPMIC1_USB_BOOST_EN, + enable ? STPMIC1_USB_BOOST_EN : 0); if (enable) - mdelay(STPMU1_USB_BOOST_START_UP_DELAY_MS); + mdelay(STPMIC1_USB_BOOST_START_UP_DELAY_MS);

return ret; }

-static int stpmu1_boost_probe(struct udevice *dev) +static int stpmic1_boost_probe(struct udevice *dev) { struct dm_regulator_uclass_platdata *uc_pdata;

@@ -583,42 +583,42 @@ static int stpmu1_boost_probe(struct udevice *dev) return 0; }

-static const struct dm_regulator_ops stpmu1_boost_ops = { - .get_enable = stpmu1_boost_get_enable, - .set_enable = stpmu1_boost_set_enable, +static const struct dm_regulator_ops stpmic1_boost_ops = { + .get_enable = stpmic1_boost_get_enable, + .set_enable = stpmic1_boost_set_enable, };

-U_BOOT_DRIVER(stpmu1_boost) = { - .name = "stpmu1_boost", +U_BOOT_DRIVER(stpmic1_boost) = { + .name = "stpmic1_boost", .id = UCLASS_REGULATOR, - .ops = &stpmu1_boost_ops, - .probe = stpmu1_boost_probe, + .ops = &stpmic1_boost_ops, + .probe = stpmic1_boost_probe, };

/* * USB power switch */

-static int stpmu1_pwr_sw_get_enable(struct udevice *dev) +static int stpmic1_pwr_sw_get_enable(struct udevice *dev) { uint mask = 1 << dev->driver_data; int ret;

- ret = pmic_reg_read(dev->parent, STPMU1_USB_CTRL_REG); + ret = pmic_reg_read(dev->parent, STPMIC1_USB_CTRL_REG); if (ret < 0) return false;

return ret & mask ? true : false; }

-static int stpmu1_pwr_sw_set_enable(struct udevice *dev, bool enable) +static int stpmic1_pwr_sw_set_enable(struct udevice *dev, bool enable) { uint mask = 1 << dev->driver_data; - int delay = enable ? STPMU1_DEFAULT_START_UP_DELAY_MS : - STPMU1_DEFAULT_STOP_DELAY_MS; + int delay = enable ? STPMIC1_DEFAULT_START_UP_DELAY_MS : + STPMIC1_DEFAULT_STOP_DELAY_MS; int ret;

- ret = pmic_reg_read(dev->parent, STPMU1_USB_CTRL_REG); + ret = pmic_reg_read(dev->parent, STPMIC1_USB_CTRL_REG); if (ret < 0) return ret;

@@ -627,28 +627,28 @@ static int stpmu1_pwr_sw_set_enable(struct udevice *dev, bool enable) return 0;

/* Boost management */ - if (enable && !(ret & STPMU1_USB_BOOST_EN)) { - pmic_clrsetbits(dev->parent, STPMU1_USB_CTRL_REG, - STPMU1_USB_BOOST_EN, STPMU1_USB_BOOST_EN); - mdelay(STPMU1_USB_BOOST_START_UP_DELAY_MS); - } else if (!enable && ret & STPMU1_USB_BOOST_EN && - (ret & STPMU1_USB_PWR_SW_EN) != STPMU1_USB_PWR_SW_EN) { - pmic_clrsetbits(dev->parent, STPMU1_USB_CTRL_REG, - STPMU1_USB_BOOST_EN, 0); + if (enable && !(ret & STPMIC1_USB_BOOST_EN)) { + pmic_clrsetbits(dev->parent, STPMIC1_USB_CTRL_REG, + STPMIC1_USB_BOOST_EN, STPMIC1_USB_BOOST_EN); + mdelay(STPMIC1_USB_BOOST_START_UP_DELAY_MS); + } else if (!enable && ret & STPMIC1_USB_BOOST_EN && + (ret & STPMIC1_USB_PWR_SW_EN) != STPMIC1_USB_PWR_SW_EN) { + pmic_clrsetbits(dev->parent, STPMIC1_USB_CTRL_REG, + STPMIC1_USB_BOOST_EN, 0); }

- ret = pmic_clrsetbits(dev->parent, STPMU1_USB_CTRL_REG, + ret = pmic_clrsetbits(dev->parent, STPMIC1_USB_CTRL_REG, mask, enable ? mask : 0); mdelay(delay);

return ret; }

-static int stpmu1_pwr_sw_probe(struct udevice *dev) +static int stpmic1_pwr_sw_probe(struct udevice *dev) { struct dm_regulator_uclass_platdata *uc_pdata;

- if (!dev->driver_data || dev->driver_data > STPMU1_MAX_PWR_SW) + if (!dev->driver_data || dev->driver_data > STPMIC1_MAX_PWR_SW) return -EINVAL;

uc_pdata = dev_get_uclass_platdata(dev); @@ -659,14 +659,14 @@ static int stpmu1_pwr_sw_probe(struct udevice *dev) return 0; }

-static const struct dm_regulator_ops stpmu1_pwr_sw_ops = { - .get_enable = stpmu1_pwr_sw_get_enable, - .set_enable = stpmu1_pwr_sw_set_enable, +static const struct dm_regulator_ops stpmic1_pwr_sw_ops = { + .get_enable = stpmic1_pwr_sw_get_enable, + .set_enable = stpmic1_pwr_sw_set_enable, };

-U_BOOT_DRIVER(stpmu1_pwr_sw) = { - .name = "stpmu1_pwr_sw", +U_BOOT_DRIVER(stpmic1_pwr_sw) = { + .name = "stpmic1_pwr_sw", .id = UCLASS_REGULATOR, - .ops = &stpmu1_pwr_sw_ops, - .probe = stpmu1_pwr_sw_probe, + .ops = &stpmic1_pwr_sw_ops, + .probe = stpmic1_pwr_sw_probe, }; diff --git a/include/dt-bindings/mfd/st,stpmic1.h b/include/dt-bindings/mfd/st,stpmic1.h index 81982eb..b2d6c83 100644 --- a/include/dt-bindings/mfd/st,stpmic1.h +++ b/include/dt-bindings/mfd/st,stpmic1.h @@ -1,60 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* - * This file is part of stpmu1 pmic driver - * - * Copyright (C) 2017, STMicroelectronics - All Rights Reserved - * Author: Pascal Paillet p.paillet@st.com for STMicroelectronics. - * - * License type: GPLv2 - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY - * or FITNESS FOR A PARTICULAR PURPOSE. - * See the GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see http://www.gnu.org/licenses/. + * Copyright (C) STMicroelectronics 2018 - All Rights Reserved + * Author: Philippe Peurichard philippe.peurichard@st.com, + * Pascal Paillet p.paillet@st.com for STMicroelectronics. */

-#ifndef __DT_BINDINGS_STPMU1_H__ -#define __DT_BINDINGS_STPMU1_H__ +#ifndef __DT_BINDINGS_STPMIC1_H__ +#define __DT_BINDINGS_STPMIC1_H__

/* IRQ definitions */ -#define IT_PONKEY_F 0 -#define IT_PONKEY_R 1 -#define IT_WAKEUP_F 2 -#define IT_WAKEUP_R 3 -#define IT_VBUS_OTG_F 4 -#define IT_VBUS_OTG_R 5 -#define IT_SWOUT_F 6 -#define IT_SWOUT_R 7 +#define IT_PONKEY_F 0 +#define IT_PONKEY_R 1 +#define IT_WAKEUP_F 2 +#define IT_WAKEUP_R 3 +#define IT_VBUS_OTG_F 4 +#define IT_VBUS_OTG_R 5 +#define IT_SWOUT_F 6 +#define IT_SWOUT_R 7

-#define IT_CURLIM_BUCK1 8 -#define IT_CURLIM_BUCK2 9 -#define IT_CURLIM_BUCK3 10 -#define IT_CURLIM_BUCK4 11 -#define IT_OCP_OTG 12 -#define IT_OCP_SWOUT 13 -#define IT_OCP_BOOST 14 -#define IT_OVP_BOOST 15 +#define IT_CURLIM_BUCK1 8 +#define IT_CURLIM_BUCK2 9 +#define IT_CURLIM_BUCK3 10 +#define IT_CURLIM_BUCK4 11 +#define IT_OCP_OTG 12 +#define IT_OCP_SWOUT 13 +#define IT_OCP_BOOST 14 +#define IT_OVP_BOOST 15

-#define IT_CURLIM_LDO1 16 -#define IT_CURLIM_LDO2 17 -#define IT_CURLIM_LDO3 18 -#define IT_CURLIM_LDO4 19 -#define IT_CURLIM_LDO5 20 -#define IT_CURLIM_LDO6 21 -#define IT_SHORT_SWOTG 22 -#define IT_SHORT_SWOUT 23 +#define IT_CURLIM_LDO1 16 +#define IT_CURLIM_LDO2 17 +#define IT_CURLIM_LDO3 18 +#define IT_CURLIM_LDO4 19 +#define IT_CURLIM_LDO5 20 +#define IT_CURLIM_LDO6 21 +#define IT_SHORT_SWOTG 22 +#define IT_SHORT_SWOUT 23

-#define IT_TWARN_F 24 -#define IT_TWARN_R 25 -#define IT_VINLOW_F 26 -#define IT_VINLOW_R 27 -#define IT_SWIN_F 30 -#define IT_SWIN_R 31 +#define IT_TWARN_F 24 +#define IT_TWARN_R 25 +#define IT_VINLOW_F 26 +#define IT_VINLOW_R 27 +#define IT_SWIN_F 30 +#define IT_SWIN_R 31

-#endif /* __DT_BINDINGS_STPMU1_H__ */ +#endif /* __DT_BINDINGS_STPMIC1_H__ */ diff --git a/include/power/stpmic1.h b/include/power/stpmic1.h index 5906fbf..5ed67d2 100644 --- a/include/power/stpmic1.h +++ b/include/power/stpmic1.h @@ -3,83 +3,90 @@ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved */

-#ifndef __PMIC_STPMU1_H_ -#define __PMIC_STPMU1_H_ - -#define STPMU1_MASK_RESET_BUCK 0x18 -#define STPMU1_BUCKX_CTRL_REG(buck) (0x20 + (buck)) -#define STPMU1_VREF_CTRL_REG 0x24 -#define STPMU1_LDOX_CTRL_REG(ldo) (0x25 + (ldo)) -#define STPMU1_USB_CTRL_REG 0x40 -#define STPMU1_NVM_USER_STATUS_REG 0xb8 -#define STPMU1_NVM_USER_CONTROL_REG 0xb9 - -#define STPMU1_MASK_RESET_BUCK3 BIT(2) - -#define STPMU1_BUCK_EN BIT(0) -#define STPMU1_BUCK_MODE BIT(1) -#define STPMU1_BUCK_OUTPUT_MASK GENMASK(7, 2) -#define STPMU1_BUCK_OUTPUT_SHIFT 2 -#define STPMU1_BUCK2_1200000V (24 << STPMU1_BUCK_OUTPUT_SHIFT) -#define STPMU1_BUCK2_1350000V (30 << STPMU1_BUCK_OUTPUT_SHIFT) -#define STPMU1_BUCK3_1800000V (39 << STPMU1_BUCK_OUTPUT_SHIFT) - -#define STPMU1_VREF_EN BIT(0) - -#define STPMU1_LDO_EN BIT(0) -#define STPMU1_LDO12356_OUTPUT_MASK GENMASK(6, 2) -#define STPMU1_LDO12356_OUTPUT_SHIFT 2 -#define STPMU1_LDO3_MODE BIT(7) -#define STPMU1_LDO3_DDR_SEL 31 -#define STPMU1_LDO3_1800000 (9 << STPMU1_LDO12356_OUTPUT_SHIFT) -#define STPMU1_LDO4_UV 3300000 - -#define STPMU1_USB_BOOST_EN BIT(0) -#define STPMU1_USB_PWR_SW_EN GENMASK(2, 1) - -#define STPMU1_NVM_USER_CONTROL_PROGRAM BIT(0) -#define STPMU1_NVM_USER_CONTROL_READ BIT(1) - -#define STPMU1_NVM_USER_STATUS_BUSY BIT(0) -#define STPMU1_NVM_USER_STATUS_ERROR BIT(1) - -#define STPMU1_DEFAULT_START_UP_DELAY_MS 1 -#define STPMU1_DEFAULT_STOP_DELAY_MS 5 -#define STPMU1_USB_BOOST_START_UP_DELAY_MS 10 +#ifndef __PMIC_STPMIC1_H_ +#define __PMIC_STPMIC1_H_ + +#define STPMIC1_MAIN_CONTROL_REG 0x10 +#define STPMIC1_MASK_RESET_BUCK 0x18 +#define STPMIC1_MASK_RESET_LDOS 0x1a +#define STPMIC1_BUCKX_CTRL_REG(buck) (0x20 + (buck)) +#define STPMIC1_VREF_CTRL_REG 0x24 +#define STPMIC1_LDOX_CTRL_REG(ldo) (0x25 + (ldo)) +#define STPMIC1_USB_CTRL_REG 0x40 +#define STPMIC1_NVM_USER_STATUS_REG 0xb8 +#define STPMIC1_NVM_USER_CONTROL_REG 0xb9 + +/* Main PMIC Control Register (MAIN_CONTROL_REG) */ +#define STPMIC1_CTRL_SWITCH_OFF BIT(0) +#define STPMIC1_CTRL_RESTART BIT(1) + +#define STPMIC1_MASK_RESET_BUCK3 BIT(2) +#define STPMIC1_MASK_RESET_BUCK_DBG GENMASK(3, 0) +#define STPMIC1_MASK_RESET_LDOS_DBG 0x6F + +#define STPMIC1_BUCK_EN BIT(0) +#define STPMIC1_BUCK_MODE BIT(1) +#define STPMIC1_BUCK_OUTPUT_MASK GENMASK(7, 2) +#define STPMIC1_BUCK_OUTPUT_SHIFT 2 +#define STPMIC1_BUCK2_1200000V (24 << STPMIC1_BUCK_OUTPUT_SHIFT) +#define STPMIC1_BUCK2_1350000V (30 << STPMIC1_BUCK_OUTPUT_SHIFT) +#define STPMIC1_BUCK3_1800000V (39 << STPMIC1_BUCK_OUTPUT_SHIFT) + +#define STPMIC1_VREF_EN BIT(0) + +#define STPMIC1_LDO_EN BIT(0) +#define STPMIC1_LDO12356_OUTPUT_MASK GENMASK(6, 2) +#define STPMIC1_LDO12356_OUTPUT_SHIFT 2 +#define STPMIC1_LDO3_MODE BIT(7) +#define STPMIC1_LDO3_DDR_SEL 31 +#define STPMIC1_LDO3_1800000 (9 << STPMIC1_LDO12356_OUTPUT_SHIFT) +#define STPMIC1_LDO4_UV 3300000 + +#define STPMIC1_USB_BOOST_EN BIT(0) +#define STPMIC1_USB_PWR_SW_EN GENMASK(2, 1) + +#define STPMIC1_NVM_USER_CONTROL_PROGRAM BIT(0) +#define STPMIC1_NVM_USER_CONTROL_READ BIT(1) + +#define STPMIC1_NVM_USER_STATUS_BUSY BIT(0) +#define STPMIC1_NVM_USER_STATUS_ERROR BIT(1) + +#define STPMIC1_DEFAULT_START_UP_DELAY_MS 1 +#define STPMIC1_DEFAULT_STOP_DELAY_MS 5 +#define STPMIC1_USB_BOOST_START_UP_DELAY_MS 10

enum { - STPMU1_BUCK1, - STPMU1_BUCK2, - STPMU1_BUCK3, - STPMU1_BUCK4, - STPMU1_MAX_BUCK, + STPMIC1_BUCK1, + STPMIC1_BUCK2, + STPMIC1_BUCK3, + STPMIC1_BUCK4, + STPMIC1_MAX_BUCK, };

enum { - STPMU1_BUCK_MODE_HP, - STPMU1_BUCK_MODE_LP, + STPMIC1_BUCK_MODE_HP, + STPMIC1_BUCK_MODE_LP, };

enum { - STPMU1_LDO1, - STPMU1_LDO2, - STPMU1_LDO3, - STPMU1_LDO4, - STPMU1_LDO5, - STPMU1_LDO6, - STPMU1_MAX_LDO, + STPMIC1_LDO1, + STPMIC1_LDO2, + STPMIC1_LDO3, + STPMIC1_LDO4, + STPMIC1_LDO5, + STPMIC1_LDO6, + STPMIC1_MAX_LDO, };

enum { - STPMU1_LDO_MODE_NORMAL, - STPMU1_LDO_MODE_BYPASS, - STPMU1_LDO_MODE_SINK_SOURCE, + STPMIC1_LDO_MODE_NORMAL, + STPMIC1_LDO_MODE_BYPASS, + STPMIC1_LDO_MODE_SINK_SOURCE, };

enum { - STPMU1_PWR_SW1, - STPMU1_PWR_SW2, - STPMU1_MAX_PWR_SW, + STPMIC1_PWR_SW1, + STPMIC1_PWR_SW2, + STPMIC1_MAX_PWR_SW, }; - #endif

Alignment with STPMIC1 datasheet s/MAIN_CONTROL_REG/MAIN_CR/g s/MASK_RESET_BUCK/BUCKS_MRST_CR/g s/MASK_RESET_LDOS/LDOS_MRST_CR/g s/BUCKX_CTRL_REG/BUCKX_MAIN_CR/g s/VREF_CTRL_REG/REFDDR_MAIN_CR/g s/LDOX_CTRL_REG/LDOX_MAIN_CR/g s/USB_CTRL_REG/BST_SW_CR/g s/STPMIC1_NVM_USER_STATUS_REG/STPMIC1_NVM_SR/g s/STPMIC1_NVM_USER_CONTROL_REG/STPMIC1_NVM_CR/g and update all the associated defines.

Signed-off-by: Patrick Delaunay patrick.delaunay@st.com ---

board/st/stm32mp1/board.c | 24 ++++---- board/st/stm32mp1/spl.c | 6 +- drivers/power/regulator/stpmic1.c | 114 +++++++++++++++++++------------------- include/power/stpmic1.h | 98 +++++++++++++++++++------------- 4 files changed, 130 insertions(+), 112 deletions(-)

diff --git a/board/st/stm32mp1/board.c b/board/st/stm32mp1/board.c index 2a94f10..5c1acca 100644 --- a/board/st/stm32mp1/board.c +++ b/board/st/stm32mp1/board.c @@ -50,39 +50,39 @@ int board_ddr_power_init(void) return 0;

/* VTT = Set LDO3 to sync mode */ - ret = pmic_reg_read(dev, STPMIC1_LDOX_CTRL_REG(STPMIC1_LDO3)); + ret = pmic_reg_read(dev, STPMIC1_LDOX_MAIN_CR(STPMIC1_LDO3)); if (ret < 0) return ret;

ret &= ~STPMIC1_LDO3_MODE; - ret &= ~STPMIC1_LDO12356_OUTPUT_MASK; - ret |= STPMIC1_LDO3_DDR_SEL << STPMIC1_LDO12356_OUTPUT_SHIFT; + ret &= ~STPMIC1_LDO12356_VOUT_MASK; + ret |= STPMIC1_LDO_VOUT(STPMIC1_LDO3_DDR_SEL);

- ret = pmic_reg_write(dev, STPMIC1_LDOX_CTRL_REG(STPMIC1_LDO3), + ret = pmic_reg_write(dev, STPMIC1_LDOX_MAIN_CR(STPMIC1_LDO3), ret); if (ret < 0) return ret;

/* VDD_DDR = Set BUCK2 to 1.35V */ ret = pmic_clrsetbits(dev, - STPMIC1_BUCKX_CTRL_REG(STPMIC1_BUCK2), - STPMIC1_BUCK_OUTPUT_MASK, + STPMIC1_BUCKX_MAIN_CR(STPMIC1_BUCK2), + STPMIC1_BUCK_VOUT_MASK, STPMIC1_BUCK2_1350000V); if (ret < 0) return ret;

/* Enable VDD_DDR = BUCK2 */ ret = pmic_clrsetbits(dev, - STPMIC1_BUCKX_CTRL_REG(STPMIC1_BUCK2), - STPMIC1_BUCK_EN, STPMIC1_BUCK_EN); + STPMIC1_BUCKX_MAIN_CR(STPMIC1_BUCK2), + STPMIC1_BUCK_ENA, STPMIC1_BUCK_ENA); if (ret < 0) return ret;

mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);

/* Enable VREF */ - ret = pmic_clrsetbits(dev, STPMIC1_VREF_CTRL_REG, - STPMIC1_VREF_EN, STPMIC1_VREF_EN); + ret = pmic_clrsetbits(dev, STPMIC1_REFDDR_MAIN_CR, + STPMIC1_VREF_ENA, STPMIC1_VREF_ENA); if (ret < 0) return ret;

@@ -90,8 +90,8 @@ int board_ddr_power_init(void)

/* Enable LDO3 */ ret = pmic_clrsetbits(dev, - STPMIC1_LDOX_CTRL_REG(STPMIC1_LDO3), - STPMIC1_LDO_EN, STPMIC1_LDO_EN); + STPMIC1_LDOX_MAIN_CR(STPMIC1_LDO3), + STPMIC1_LDO_ENA, STPMIC1_LDO_ENA); if (ret < 0) return ret;

diff --git a/board/st/stm32mp1/spl.c b/board/st/stm32mp1/spl.c index 546a923..a7844f2 100644 --- a/board/st/stm32mp1/spl.c +++ b/board/st/stm32mp1/spl.c @@ -25,8 +25,8 @@ void spl_board_init(void) DM_GET_DRIVER(pmic_stpmic1), &dev); if (!ret) pmic_clrsetbits(dev, - STPMIC1_MASK_RESET_BUCK, - STPMIC1_MASK_RESET_BUCK3, - STPMIC1_MASK_RESET_BUCK3); + STPMIC1_BUCKS_MRST_CR, + STPMIC1_MRST_BUCK(STPMIC1_BUCK3), + STPMIC1_MRST_BUCK(STPMIC1_BUCK3)); #endif } diff --git a/drivers/power/regulator/stpmic1.c b/drivers/power/regulator/stpmic1.c index 8602583..50ef2a2 100644 --- a/drivers/power/regulator/stpmic1.c +++ b/drivers/power/regulator/stpmic1.c @@ -132,20 +132,20 @@ static const struct stpmic1_output buck_voltage_range[] = {

/* BUCK modes */ static const struct dm_regulator_mode buck_modes[] = { - STPMIC1_MODE(STPMIC1_BUCK_MODE_HP, STPMIC1_BUCK_MODE_HP, "HP"), - STPMIC1_MODE(STPMIC1_BUCK_MODE_LP, STPMIC1_BUCK_MODE_LP, "LP"), + STPMIC1_MODE(STPMIC1_PREG_MODE_HP, STPMIC1_PREG_MODE_HP, "HP"), + STPMIC1_MODE(STPMIC1_PREG_MODE_LP, STPMIC1_PREG_MODE_LP, "LP"), };

static int stpmic1_buck_get_uv(struct udevice *dev, int buck) { int sel;

- sel = pmic_reg_read(dev, STPMIC1_BUCKX_CTRL_REG(buck)); + sel = pmic_reg_read(dev, STPMIC1_BUCKX_MAIN_CR(buck)); if (sel < 0) return sel;

- sel &= STPMIC1_BUCK_OUTPUT_MASK; - sel >>= STPMIC1_BUCK_OUTPUT_SHIFT; + sel &= STPMIC1_BUCK_VOUT_MASK; + sel >>= STPMIC1_BUCK_VOUT_SHIFT;

return stpmic1_output_find_uv(sel, &buck_voltage_range[buck]); } @@ -164,9 +164,9 @@ static int stpmic1_buck_set_value(struct udevice *dev, int uv) return sel;

return pmic_clrsetbits(dev->parent, - STPMIC1_BUCKX_CTRL_REG(buck), - STPMIC1_BUCK_OUTPUT_MASK, - sel << STPMIC1_BUCK_OUTPUT_SHIFT); + STPMIC1_BUCKX_MAIN_CR(buck), + STPMIC1_BUCK_VOUT_MASK, + sel << STPMIC1_BUCK_VOUT_SHIFT); }

static int stpmic1_buck_get_enable(struct udevice *dev) @@ -174,11 +174,11 @@ static int stpmic1_buck_get_enable(struct udevice *dev) int ret;

ret = pmic_reg_read(dev->parent, - STPMIC1_BUCKX_CTRL_REG(dev->driver_data - 1)); + STPMIC1_BUCKX_MAIN_CR(dev->driver_data - 1)); if (ret < 0) return false;

- return ret & STPMIC1_BUCK_EN ? true : false; + return ret & STPMIC1_BUCK_ENA ? true : false; }

static int stpmic1_buck_set_enable(struct udevice *dev, bool enable) @@ -200,8 +200,8 @@ static int stpmic1_buck_set_enable(struct udevice *dev, bool enable) }

ret = pmic_clrsetbits(dev->parent, - STPMIC1_BUCKX_CTRL_REG(dev->driver_data - 1), - STPMIC1_BUCK_EN, enable ? STPMIC1_BUCK_EN : 0); + STPMIC1_BUCKX_MAIN_CR(dev->driver_data - 1), + STPMIC1_BUCK_ENA, enable ? STPMIC1_BUCK_ENA : 0); mdelay(delay);

return ret; @@ -212,20 +212,20 @@ static int stpmic1_buck_get_mode(struct udevice *dev) int ret;

ret = pmic_reg_read(dev->parent, - STPMIC1_BUCKX_CTRL_REG(dev->driver_data - 1)); + STPMIC1_BUCKX_MAIN_CR(dev->driver_data - 1)); if (ret < 0) return ret;

- return ret & STPMIC1_BUCK_MODE ? STPMIC1_BUCK_MODE_LP : - STPMIC1_BUCK_MODE_HP; + return ret & STPMIC1_BUCK_PREG_MODE ? STPMIC1_PREG_MODE_LP : + STPMIC1_PREG_MODE_HP; }

static int stpmic1_buck_set_mode(struct udevice *dev, int mode) { return pmic_clrsetbits(dev->parent, - STPMIC1_BUCKX_CTRL_REG(dev->driver_data - 1), - STPMIC1_BUCK_MODE, - mode ? STPMIC1_BUCK_MODE : 0); + STPMIC1_BUCKX_MAIN_CR(dev->driver_data - 1), + STPMIC1_BUCK_PREG_MODE, + mode ? STPMIC1_BUCK_PREG_MODE : 0); }

static int stpmic1_buck_probe(struct udevice *dev) @@ -312,7 +312,7 @@ static int stpmic1_ldo_get_value(struct udevice *dev) { int sel, ldo = dev->driver_data - 1;

- sel = pmic_reg_read(dev->parent, STPMIC1_LDOX_CTRL_REG(ldo)); + sel = pmic_reg_read(dev->parent, STPMIC1_LDOX_MAIN_CR(ldo)); if (sel < 0) return sel;

@@ -320,8 +320,8 @@ static int stpmic1_ldo_get_value(struct udevice *dev) if (ldo == STPMIC1_LDO4) return STPMIC1_LDO4_UV;

- sel &= STPMIC1_LDO12356_OUTPUT_MASK; - sel >>= STPMIC1_LDO12356_OUTPUT_SHIFT; + sel &= STPMIC1_LDO12356_VOUT_MASK; + sel >>= STPMIC1_LDO12356_VOUT_SHIFT;

/* ldo3, sel = 31 => BUCK2/2 */ if (ldo == STPMIC1_LDO3 && sel == STPMIC1_LDO3_DDR_SEL) @@ -343,9 +343,9 @@ static int stpmic1_ldo_set_value(struct udevice *dev, int uv) return sel;

return pmic_clrsetbits(dev->parent, - STPMIC1_LDOX_CTRL_REG(ldo), - STPMIC1_LDO12356_OUTPUT_MASK, - sel << STPMIC1_LDO12356_OUTPUT_SHIFT); + STPMIC1_LDOX_MAIN_CR(ldo), + STPMIC1_LDO12356_VOUT_MASK, + sel << STPMIC1_LDO12356_VOUT_SHIFT); }

static int stpmic1_ldo_get_enable(struct udevice *dev) @@ -353,11 +353,11 @@ static int stpmic1_ldo_get_enable(struct udevice *dev) int ret;

ret = pmic_reg_read(dev->parent, - STPMIC1_LDOX_CTRL_REG(dev->driver_data - 1)); + STPMIC1_LDOX_MAIN_CR(dev->driver_data - 1)); if (ret < 0) return false;

- return ret & STPMIC1_LDO_EN ? true : false; + return ret & STPMIC1_LDO_ENA ? true : false; }

static int stpmic1_ldo_set_enable(struct udevice *dev, bool enable) @@ -379,8 +379,8 @@ static int stpmic1_ldo_set_enable(struct udevice *dev, bool enable) }

ret = pmic_clrsetbits(dev->parent, - STPMIC1_LDOX_CTRL_REG(dev->driver_data - 1), - STPMIC1_LDO_EN, enable ? STPMIC1_LDO_EN : 0); + STPMIC1_LDOX_MAIN_CR(dev->driver_data - 1), + STPMIC1_LDO_ENA, enable ? STPMIC1_LDO_ENA : 0); mdelay(delay);

return ret; @@ -393,15 +393,15 @@ static int stpmic1_ldo_get_mode(struct udevice *dev) if (ldo != STPMIC1_LDO3) return -EINVAL;

- ret = pmic_reg_read(dev->parent, STPMIC1_LDOX_CTRL_REG(ldo)); + ret = pmic_reg_read(dev->parent, STPMIC1_LDOX_MAIN_CR(ldo)); if (ret < 0) return ret;

if (ret & STPMIC1_LDO3_MODE) return STPMIC1_LDO_MODE_BYPASS;

- ret &= STPMIC1_LDO12356_OUTPUT_MASK; - ret >>= STPMIC1_LDO12356_OUTPUT_SHIFT; + ret &= STPMIC1_LDO12356_VOUT_MASK; + ret >>= STPMIC1_LDO12356_VOUT_SHIFT;

return ret == STPMIC1_LDO3_DDR_SEL ? STPMIC1_LDO_MODE_SINK_SOURCE : STPMIC1_LDO_MODE_NORMAL; @@ -414,14 +414,14 @@ static int stpmic1_ldo_set_mode(struct udevice *dev, int mode) if (ldo != STPMIC1_LDO3) return -EINVAL;

- ret = pmic_reg_read(dev->parent, STPMIC1_LDOX_CTRL_REG(ldo)); + ret = pmic_reg_read(dev->parent, STPMIC1_LDOX_MAIN_CR(ldo)); if (ret < 0) return ret;

switch (mode) { case STPMIC1_LDO_MODE_SINK_SOURCE: - ret &= ~STPMIC1_LDO12356_OUTPUT_MASK; - ret |= STPMIC1_LDO3_DDR_SEL << STPMIC1_LDO12356_OUTPUT_SHIFT; + ret &= ~STPMIC1_LDO12356_VOUT_MASK; + ret |= STPMIC1_LDO3_DDR_SEL << STPMIC1_LDO12356_VOUT_SHIFT; case STPMIC1_LDO_MODE_NORMAL: ret &= ~STPMIC1_LDO3_MODE; break; @@ -430,7 +430,7 @@ static int stpmic1_ldo_set_mode(struct udevice *dev, int mode) break; }

- return pmic_reg_write(dev->parent, STPMIC1_LDOX_CTRL_REG(ldo), ret); + return pmic_reg_write(dev->parent, STPMIC1_LDOX_MAIN_CR(ldo), ret); }

static int stpmic1_ldo_probe(struct udevice *dev) @@ -483,11 +483,11 @@ static int stpmic1_vref_ddr_get_enable(struct udevice *dev) { int ret;

- ret = pmic_reg_read(dev->parent, STPMIC1_VREF_CTRL_REG); + ret = pmic_reg_read(dev->parent, STPMIC1_REFDDR_MAIN_CR); if (ret < 0) return false;

- return ret & STPMIC1_VREF_EN ? true : false; + return ret & STPMIC1_VREF_ENA ? true : false; }

static int stpmic1_vref_ddr_set_enable(struct udevice *dev, bool enable) @@ -500,8 +500,8 @@ static int stpmic1_vref_ddr_set_enable(struct udevice *dev, bool enable) if (stpmic1_vref_ddr_get_enable(dev) == enable) return 0;

- ret = pmic_clrsetbits(dev->parent, STPMIC1_VREF_CTRL_REG, - STPMIC1_VREF_EN, enable ? STPMIC1_VREF_EN : 0); + ret = pmic_clrsetbits(dev->parent, STPMIC1_REFDDR_MAIN_CR, + STPMIC1_VREF_ENA, enable ? STPMIC1_VREF_ENA : 0); mdelay(delay);

return ret; @@ -540,31 +540,31 @@ static int stpmic1_boost_get_enable(struct udevice *dev) { int ret;

- ret = pmic_reg_read(dev->parent, STPMIC1_USB_CTRL_REG); + ret = pmic_reg_read(dev->parent, STPMIC1_BST_SW_CR); if (ret < 0) return false;

- return ret & STPMIC1_USB_BOOST_EN ? true : false; + return ret & STPMIC1_BST_ON ? true : false; }

static int stpmic1_boost_set_enable(struct udevice *dev, bool enable) { int ret;

- ret = pmic_reg_read(dev->parent, STPMIC1_USB_CTRL_REG); + ret = pmic_reg_read(dev->parent, STPMIC1_BST_SW_CR); if (ret < 0) return ret;

- if (!enable && ret & STPMIC1_USB_PWR_SW_EN) + if (!enable && ret & STPMIC1_PWR_SW_ON) return -EINVAL;

/* if regulator is already in the wanted state, nothing to do */ - if (!!(ret & STPMIC1_USB_BOOST_EN) == enable) + if (!!(ret & STPMIC1_BST_ON) == enable) return 0;

- ret = pmic_clrsetbits(dev->parent, STPMIC1_USB_CTRL_REG, - STPMIC1_USB_BOOST_EN, - enable ? STPMIC1_USB_BOOST_EN : 0); + ret = pmic_clrsetbits(dev->parent, STPMIC1_BST_SW_CR, + STPMIC1_BST_ON, + enable ? STPMIC1_BST_ON : 0); if (enable) mdelay(STPMIC1_USB_BOOST_START_UP_DELAY_MS);

@@ -604,7 +604,7 @@ static int stpmic1_pwr_sw_get_enable(struct udevice *dev) uint mask = 1 << dev->driver_data; int ret;

- ret = pmic_reg_read(dev->parent, STPMIC1_USB_CTRL_REG); + ret = pmic_reg_read(dev->parent, STPMIC1_BST_SW_CR); if (ret < 0) return false;

@@ -618,7 +618,7 @@ static int stpmic1_pwr_sw_set_enable(struct udevice *dev, bool enable) STPMIC1_DEFAULT_STOP_DELAY_MS; int ret;

- ret = pmic_reg_read(dev->parent, STPMIC1_USB_CTRL_REG); + ret = pmic_reg_read(dev->parent, STPMIC1_BST_SW_CR); if (ret < 0) return ret;

@@ -627,17 +627,17 @@ static int stpmic1_pwr_sw_set_enable(struct udevice *dev, bool enable) return 0;

/* Boost management */ - if (enable && !(ret & STPMIC1_USB_BOOST_EN)) { - pmic_clrsetbits(dev->parent, STPMIC1_USB_CTRL_REG, - STPMIC1_USB_BOOST_EN, STPMIC1_USB_BOOST_EN); + if (enable && !(ret & STPMIC1_BST_ON)) { + pmic_clrsetbits(dev->parent, STPMIC1_BST_SW_CR, + STPMIC1_BST_ON, STPMIC1_BST_ON); mdelay(STPMIC1_USB_BOOST_START_UP_DELAY_MS); - } else if (!enable && ret & STPMIC1_USB_BOOST_EN && - (ret & STPMIC1_USB_PWR_SW_EN) != STPMIC1_USB_PWR_SW_EN) { - pmic_clrsetbits(dev->parent, STPMIC1_USB_CTRL_REG, - STPMIC1_USB_BOOST_EN, 0); + } else if (!enable && ret & STPMIC1_BST_ON && + (ret & STPMIC1_PWR_SW_ON) != STPMIC1_PWR_SW_ON) { + pmic_clrsetbits(dev->parent, STPMIC1_BST_SW_CR, + STPMIC1_BST_ON, 0); }

- ret = pmic_clrsetbits(dev->parent, STPMIC1_USB_CTRL_REG, + ret = pmic_clrsetbits(dev->parent, STPMIC1_BST_SW_CR, mask, enable ? mask : 0); mdelay(delay);

diff --git a/include/power/stpmic1.h b/include/power/stpmic1.h index 5ed67d2..ea91b75 100644 --- a/include/power/stpmic1.h +++ b/include/power/stpmic1.h @@ -6,51 +6,69 @@ #ifndef __PMIC_STPMIC1_H_ #define __PMIC_STPMIC1_H_

-#define STPMIC1_MAIN_CONTROL_REG 0x10 -#define STPMIC1_MASK_RESET_BUCK 0x18 -#define STPMIC1_MASK_RESET_LDOS 0x1a -#define STPMIC1_BUCKX_CTRL_REG(buck) (0x20 + (buck)) -#define STPMIC1_VREF_CTRL_REG 0x24 -#define STPMIC1_LDOX_CTRL_REG(ldo) (0x25 + (ldo)) -#define STPMIC1_USB_CTRL_REG 0x40 -#define STPMIC1_NVM_USER_STATUS_REG 0xb8 -#define STPMIC1_NVM_USER_CONTROL_REG 0xb9 - -/* Main PMIC Control Register (MAIN_CONTROL_REG) */ -#define STPMIC1_CTRL_SWITCH_OFF BIT(0) -#define STPMIC1_CTRL_RESTART BIT(1) - -#define STPMIC1_MASK_RESET_BUCK3 BIT(2) -#define STPMIC1_MASK_RESET_BUCK_DBG GENMASK(3, 0) -#define STPMIC1_MASK_RESET_LDOS_DBG 0x6F - -#define STPMIC1_BUCK_EN BIT(0) -#define STPMIC1_BUCK_MODE BIT(1) -#define STPMIC1_BUCK_OUTPUT_MASK GENMASK(7, 2) -#define STPMIC1_BUCK_OUTPUT_SHIFT 2 -#define STPMIC1_BUCK2_1200000V (24 << STPMIC1_BUCK_OUTPUT_SHIFT) -#define STPMIC1_BUCK2_1350000V (30 << STPMIC1_BUCK_OUTPUT_SHIFT) -#define STPMIC1_BUCK3_1800000V (39 << STPMIC1_BUCK_OUTPUT_SHIFT) - -#define STPMIC1_VREF_EN BIT(0) - -#define STPMIC1_LDO_EN BIT(0) -#define STPMIC1_LDO12356_OUTPUT_MASK GENMASK(6, 2) -#define STPMIC1_LDO12356_OUTPUT_SHIFT 2 +#define STPMIC1_MAIN_CR 0x10 +#define STPMIC1_BUCKS_MRST_CR 0x18 +#define STPMIC1_LDOS_MRST_CR 0x1a +#define STPMIC1_BUCKX_MAIN_CR(buck) (0x20 + (buck)) +#define STPMIC1_REFDDR_MAIN_CR 0x24 +#define STPMIC1_LDOX_MAIN_CR(ldo) (0x25 + (ldo)) +#define STPMIC1_BST_SW_CR 0x40 +#define STPMIC1_NVM_SR 0xb8 +#define STPMIC1_NVM_CR 0xb9 + +/* Main PMIC Control Register (MAIN_CR) */ +#define STPMIC1_SWOFF BIT(0) +#define STPMIC1_RREQ_EN BIT(1) + +/* BUCKS_MRST_CR */ +#define STPMIC1_MRST_BUCK(buck) BIT(buck) +#define STPMIC1_MRST_BUCK_ALL GENMASK(3, 0) + +/* LDOS_MRST_CR */ +#define STPMIC1_MRST_LDO(ldo) BIT(ldo) +#define STPMIC1_MRST_LDO_ALL GENMASK(6, 0) + +/* BUCKx_MAIN_CR (x=1...4) */ +#define STPMIC1_BUCK_ENA BIT(0) +#define STPMIC1_BUCK_PREG_MODE BIT(1) +#define STPMIC1_BUCK_VOUT_MASK GENMASK(7, 2) +#define STPMIC1_BUCK_VOUT_SHIFT 2 +#define STPMIC1_BUCK_VOUT(sel) (sel << STPMIC1_BUCK_VOUT_SHIFT) + +#define STPMIC1_BUCK2_1200000V STPMIC1_BUCK_VOUT(24) +#define STPMIC1_BUCK2_1350000V STPMIC1_BUCK_VOUT(30) + +#define STPMIC1_BUCK3_1800000V STPMIC1_BUCK_VOUT(39) + +/* REFDDR_MAIN_CR */ +#define STPMIC1_VREF_ENA BIT(0) + +/* LDOX_MAIN_CR */ +#define STPMIC1_LDO_ENA BIT(0) +#define STPMIC1_LDO12356_VOUT_MASK GENMASK(6, 2) +#define STPMIC1_LDO12356_VOUT_SHIFT 2 +#define STPMIC1_LDO_VOUT(sel) (sel << STPMIC1_LDO12356_VOUT_SHIFT) + #define STPMIC1_LDO3_MODE BIT(7) #define STPMIC1_LDO3_DDR_SEL 31 -#define STPMIC1_LDO3_1800000 (9 << STPMIC1_LDO12356_OUTPUT_SHIFT) +#define STPMIC1_LDO3_1800000 STPMIC1_LDO_VOUT(9) + #define STPMIC1_LDO4_UV 3300000

-#define STPMIC1_USB_BOOST_EN BIT(0) -#define STPMIC1_USB_PWR_SW_EN GENMASK(2, 1) +/* BST_SW_CR */ +#define STPMIC1_BST_ON BIT(0) +#define STPMIC1_VBUSOTG_ON BIT(1) +#define STPMIC1_SWOUT_ON BIT(2) +#define STPMIC1_PWR_SW_ON (STPMIC1_VBUSOTG_ON | STPMIC1_SWOUT_ON)

-#define STPMIC1_NVM_USER_CONTROL_PROGRAM BIT(0) -#define STPMIC1_NVM_USER_CONTROL_READ BIT(1) +/* NVM_SR */ +#define STPMIC1_NVM_BUSY BIT(0)

-#define STPMIC1_NVM_USER_STATUS_BUSY BIT(0) -#define STPMIC1_NVM_USER_STATUS_ERROR BIT(1) +/* NVM_CR */ +#define STPMIC1_NVM_CMD_PROGRAM 1 +#define STPMIC1_NVM_CMD_READ 2

+/* Timeout */ #define STPMIC1_DEFAULT_START_UP_DELAY_MS 1 #define STPMIC1_DEFAULT_STOP_DELAY_MS 5 #define STPMIC1_USB_BOOST_START_UP_DELAY_MS 10 @@ -64,8 +82,8 @@ enum { };

enum { - STPMIC1_BUCK_MODE_HP, - STPMIC1_BUCK_MODE_LP, + STPMIC1_PREG_MODE_HP, + STPMIC1_PREG_MODE_LP, };

enum {

Activate the command poweroff by default for STM32MP1: - with PCSI from TF-A for trusted boot - with PMIC sysreset request for basic boot (SYSRESET_POWER)

Signed-off-by: Patrick Delaunay patrick.delaunay@st.com ---

arch/arm/Kconfig | 1 + arch/arm/mach-stm32mp/Makefile | 3 +++ arch/arm/mach-stm32mp/cmd_poweroff.c | 24 ++++++++++++++++++++++++ 3 files changed, 28 insertions(+) create mode 100644 arch/arm/mach-stm32mp/cmd_poweroff.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2ee1dfe..94988bc 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1348,6 +1348,7 @@ config ARCH_STM32MP select SYSRESET select SYS_THUMB_BUILD imply CMD_DM + imply CMD_POWEROFF help Support for STM32MP SoC family developed by STMicroelectronics, MPUs based on ARM cortex A core diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile index f59ced5..1493914 100644 --- a/arch/arm/mach-stm32mp/Makefile +++ b/arch/arm/mach-stm32mp/Makefile @@ -11,6 +11,9 @@ ifdef CONFIG_SPL_BUILD obj-y += spl.o else obj-y += bsec.o +ifndef CONFIG_STM32MP1_TRUSTED +obj-$(CONFIG_SYSRESET) += cmd_poweroff.o +endif endif obj-$(CONFIG_ARMV7_PSCI) += psci.o obj-$(CONFIG_$(SPL_)DM_REGULATOR) += pwr_regulator.o diff --git a/arch/arm/mach-stm32mp/cmd_poweroff.c b/arch/arm/mach-stm32mp/cmd_poweroff.c new file mode 100644 index 0000000..f54dd1d --- /dev/null +++ b/arch/arm/mach-stm32mp/cmd_poweroff.c @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +/* + * Copyright (C) 2019, STMicroelectronics - All Rights Reserved + */ + +#include <common.h> +#include <command.h> +#include <sysreset.h> + +int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + int ret; + + puts("poweroff ...\n"); + mdelay(100); + + ret = sysreset_walk(SYSRESET_POWER); + + if (ret == -EINPROGRESS) + mdelay(1000); + + /*NOTREACHED when power off*/ + return CMD_RET_FAILURE; +}

Add functions to read/update the non volatile memory of STPMIC1 (8 bytes-register at 0xF8 address) and allow access with fuse command (bank=1, word > 0xF8).

For example:

STM32MP> fuse read 1 0xf8 8 Reading bank 1:

Word 0x000000f8: 000000ee 00000092 000000c0 00000002 Word 0x000000fc: 000000f2 00000080 00000002 00000033

Signed-off-by: Patrick Delaunay patrick.delaunay@st.com ---

drivers/misc/stm32mp_fuse.c | 28 +++++++++++ drivers/power/pmic/stpmic1.c | 114 +++++++++++++++++++++++++++++++++++++++++++ include/power/stpmic1.h | 7 +++ 3 files changed, 149 insertions(+)

diff --git a/drivers/misc/stm32mp_fuse.c b/drivers/misc/stm32mp_fuse.c index 33943a2..8dc246b 100644 --- a/drivers/misc/stm32mp_fuse.c +++ b/drivers/misc/stm32mp_fuse.c @@ -9,8 +9,10 @@ #include <errno.h> #include <dm/device.h> #include <dm/uclass.h> +#include <power/stpmic1.h>

#define STM32MP_OTP_BANK 0 +#define STM32MP_NVM_BANK 1

/* * The 'fuse' command API @@ -34,6 +36,13 @@ int fuse_read(u32 bank, u32 word, u32 *val) ret = 0; break;

+#ifdef CONFIG_PMIC_STPMIC1 + case STM32MP_NVM_BANK: + *val = 0; + ret = stpmic1_shadow_read_byte(word, (u8 *)val); + break; +#endif /* CONFIG_PMIC_STPMIC1 */ + default: printf("stm32mp %s: wrong value for bank %i\n", __func__, bank); ret = -EINVAL; @@ -62,6 +71,12 @@ int fuse_prog(u32 bank, u32 word, u32 val) ret = 0; break;

+#ifdef CONFIG_PMIC_STPMIC1 + case STM32MP_NVM_BANK: + ret = stpmic1_nvm_write_byte(word, (u8 *)&val); + break; +#endif /* CONFIG_PMIC_STPMIC1 */ + default: printf("stm32mp %s: wrong value for bank %i\n", __func__, bank); ret = -EINVAL; @@ -89,6 +104,13 @@ int fuse_sense(u32 bank, u32 word, u32 *val) ret = 0; break;

+#ifdef CONFIG_PMIC_STPMIC1 + case STM32MP_NVM_BANK: + *val = 0; + ret = stpmic1_nvm_read_byte(word, (u8 *)val); + break; +#endif /* CONFIG_PMIC_STPMIC1 */ + default: printf("stm32mp %s: wrong value for bank %i\n", __func__, bank); ret = -EINVAL; @@ -117,6 +139,12 @@ int fuse_override(u32 bank, u32 word, u32 val) ret = 0; break;

+#ifdef CONFIG_PMIC_STPMIC1 + case STM32MP_NVM_BANK: + ret = stpmic1_shadow_write_byte(word, (u8 *)&val); + break; +#endif /* CONFIG_PMIC_STPMIC1 */ + default: printf("stm32mp %s: wrong value for bank %i\n", __func__, bank); diff --git a/drivers/power/pmic/stpmic1.c b/drivers/power/pmic/stpmic1.c index c962160..65296c5 100644 --- a/drivers/power/pmic/stpmic1.c +++ b/drivers/power/pmic/stpmic1.c @@ -15,6 +15,17 @@

#define STPMIC1_NUM_OF_REGS 0x100

+#define STPMIC1_NVM_SIZE 8 +#define STPMIC1_NVM_POLL_TIMEOUT 100000 +#define STPMIC1_NVM_START_ADDRESS 0xf8 + +enum pmic_nvm_op { + SHADOW_READ, + SHADOW_WRITE, + NVM_READ, + NVM_WRITE, +}; + #if CONFIG_IS_ENABLED(DM_REGULATOR) static const struct pmic_child_info stpmic1_children_info[] = { { .prefix = "ldo", .driver = "stpmic1_ldo" }, @@ -101,6 +112,109 @@ U_BOOT_DRIVER(pmic_stpmic1) = { .ops = &stpmic1_ops, };

+#ifndef CONFIG_SPL_BUILD +static int stpmic1_nvm_rw(u8 addr, u8 *buf, int buf_len, enum pmic_nvm_op op) +{ + struct udevice *dev; + unsigned long timeout; + u8 cmd = STPMIC1_NVM_CMD_READ; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_PMIC, + DM_GET_DRIVER(pmic_stpmic1), &dev); + if (ret) + /* No PMIC on power discrete board */ + return -EOPNOTSUPP; + + if (addr < STPMIC1_NVM_START_ADDRESS) + return -EACCES; + + if (op == SHADOW_READ) + return pmic_read(dev, addr, buf, buf_len); + + if (op == SHADOW_WRITE) + return pmic_write(dev, addr, buf, buf_len); + + if (op == NVM_WRITE) { + cmd = STPMIC1_NVM_CMD_PROGRAM; + + ret = pmic_write(dev, addr, buf, buf_len); + if (ret < 0) + return ret; + } + + ret = pmic_reg_read(dev, STPMIC1_NVM_CR); + if (ret < 0) + return ret; + + ret = pmic_reg_write(dev, STPMIC1_NVM_CR, ret | cmd); + if (ret < 0) + return ret; + + timeout = timer_get_us() + STPMIC1_NVM_POLL_TIMEOUT; + for (;;) { + ret = pmic_reg_read(dev, STPMIC1_NVM_SR); + if (ret < 0) + return ret; + + if (!(ret & STPMIC1_NVM_BUSY)) + break; + + if (time_after(timer_get_us(), timeout)) + break; + } + + if (ret & STPMIC1_NVM_BUSY) + return -ETIMEDOUT; + + if (op == NVM_READ) { + ret = pmic_read(dev, addr, buf, buf_len); + if (ret < 0) + return ret; + } + + return 0; +} + +int stpmic1_shadow_read_byte(u8 addr, u8 *buf) +{ + return stpmic1_nvm_rw(addr, buf, 1, SHADOW_READ); +} + +int stpmic1_shadow_write_byte(u8 addr, u8 *buf) +{ + return stpmic1_nvm_rw(addr, buf, 1, SHADOW_WRITE); +} + +int stpmic1_nvm_read_byte(u8 addr, u8 *buf) +{ + return stpmic1_nvm_rw(addr, buf, 1, NVM_READ); +} + +int stpmic1_nvm_write_byte(u8 addr, u8 *buf) +{ + return stpmic1_nvm_rw(addr, buf, 1, NVM_WRITE); +} + +int stpmic1_nvm_read_all(u8 *buf, int buf_len) +{ + if (buf_len != STPMIC1_NVM_SIZE) + return -EINVAL; + + return stpmic1_nvm_rw(STPMIC1_NVM_START_ADDRESS, + buf, buf_len, NVM_READ); +} + +int stpmic1_nvm_write_all(u8 *buf, int buf_len) +{ + if (buf_len != STPMIC1_NVM_SIZE) + return -EINVAL; + + return stpmic1_nvm_rw(STPMIC1_NVM_START_ADDRESS, + buf, buf_len, NVM_WRITE); +} +#endif /* CONFIG_SPL_BUILD */ + #ifdef CONFIG_SYSRESET static int stpmic1_sysreset_request(struct udevice *dev, enum sysreset_t type) { diff --git a/include/power/stpmic1.h b/include/power/stpmic1.h index ea91b75..0e6721d 100644 --- a/include/power/stpmic1.h +++ b/include/power/stpmic1.h @@ -107,4 +107,11 @@ enum { STPMIC1_PWR_SW2, STPMIC1_MAX_PWR_SW, }; + +int stpmic1_shadow_read_byte(u8 addr, u8 *buf); +int stpmic1_shadow_write_byte(u8 addr, u8 *buf); +int stpmic1_nvm_read_byte(u8 addr, u8 *buf); +int stpmic1_nvm_write_byte(u8 addr, u8 *buf); +int stpmic1_nvm_read_all(u8 *buf, int buf_len); +int stpmic1_nvm_write_all(u8 *buf, int buf_len); #endif