[U-Boot] [PATCH 1/8] Eliminate support for using MMC as memory

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Andy Fleming

30 Jan 2009 30 Jan '09

10:45 p.m.

MMC cards are not memory, so we stop treating them that way.

Signed-off-by: Andy Fleming afleming@freescale.com --- common/cmd_mem.c | 43 ------------------------------------------- cpu/arm720t/lpc2292/mmc.c | 26 -------------------------- cpu/pxa/mmc.c | 14 -------------- drivers/mmc/atmel_mci.c | 15 --------------- include/mmc.h | 1 - 5 files changed, 0 insertions(+), 99 deletions(-)

diff --git a/common/cmd_mem.c b/common/cmd_mem.c index a203e0d..2d4fc2a 100644 --- a/common/cmd_mem.c +++ b/common/cmd_mem.c @@ -29,9 +29,6 @@

#include <common.h> #include <command.h> -#if defined(CONFIG_CMD_MMC) -#include <mmc.h> -#endif #ifdef CONFIG_HAS_DATAFLASH #include <dataflash.h> #endif @@ -404,46 +401,6 @@ int do_mem_cp ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } #endif

-#if defined(CONFIG_CMD_MMC) - if (mmc2info(dest)) { - int rc; - - puts ("Copy to MMC... "); - switch (rc = mmc_write ((uchar *)addr, dest, count*size)) { - case 0: - putc ('\n'); - return 1; - case -1: - puts ("failed\n"); - return 1; - default: - printf ("%s[%d] FIXME: rc=%d\n",__FILE__,__LINE__,rc); - return 1; - } - puts ("done\n"); - return 0; - } - - if (mmc2info(addr)) { - int rc; - - puts ("Copy from MMC... "); - switch (rc = mmc_read (addr, (uchar *)dest, count*size)) { - case 0: - putc ('\n'); - return 1; - case -1: - puts ("failed\n"); - return 1; - default: - printf ("%s[%d] FIXME: rc=%d\n",__FILE__,__LINE__,rc); - return 1; - } - puts ("done\n"); - return 0; - } -#endif - #ifdef CONFIG_HAS_DATAFLASH /* Check if we are copying from RAM or Flash to DataFlash */ if (addr_dataflash(dest) && !addr_dataflash(addr)){ diff --git a/cpu/arm720t/lpc2292/mmc.c b/cpu/arm720t/lpc2292/mmc.c index fd7f149..792a884 100644 --- a/cpu/arm720t/lpc2292/mmc.c +++ b/cpu/arm720t/lpc2292/mmc.c @@ -128,30 +128,4 @@ int mmc_init(int verbose) return ret; }

-int mmc_write(uchar * src, ulong dst, int size) -{ -#ifdef MMC_DEBUG - printf("mmc_write: src=%p, dst=%lu, size=%u\n", src, dst, size); -#endif - /* Since mmc2info always returns 0 this function will never be called */ - return 0; -} - -int mmc_read(ulong src, uchar * dst, int size) -{ -#ifdef MMC_DEBUG - printf("mmc_read: src=%lu, dst=%p, size=%u\n", src, dst, size); -#endif - /* Since mmc2info always returns 0 this function will never be called */ - return 0; -} - -int mmc2info(ulong addr) -{ - /* This function is used by cmd_cp to determine if source or destination - address resides on MMC-card or not. We do not support copy to and from - MMC-card so we always return 0. */ - return 0; -} - #endif /* CONFIG_MMC */ diff --git a/cpu/pxa/mmc.c b/cpu/pxa/mmc.c index d735c8d..1f0d488 100644 --- a/cpu/pxa/mmc.c +++ b/cpu/pxa/mmc.c @@ -645,18 +645,4 @@ mmc_init(int verbose) return rc; }

-int mmc_ident(block_dev_desc_t * dev) -{ - return 0; -} - -int mmc2info(ulong addr) -{ - if (addr >= CONFIG_SYS_MMC_BASE - && addr < CONFIG_SYS_MMC_BASE + (mmc_dev.lba * mmc_dev.blksz)) { - return 1; - } - return 0; -} - #endif /* CONFIG_MMC */ diff --git a/drivers/mmc/atmel_mci.c b/drivers/mmc/atmel_mci.c index 3aa92f2..4028256 100644 --- a/drivers/mmc/atmel_mci.c +++ b/drivers/mmc/atmel_mci.c @@ -531,18 +531,3 @@ int mmc_init(int verbose)

return 0; } - -int mmc_read(ulong src, uchar *dst, int size) -{ - return -ENOSYS; -} - -int mmc_write(uchar *src, ulong dst, int size) -{ - return -ENOSYS; -} - -int mmc2info(ulong addr) -{ - return 0; -} diff --git a/include/mmc.h b/include/mmc.h index 19c76fe..26b9553 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -52,6 +52,5 @@ int mmc_init(int verbose); int mmc_read(ulong src, uchar *dst, int size); int mmc_write(uchar *src, ulong dst, int size); -int mmc2info(ulong addr);

#endif /* _MMC_H_ */

-- 1.5.4.GIT

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Andy Fleming

30 Jan 30 Jan

10:45 p.m.

New subject: [U-Boot] [PATCH 2/8] Convert mmc_init to mmc_legacy_init

This is to get it out of the way of incoming MMC framework

diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c index 473825e..75a75e5 100644 --- a/common/cmd_mmc.c +++ b/common/cmd_mmc.c @@ -27,7 +27,7 @@

int do_mmc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - if (mmc_init (1) != 0) { + if (mmc_legacy_init (1) != 0) { printf ("No MMC card found\n"); return 1; } diff --git a/cpu/arm720t/lpc2292/mmc.c b/cpu/arm720t/lpc2292/mmc.c index 792a884..beaffe9 100644 --- a/cpu/arm720t/lpc2292/mmc.c +++ b/cpu/arm720t/lpc2292/mmc.c @@ -93,12 +93,12 @@ static int mmc_hw_get_parameters(void) return 0; }

-int mmc_init(int verbose) +int mmc_legacy_init(int verbose) { int ret = -ENODEV;

if (verbose) - printf("mmc_init\n"); + printf("mmc_legacy_init\n");

spi_init(); /* this meeds to be done twice */ diff --git a/cpu/pxa/mmc.c b/cpu/pxa/mmc.c index 1f0d488..7199e89 100644 --- a/cpu/pxa/mmc.c +++ b/cpu/pxa/mmc.c @@ -543,7 +543,7 @@ static void mmc_decode_csd(uint32_t * resp)

int /****************************************************/ -mmc_init(int verbose) +mmc_legacy_init(int verbose) /****************************************************/ { int retries, rc = -ENODEV; diff --git a/drivers/mmc/atmel_mci.c b/drivers/mmc/atmel_mci.c index 4028256..3946ffe 100644 --- a/drivers/mmc/atmel_mci.c +++ b/drivers/mmc/atmel_mci.c @@ -463,7 +463,7 @@ static void mci_set_data_timeout(struct mmc_csd *csd) dtocyc << shift, dtor); }

-int mmc_init(int verbose) +int mmc_legacy_init(int verbose) { struct mmc_cid cid; struct mmc_csd csd; diff --git a/include/mmc.h b/include/mmc.h index 26b9553..47cc053 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -49,7 +49,7 @@ #define SD_CMD_APP_SET_BUS_WIDTH 6 #define SD_CMD_APP_SEND_OP_COND 41

-int mmc_init(int verbose); +int mmc_legacy_init(int verbose); int mmc_read(ulong src, uchar *dst, int size); int mmc_write(uchar *src, ulong dst, int size);

-- 1.5.4.GIT

Andy Fleming

10:45 p.m.

New subject: [U-Boot] [PATCH 3/8] Eliminated arch-specific mmc header requirement

The current MMC infrastructure relies on the existence of an arch-specific header file. This isn't necessary, and a couple drivers were forced to implement dummy files to meet this requirement. Instead, we move the stuff in those header files into a more appropriate place, and eliminate the stubs and the #include of asm/arch/mmc.h

Signed-off-by: Andy Fleming afleming@freescale.com --- cpu/pxa/mmc.c | 2 + cpu/pxa/mmc.h | 189 +++++++++++++++++++++++++++++++ include/asm-arm/arch-lpc2292/mmc.h | 22 ---- include/asm-arm/arch-pxa/mmc.h | 189 ------------------------------- include/asm-avr32/arch-at32ap700x/mmc.h | 77 ------------- include/mmc.h | 53 +++++++++- 6 files changed, 243 insertions(+), 289 deletions(-) create mode 100644 cpu/pxa/mmc.h delete mode 100644 include/asm-arm/arch-lpc2292/mmc.h delete mode 100644 include/asm-arm/arch-pxa/mmc.h delete mode 100644 include/asm-avr32/arch-at32ap700x/mmc.h

diff --git a/cpu/pxa/mmc.c b/cpu/pxa/mmc.c index 7199e89..8f5277e 100644 --- a/cpu/pxa/mmc.c +++ b/cpu/pxa/mmc.c @@ -28,6 +28,8 @@ #include <asm/arch/hardware.h> #include <part.h>

+#include "mmc.h" + #ifdef CONFIG_MMC

extern int fat_register_device(block_dev_desc_t * dev_desc, int part_no); diff --git a/cpu/pxa/mmc.h b/cpu/pxa/mmc.h new file mode 100644 index 0000000..85e144b --- /dev/null +++ b/cpu/pxa/mmc.h @@ -0,0 +1,189 @@ +/* + * linux/drivers/mmc/mmc_pxa.h + * + * Author: Vladimir Shebordaev, Igor Oblakov + * Copyright: MontaVista Software Inc. + * + * $Id: mmc_pxa.h,v 0.3.1.6 2002/09/25 19:25:48 ted Exp ted $ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __MMC_PXA_P_H__ +#define __MMC_PXA_P_H__ + +/* PXA-250 MMC controller registers */ + +/* MMC_STRPCL */ +#define MMC_STRPCL_STOP_CLK (0x0001UL) +#define MMC_STRPCL_START_CLK (0x0002UL) + +/* MMC_STAT */ +#define MMC_STAT_END_CMD_RES (0x0001UL << 13) +#define MMC_STAT_PRG_DONE (0x0001UL << 12) +#define MMC_STAT_DATA_TRAN_DONE (0x0001UL << 11) +#define MMC_STAT_CLK_EN (0x0001UL << 8) +#define MMC_STAT_RECV_FIFO_FULL (0x0001UL << 7) +#define MMC_STAT_XMIT_FIFO_EMPTY (0x0001UL << 6) +#define MMC_STAT_RES_CRC_ERROR (0x0001UL << 5) +#define MMC_STAT_SPI_READ_ERROR_TOKEN (0x0001UL << 4) +#define MMC_STAT_CRC_READ_ERROR (0x0001UL << 3) +#define MMC_STAT_CRC_WRITE_ERROR (0x0001UL << 2) +#define MMC_STAT_TIME_OUT_RESPONSE (0x0001UL << 1) +#define MMC_STAT_READ_TIME_OUT (0x0001UL) + +#define MMC_STAT_ERRORS (MMC_STAT_RES_CRC_ERROR|MMC_STAT_SPI_READ_ERROR_TOKEN\ + |MMC_STAT_CRC_READ_ERROR|MMC_STAT_TIME_OUT_RESPONSE\ + |MMC_STAT_READ_TIME_OUT|MMC_STAT_CRC_WRITE_ERROR) + +/* MMC_CLKRT */ +#define MMC_CLKRT_20MHZ (0x0000UL) +#define MMC_CLKRT_10MHZ (0x0001UL) +#define MMC_CLKRT_5MHZ (0x0002UL) +#define MMC_CLKRT_2_5MHZ (0x0003UL) +#define MMC_CLKRT_1_25MHZ (0x0004UL) +#define MMC_CLKRT_0_625MHZ (0x0005UL) +#define MMC_CLKRT_0_3125MHZ (0x0006UL) + +/* MMC_SPI */ +#define MMC_SPI_DISABLE (0x00UL) +#define MMC_SPI_EN (0x01UL) +#define MMC_SPI_CS_EN (0x01UL << 2) +#define MMC_SPI_CS_ADDRESS (0x01UL << 3) +#define MMC_SPI_CRC_ON (0x01UL << 1) + +/* MMC_CMDAT */ +#define MMC_CMDAT_SD_4DAT (0x0001UL << 8) +#define MMC_CMDAT_MMC_DMA_EN (0x0001UL << 7) +#define MMC_CMDAT_INIT (0x0001UL << 6) +#define MMC_CMDAT_BUSY (0x0001UL << 5) +#define MMC_CMDAT_BCR (0x0003UL << 5) +#define MMC_CMDAT_STREAM (0x0001UL << 4) +#define MMC_CMDAT_BLOCK (0x0000UL << 4) +#define MMC_CMDAT_WRITE (0x0001UL << 3) +#define MMC_CMDAT_READ (0x0000UL << 3) +#define MMC_CMDAT_DATA_EN (0x0001UL << 2) +#define MMC_CMDAT_R0 (0) +#define MMC_CMDAT_R1 (0x0001UL) +#define MMC_CMDAT_R2 (0x0002UL) +#define MMC_CMDAT_R3 (0x0003UL) + +/* MMC_RESTO */ +#define MMC_RES_TO_MAX (0x007fUL) /* [6:0] */ + +/* MMC_RDTO */ +#define MMC_READ_TO_MAX (0x0ffffUL) /* [15:0] */ + +/* MMC_BLKLEN */ +#define MMC_BLK_LEN_MAX (0x03ffUL) /* [9:0] */ + +/* MMC_PRTBUF */ +#define MMC_PRTBUF_BUF_PART_FULL (0x01UL) +#define MMC_PRTBUF_BUF_FULL (0x00UL ) + +/* MMC_I_MASK */ +#define MMC_I_MASK_TXFIFO_WR_REQ (0x01UL << 6) +#define MMC_I_MASK_RXFIFO_RD_REQ (0x01UL << 5) +#define MMC_I_MASK_CLK_IS_OFF (0x01UL << 4) +#define MMC_I_MASK_STOP_CMD (0x01UL << 3) +#define MMC_I_MASK_END_CMD_RES (0x01UL << 2) +#define MMC_I_MASK_PRG_DONE (0x01UL << 1) +#define MMC_I_MASK_DATA_TRAN_DONE (0x01UL) +#define MMC_I_MASK_ALL (0x07fUL) + + +/* MMC_I_REG */ +#define MMC_I_REG_TXFIFO_WR_REQ (0x01UL << 6) +#define MMC_I_REG_RXFIFO_RD_REQ (0x01UL << 5) +#define MMC_I_REG_CLK_IS_OFF (0x01UL << 4) +#define MMC_I_REG_STOP_CMD (0x01UL << 3) +#define MMC_I_REG_END_CMD_RES (0x01UL << 2) +#define MMC_I_REG_PRG_DONE (0x01UL << 1) +#define MMC_I_REG_DATA_TRAN_DONE (0x01UL) +#define MMC_I_REG_ALL (0x007fUL) + +/* MMC_CMD */ +#define MMC_CMD_INDEX_MAX (0x006fUL) /* [5:0] */ +#define CMD(x) (x) + +#define MMC_DEFAULT_RCA 1 + +#define MMC_BLOCK_SIZE 512 +#define MMC_MAX_BLOCK_SIZE 512 + +#define MMC_R1_IDLE_STATE 0x01 +#define MMC_R1_ERASE_STATE 0x02 +#define MMC_R1_ILLEGAL_CMD 0x04 +#define MMC_R1_COM_CRC_ERR 0x08 +#define MMC_R1_ERASE_SEQ_ERR 0x01 +#define MMC_R1_ADDR_ERR 0x02 +#define MMC_R1_PARAM_ERR 0x04 + +#define MMC_R1B_WP_ERASE_SKIP 0x0002 +#define MMC_R1B_ERR 0x0004 +#define MMC_R1B_CC_ERR 0x0008 +#define MMC_R1B_CARD_ECC_ERR 0x0010 +#define MMC_R1B_WP_VIOLATION 0x0020 +#define MMC_R1B_ERASE_PARAM 0x0040 +#define MMC_R1B_OOR 0x0080 +#define MMC_R1B_IDLE_STATE 0x0100 +#define MMC_R1B_ERASE_RESET 0x0200 +#define MMC_R1B_ILLEGAL_CMD 0x0400 +#define MMC_R1B_COM_CRC_ERR 0x0800 +#define MMC_R1B_ERASE_SEQ_ERR 0x1000 +#define MMC_R1B_ADDR_ERR 0x2000 +#define MMC_R1B_PARAM_ERR 0x4000 + +typedef struct mmc_cid +{ +/* FIXME: BYTE_ORDER */ + uchar year:4, + month:4; + uchar sn[3]; + uchar fwrev:4, + hwrev:4; + uchar name[6]; + uchar id[3]; +} mmc_cid_t; + +typedef struct mmc_csd +{ + uint8_t csd_structure:2, + spec_ver:4, + rsvd1:2; + uint8_t taac; + uint8_t nsac; + uint8_t tran_speed; + uint16_t ccc:12, + read_bl_len:4; + uint64_t read_bl_partial:1, + write_blk_misalign:1, + read_blk_misalign:1, + dsr_imp:1, + rsvd2:2, + c_size:12, + vdd_r_curr_min:3, + vdd_r_curr_max:3, + vdd_w_curr_min:3, + vdd_w_curr_max:3, + c_size_mult:3, + erase_blk_en:1, + sector_size:7, + wp_grp_size:7, + wp_grp_enable:1, + default_ecc:2, + r2w_factor:3, + write_bl_len:4, + write_bl_partial:1, + rsvd3:4, + content_prot_app:1; + uint8_t file_format_grp:1, + copy:1, + perm_write_protect:1, + tmp_write_protect:1, + file_format:2, + ecc:2; +} mmc_csd_t; + +#endif /* __MMC_PXA_P_H__ */ diff --git a/include/asm-arm/arch-lpc2292/mmc.h b/include/asm-arm/arch-lpc2292/mmc.h deleted file mode 100644 index e664a5f..0000000 --- a/include/asm-arm/arch-lpc2292/mmc.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * A dummy header file for use with the LPC2292 port to keep the - * compiler happy. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _MMC_ARM_TDM_H_ -#define _MMC_ARM_TDM_H_ -#endif /* _MMC_ARM_TDM_H_ */ diff --git a/include/asm-arm/arch-pxa/mmc.h b/include/asm-arm/arch-pxa/mmc.h deleted file mode 100644 index 85e144b..0000000 --- a/include/asm-arm/arch-pxa/mmc.h +++ /dev/null @@ -1,189 +0,0 @@ -/* - * linux/drivers/mmc/mmc_pxa.h - * - * Author: Vladimir Shebordaev, Igor Oblakov - * Copyright: MontaVista Software Inc. - * - * $Id: mmc_pxa.h,v 0.3.1.6 2002/09/25 19:25:48 ted Exp ted $ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __MMC_PXA_P_H__ -#define __MMC_PXA_P_H__ - -/* PXA-250 MMC controller registers */ - -/* MMC_STRPCL */ -#define MMC_STRPCL_STOP_CLK (0x0001UL) -#define MMC_STRPCL_START_CLK (0x0002UL) - -/* MMC_STAT */ -#define MMC_STAT_END_CMD_RES (0x0001UL << 13) -#define MMC_STAT_PRG_DONE (0x0001UL << 12) -#define MMC_STAT_DATA_TRAN_DONE (0x0001UL << 11) -#define MMC_STAT_CLK_EN (0x0001UL << 8) -#define MMC_STAT_RECV_FIFO_FULL (0x0001UL << 7) -#define MMC_STAT_XMIT_FIFO_EMPTY (0x0001UL << 6) -#define MMC_STAT_RES_CRC_ERROR (0x0001UL << 5) -#define MMC_STAT_SPI_READ_ERROR_TOKEN (0x0001UL << 4) -#define MMC_STAT_CRC_READ_ERROR (0x0001UL << 3) -#define MMC_STAT_CRC_WRITE_ERROR (0x0001UL << 2) -#define MMC_STAT_TIME_OUT_RESPONSE (0x0001UL << 1) -#define MMC_STAT_READ_TIME_OUT (0x0001UL) - -#define MMC_STAT_ERRORS (MMC_STAT_RES_CRC_ERROR|MMC_STAT_SPI_READ_ERROR_TOKEN\ - |MMC_STAT_CRC_READ_ERROR|MMC_STAT_TIME_OUT_RESPONSE\ - |MMC_STAT_READ_TIME_OUT|MMC_STAT_CRC_WRITE_ERROR) - -/* MMC_CLKRT */ -#define MMC_CLKRT_20MHZ (0x0000UL) -#define MMC_CLKRT_10MHZ (0x0001UL) -#define MMC_CLKRT_5MHZ (0x0002UL) -#define MMC_CLKRT_2_5MHZ (0x0003UL) -#define MMC_CLKRT_1_25MHZ (0x0004UL) -#define MMC_CLKRT_0_625MHZ (0x0005UL) -#define MMC_CLKRT_0_3125MHZ (0x0006UL) - -/* MMC_SPI */ -#define MMC_SPI_DISABLE (0x00UL) -#define MMC_SPI_EN (0x01UL) -#define MMC_SPI_CS_EN (0x01UL << 2) -#define MMC_SPI_CS_ADDRESS (0x01UL << 3) -#define MMC_SPI_CRC_ON (0x01UL << 1) - -/* MMC_CMDAT */ -#define MMC_CMDAT_SD_4DAT (0x0001UL << 8) -#define MMC_CMDAT_MMC_DMA_EN (0x0001UL << 7) -#define MMC_CMDAT_INIT (0x0001UL << 6) -#define MMC_CMDAT_BUSY (0x0001UL << 5) -#define MMC_CMDAT_BCR (0x0003UL << 5) -#define MMC_CMDAT_STREAM (0x0001UL << 4) -#define MMC_CMDAT_BLOCK (0x0000UL << 4) -#define MMC_CMDAT_WRITE (0x0001UL << 3) -#define MMC_CMDAT_READ (0x0000UL << 3) -#define MMC_CMDAT_DATA_EN (0x0001UL << 2) -#define MMC_CMDAT_R0 (0) -#define MMC_CMDAT_R1 (0x0001UL) -#define MMC_CMDAT_R2 (0x0002UL) -#define MMC_CMDAT_R3 (0x0003UL) - -/* MMC_RESTO */ -#define MMC_RES_TO_MAX (0x007fUL) /* [6:0] */ - -/* MMC_RDTO */ -#define MMC_READ_TO_MAX (0x0ffffUL) /* [15:0] */ - -/* MMC_BLKLEN */ -#define MMC_BLK_LEN_MAX (0x03ffUL) /* [9:0] */ - -/* MMC_PRTBUF */ -#define MMC_PRTBUF_BUF_PART_FULL (0x01UL) -#define MMC_PRTBUF_BUF_FULL (0x00UL ) - -/* MMC_I_MASK */ -#define MMC_I_MASK_TXFIFO_WR_REQ (0x01UL << 6) -#define MMC_I_MASK_RXFIFO_RD_REQ (0x01UL << 5) -#define MMC_I_MASK_CLK_IS_OFF (0x01UL << 4) -#define MMC_I_MASK_STOP_CMD (0x01UL << 3) -#define MMC_I_MASK_END_CMD_RES (0x01UL << 2) -#define MMC_I_MASK_PRG_DONE (0x01UL << 1) -#define MMC_I_MASK_DATA_TRAN_DONE (0x01UL) -#define MMC_I_MASK_ALL (0x07fUL) - - -/* MMC_I_REG */ -#define MMC_I_REG_TXFIFO_WR_REQ (0x01UL << 6) -#define MMC_I_REG_RXFIFO_RD_REQ (0x01UL << 5) -#define MMC_I_REG_CLK_IS_OFF (0x01UL << 4) -#define MMC_I_REG_STOP_CMD (0x01UL << 3) -#define MMC_I_REG_END_CMD_RES (0x01UL << 2) -#define MMC_I_REG_PRG_DONE (0x01UL << 1) -#define MMC_I_REG_DATA_TRAN_DONE (0x01UL) -#define MMC_I_REG_ALL (0x007fUL) - -/* MMC_CMD */ -#define MMC_CMD_INDEX_MAX (0x006fUL) /* [5:0] */ -#define CMD(x) (x) - -#define MMC_DEFAULT_RCA 1 - -#define MMC_BLOCK_SIZE 512 -#define MMC_MAX_BLOCK_SIZE 512 - -#define MMC_R1_IDLE_STATE 0x01 -#define MMC_R1_ERASE_STATE 0x02 -#define MMC_R1_ILLEGAL_CMD 0x04 -#define MMC_R1_COM_CRC_ERR 0x08 -#define MMC_R1_ERASE_SEQ_ERR 0x01 -#define MMC_R1_ADDR_ERR 0x02 -#define MMC_R1_PARAM_ERR 0x04 - -#define MMC_R1B_WP_ERASE_SKIP 0x0002 -#define MMC_R1B_ERR 0x0004 -#define MMC_R1B_CC_ERR 0x0008 -#define MMC_R1B_CARD_ECC_ERR 0x0010 -#define MMC_R1B_WP_VIOLATION 0x0020 -#define MMC_R1B_ERASE_PARAM 0x0040 -#define MMC_R1B_OOR 0x0080 -#define MMC_R1B_IDLE_STATE 0x0100 -#define MMC_R1B_ERASE_RESET 0x0200 -#define MMC_R1B_ILLEGAL_CMD 0x0400 -#define MMC_R1B_COM_CRC_ERR 0x0800 -#define MMC_R1B_ERASE_SEQ_ERR 0x1000 -#define MMC_R1B_ADDR_ERR 0x2000 -#define MMC_R1B_PARAM_ERR 0x4000 - -typedef struct mmc_cid -{ -/* FIXME: BYTE_ORDER */ - uchar year:4, - month:4; - uchar sn[3]; - uchar fwrev:4, - hwrev:4; - uchar name[6]; - uchar id[3]; -} mmc_cid_t; - -typedef struct mmc_csd -{ - uint8_t csd_structure:2, - spec_ver:4, - rsvd1:2; - uint8_t taac; - uint8_t nsac; - uint8_t tran_speed; - uint16_t ccc:12, - read_bl_len:4; - uint64_t read_bl_partial:1, - write_blk_misalign:1, - read_blk_misalign:1, - dsr_imp:1, - rsvd2:2, - c_size:12, - vdd_r_curr_min:3, - vdd_r_curr_max:3, - vdd_w_curr_min:3, - vdd_w_curr_max:3, - c_size_mult:3, - erase_blk_en:1, - sector_size:7, - wp_grp_size:7, - wp_grp_enable:1, - default_ecc:2, - r2w_factor:3, - write_bl_len:4, - write_bl_partial:1, - rsvd3:4, - content_prot_app:1; - uint8_t file_format_grp:1, - copy:1, - perm_write_protect:1, - tmp_write_protect:1, - file_format:2, - ecc:2; -} mmc_csd_t; - -#endif /* __MMC_PXA_P_H__ */ diff --git a/include/asm-avr32/arch-at32ap700x/mmc.h b/include/asm-avr32/arch-at32ap700x/mmc.h deleted file mode 100644 index 9caba91..0000000 --- a/include/asm-avr32/arch-at32ap700x/mmc.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef __ASM_AVR32_MMC_H -#define __ASM_AVR32_MMC_H - -struct mmc_cid { - unsigned long psn; - unsigned short oid; - unsigned char mid; - unsigned char prv; - unsigned char mdt; - char pnm[7]; -}; - -struct mmc_csd -{ - u8 csd_structure:2, - spec_vers:4, - rsvd1:2; - u8 taac; - u8 nsac; - u8 tran_speed; - u16 ccc:12, - read_bl_len:4; - u64 read_bl_partial:1, - write_blk_misalign:1, - read_blk_misalign:1, - dsr_imp:1, - rsvd2:2, - c_size:12, - vdd_r_curr_min:3, - vdd_r_curr_max:3, - vdd_w_curr_min:3, - vdd_w_curr_max:3, - c_size_mult:3, - sector_size:5, - erase_grp_size:5, - wp_grp_size:5, - wp_grp_enable:1, - default_ecc:2, - r2w_factor:3, - write_bl_len:4, - write_bl_partial:1, - rsvd3:5; - u8 file_format_grp:1, - copy:1, - perm_write_protect:1, - tmp_write_protect:1, - file_format:2, - ecc:2; - u8 crc:7; - u8 one:1; -}; - -#define R1_ILLEGAL_COMMAND (1 << 22) -#define R1_APP_CMD (1 << 5) - -#endif /* __ASM_AVR32_MMC_H */ diff --git a/include/mmc.h b/include/mmc.h index 47cc053..e41033f 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -23,7 +23,6 @@

#ifndef _MMC_H_ #define _MMC_H_ -#include <asm/arch/mmc.h>

/* MMC command numbers */ #define MMC_CMD_GO_IDLE_STATE 0 @@ -49,8 +48,60 @@ #define SD_CMD_APP_SET_BUS_WIDTH 6 #define SD_CMD_APP_SEND_OP_COND 41

+#define R1_ILLEGAL_COMMAND (1 << 22) +#define R1_APP_CMD (1 << 5) + int mmc_legacy_init(int verbose); int mmc_read(ulong src, uchar *dst, int size); int mmc_write(uchar *src, ulong dst, int size);

+struct mmc_cid { + unsigned long psn; + unsigned short oid; + unsigned char mid; + unsigned char prv; + unsigned char mdt; + char pnm[7]; +}; + +struct mmc_csd +{ + u8 csd_structure:2, + spec_vers:4, + rsvd1:2; + u8 taac; + u8 nsac; + u8 tran_speed; + u16 ccc:12, + read_bl_len:4; + u64 read_bl_partial:1, + write_blk_misalign:1, + read_blk_misalign:1, + dsr_imp:1, + rsvd2:2, + c_size:12, + vdd_r_curr_min:3, + vdd_r_curr_max:3, + vdd_w_curr_min:3, + vdd_w_curr_max:3, + c_size_mult:3, + sector_size:5, + erase_grp_size:5, + wp_grp_size:5, + wp_grp_enable:1, + default_ecc:2, + r2w_factor:3, + write_bl_len:4, + write_bl_partial:1, + rsvd3:5; + u8 file_format_grp:1, + copy:1, + perm_write_protect:1, + tmp_write_protect:1, + file_format:2, + ecc:2; + u8 crc:7; + u8 one:1; +}; + #endif /* _MMC_H_ */

-- 1.5.4.GIT

Andy Fleming

10:45 p.m.

New subject: [U-Boot] [PATCH 4/8] Reduce the scope of PXA's mmc_read/mmc_write/mmc_bread functions

These names are being taken over by the new MMC framework. Hopefuly the PXA can be easily ported, and these functions will go away entirely.

Signed-off-by: Andy Fleming afleming@freescale.com --- cpu/pxa/mmc.c | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/cpu/pxa/mmc.c b/cpu/pxa/mmc.c index 8f5277e..de77c12 100644 --- a/cpu/pxa/mmc.c +++ b/cpu/pxa/mmc.c @@ -218,7 +218,7 @@ mmc_block_write(ulong dst, uchar * src, int len)

int /****************************************************/ -mmc_read(ulong src, uchar * dst, int size) +pxa_mmc_read(long src, uchar * dst, int size) /****************************************************/ { ulong end, part_start, part_end, part_len, aligned_start, aligned_end; @@ -294,7 +294,7 @@ mmc_read(ulong src, uchar * dst, int size)

int /****************************************************/ -mmc_write(uchar * src, ulong dst, int size) +pxa_mmc_write(uchar * src, ulong dst, int size) /****************************************************/ { ulong end, part_start, part_end, part_len, aligned_start, aligned_end; @@ -375,7 +375,7 @@ mmc_write(uchar * src, ulong dst, int size) return 0; }

-ulong +static ulong /****************************************************/ mmc_bread(int dev_num, ulong blknr, lbaint_t blkcnt, void *dst) /****************************************************/ @@ -383,7 +383,7 @@ mmc_bread(int dev_num, ulong blknr, lbaint_t blkcnt, void *dst) int mmc_block_size = MMC_BLOCK_SIZE; ulong src = blknr * mmc_block_size + CONFIG_SYS_MMC_BASE;

- mmc_read(src, (uchar *) dst, blkcnt * mmc_block_size); + pxa_mmc_read(src, (uchar *) dst, blkcnt * mmc_block_size); return blkcnt; }

-- 1.5.4.GIT

Andy Fleming

10:45 p.m.

New subject: [U-Boot] [PATCH 5/8] Add MMC Framework

Here's a new framework (based roughly off the linux one) for managing MMC controllers. It handles all of the standard SD/MMC transactions, leaving the host drivers to implement only what is necessary to deal with their specific hardware.

This also hooks the infrastructure into the PowerPC board code (similar to how the ethernet infrastructure now hooks in)

Some of this code was contributed by Dave Liu daveliu@freescale.com

Signed-off-by: Andy Fleming afleming@freescale.com --- common/cmd_mmc.c | 132 +++++++ drivers/mmc/Makefile | 1 + drivers/mmc/mmc.c | 930 ++++++++++++++++++++++++++++++++++++++++++++++++++ include/mmc.h | 190 ++++++++++- lib_ppc/board.c | 9 + 5 files changed, 1253 insertions(+), 9 deletions(-) create mode 100644 drivers/mmc/mmc.c

diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c index 75a75e5..71f4971 100644 --- a/common/cmd_mmc.c +++ b/common/cmd_mmc.c @@ -25,6 +25,7 @@ #include <command.h> #include <mmc.h>

+#ifndef CONFIG_GENERIC_MMC int do_mmc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { if (mmc_legacy_init (1) != 0) { @@ -39,3 +40,134 @@ U_BOOT_CMD( "init mmc card", NULL ); +#endif /* !CONFIG_GENERIC_MMC */ + +static void print_mmcinfo(struct mmc *mmc) +{ + printf("Device: %s\n", mmc->name); + printf("Manufacturer ID: %x\n", mmc->cid[0] >> 24); + printf("OEM: %x\n", (mmc->cid[0] >> 8) & 0xffff); + printf("Name: %c%c%c%c%c \n", mmc->cid[0] & 0xff, + (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, + (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff); + + printf("Tran Speed: %d\n", mmc->tran_speed); + printf("Rd Block Len: %d\n", mmc->read_bl_len); + + printf("%s version %d.%d\n", IS_SD(mmc) ? "SD" : "MMC", + (mmc->version >> 4) & 0xf, mmc->version & 0xf); + + printf("High Capacity: %s\n", mmc->high_capacity ? "Yes" : "No"); + printf("Capacity: %lld\n", mmc->capacity); + + printf("Bus Width: %d-bit\n", mmc->bus_width); +} + +int do_mmcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + struct mmc *mmc; + int dev_num; + + if (argc < 2) + dev_num = 0; + else + dev_num = simple_strtoul(argv[1], NULL, 0); + + mmc = find_mmc_device(dev_num); + + if (mmc) { + mmc_init(mmc); + + print_mmcinfo(mmc); + } + + return 0; +} + +U_BOOT_CMD(mmcinfo, 2, 0, do_mmcinfo, "mmcinfo <dev num>-- display MMC info\n", + NULL); + +int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int rc = 0; + + switch (argc) { + case 3: + if (strcmp(argv[1], "rescan") == 0) { + int dev = simple_strtoul(argv[2], NULL, 10); + struct mmc *mmc = find_mmc_device(dev); + + mmc_init(mmc); + + return 0; + } + + case 0: + case 1: + case 4: + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + + case 2: + if (!strcmp(argv[1], "list")) { + print_mmc_devices('\n'); + return 0; + } + return 1; + default: /* at least 5 args */ + if (strcmp(argv[1], "read") == 0) { + int dev = simple_strtoul(argv[2], NULL, 10); + void *addr = (void *)simple_strtoul(argv[3], NULL, 16); + u32 cnt = simple_strtoul(argv[5], NULL, 16); + u32 n; + u32 blk = simple_strtoul(argv[4], NULL, 16); + struct mmc *mmc = find_mmc_device(dev); + + printf("\nMMC read: dev # %d, block # %d, count %d ... ", + dev, blk, cnt); + + mmc_init(mmc); + + n = mmc->block_dev.block_read(dev, blk, cnt, addr); + + /* flush cache after read */ + flush_cache((ulong)addr, cnt * 512); //FIXME + + printf("%d blocks read: %s\n", + n, (n==cnt) ? "OK" : "ERROR"); + return (n == cnt) ? 0 : 1; + } else if (strcmp(argv[1], "write") == 0) { + int dev = simple_strtoul(argv[2], NULL, 10); + void *addr = (void *)simple_strtoul(argv[3], NULL, 16); + u32 cnt = simple_strtoul(argv[5], NULL, 16); + u32 n; + struct mmc *mmc = find_mmc_device(dev); + + int blk = simple_strtoul(argv[4], NULL, 16); + + printf("\nMMC write: dev # %d, block # %d, count %d ... ", + dev, blk, cnt); + + mmc_init(mmc); + + n = mmc->block_dev.block_write(dev, blk, cnt, addr); + + printf("%d blocks written: %s\n", + n, (n == cnt) ? "OK" : "ERROR"); + return (n == cnt) ? 0 : 1; + } else { + printf("Usage:\n%s\n", cmdtp->usage); + rc = 1; + } + + return rc; + } +} + +U_BOOT_CMD( + mmc, 6, 1, do_mmcops, + "mmc - MMC sub system\n", + "mmc read <device num> addr blk# cnt\n" + "mmc write <device num> addr blk# cnt\n" + "mmc rescan <device num>\n" + "mmc list - lists available devices\n"); diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 3dc031b..d5a969c 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -25,6 +25,7 @@ include $(TOPDIR)/config.mk

LIB := $(obj)libmmc.a

+COBJS-$(CONFIG_GENERIC_MMC) += mmc.o COBJS-$(CONFIG_ATMEL_MCI) += atmel_mci.o

COBJS := $(COBJS-y) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c new file mode 100644 index 0000000..96186d9 --- /dev/null +++ b/drivers/mmc/mmc.c @@ -0,0 +1,930 @@ +/* + * Copyright 2008, Freescale Semiconductor, Inc + * Andy Fleming + * + * Based vaguely on the Linux code + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <common.h> +#include <command.h> +#include <mmc.h> +#include <part.h> +#include <malloc.h> +#include <linux/list.h> +#include <mmc.h> + +static struct list_head mmc_devices; +static int cur_dev_num = -1; + +int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) +{ + return mmc->send_cmd(mmc, cmd, data); +} + +int mmc_set_blocklen(struct mmc *mmc, int len) +{ + struct mmc_cmd cmd; + + cmd.cmdidx = MMC_CMD_SET_BLOCKLEN; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = len; + cmd.flags = 0; + + return mmc_send_cmd(mmc, &cmd, NULL); +} + +struct mmc *find_mmc_device(int dev_num) +{ + struct mmc *m; + struct list_head *entry; + + list_for_each(entry, &mmc_devices) { + m = list_entry(entry, struct mmc, link); + + if (m->block_dev.dev == dev_num) + return m; + } + + printf("MMC Device %d not found\n", dev_num); + + return NULL; +} + +static ulong +mmc_bwrite(int dev_num, ulong start, lbaint_t blkcnt, const void*src) +{ + struct mmc_cmd cmd; + struct mmc_data data; + int err; + int stoperr = 0; + struct mmc *mmc = find_mmc_device(dev_num); + int blklen; + + if (!mmc) + return -1; + + blklen = mmc->write_bl_len; + + err = mmc_set_blocklen(mmc, mmc->write_bl_len); + + if (err) { + printf("set write bl len failed\n\r"); + return err; + } + + if (blkcnt > 1) + cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK; + else + cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK; + + if (mmc->high_capacity) + cmd.cmdarg = start; + else + cmd.cmdarg = start * blklen; + + cmd.resp_type = MMC_RSP_R1; + cmd.flags = 0; + + data.src = src; + data.blocks = blkcnt; + data.blocksize = blklen; + data.flags = MMC_DATA_WRITE; + + err = mmc_send_cmd(mmc, &cmd, &data); + + if (err) { + printf("mmc write failed\n\r"); + return err; + } + + if (blkcnt > 1) { + cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; + cmd.cmdarg = 0; + cmd.resp_type = MMC_RSP_R1b; + cmd.flags = 0; + stoperr = mmc_send_cmd(mmc, &cmd, NULL); + } + + return blkcnt; +} + +int mmc_read_block(struct mmc *mmc, void *dst, uint blocknum) +{ + struct mmc_cmd cmd; + struct mmc_data data; + + cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK; + + if (mmc->high_capacity) + cmd.cmdarg = blocknum; + else + cmd.cmdarg = blocknum * mmc->read_bl_len; + + cmd.resp_type = MMC_RSP_R1; + cmd.flags = 0; + + data.dest = dst; + data.blocks = 1; + data.blocksize = mmc->read_bl_len; + data.flags = MMC_DATA_READ; + + return mmc_send_cmd(mmc, &cmd, &data); +} + +int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size) +{ + char *buffer; + int i; + int blklen = mmc->read_bl_len; + int startblock = src / blklen; + int endblock = (src + size - 1) / blklen; + int err = 0; + + /* Make a buffer big enough to hold all the blocks we might read */ + buffer = malloc(blklen); + + if (!buffer) { + printf("Could not allocate buffer for MMC read!\n"); + return -1; + } + + /* We always do full block reads from the card */ + err = mmc_set_blocklen(mmc, mmc->read_bl_len); + + if (err) + return err; + + for (i = startblock; i <= endblock; i++) { + int segment_size; + int offset; + + err = mmc_read_block(mmc, buffer, i); + + if (err) + goto free_buffer; + + /* + * The first block may not be aligned, so we + * copy from the desired point in the block + */ + offset = (src & (blklen - 1)); + segment_size = MIN(blklen - offset, size); + + memcpy(dst, buffer + offset, segment_size); + + dst += segment_size; + src += segment_size; + size -= segment_size; + } + +free_buffer: + free(buffer); + + return err; +} + +static ulong mmc_bread(int dev_num, ulong start, lbaint_t blkcnt, void *dst) +{ + int err; + int i; + struct mmc *mmc = find_mmc_device(dev_num); + + if (!mmc) + return 0; + + /* We always do full block reads from the card */ + err = mmc_set_blocklen(mmc, mmc->read_bl_len); + + if (err) { + return 0; + } + + for (i = start; i < start + blkcnt; i++, dst += mmc->read_bl_len) { + err = mmc_read_block(mmc, dst, i); + + if (err) { + printf("block read failed: %d\n", err); + return i - start; + } + } + + return blkcnt; +} + +int mmc_go_idle(struct mmc* mmc) +{ + struct mmc_cmd cmd; + int err; + + udelay(1000); + + cmd.cmdidx = MMC_CMD_GO_IDLE_STATE; + cmd.cmdarg = 0; + cmd.resp_type = MMC_RSP_NONE; + cmd.flags = 0; + + err = mmc_send_cmd(mmc, &cmd, NULL); + + if (err) + return err; + + udelay(2000); + + return 0; +} + +int +sd_send_op_cond(struct mmc *mmc) +{ + int timeout = 1000; + int err; + struct mmc_cmd cmd; + + do { + cmd.cmdidx = MMC_CMD_APP_CMD; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = 0; + cmd.flags = 0; + + err = mmc_send_cmd(mmc, &cmd, NULL); + + if (err) + return err; + + cmd.cmdidx = SD_CMD_APP_SEND_OP_COND; + cmd.resp_type = MMC_RSP_R3; + cmd.cmdarg = mmc->voltages; + + if (mmc->version == SD_VERSION_2) + cmd.cmdarg |= OCR_HCS; + + err = mmc_send_cmd(mmc, &cmd, NULL); + + if (err) + return err; + + udelay(1000); + } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--); + + if (timeout <= 0) + return UNUSABLE_ERR; + + if (mmc->version != SD_VERSION_2) + mmc->version = SD_VERSION_1_0; + + mmc->ocr = ((uint *)(cmd.response))[0]; + + mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); + mmc->rca = 0; + + return 0; +} + +int mmc_send_op_cond(struct mmc *mmc) +{ + int timeout = 1000; + struct mmc_cmd cmd; + int err; + + /* Some cards seem to need this */ + mmc_go_idle(mmc); + + do { + cmd.cmdidx = MMC_CMD_SEND_OP_COND; + cmd.resp_type = MMC_RSP_R3; + cmd.cmdarg = OCR_HCS | mmc->voltages; + cmd.flags = 0; + + err = mmc_send_cmd(mmc, &cmd, NULL); + + if (err) + return err; + + udelay(1000); + } while (!(cmd.response[0] & OCR_BUSY) && timeout--); + + if (timeout <= 0) + return UNUSABLE_ERR; + + mmc->version = MMC_VERSION_UNKNOWN; + mmc->ocr = ((uint *)(cmd.response))[0]; + + mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); + mmc->rca = 0; + + return 0; +} + + +int mmc_send_ext_csd(struct mmc *mmc, char *ext_csd) +{ + struct mmc_cmd cmd; + struct mmc_data data; + int err; + + /* Get the Card Status Register */ + cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = 0; + cmd.flags = 0; + + data.dest = ext_csd; + data.blocks = 1; + data.blocksize = 512; + data.flags = MMC_DATA_READ; + + err = mmc_send_cmd(mmc, &cmd, &data); + + return err; +} + + +int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) +{ + struct mmc_cmd cmd; + + cmd.cmdidx = MMC_CMD_SWITCH; + cmd.resp_type = MMC_RSP_R1b; + cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | + (index << 16) | + (value << 8); + cmd.flags = 0; + + return mmc_send_cmd(mmc, &cmd, NULL); +} + +int mmc_change_freq(struct mmc *mmc) +{ + char ext_csd[512]; + char cardtype; + int err; + + mmc->card_caps = 0; + + /* Only version 4 supports high-speed */ + if (mmc->version < MMC_VERSION_4) + return 0; + + mmc->card_caps |= MMC_MODE_4BIT; + + err = mmc_send_ext_csd(mmc, ext_csd); + + if (err) + return err; + + if (ext_csd[212] || ext_csd[213] || ext_csd[214] || ext_csd[215]) + mmc->high_capacity = 1; + + cardtype = ext_csd[196] & 0xf; + + err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1); + + if (err) + return err; + + /* Now check to see that it worked */ + err = mmc_send_ext_csd(mmc, ext_csd); + + if (err) + return err; + + /* No high-speed support */ + if (!ext_csd[185]) + return 0; + + /* High Speed is set, there are two types: 52MHz and 26MHz */ + if (cardtype & MMC_HS_52MHZ) + mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; + else + mmc->card_caps |= MMC_MODE_HS; + + return 0; +} + +int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp) +{ + struct mmc_cmd cmd; + struct mmc_data data; + + /* Switch the frequency */ + cmd.cmdidx = SD_CMD_SWITCH_FUNC; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = (mode << 31) | 0xffffff; + cmd.cmdarg &= ~(0xf << (group * 4)); + cmd.cmdarg |= value << (group * 4); + cmd.flags = 0; + + data.dest = (char *)resp; + data.blocksize = 64; + data.blocks = 1; + data.flags = MMC_DATA_READ; + + return mmc_send_cmd(mmc, &cmd, &data); +} + + +int sd_change_freq(struct mmc *mmc) +{ + int err; + struct mmc_cmd cmd; + uint scr[2]; + uint switch_status[16]; + struct mmc_data data; + int timeout; + + mmc->card_caps = 0; + + /* Read the SCR to find out if this card supports higher speeds */ + cmd.cmdidx = MMC_CMD_APP_CMD; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = mmc->rca << 16; + cmd.flags = 0; + + err = mmc_send_cmd(mmc, &cmd, NULL); + + if (err) + return err; + + cmd.cmdidx = SD_CMD_APP_SEND_SCR; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = 0; + cmd.flags = 0; + + timeout = 3; + +retry_scr: + data.dest = (char *)&scr; + data.blocksize = 8; + data.blocks = 1; + data.flags = MMC_DATA_READ; + + err = mmc_send_cmd(mmc, &cmd, &data); + + if (err) { + if (timeout--) + goto retry_scr; + + return err; + } + + mmc->scr[0] = scr[0]; + mmc->scr[1] = scr[1]; + + switch ((mmc->scr[0] >> 24) & 0xf) { + case 0: + mmc->version = SD_VERSION_1_0; + break; + case 1: + mmc->version = SD_VERSION_1_10; + break; + case 2: + mmc->version = SD_VERSION_2; + break; + default: + mmc->version = SD_VERSION_1_0; + break; + } + + /* Version 1.0 doesn't support switching */ + if (mmc->version == SD_VERSION_1_0) + return 0; + + timeout = 4; + while (timeout--) { + err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1, + (u8 *)&switch_status); + + if (err) + return err; + + /* The high-speed function is busy. Try again */ + if (!switch_status[7] & SD_HIGHSPEED_BUSY) + break; + } + + if (mmc->scr[0] & SD_DATA_4BIT) + mmc->card_caps |= MMC_MODE_4BIT; + + /* If high-speed isn't supported, we return */ + if (!(switch_status[3] & SD_HIGHSPEED_SUPPORTED)) + return 0; + + err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)&switch_status); + + if (err) + return err; + + if ((switch_status[4] & 0x0f000000) == 0x01000000) + mmc->card_caps |= MMC_MODE_HS; + + return 0; +} + +/* frequency bases */ +/* divided by 10 to be nice to platforms without floating point */ +int fbase[] = { + 10000, + 100000, + 1000000, + 10000000, +}; + +/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice + * to platforms without floating point. + */ +int multipliers[] = { + 0, /* reserved */ + 10, + 12, + 13, + 15, + 20, + 25, + 30, + 35, + 40, + 45, + 50, + 55, + 60, + 70, + 80, +}; + +void mmc_set_ios(struct mmc *mmc) +{ + mmc->set_ios(mmc); +} + +void mmc_set_clock(struct mmc *mmc, uint clock) +{ + if (clock > mmc->f_max) + clock = mmc->f_max; + + if (clock < mmc->f_min) + clock = mmc->f_min; + + mmc->clock = clock; + + mmc_set_ios(mmc); +} + +void mmc_set_bus_width(struct mmc *mmc, uint width) +{ + mmc->bus_width = width; + + mmc_set_ios(mmc); +} + +int mmc_startup(struct mmc *mmc) +{ + int err; + uint mult, freq; + u64 cmult, csize; + struct mmc_cmd cmd; + + /* Put the Card in Identify Mode */ + cmd.cmdidx = MMC_CMD_ALL_SEND_CID; + cmd.resp_type = MMC_RSP_R2; + cmd.cmdarg = 0; + cmd.flags = 0; + + err = mmc_send_cmd(mmc, &cmd, NULL); + + if (err) + return err; + + memcpy(mmc->cid, cmd.response, 16); + + /* + * For MMC cards, set the Relative Address. + * For SD cards, get the Relatvie Address. + * This also puts the cards into Standby State + */ + cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR; + cmd.cmdarg = mmc->rca << 16; + cmd.resp_type = MMC_RSP_R6; + cmd.flags = 0; + + err = mmc_send_cmd(mmc, &cmd, NULL); + + if (err) + return err; + + if (IS_SD(mmc)) + mmc->rca = (((uint *)(cmd.response))[0] >> 16) & 0xffff; + + /* Get the Card-Specific Data */ + cmd.cmdidx = MMC_CMD_SEND_CSD; + cmd.resp_type = MMC_RSP_R2; + cmd.cmdarg = mmc->rca << 16; + cmd.flags = 0; + + err = mmc_send_cmd(mmc, &cmd, NULL); + + if (err) + return err; + + mmc->csd[0] = ((uint *)(cmd.response))[0]; + mmc->csd[1] = ((uint *)(cmd.response))[1]; + mmc->csd[2] = ((uint *)(cmd.response))[2]; + mmc->csd[3] = ((uint *)(cmd.response))[3]; + + if (mmc->version == MMC_VERSION_UNKNOWN) { + int version = (cmd.response[0] >> 2) & 0xf; + + switch (version) { + case 0: + mmc->version = MMC_VERSION_1_2; + break; + case 1: + mmc->version = MMC_VERSION_1_4; + break; + case 2: + mmc->version = MMC_VERSION_2_2; + break; + case 3: + mmc->version = MMC_VERSION_3; + break; + case 4: + mmc->version = MMC_VERSION_4; + break; + default: + mmc->version = MMC_VERSION_1_2; + break; + } + } + + /* divide frequency by 10, since the mults are 10x bigger */ + freq = fbase[(cmd.response[3] & 0x7)]; + mult = multipliers[((cmd.response[3] >> 3) & 0xf)]; + + mmc->tran_speed = freq * mult; + + mmc->read_bl_len = 1 << ((((uint *)(cmd.response))[1] >> 16) & 0xf); + + if (IS_SD(mmc)) + mmc->write_bl_len = mmc->read_bl_len; + else + mmc->write_bl_len = 1 << ((((uint *)(cmd.response))[3] >> 22) & 0xf); + + if (mmc->high_capacity) { + csize = (mmc->csd[1] & 0x3f) << 16 + | (mmc->csd[2] & 0xffff0000) >> 16; + cmult = 8; + } else { + csize = (mmc->csd[1] & 0x3ff) << 2 + | (mmc->csd[2] & 0xc0000000) >> 30; + cmult = (mmc->csd[2] & 0x00038000) >> 15; + } + + mmc->capacity = (csize + 1) << (cmult + 2); + mmc->capacity *= mmc->read_bl_len; + + if (mmc->read_bl_len > 512) + mmc->read_bl_len = 512; + + if (mmc->write_bl_len > 512) + mmc->write_bl_len = 512; + + /* Select the card, and put it into Transfer Mode */ + cmd.cmdidx = MMC_CMD_SELECT_CARD; + cmd.resp_type = MMC_RSP_R1b; + cmd.cmdarg = mmc->rca << 16; + cmd.flags = 0; + err = mmc_send_cmd(mmc, &cmd, NULL); + + if (err) + return err; + + if (IS_SD(mmc)) + err = sd_change_freq(mmc); + else + err = mmc_change_freq(mmc); + + if (err) + return err; + + /* Restrict card's capabilities by what the host can do */ + mmc->card_caps &= mmc->host_caps; + + if (IS_SD(mmc)) { + if (mmc->card_caps & MMC_MODE_4BIT) { + cmd.cmdidx = MMC_CMD_APP_CMD; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = mmc->rca << 16; + cmd.flags = 0; + + err = mmc_send_cmd(mmc, &cmd, NULL); + if (err) + return err; + + cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = 2; + cmd.flags = 0; + err = mmc_send_cmd(mmc, &cmd, NULL); + if (err) + return err; + + mmc_set_bus_width(mmc, 4); + } + + if (mmc->card_caps & MMC_MODE_HS) + mmc_set_clock(mmc, 50000000); + else + mmc_set_clock(mmc, 25000000); + } else { + if (mmc->card_caps & MMC_MODE_4BIT) { + /* Set the card to use 4 bit*/ + err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, + EXT_CSD_BUS_WIDTH, + EXT_CSD_BUS_WIDTH_4); + + if (err) + return err; + + mmc_set_bus_width(mmc, 4); + } else if (mmc->card_caps & MMC_MODE_8BIT) { + /* Set the card to use 8 bit*/ + err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, + EXT_CSD_BUS_WIDTH, + EXT_CSD_BUS_WIDTH_8); + + if (err) + return err; + + mmc_set_bus_width(mmc, 8); + } + + if (mmc->card_caps & MMC_MODE_HS) { + if (mmc->card_caps & MMC_MODE_HS_52MHz) + mmc_set_clock(mmc, 52000000); + else + mmc_set_clock(mmc, 26000000); + } else + mmc_set_clock(mmc, 20000000); + } + + /* fill in device description */ + mmc->block_dev.lun = 0; + mmc->block_dev.type = 0; + mmc->block_dev.blksz = mmc->read_bl_len; + mmc->block_dev.lba = mmc->capacity/mmc->read_bl_len; + sprintf(mmc->block_dev.vendor,"Man %02x%02x%02x Snr %02x%02x%02x%02x", + mmc->cid[0], mmc->cid[1], mmc->cid[2], + mmc->cid[9], mmc->cid[10], mmc->cid[11], mmc->cid[12]); + sprintf(mmc->block_dev.product,"%c%c%c%c%c", mmc->cid[3], + mmc->cid[4], mmc->cid[5], mmc->cid[6], mmc->cid[7]); + sprintf(mmc->block_dev.revision,"%d.%d", mmc->cid[8] >> 4, + mmc->cid[8] & 0xf); + init_part(&mmc->block_dev); + + return 0; +} + +int mmc_send_if_cond(struct mmc *mmc) +{ + struct mmc_cmd cmd; + int err; + + cmd.cmdidx = SD_CMD_SEND_IF_COND; + /* We set the bit if the host supports voltages between 2.7 and 3.6 V */ + cmd.cmdarg = ((mmc->voltages & 0xff8000) != 0) << 8 | 0xaa; + cmd.resp_type = MMC_RSP_R7; + cmd.flags = 0; + + err = mmc_send_cmd(mmc, &cmd, NULL); + + if (err) + return err; + + if ((((uint *)(cmd.response))[0] & 0xff) != 0xaa) + return UNUSABLE_ERR; + else + mmc->version = SD_VERSION_2; + + return 0; +} + +int mmc_register(struct mmc *mmc) +{ + /* Setup the universal parts of the block interface just once */ + mmc->block_dev.if_type = IF_TYPE_MMC; + mmc->block_dev.dev = cur_dev_num++; + mmc->block_dev.removable = 1; + mmc->block_dev.block_read = mmc_bread; + mmc->block_dev.block_write = mmc_bwrite; + + INIT_LIST_HEAD (&mmc->link); + + list_add_tail (&mmc->link, &mmc_devices); + + return 0; +} + +block_dev_desc_t *mmc_get_dev(int dev) +{ + struct mmc *mmc = find_mmc_device(dev); + + return &mmc->block_dev; +} + +int mmc_init(struct mmc *mmc) +{ + int err; + + err = mmc->init(mmc); + + if (err) + return err; + + /* Reset the Card */ + err = mmc_go_idle(mmc); + + if (err) + return err; + + /* Test for SD version 2 */ + err = mmc_send_if_cond(mmc); + + /* If we got an error other than timeout, we bail */ + if (err && err != TIMEOUT) + return err; + + /* Now try to get the SD card's operating condition */ + err = sd_send_op_cond(mmc); + + /* If the command timed out, we check for an MMC card */ + if (err == TIMEOUT) { + err = mmc_send_op_cond(mmc); + + if (err) { + printf("Card did not respond to voltage select!\n"); + return UNUSABLE_ERR; + } + } + + return mmc_startup(mmc); +} + +/* + * CPU and board-specific MMC initializations. Aliased function + * signals caller to move on + */ +static int __def_mmc_init(bd_t *bis) +{ + return -1; +} + +int cpu_mmc_init(bd_t *bis) __attribute((weak, alias("__def_mmc_init"))); +int board_mmc_init(bd_t *bis) __attribute((weak, alias("__def_mmc_init"))); + +void print_mmc_devices(char separator) +{ + struct mmc *m; + struct list_head *entry; + + list_for_each(entry, &mmc_devices) { + m = list_entry(entry, struct mmc, link); + + printf("%s: %d", m->name, m->block_dev.dev); + + if (entry->next != &mmc_devices) + printf("%c ", separator); + } + + printf("\n"); +} + +int mmc_initialize(bd_t *bis) +{ + INIT_LIST_HEAD (&mmc_devices); + cur_dev_num = 0; + + if (board_mmc_init(bis) < 0) + cpu_mmc_init(bis); + + print_mmc_devices(','); + + return 0; +} diff --git a/include/mmc.h b/include/mmc.h index e41033f..b9b27ba 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -1,6 +1,8 @@ /* - * (C) Copyright 2000-2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * Copyright 2008, Freescale Semiconductor, Inc + * Andy Fleming + * + * Based (loosely) on the Linux code * * See file CREDITS for list of people who contributed to this * project. @@ -24,36 +26,149 @@ #ifndef _MMC_H_ #define _MMC_H_

-/* MMC command numbers */ +#include <linux/list.h> + +#define SD_VERSION_SD 0x20000 +#define SD_VERSION_2 (SD_VERSION_SD | 0x20) +#define SD_VERSION_1_0 (SD_VERSION_SD | 0x10) +#define SD_VERSION_1_10 (SD_VERSION_SD | 0x1a) +#define MMC_VERSION_MMC 0x10000 +#define MMC_VERSION_UNKNOWN (MMC_VERSION_MMC) +#define MMC_VERSION_1_2 (MMC_VERSION_MMC | 0x12) +#define MMC_VERSION_1_4 (MMC_VERSION_MMC | 0x14) +#define MMC_VERSION_2_2 (MMC_VERSION_MMC | 0x22) +#define MMC_VERSION_3 (MMC_VERSION_MMC | 0x30) +#define MMC_VERSION_4 (MMC_VERSION_MMC | 0x40) + +#define MMC_MODE_HS 0x001 +#define MMC_MODE_HS_52MHz 0x010 +#define MMC_MODE_4BIT 0x100 +#define MMC_MODE_8BIT 0x200 + +#define SD_DATA_4BIT 0x00040000 + +#define IS_SD(x) (mmc->version & SD_VERSION_SD) + +#define MMC_DATA_READ 1 +#define MMC_DATA_WRITE 2 + +#define NO_CARD_ERR -16 /* No SD/MMC card inserted */ +#define UNUSABLE_ERR -17 /* Unusable Card */ +#define COMM_ERR -18 /* Communications Error */ +#define TIMEOUT -19 + #define MMC_CMD_GO_IDLE_STATE 0 #define MMC_CMD_SEND_OP_COND 1 #define MMC_CMD_ALL_SEND_CID 2 #define MMC_CMD_SET_RELATIVE_ADDR 3 #define MMC_CMD_SET_DSR 4 +#define MMC_CMD_SWITCH 6 #define MMC_CMD_SELECT_CARD 7 +#define MMC_CMD_SEND_EXT_CSD 8 #define MMC_CMD_SEND_CSD 9 #define MMC_CMD_SEND_CID 10 +#define MMC_CMD_STOP_TRANSMISSION 12 #define MMC_CMD_SEND_STATUS 13 #define MMC_CMD_SET_BLOCKLEN 16 #define MMC_CMD_READ_SINGLE_BLOCK 17 #define MMC_CMD_READ_MULTIPLE_BLOCK 18 -#define MMC_CMD_WRITE_BLOCK 24 +#define MMC_CMD_WRITE_SINGLE_BLOCK 24 +#define MMC_CMD_WRITE_MULTIPLE_BLOCK 25 #define MMC_CMD_APP_CMD 55

-/* SD Card command numbers */ #define SD_CMD_SEND_RELATIVE_ADDR 3 -#define SD_CMD_SWITCH 6 +#define SD_CMD_SWITCH_FUNC 6 #define SD_CMD_SEND_IF_COND 8

#define SD_CMD_APP_SET_BUS_WIDTH 6 #define SD_CMD_APP_SEND_OP_COND 41 +#define SD_CMD_APP_SEND_SCR 51 + +/* SCR definitions in different words */ +#define SD_HIGHSPEED_BUSY 0x00020000 +#define SD_HIGHSPEED_SUPPORTED 0x00020000 + +#define MMC_HS_TIMING 0x00000100 +#define MMC_HS_52MHZ 0x2 + +#define OCR_BUSY 0x80 +#define OCR_HCS 0x40000000 + +#define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ +#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ +#define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ +#define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ +#define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ +#define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ +#define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ +#define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ +#define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ +#define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ +#define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ +#define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ +#define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ +#define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ +#define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ +#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ +#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ + +#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */ +#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte + addressed by index which are + 1 in value field */ +#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte + addressed by index, which are + 1 in value field */ +#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */ + +#define SD_SWITCH_CHECK 0 +#define SD_SWITCH_SWITCH 1 + +/* + * EXT_CSD fields + */ + +#define EXT_CSD_BUS_WIDTH 183 /* R/W */ +#define EXT_CSD_HS_TIMING 185 /* R/W */ +#define EXT_CSD_CARD_TYPE 196 /* RO */ +#define EXT_CSD_REV 192 /* RO */ +#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ + +/* + * EXT_CSD field definitions + */ + +#define EXT_CSD_CMD_SET_NORMAL (1<<0) +#define EXT_CSD_CMD_SET_SECURE (1<<1) +#define EXT_CSD_CMD_SET_CPSECURE (1<<2) + +#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */ +#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */ + +#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ +#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ +#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */

#define R1_ILLEGAL_COMMAND (1 << 22) #define R1_APP_CMD (1 << 5)

-int mmc_legacy_init(int verbose); -int mmc_read(ulong src, uchar *dst, int size); -int mmc_write(uchar *src, ulong dst, int size); +#define MMC_RSP_PRESENT (1 << 0) +#define MMC_RSP_136 (1 << 1) /* 136 bit response */ +#define MMC_RSP_CRC (1 << 2) /* expect valid crc */ +#define MMC_RSP_BUSY (1 << 3) /* card may send busy */ +#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ + +#define MMC_RSP_NONE (0) +#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) +#define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \ + MMC_RSP_BUSY) +#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) +#define MMC_RSP_R3 (MMC_RSP_PRESENT) +#define MMC_RSP_R4 (MMC_RSP_PRESENT) +#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) +#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) +#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) +

struct mmc_cid { unsigned long psn; @@ -104,4 +219,61 @@ struct mmc_csd u8 one:1; };

+struct mmc_cmd { + ushort cmdidx; + uint resp_type; + uint cmdarg; + char response[18]; + uint flags; +}; + +struct mmc_data { + union { + char *dest; + const char *src; /* src buffers don't get written to */ + }; + uint flags; + uint blocks; + uint blocksize; +}; + +struct mmc { + struct list_head link; + char name[32]; + void *priv; + uint voltages; + uint version; + uint f_min; + uint f_max; + int high_capacity; + uint bus_width; + uint clock; + uint card_caps; + uint host_caps; + uint ocr; + uint scr[2]; + uint csd[4]; + char cid[16]; + ushort rca; + uint tran_speed; + uint read_bl_len; + uint write_bl_len; + u64 capacity; + block_dev_desc_t block_dev; + int (*send_cmd)(struct mmc *mmc, + struct mmc_cmd *cmd, struct mmc_data *data); + void (*set_ios)(struct mmc *mmc); + int (*init)(struct mmc *mmc); +}; + +int mmc_register(struct mmc *mmc); +int mmc_initialize(bd_t *bis); +int mmc_init(struct mmc *mmc); +int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size); +struct mmc *find_mmc_device(int dev_num); +void print_mmc_devices(char separator); + +#ifndef CONFIG_GENERIC_MMC +int mmc_legacy_init(int verbose); +#endif #endif /* _MMC_H_ */ diff --git a/lib_ppc/board.c b/lib_ppc/board.c index df1cf13..65bcb4b 100644 --- a/lib_ppc/board.c +++ b/lib_ppc/board.c @@ -48,6 +48,9 @@ #include <status_led.h> #endif #include <net.h> +#ifdef CONFIG_GENERIC_MMC +#include <mmc.h> +#endif #include <serial.h> #ifdef CONFIG_SYS_ALLOC_DPRAM #if !defined(CONFIG_CPM2) @@ -1078,6 +1081,12 @@ void board_init_r (gd_t *id, ulong dest_addr) scsi_init (); #endif

+#ifdef CONFIG_GENERIC_MMC + WATCHDOG_RESET (); + puts ("MMC: "); + mmc_initialize (bd); +#endif + #if defined(CONFIG_CMD_DOC) WATCHDOG_RESET (); puts ("DOC: ");

-- 1.5.4.GIT

Andy Fleming

10:45 p.m.

New subject: [U-Boot] [PATCH 6/8] Add support for the Freescale eSDHC found on 8379 and 8536 SoCs

This uses the new MMC framework

Some contributions by Dave Liu daveliu@freescale.com

Signed-off-by: Andy Fleming afleming@freescale.com --- drivers/mmc/Makefile | 1 + drivers/mmc/fsl_esdhc.c | 358 +++++++++++++++++++++++++++++++++++++++++++++++ include/fsl_esdhc.h | 143 +++++++++++++++++++ 3 files changed, 502 insertions(+), 0 deletions(-) create mode 100644 drivers/mmc/fsl_esdhc.c create mode 100644 include/fsl_esdhc.h

diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index d5a969c..040be8d 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -27,6 +27,7 @@ LIB := $(obj)libmmc.a

COBJS-$(CONFIG_GENERIC_MMC) += mmc.o COBJS-$(CONFIG_ATMEL_MCI) += atmel_mci.o +COBJS-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o

COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c new file mode 100644 index 0000000..2dccfa8 --- /dev/null +++ b/drivers/mmc/fsl_esdhc.c @@ -0,0 +1,358 @@ +/* + * Copyright 2007, Freescale Semiconductor, Inc + * Andy Fleming + * + * Based vaguely on the pxa mmc code: + * (C) Copyright 2003 + * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <common.h> +#include <command.h> +#include <mmc.h> +#include <part.h> +#include <malloc.h> +#include <mmc.h> +#include <fsl_esdhc.h> +#include <asm/io.h> + + +DECLARE_GLOBAL_DATA_PTR; + +struct fsl_esdhc { + uint dsaddr; + uint blkattr; + uint cmdarg; + uint xfertyp; + uint cmdrsp0; + uint cmdrsp1; + uint cmdrsp2; + uint cmdrsp3; + uint datport; + uint prsstat; + uint proctl; + uint sysctl; + uint irqstat; + uint irqstaten; + uint irqsigen; + uint autoc12err; + uint hostcapblt; + uint wml; + char reserved1[8]; + uint fevt; + char reserved2[168]; + uint hostver; + char reserved3[780]; + uint scr; +}; + +/* Return the XFERTYP flags for a given command and data packet */ +uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data) +{ + uint xfertyp = 0; + + if (data) { + xfertyp |= XFERTYP_DPSEL | XFERTYP_DMAEN; + + if (data->blocks > 1) { + xfertyp |= XFERTYP_MSBSEL; + xfertyp |= XFERTYP_BCEN; + } + + if (data->flags & MMC_DATA_READ) + xfertyp |= XFERTYP_DTDSEL; + } + + if (cmd->resp_type & MMC_RSP_CRC) + xfertyp |= XFERTYP_CCCEN; + if (cmd->resp_type & MMC_RSP_OPCODE) + xfertyp |= XFERTYP_CICEN; + if (cmd->resp_type & MMC_RSP_136) + xfertyp |= XFERTYP_RSPTYP_136; + else if (cmd->resp_type & MMC_RSP_BUSY) + xfertyp |= XFERTYP_RSPTYP_48_BUSY; + else if (cmd->resp_type & MMC_RSP_PRESENT) + xfertyp |= XFERTYP_RSPTYP_48; + + return XFERTYP_CMD(cmd->cmdidx) | xfertyp; +} + +static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) +{ + uint wml_value; + int timeout; + struct fsl_esdhc *regs = mmc->priv; + u32 temp; + + wml_value = data->blocksize/4; + + if (data->flags & MMC_DATA_READ) { + if (wml_value > 0x10) + wml_value = 0x10; + + wml_value = 0x100000 | wml_value; + + out_be32(&regs->dsaddr, (u32)data->dest); + } else { + if (wml_value > 0x80) + wml_value = 0x80; + if ((in_be32(&regs->prsstat) & PRSSTAT_WPSPL) == 0) { + printf("\nThe SD card is locked. Can not write to a locked card.\n\n"); + return TIMEOUT; + } + wml_value = wml_value << 16 | 0x10; + out_be32(&regs->dsaddr, (u32)data->src); + } + + out_be32(&regs->wml, wml_value); + + out_be32(&regs->blkattr, data->blocks << 16 | data->blocksize); + + /* Calculate the timeout period for data transactions */ + timeout = __ilog2(mmc->tran_speed/10); + timeout -= 13; + + if (timeout > 14) + timeout = 14; + + if (timeout < 0) + timeout = 0; + + temp = in_be32(&regs->sysctl); +#define SYSCTL_TIMEOUT_MASK 0x000f0000 + temp &= ~(SYSCTL_TIMEOUT_MASK); + temp |= timeout << 16; + out_be32(&regs->sysctl, temp); + + return 0; +} + + +/* + * Sends a command out on the bus. Takes the mmc pointer, + * a command pointer, and an optional data pointer. + */ +static int +esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) +{ + uint xfertyp; + uint irqstat; + volatile struct fsl_esdhc *regs = mmc->priv; + + out_be32(&regs->irqstat, -1); + + sync(); + + /* Wait for the bus to be idle */ + while ((in_be32(&regs->prsstat) & PRSSTAT_CICHB) || + (in_be32(&regs->prsstat) & PRSSTAT_CIDHB)); + + while (in_be32(&regs->prsstat) & PRSSTAT_DLA); + + /* Wait at least 8 SD clock cycles before the next command */ + /* + * Note: This is way more than 8 cycles, but 1ms seems to + * resolve timing issues with some cards + */ + udelay(1000); + + /* Set up for a data transfer if we have one */ + if (data) { + int err; + + err = esdhc_setup_data(mmc, data); + if(err) + return err; + } + + /* Figure out the transfer arguments */ + xfertyp = esdhc_xfertyp(cmd, data); + + /* Send the command */ + out_be32(&regs->cmdarg, cmd->cmdarg); + out_be32(&regs->xfertyp, xfertyp); + + /* Wait for the command to complete */ + while (!(in_be32(&regs->irqstat) & IRQSTAT_CC)); + + irqstat = in_be32(&regs->irqstat); + out_be32(&regs->irqstat, irqstat); + + if (irqstat & CMD_ERR) + return COMM_ERR; + + if (irqstat & IRQSTAT_CTOE) + return TIMEOUT; + + /* Copy the response to the response buffer */ + if (cmd->resp_type & MMC_RSP_136) { + u32 cmdrsp3, cmdrsp2, cmdrsp1, cmdrsp0; + + cmdrsp3 = in_be32(&regs->cmdrsp3); + cmdrsp2 = in_be32(&regs->cmdrsp2); + cmdrsp1 = in_be32(&regs->cmdrsp1); + cmdrsp0 = in_be32(&regs->cmdrsp0); + ((uint *)(cmd->response))[0] = (cmdrsp3 << 8) | (cmdrsp2 >> 24); + ((uint *)(cmd->response))[1] = (cmdrsp2 << 8) | (cmdrsp1 >> 24); + ((uint *)(cmd->response))[2] = (cmdrsp1 << 8) | (cmdrsp0 >> 24); + ((uint *)(cmd->response))[3] = (cmdrsp0 << 8); + } else + ((uint *)(cmd->response))[0] = in_be32(&regs->cmdrsp0); + + /* Wait until all of the blocks are transferred */ + if (data) { + do { + irqstat = in_be32(&regs->irqstat); + + if (irqstat & DATA_ERR) + return COMM_ERR; + + if (irqstat & IRQSTAT_DTOE) + return TIMEOUT; + } while (!(irqstat & IRQSTAT_TC) && + (in_be32(&regs->prsstat) & PRSSTAT_DLA)); + } + + out_be32(&regs->irqstat, -1); + + return 0; +} + +void set_sysctl(struct mmc *mmc, uint clock) +{ + int sdhc_clk = gd->sdhc_clk; + int div, pre_div; + volatile struct fsl_esdhc *regs = mmc->priv; + uint clk; + u32 temp; + + if (sdhc_clk / 16 > clock) { + for (pre_div = 2; pre_div < 256; pre_div *= 2) + if ((sdhc_clk / pre_div) <= (clock * 16)) + break; + } else + pre_div = 2; + + for (div = 1; div <= 16; div++) + if ((sdhc_clk / (div * pre_div)) <= clock) + break; + + pre_div >>= 1; + div -= 1; + + clk = (pre_div << 8) | (div << 4); + + temp = in_be32(&regs->sysctl); +#define SYSCTL_CLOCK_MASK 0x00000fff + temp &= SYSCTL_CLOCK_MASK; + temp |= clk; + out_be32(&regs->sysctl, temp); + + udelay(10000); + + setbits_be32(&regs->sysctl, SYSCTL_PEREN); +} + +static void esdhc_set_ios(struct mmc *mmc) +{ + struct fsl_esdhc *regs = mmc->priv; + + /* Set the clock speed */ + set_sysctl(mmc, mmc->clock); + + /* Set the bus width */ + clrbits_be32(&regs->proctl, PROCTL_DTW_4 | PROCTL_DTW_8); + + if (mmc->bus_width == 4) + setbits_be32(&regs->proctl, PROCTL_DTW_4); + else if (mmc->bus_width == 8) + setbits_be32(&regs->proctl, PROCTL_DTW_8); +} + +static int esdhc_init(struct mmc *mmc) +{ + struct fsl_esdhc *regs = mmc->priv; + int timeout = 1000; + + /* Enable cache snooping */ + out_be32(&regs->scr, 0x00000040); + + out_be32(&regs->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN); + + /* Set the initial clock speed */ + set_sysctl(mmc, 400000); + + /* Disable the BRR and BWR bits in IRQSTAT */ + clrbits_be32(&regs->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR); + + /* Put the PROCTL reg back to the default */ + out_be32(&regs->proctl, PROCTL_INIT); + + while (!(in_be32(&regs->prsstat) & PRSSTAT_CINS) && --timeout) + udelay(1000); + + if (timeout <= 0) + return NO_CARD_ERR; + + return 0; +} + +static int esdhc_initialize(bd_t *bis) +{ + struct fsl_esdhc *regs = (struct fsl_esdhc *)CFG_FSL_ESDHC_ADDR; + struct mmc *mmc; + u32 caps; + + mmc = malloc(sizeof(struct mmc)); + + sprintf(mmc->name, "FSL_ESDHC"); + mmc->priv = regs; + mmc->send_cmd = esdhc_send_cmd; + mmc->set_ios = esdhc_set_ios; + mmc->init = esdhc_init; + + caps = regs->hostcapblt; + + if (caps & ESDHC_HOSTCAPBLT_VS18) + mmc->voltages |= MMC_VDD_165_195; + if (caps & ESDHC_HOSTCAPBLT_VS30) + mmc->voltages |= MMC_VDD_29_30 | MMC_VDD_30_31; + if (caps & ESDHC_HOSTCAPBLT_VS33) + mmc->voltages |= MMC_VDD_32_33 | MMC_VDD_33_34; + + mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT; + + if (caps & ESDHC_HOSTCAPBLT_HSS) + mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; + + mmc->f_min = 400000; + mmc->f_max = MIN(gd->sdhc_clk, 50000000); + + mmc_register(mmc); + + return 0; +} + +int fsl_esdhc_mmc_init(bd_t *bis) +{ + return esdhc_initialize(bis); +} diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h new file mode 100644 index 0000000..27b0247 --- /dev/null +++ b/include/fsl_esdhc.h @@ -0,0 +1,143 @@ +/* + * FSL SD/MMC Defines + *------------------------------------------------------------------- + * + * Copyright 2007-2008, Freescale Semiconductor, Inc + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + *------------------------------------------------------------------- + * + */ + +#ifndef __FSL_ESDHC_H__ +#define __FSL_ESDHC_H__ + +/* FSL eSDHC-specific constants */ +#define SYSCTL 0x0002e02c +#define SYSCTL_INITA 0x08000000 +#define SYSCTL_PEREN 0x00000004 +#define SYSCTL_HCKEN 0x00000002 +#define SYSCTL_IPGEN 0x00000001 + +#define IRQSTAT 0x0002e030 +#define IRQSTAT_DMAE (0x10000000) +#define IRQSTAT_AC12E (0x01000000) +#define IRQSTAT_DEBE (0x00400000) +#define IRQSTAT_DCE (0x00200000) +#define IRQSTAT_DTOE (0x00100000) +#define IRQSTAT_CIE (0x00080000) +#define IRQSTAT_CEBE (0x00040000) +#define IRQSTAT_CCE (0x00020000) +#define IRQSTAT_CTOE (0x00010000) +#define IRQSTAT_CINT (0x00000100) +#define IRQSTAT_CRM (0x00000080) +#define IRQSTAT_CINS (0x00000040) +#define IRQSTAT_BRR (0x00000020) +#define IRQSTAT_BWR (0x00000010) +#define IRQSTAT_DINT (0x00000008) +#define IRQSTAT_BGE (0x00000004) +#define IRQSTAT_TC (0x00000002) +#define IRQSTAT_CC (0x00000001) + +#define CMD_ERR (IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE) +#define DATA_ERR (IRQSTAT_DEBE | IRQSTAT_DCE | IRQSTAT_DTOE) + +#define IRQSTATEN 0x0002e034 +#define IRQSTATEN_DMAE (0x10000000) +#define IRQSTATEN_AC12E (0x01000000) +#define IRQSTATEN_DEBE (0x00400000) +#define IRQSTATEN_DCE (0x00200000) +#define IRQSTATEN_DTOE (0x00100000) +#define IRQSTATEN_CIE (0x00080000) +#define IRQSTATEN_CEBE (0x00040000) +#define IRQSTATEN_CCE (0x00020000) +#define IRQSTATEN_CTOE (0x00010000) +#define IRQSTATEN_CINT (0x00000100) +#define IRQSTATEN_CRM (0x00000080) +#define IRQSTATEN_CINS (0x00000040) +#define IRQSTATEN_BRR (0x00000020) +#define IRQSTATEN_BWR (0x00000010) +#define IRQSTATEN_DINT (0x00000008) +#define IRQSTATEN_BGE (0x00000004) +#define IRQSTATEN_TC (0x00000002) +#define IRQSTATEN_CC (0x00000001) + +#define PRSSTAT 0x0002e024 +#define PRSSTAT_CLSL (0x00800000) +#define PRSSTAT_WPSPL (0x00080000) +#define PRSSTAT_CDPL (0x00040000) +#define PRSSTAT_CINS (0x00010000) +#define PRSSTAT_BREN (0x00000800) +#define PRSSTAT_DLA (0x00000004) +#define PRSSTAT_CICHB (0x00000002) +#define PRSSTAT_CIDHB (0x00000001) + +#define PROCTL 0x0002e028 +#define PROCTL_INIT 0x00000020 +#define PROCTL_DTW_4 0x00000002 +#define PROCTL_DTW_8 0x00000004 + +#define CMDARG 0x0002e008 + +#define XFERTYP 0x0002e00c +#define XFERTYP_CMD(x) ((x & 0x3f) << 24) +#define XFERTYP_CMDTYP_NORMAL 0x0 +#define XFERTYP_CMDTYP_SUSPEND 0x00400000 +#define XFERTYP_CMDTYP_RESUME 0x00800000 +#define XFERTYP_CMDTYP_ABORT 0x00c00000 +#define XFERTYP_DPSEL 0x00200000 +#define XFERTYP_CICEN 0x00100000 +#define XFERTYP_CCCEN 0x00080000 +#define XFERTYP_RSPTYP_NONE 0 +#define XFERTYP_RSPTYP_136 0x00010000 +#define XFERTYP_RSPTYP_48 0x00020000 +#define XFERTYP_RSPTYP_48_BUSY 0x00030000 +#define XFERTYP_MSBSEL 0x00000020 +#define XFERTYP_DTDSEL 0x00000010 +#define XFERTYP_AC12EN 0x00000004 +#define XFERTYP_BCEN 0x00000002 +#define XFERTYP_DMAEN 0x00000001 + +#define CINS_TIMEOUT 1000 + +#define DSADDR 0x2e004 + +#define CMDRSP0 0x2e010 +#define CMDRSP1 0x2e014 +#define CMDRSP2 0x2e018 +#define CMDRSP3 0x2e01c + +#define DATPORT 0x2e020 + +#define WML 0x2e044 +#define WML_WRITE 0x00010000 + +#define BLKATTR 0x2e004 +#define BLKATTR_CNT(x) ((x & 0xffff) << 16) +#define BLKATTR_SIZE(x) (x & 0x1fff) +#define MAX_BLK_CNT 0x7fff /* so malloc will have enough room with 32M */ + +#define ESDHC_HOSTCAPBLT_VS18 0x04000000 +#define ESDHC_HOSTCAPBLT_VS30 0x02000000 +#define ESDHC_HOSTCAPBLT_VS33 0x01000000 +#define ESDHC_HOSTCAPBLT_SRS 0x00800000 +#define ESDHC_HOSTCAPBLT_DMAS 0x00400000 +#define ESDHC_HOSTCAPBLT_HSS 0x00200000 + +int fsl_esdhc_mmc_init(bd_t *bis); + +#endif /* __FSL_ESDHC_H__ */

-- 1.5.4.GIT

Andy Fleming

10:45 p.m.

New subject: [U-Boot] [PATCH 7/8] 85xx: Add eSDHC support for 8536 DS

Signed-off-by: Andy Fleming afleming@freescale.com --- board/freescale/mpc8536ds/mpc8536ds.c | 12 ++++++++++++ cpu/mpc85xx/cpu.c | 15 +++++++++++++++ include/configs/MPC8536DS.h | 14 ++++++++++++++ 3 files changed, 41 insertions(+), 0 deletions(-)

diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index eb80500..0522f2f 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -44,6 +44,18 @@

phys_size_t fixed_sdram(void);

+int board_early_init_f (void) +{ + volatile u32 *pmuxcr = (u32 *)(CONFIG_SYS_IMMR + 0xe0060); + u32 val; + + val = *pmuxcr; + val |= 0x60000000; + *pmuxcr = val; + + return 0; +} + int checkboard (void) { printf ("Board: MPC8536DS, System ID: 0x%02x, " diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index bbea50f..fa1c0e1 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -31,6 +31,7 @@ #include <command.h> #include <tsec.h> #include <netdev.h> +#include <fsl_esdhc.h> #include <asm/cache.h> #include <asm/io.h>

@@ -392,5 +393,19 @@ int cpu_eth_init(bd_t *bis) #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85XX_FEC) tsec_standard_init(bis); #endif + return 0; } + +/* + * Initializes on-chip MMC controllers. + * to override, implement board_mmc_init() + */ +int cpu_mmc_init(bd_t *bis) +{ +#ifdef CONFIG_FSL_ESDHC + return fsl_esdhc_mmc_init(bis); +#else + return 0; +#endif +} diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index e379d53..43c1528 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -72,6 +72,8 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */

+#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ + #define CONFIG_ENABLE_36BIT_PHYS 1

#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */ @@ -528,6 +530,18 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);

#undef CONFIG_WATCHDOG /* watchdog disabled */

+#define CONFIG_MMC 1 + +#ifdef CONFIG_MMC +#define CONFIG_FSL_ESDHC +#define CFG_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#endif + /* * Miscellaneous configurable options */

-- 1.5.4.GIT

Andy Fleming

10:45 p.m.

New subject: [U-Boot] [PATCH 8/8] 83xx: Add eSDHC support on 8379 EMDS board

Signed-off-by: Andy Fleming afleming@freescale.com --- board/freescale/mpc837xemds/mpc837xemds.c | 19 +++++++++++++++++++ cpu/mpc83xx/cpu.c | 14 ++++++++++++++ include/asm-ppc/immap_83xx.h | 2 ++ include/configs/MPC837XEMDS.h | 15 +++++++++++++++ 4 files changed, 50 insertions(+), 0 deletions(-)

diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c index 156d808..299dfab 100644 --- a/board/freescale/mpc837xemds/mpc837xemds.c +++ b/board/freescale/mpc837xemds/mpc837xemds.c @@ -23,6 +23,7 @@

int board_early_init_f(void) { + struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR; u8 *bcsr = (u8 *)CONFIG_SYS_BCSR;

/* Enable flash write */ @@ -30,6 +31,24 @@ int board_early_init_f(void) /* Clear all of the interrupt of BCSR */ bcsr[0xe] = 0xff;

+#ifdef CONFIG_MMC + bcsr[0xc] |= 0x4c; + +#define SICRL_USB_B_MASK 0x30000000 +#define SICRL_USB_B_SD 0x20000000 +#define SICRH_GPIO2_E_MASK 0x00000c00 +#define SICRH_GPIO2_E_SD 0x00000800 +#define SICRH_SPI_MASK 0x00000003 +#define SICRH_SPI_SD 0x00000001 + + im->sysconf.sicrl &= ~SICRL_USB_B_MASK; + im->sysconf.sicrl |= SICRL_USB_B_SD; + + im->sysconf.sicrh &= ~(SICRH_GPIO2_E_MASK | SICRH_SPI_MASK); + im->sysconf.sicrh |= SICRH_GPIO2_E_SD | SICRH_SPI_SD; + +#endif + #ifdef CONFIG_FSL_SERDES immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; u32 spridr = in_be32(&immr->sysconf.spridr); diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c index 587fca3..9e0a05d 100644 --- a/cpu/mpc83xx/cpu.c +++ b/cpu/mpc83xx/cpu.c @@ -34,6 +34,7 @@ #include <libfdt.h> #include <tsec.h> #include <netdev.h> +#include <fsl_esdhc.h>

DECLARE_GLOBAL_DATA_PTR;

@@ -385,3 +386,16 @@ int cpu_eth_init(bd_t *bis) #endif return 0; } + +/* + * Initializes on-chip MMC controllers. + * to override, implement board_mmc_init() + */ +int cpu_mmc_init(bd_t *bis) +{ +#ifdef CONFIG_FSL_ESDHC + return fsl_esdhc_mmc_init(bis); +#else + return 0; +#endif +} diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h index 77c09db..7b847f8 100644 --- a/include/asm-ppc/immap_83xx.h +++ b/include/asm-ppc/immap_83xx.h @@ -895,4 +895,6 @@ typedef struct immap { } immap_t; #endif

+#define CONFIG_SYS_MPC83xx_ESDHC_OFFSET (0x2e000) +#define CONFIG_SYS_MPC83xx_ESDHC_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_ESDHC_OFFSET) #endif /* __IMMAP_83xx__ */ diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 0dd6ef5..da50c14 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -319,6 +319,9 @@ #define CONFIG_OF_BOARD_SETUP 1 #define CONFIG_OF_STDOUT_VIA_ALIAS 1

+#define CONFIG_SYS_64BIT_STRTOUL 1 +#define CONFIG_SYS_64BIT_VSPRINTF 1 + /* I2C */ #define CONFIG_HARD_I2C /* I2C with hardware support */ #undef CONFIG_SOFT_I2C /* I2C bit-banged */ @@ -502,6 +505,18 @@ extern int board_pci_host_broken(void);

#undef CONFIG_WATCHDOG /* watchdog disabled */

+#define CONFIG_MMC 1 + +#ifdef CONFIG_MMC +#define CONFIG_FSL_ESDHC +#define CFG_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#endif + /* * Miscellaneous configurable options */

-- 1.5.4.GIT

Kim Phillips

31 Jan 31 Jan

1:44 a.m.

New subject: [U-Boot] [PATCH 8/8] 83xx: Add eSDHC support on 8379 EMDS board

On Fri, 30 Jan 2009 15:45:44 -0600 Andy Fleming afleming@freescale.com wrote:

...

@@ -30,6 +31,24 @@ int board_early_init_f(void) /* Clear all of the interrupt of BCSR */ bcsr[0xe] = 0xff;

+#ifdef CONFIG_MMC
  bcsr[0xc] |= 0x4c;

magic - at least add a comment

...

+#define SICRL_USB_B_MASK 0x30000000 +#define SICRL_USB_B_SD 0x20000000 +#define SICRH_GPIO2_E_MASK 0x00000c00 +#define SICRH_GPIO2_E_SD 0x00000800 +#define SICRH_SPI_MASK 0x00000003 +#define SICRH_SPI_SD 0x00000001

we already have some of these defined in include/mpc83xx.h

...

  im->sysconf.sicrl &= ~SICRL_USB_B_MASK;

```
  im->sysconf.sicrl |= SICRL_USB_B_SD;
```

  im->sysconf.sicrh &= ~(SICRH_GPIO2_E_MASK | SICRH_SPI_MASK);

  im->sysconf.sicrh |= SICRH_GPIO2_E_SD | SICRH_SPI_SD;

use clrsetbits

...

@@ -895,4 +895,6 @@ typedef struct immap { } immap_t; #endif

+#define CONFIG_SYS_MPC83xx_ESDHC_OFFSET (0x2e000)

use offsetof

...

+#define CONFIG_SYS_MPC83xx_ESDHC_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_ESDHC_OFFSET) #endif /* __IMMAP_83xx__ */ @@ -502,6 +505,18 @@ extern int board_pci_host_broken(void);

#undef CONFIG_WATCHDOG /* watchdog disabled */

+#define CONFIG_MMC 1

+#ifdef CONFIG_MMC +#define CONFIG_FSL_ESDHC +#define CFG_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR

this should be a CONFIG_SYS_ (this comment probably applies to your some other patches in this series).

Kim

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