[U-Boot] [PATCH] mmc: mv_sdhci: Fix host version read for Armada100
sdhci_readw does not work for host version read in Armada100 series SoCs. This patch fix this issue by making a sdhci_readl call to get host version.
Signed-off-by: Ajay Bhargav ajay.bhargav@einfochips.com --- drivers/mmc/mv_sdhci.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/mv_sdhci.c b/drivers/mmc/mv_sdhci.c index f92caeb..c7fd287 100644 --- a/drivers/mmc/mv_sdhci.c +++ b/drivers/mmc/mv_sdhci.c @@ -30,6 +30,7 @@ static inline void mv_sdhci_writeb(struct sdhci_host *host, u8 val, int reg) #endif /* CONFIG_MMC_SDHCI_IO_ACCESSORS */
static char *MVSDH_NAME = "mv_sdh"; + int mv_sdh_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks) { struct sdhci_host *host = NULL; @@ -48,7 +49,12 @@ int mv_sdh_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks) mv_ops.write_b = mv_sdhci_writeb; host->ops = &mv_ops; #endif +#ifdef CONFIG_ARMADA100 + /* SDHCI host version read workaround for Armada100 series */ + host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16; +#else host->version = sdhci_readw(host, SDHCI_HOST_VERSION); +#endif add_sdhci(host, max_clk, min_clk); return 0; }
sdhci_readw does not work for host version read in Armada100 series SoCs. This patch fix this issue by making a sdhci_readl call to get host version.
Signed-off-by: Ajay Bhargav ajay.bhargav@einfochips.com
drivers/mmc/mv_sdhci.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/mv_sdhci.c b/drivers/mmc/mv_sdhci.c index f92caeb..c7fd287 100644 --- a/drivers/mmc/mv_sdhci.c +++ b/drivers/mmc/mv_sdhci.c @@ -30,6 +30,7 @@ static inline void mv_sdhci_writeb(struct sdhci_host *host, u8 val, int reg) #endif /* CONFIG_MMC_SDHCI_IO_ACCESSORS */
static char *MVSDH_NAME = "mv_sdh";
int mv_sdh_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks) { struct sdhci_host *host = NULL; @@ -48,7 +49,12 @@ int mv_sdh_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks) mv_ops.write_b = mv_sdhci_writeb; host->ops = &mv_ops; #endif +#ifdef CONFIG_ARMADA100
- /* SDHCI host version read workaround for Armada100 series */
- host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16;
+#else host->version = sdhci_readw(host, SDHCI_HOST_VERSION); +#endif add_sdhci(host, max_clk, min_clk); return 0; }
Basically armada100 can't do 16bit access to that register. Ok, but why does it work for other registers? Also, can you make this a config option like CONFIG_SDHCI_REG32_QUIRK (invent some better name ;-) ).
Cheers
Hi Ajay,
On Tue, Nov 1, 2011 at 5:39 PM, Ajay Bhargav ajay.bhargav@einfochips.com wrote:
sdhci_readw does not work for host version read in Armada100 series SoCs. This patch fix this issue by making a sdhci_readl call to get host version.
Signed-off-by: Ajay Bhargav ajay.bhargav@einfochips.com
drivers/mmc/mv_sdhci.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/mv_sdhci.c b/drivers/mmc/mv_sdhci.c index f92caeb..c7fd287 100644 --- a/drivers/mmc/mv_sdhci.c +++ b/drivers/mmc/mv_sdhci.c @@ -30,6 +30,7 @@ static inline void mv_sdhci_writeb(struct sdhci_host *host, u8 val, int reg) #endif /* CONFIG_MMC_SDHCI_IO_ACCESSORS */
static char *MVSDH_NAME = "mv_sdh";
int mv_sdh_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks) { struct sdhci_host *host = NULL; @@ -48,7 +49,12 @@ int mv_sdh_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks) mv_ops.write_b = mv_sdhci_writeb; host->ops = &mv_ops; #endif +#ifdef CONFIG_ARMADA100
You should following my previous fixing sample to add the workaround: http://patchwork.ozlabs.org/patch/117575/
Just keep in mind that, it is generic driver and don't put private fixing there. :)
Thanks, Lei
----- "Lei Wen" adrian.wenl@gmail.com wrote:
Hi Ajay,
On Tue, Nov 1, 2011 at 5:39 PM, Ajay Bhargav ajay.bhargav@einfochips.com wrote:
sdhci_readw does not work for host version read in Armada100 series SoCs. This patch fix this issue by making a sdhci_readl call to get
host
version.
Signed-off-by: Ajay Bhargav ajay.bhargav@einfochips.com
drivers/mmc/mv_sdhci.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/mv_sdhci.c b/drivers/mmc/mv_sdhci.c index f92caeb..c7fd287 100644 --- a/drivers/mmc/mv_sdhci.c +++ b/drivers/mmc/mv_sdhci.c @@ -30,6 +30,7 @@ static inline void mv_sdhci_writeb(struct
sdhci_host *host, u8 val, int reg)
#endif /* CONFIG_MMC_SDHCI_IO_ACCESSORS */
static char *MVSDH_NAME = "mv_sdh";
int mv_sdh_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks) { struct sdhci_host *host = NULL; @@ -48,7 +49,12 @@ int mv_sdh_init(u32 regbase, u32 max_clk, u32
min_clk, u32 quirks)
mv_ops.write_b = mv_sdhci_writeb; host->ops = &mv_ops; #endif +#ifdef CONFIG_ARMADA100
You should following my previous fixing sample to add the workaround: http://patchwork.ozlabs.org/patch/117575/
Patches acked? I didn't know it. Or I should wait for your patches to get mainlined first.
Just keep in mind that, it is generic driver and don't put private fixing there. :)
Thanks, Lei
Any good way to put that fix? Or else I can simply follow Marek's solution to add a quirk for this instead of defining it for a CPU. What you say?
Regards, Ajay Bhargav
participants (3)
-
Ajay Bhargav -
Lei Wen -
Marek Vasut