Hi York,

On 05/05/2011 04:29 PM, York Sun wrote:

Felix,

On Thu, 2011-05-05 at 16:17 +0300, Felix Radensky wrote:

...

Hi,

I'm working on a custom board based on P1011. There are 2 board flavours, with either 128MB or 256MB of soldered DDR2 SDRAM. Having u-boot image per board works fine, but I'd like to have a single image and use get_ram_size() to detect memory size at runtime. So far I had no luck.

The only significant difference between memory devices on these boards is the number of banks: 4 banks on 128MB board and 8 banks on 256MB board.

The memory size detection logic is loosely based on the code in boards/tqc/tqm85xx/sdram.c, but I use fsl_ddr_set_memctl_regs() to configure DDR controller registers and enable the controller. The sequence is:

1. Configure TLBs for 2GB DDR
2. Configure LAWs for 2GB DDR
3. Configure DDR controller registers and enable DDR controller, CS0_BNDS is set to 256MB.
4. Iterate over possible memory sizes starting from the largest. Each iteration configures CS0_CONFIG (sets number of banks, rows

and columns) and runs get_ram_size()

What I observe on 128MB board, is that only 32KB of RAM is detected in both first and second iteration. So it seems that setting number of banks to 8 on 4-bank devices is fatal, and cannot be changed even if CS0_CONFIG is modified.

I've tried to rerun DDR controller initialization sequence with new CS0_CONFIG value, but that just hangs the board. I've also tried to disable DDR controller via RORDEVDISR register and then enable it and reconfigure DDR. That also leads to hang.

I hope Freescale gurus on the list can help me to find a solution.

Thanks in advance.

I don't think get_ram_size works for your case. If you want to test the DDR to find the correct size, you have to initialize the DDR first. But you cannot do this correctly without knowing the number of banks. You may be able to blindly set the bank number and test the DDR to catch the error if there is any, but you have to run this code somewhere else, for example, in the flash (before relocation).

There might be another way. Do you have any board ID to distinguish these two kinds?

York

Thanks a lot for a prompt reply, I appreciate it very much.

I suspected this might be the case. The tqm boards I've used as a reference all have 4-bank memory devices, so that's why it get_ram_size() works for them.

We'll have to keep board ID on EEPROM to distinguish between boards with different RAM sizes.

Thanks a lot for your help.

Felix.

Hi Wolfgang,

On 05/05/2011 09:24 PM, Wolfgang Denk wrote:

Dear York Sun,

In message1304602168.21927.16.camel@oslab-l1 you wrote:

...

I don't think get_ram_size works for your case. If you want to test the

You are wrong. We have been doing this for a long time on many boards with similar properties.

...

DDR to find the correct size, you have to initialize the DDR first. But you cannot do this correctly without knowing the number of banks. You may be able to blindly set the bank number and test the DDR to catch the

Incorrect number of banks will give different results than correct number, so try both. The correct configuration is simply the one that gives the maximum total memory size.

I'm trying to do that, but get the same wrong memory size in both cases. On the other hand, if I program the correct number of banks from the start, get_ram_size() returns the correct size in both cases.

The closest example of using get_ram_size() I've found is for MPC8548 TQM boards. But all these boards have 4-bank memory devices, so I'm sure my case was tested. Don't you think there can be a problem with reprogramming bank number in this particular DDR controller ?

Felix.

Hi York,

On 05/05/2011 10:43 PM, Wolfgang Denk wrote:

Dear Felix Radensky,

In message4DC2F72F.2050009@embedded-sol.com you wrote:

...

The closest example of using get_ram_size() I've found is for MPC8548 TQM boards. But all these boards have 4-bank memory devices, so I'm sure my case was tested. Don't you think there can be a problem with reprogramming bank number in this particular DDR controller ?

I haven't done this myself yet on this hardware, but I would be very surprised if you could not reprogram the controller.

Can you please clarify this for me. If I understand you correctly, the number of banks cannot be changed after DDR controller was initialized. Is my understanding correct ?

Thanks a lot.

Felix.