From: Fabio Estevam fabio.estevam@freescale.com

According to the Reference Manual the 'spdif0_clk_podf' field of register CCM_CDCDR corresponds to bits 22, 23 and 24, so fix the mask and offset definitions accordingly.

Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- arch/arm/include/asm/arch-mx6/crm_regs.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h index 0fcef69..9afe788 100644 --- a/arch/arm/include/asm/arch-mx6/crm_regs.h +++ b/arch/arm/include/asm/arch-mx6/crm_regs.h @@ -335,8 +335,8 @@ struct mxc_ccm_reg { #endif #define MXC_CCM_CDCDR_SPDIF0_CLK_PRED_MASK (0x7 << 25) #define MXC_CCM_CDCDR_SPDIF0_CLK_PRED_OFFSET 25 -#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_MASK (0x7 << 19) -#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_OFFSET 19 +#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_MASK (0x7 << 22) +#define MXC_CCM_CDCDR_SPDIF0_CLK_PODF_OFFSET 22 #define MXC_CCM_CDCDR_SPDIF0_CLK_SEL_MASK (0x3 << 20) #define MXC_CCM_CDCDR_SPDIF0_CLK_SEL_OFFSET 20 #define MXC_CCM_CDCDR_SPDIF1_CLK_PRED_MASK (0x7 << 12)

From: Fabio Estevam fabio.estevam@freescale.com

According to the Reference Manual the 'wb_per_at_lpm' field of register CCM_CLPCR corresponds to bit 16 so fix its definition accordingly.

Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- arch/arm/include/asm/arch-mx6/crm_regs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h index 9afe788..e1cdcec 100644 --- a/arch/arm/include/asm/arch-mx6/crm_regs.h +++ b/arch/arm/include/asm/arch-mx6/crm_regs.h @@ -432,7 +432,7 @@ struct mxc_ccm_reg { #define MXC_CCM_CLPCR_BYP_MMDC_CH0_LPM_HS (1 << 19) #define MXC_CCM_CLPCR_WB_CORE_AT_LPM (1 << 17) #endif -#define MXC_CCM_CLPCR_WB_PER_AT_LPM (1 << 17) +#define MXC_CCM_CLPCR_WB_PER_AT_LPM (1 << 16) #define MXC_CCM_CLPCR_COSC_PWRDOWN (1 << 11) #define MXC_CCM_CLPCR_STBY_COUNT_MASK (0x3 << 9) #define MXC_CCM_CLPCR_STBY_COUNT_OFFSET 9

From: Fabio Estevam fabio.estevam@freescale.com

According to the Reference Manual the 'mask_periph2_clk_sel_loaded' field of register CCM_CIMR corresponds to bit 19 so fix its definition accordingly.

Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- arch/arm/include/asm/arch-mx6/crm_regs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h index e1cdcec..9a7fb34 100644 --- a/arch/arm/include/asm/arch-mx6/crm_regs.h +++ b/arch/arm/include/asm/arch-mx6/crm_regs.h @@ -469,7 +469,7 @@ struct mxc_ccm_reg { #define MXC_CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED (1 << 22) #define MXC_CCM_CIMR_MASK_MMDC_CH1_PODF_LOADED (1 << 21) #define MXC_CCM_CIMR_MASK_AHB_PODF_LOADED (1 << 20) -#define MXC_CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED (1 << 22) +#define MXC_CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED (1 << 19) #define MXC_CCM_CIMR_MASK_AXI_PODF_LOADED (1 << 17) #define MXC_CCM_CIMR_MASK_COSC_READY (1 << 6) #define MXC_CCM_CIMR_MASK_LRF_PLL 1

From: Fabio Estevam fabio.estevam@freescale.com

It is redundant to use 'PFUZE100_PMIC' as the PMIC name because we already know it is a PMIC.

Call it simply 'PFUZE100' instead.

Cc: Tim Harvey tharvey@gateworks.com Cc: Markus Niebel Markus.Niebel@tq-group.com Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- board/freescale/mx6sabresd/mx6sabresd.c | 2 +- board/freescale/mx6sxsabresd/mx6sxsabresd.c | 2 +- board/gateworks/gw_ventana/gw_ventana.c | 2 +- board/tqc/tqma6/tqma6.c | 4 ++-- drivers/power/pmic/pmic_pfuze100.c | 2 +- 5 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index d7c4b4f..80c8ebd 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -466,7 +466,7 @@ static int pfuze_init(void) if (ret) return ret;

- p = pmic_get("PFUZE100_PMIC"); + p = pmic_get("PFUZE100"); ret = pmic_probe(p); if (ret) return ret; diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c index 24d6a51..6cd2b4a 100644 --- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c +++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c @@ -90,7 +90,7 @@ static int pfuze_init(void) if (ret) return ret;

- p = pmic_get("PFUZE100_PMIC"); + p = pmic_get("PFUZE100"); ret = pmic_probe(p); if (ret) return ret; diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 9967f80..ae1cf87 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -903,7 +903,7 @@ int power_init_board(void) /* configure PFUZE100 PMIC */ if (board_type == GW54xx || board_type == GW54proto) { power_pfuze100_init(I2C_PMIC); - p = pmic_get("PFUZE100_PMIC"); + p = pmic_get("PFUZE100"); if (p && !pmic_probe(p)) { pmic_reg_read(p, PFUZE100_DEVICEID, &reg); printf("PMIC: PFUZE100 ID=0x%02x\n", reg); diff --git a/board/tqc/tqma6/tqma6.c b/board/tqc/tqma6/tqma6.c index 69c4551..b552bb8 100644 --- a/board/tqc/tqma6/tqma6.c +++ b/board/tqc/tqma6/tqma6.c @@ -229,10 +229,10 @@ int board_late_init(void) * fixed in generic power code */ power_pfuze100_init(TQMA6_PFUZE100_I2C_BUS); - p = pmic_get("PFUZE100_PMIC"); + p = pmic_get("PFUZE100"); if (p && !pmic_probe(p)) { pmic_reg_read(p, PFUZE100_DEVICEID, &reg); - printf("PMIC: PFUZE100_PMIC ID=0x%02x\n", reg); + printf("PMIC: PFUZE100 ID=0x%02x\n", reg); }

tqma6_bb_board_late_init(); diff --git a/drivers/power/pmic/pmic_pfuze100.c b/drivers/power/pmic/pmic_pfuze100.c index 21f12d2..22a04c0 100644 --- a/drivers/power/pmic/pmic_pfuze100.c +++ b/drivers/power/pmic/pmic_pfuze100.c @@ -13,7 +13,7 @@

int power_pfuze100_init(unsigned char bus) { - static const char name[] = "PFUZE100_PMIC"; + static const char name[] = "PFUZE100"; struct pmic *p = pmic_alloc();

if (!p) {

Hi Fabio,

On 01/08/2014 13:49, Fabio Estevam wrote:

From: Fabio Estevam fabio.estevam@freescale.com

'omux' field is not used anywhere and such layout is not valid for mx6solox.

Instead of adding more ifdef's into the structure, let's simply remove this unused 'omux' field.

Signed-off-by: Fabio Estevam fabio.estevam@freescale.com

arch/arm/include/asm/arch-mx6/imx-regs.h | 2 -- 1 file changed, 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 437b434..d4ce8a8 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -404,8 +404,6 @@ struct iomuxc { u8 reserved[0x4000]; #endif u32 gpr[14];

• u32 omux[5];
• /* mux and pad registers */

};

#define IOMUXC_GPR2_COUNTER_RESET_VAL_OFFSET 20

No issues with the whole series. I will apply it to u-boot-imx.

Acked-by: Stefano Babic sbabic@denx.de

Regards, Stefano