[U-Boot] [PATCH 01/13] s3c4510b: move specific code to soc directory
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com --- Makefile | 2 +- cpu/arm720t/cpu.c | 67 --------------- cpu/arm720t/s3c4510b/Makefile | 46 +++++++++++ cpu/arm720t/s3c4510b/cache.c | 86 ++++++++++++++++++++ include/asm-arm/arch-arm720t/hardware.h | 4 +- .../s3c4510b.h => arch-s3c4510b/hardware.h} | 0 6 files changed, 134 insertions(+), 71 deletions(-) create mode 100644 cpu/arm720t/s3c4510b/Makefile create mode 100644 cpu/arm720t/s3c4510b/cache.c rename include/asm-arm/{arch-arm720t/s3c4510b.h => arch-s3c4510b/hardware.h} (100%)
diff --git a/Makefile b/Makefile index 1cce381..a6dadf6 100644 --- a/Makefile +++ b/Makefile @@ -2943,7 +2943,7 @@ modnet50_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm720t modnet50
evb4510_config : unconfig - @$(MKCONFIG) $(@:_config=) arm arm720t evb4510 + @$(MKCONFIG) $(@:_config=) arm arm720t evb4510 NULL s3c4510b
lpc2292sodimm_config: unconfig @$(MKCONFIG) $(@:_config=) arm arm720t lpc2292sodimm NULL lpc2292 diff --git a/cpu/arm720t/cpu.c b/cpu/arm720t/cpu.c index 5ac8f59..d354cec 100644 --- a/cpu/arm720t/cpu.c +++ b/cpu/arm720t/cpu.c @@ -188,71 +188,4 @@ int dcache_status (void) { return (read_p15_c1 () & C1_IDC) != 0; } - -#elif defined(CONFIG_S3C4510B) - -void icache_enable (void) -{ - s32 i; - - /* disable all cache bits */ - CLR_REG( REG_SYSCFG, 0x3F); - - /* 8KB cache, write enable */ - SET_REG( REG_SYSCFG, CACHE_WRITE_BUFF | CACHE_MODE_01); - - /* clear TAG RAM bits */ - for ( i = 0; i < 256; i++) - PUT_REG( CACHE_TAG_RAM + 4*i, 0x00000000); - - /* clear SET0 RAM */ - for(i=0; i < 1024; i++) - PUT_REG( CACHE_SET0_RAM + 4*i, 0x00000000); - - /* clear SET1 RAM */ - for(i=0; i < 1024; i++) - PUT_REG( CACHE_SET1_RAM + 4*i, 0x00000000); - - /* enable cache */ - SET_REG( REG_SYSCFG, CACHE_ENABLE); - -} - -void icache_disable (void) -{ - /* disable all cache bits */ - CLR_REG( REG_SYSCFG, 0x3F); -} - -int icache_status (void) -{ - return GET_REG( REG_SYSCFG) & CACHE_ENABLE; -} - -void dcache_enable (void) -{ - /* we don't have seperate instruction/data caches */ - icache_enable(); -} - -void dcache_disable (void) -{ - /* we don't have seperate instruction/data caches */ - icache_disable(); -} - -int dcache_status (void) -{ - /* we don't have seperate instruction/data caches */ - return icache_status(); -} - -#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR) - /* No specific cache setup for IntegratorAP/CM720T as yet */ - void icache_enable (void) - { - } -#elif defined(CONFIG_LPC2292) /* just to satisfy the compiler */ -#else -#error No icache/dcache enable/disable functions defined for this CPU type #endif diff --git a/cpu/arm720t/s3c4510b/Makefile b/cpu/arm720t/s3c4510b/Makefile new file mode 100644 index 0000000..c9520b6 --- /dev/null +++ b/cpu/arm720t/s3c4510b/Makefile @@ -0,0 +1,46 @@ +# +# (C) Copyright 2000-2008 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).a + +COBJS-y += cache.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### + diff --git a/cpu/arm720t/s3c4510b/cache.c b/cpu/arm720t/s3c4510b/cache.c new file mode 100644 index 0000000..104d287 --- /dev/null +++ b/cpu/arm720t/s3c4510b/cache.c @@ -0,0 +1,86 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger mgroeger@sysgo.de + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Alex Zuepke azu@sysgo.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/hardware.h> + +void icache_enable (void) +{ + s32 i; + + /* disable all cache bits */ + CLR_REG( REG_SYSCFG, 0x3F); + + /* 8KB cache, write enable */ + SET_REG( REG_SYSCFG, CACHE_WRITE_BUFF | CACHE_MODE_01); + + /* clear TAG RAM bits */ + for ( i = 0; i < 256; i++) + PUT_REG( CACHE_TAG_RAM + 4*i, 0x00000000); + + /* clear SET0 RAM */ + for(i=0; i < 1024; i++) + PUT_REG( CACHE_SET0_RAM + 4*i, 0x00000000); + + /* clear SET1 RAM */ + for(i=0; i < 1024; i++) + PUT_REG( CACHE_SET1_RAM + 4*i, 0x00000000); + + /* enable cache */ + SET_REG( REG_SYSCFG, CACHE_ENABLE); + +} + +void icache_disable (void) +{ + /* disable all cache bits */ + CLR_REG( REG_SYSCFG, 0x3F); +} + +int icache_status (void) +{ + return GET_REG( REG_SYSCFG) & CACHE_ENABLE; +} + +void dcache_enable (void) +{ + /* we don't have seperate instruction/data caches */ + icache_enable(); +} + +void dcache_disable (void) +{ + /* we don't have seperate instruction/data caches */ + icache_disable(); +} + +int dcache_status (void) +{ + /* we don't have seperate instruction/data caches */ + return icache_status(); +} diff --git a/include/asm-arm/arch-arm720t/hardware.h b/include/asm-arm/arch-arm720t/hardware.h index 3056ca7..ec053c9 100644 --- a/include/asm-arm/arch-arm720t/hardware.h +++ b/include/asm-arm/arch-arm720t/hardware.h @@ -24,9 +24,7 @@ * MA 02111-1307 USA */
-#if defined(CONFIG_S3C4510B) -#include <asm-arm/arch-arm720t/s3c4510b.h> -#elif defined(CONFIG_NETARM) +#if defined(CONFIG_NETARM) #include <asm-arm/arch-arm720t/netarm_registers.h> #elif defined(CONFIG_IMPA7) /* include IMPA7 specific hardware file if there was one */ diff --git a/include/asm-arm/arch-arm720t/s3c4510b.h b/include/asm-arm/arch-s3c4510b/hardware.h similarity index 100% rename from include/asm-arm/arch-arm720t/s3c4510b.h rename to include/asm-arm/arch-s3c4510b/hardware.h
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com --- cpu/s3c44b0/cpu.c | 735 +++++++----------------- drivers/i2c/Makefile | 1 + cpu/s3c44b0/cpu.c => drivers/i2c/s3c44b0_i2c.c | 198 ------- include/configs/B2.h | 2 + 4 files changed, 225 insertions(+), 711 deletions(-) rewrite cpu/s3c44b0/cpu.c (60%) rename cpu/s3c44b0/cpu.c => drivers/i2c/s3c44b0_i2c.c (70%)
diff --git a/cpu/s3c44b0/cpu.c b/cpu/s3c44b0/cpu.c dissimilarity index 60% index 2960f2f..0c44691 100644 --- a/cpu/s3c44b0/cpu.c +++ b/cpu/s3c44b0/cpu.c @@ -1,513 +1,222 @@ -/* - * (C) Copyright 2004 - * DAVE Srl - * http://www.dave-tech.it - * http://www.wawnet.biz - * mailto:info@wawnet.biz - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * S3C44B0 CPU specific code - */ - -#include <common.h> -#include <command.h> -#include <asm/hardware.h> - -static void s3c44b0_flush_cache(void) -{ - volatile int i; - /* flush cycle */ - for(i=0x10002000;i<0x10004800;i+=16) - { - *((int *)i)=0x0; - } -} - - -int cpu_init (void) -{ - icache_enable(); - - return 0; -} - -int cleanup_before_linux (void) -{ - /* - cache memory should be enabled before calling - Linux to make the kernel uncompression faster - */ - icache_enable(); - - disable_interrupts (); - - return 0; -} - -void reset_cpu (ulong addr) -{ - /* - reset the cpu using watchdog - */ - - /* Disable the watchdog.*/ - WTCON&=~(1<<5); - - /* set the timeout value to a short time... */ - WTCNT = 0x1; - - /* Enable the watchdog. */ - WTCON|=1; - WTCON|=(1<<5); - - while(1) { - /*NOP*/ - } -} - -int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - disable_interrupts (); - reset_cpu (0); - - /*NOTREACHED*/ - return (0); -} - -void icache_enable (void) -{ - ulong reg; - - s3c44b0_flush_cache(); - - /* - Init cache - Non-cacheable area (everything outside RAM) - 0x0000:0000 - 0x0C00:0000 - */ - NCACHBE0 = 0xC0000000; - NCACHBE1 = 0x00000000; - - /* - Enable chache - */ - reg = SYSCFG; - reg |= 0x00000006; /* 8kB */ - SYSCFG = reg; -} - -void icache_disable (void) -{ - ulong reg; - - reg = SYSCFG; - reg &= ~0x00000006; /* 8kB */ - SYSCFG = reg; -} - -int icache_status (void) -{ - return 0; -} - -void dcache_enable (void) -{ - icache_enable(); -} - -void dcache_disable (void) -{ - icache_disable(); -} - -int dcache_status (void) -{ - return dcache_status(); -} - -/* - RTC stuff -*/ -#include <rtc.h> -#ifndef BCD2HEX - #define BCD2HEX(n) ((n>>4)*10+(n&0x0f)) -#endif -#ifndef HEX2BCD - #define HEX2BCD(x) ((((x) / 10) << 4) + (x) % 10) -#endif - -int rtc_get (struct rtc_time* tm) -{ - RTCCON |= 1; - tm->tm_year = BCD2HEX(BCDYEAR); - tm->tm_mon = BCD2HEX(BCDMON); - tm->tm_wday = BCD2HEX(BCDDATE); - tm->tm_mday = BCD2HEX(BCDDAY); - tm->tm_hour = BCD2HEX(BCDHOUR); - tm->tm_min = BCD2HEX(BCDMIN); - tm->tm_sec = BCD2HEX(BCDSEC); - - if (tm->tm_sec==0) { - /* we have to re-read the rtc data because of the "one second deviation" problem */ - /* see RTC datasheet for more info about it */ - tm->tm_year = BCD2HEX(BCDYEAR); - tm->tm_mon = BCD2HEX(BCDMON); - tm->tm_mday = BCD2HEX(BCDDAY); - tm->tm_wday = BCD2HEX(BCDDATE); - tm->tm_hour = BCD2HEX(BCDHOUR); - tm->tm_min = BCD2HEX(BCDMIN); - tm->tm_sec = BCD2HEX(BCDSEC); - } - - RTCCON &= ~1; - - if(tm->tm_year >= 70) - tm->tm_year += 1900; - else - tm->tm_year += 2000; - - return 0; -} - -int rtc_set (struct rtc_time* tm) -{ - if(tm->tm_year < 2000) - tm->tm_year -= 1900; - else - tm->tm_year -= 2000; - - RTCCON |= 1; - BCDYEAR = HEX2BCD(tm->tm_year); - BCDMON = HEX2BCD(tm->tm_mon); - BCDDAY = HEX2BCD(tm->tm_mday); - BCDDATE = HEX2BCD(tm->tm_wday); - BCDHOUR = HEX2BCD(tm->tm_hour); - BCDMIN = HEX2BCD(tm->tm_min); - BCDSEC = HEX2BCD(tm->tm_sec); - RTCCON &= 1; - - return 0; -} - -void rtc_reset (void) -{ - RTCCON |= 1; - BCDYEAR = 0; - BCDMON = 0; - BCDDAY = 0; - BCDDATE = 0; - BCDHOUR = 0; - BCDMIN = 0; - BCDSEC = 0; - RTCCON &= 1; -} - - -/* - I2C stuff -*/ - -/* - * Initialization, must be called once on start up, may be called - * repeatedly to change the speed and slave addresses. - */ -void i2c_init(int speed, int slaveaddr) -{ - /* - setting up I2C support - */ - unsigned int save_F,save_PF,rIICCON,rPCONA,rPDATA,rPCONF,rPUPF; - - save_F = PCONF; - save_PF = PUPF; - - rPCONF = ((save_F & ~(0xF))| 0xa); - rPUPF = (save_PF | 0x3); - PCONF = rPCONF; /*PF0:IICSCL, PF1:IICSDA*/ - PUPF = rPUPF; /* Disable pull-up */ - - /* Configuring pin for WC pin of EEprom */ - rPCONA = PCONA; - rPCONA &= ~(1<<9); - PCONA = rPCONA; - - rPDATA = PDATA; - rPDATA &= ~(1<<9); - PDATA = rPDATA; - - /* - Enable ACK, IICCLK=MCLK/16, enable interrupt - 75MHz/16/(12+1) = 390625 Hz - */ - rIICCON=(1<<7)|(0<<6)|(1<<5)|(0xC); - IICCON = rIICCON; - - IICADD = slaveaddr; -} - -/* - * Probe the given I2C chip address. Returns 0 if a chip responded, - * not 0 on failure. - */ -int i2c_probe(uchar chip) -{ - /* - not implemented - */ - - printf("i2c_probe chip %d\n", (int) chip); - return -1; -} - -/* - * Read/Write interface: - * chip: I2C chip address, range 0..127 - * addr: Memory (register) address within the chip - * alen: Number of bytes to use for addr (typically 1, 2 for larger - * memories, 0 for register type devices with only one - * register) - * buffer: Where to read/write the data - * len: How many bytes to read/write - * - * Returns: 0 on success, not 0 on failure - */ - -#define S3C44B0X_rIIC_INTPEND (1<<4) -#define S3C44B0X_rIIC_LAST_RECEIV_BIT (1<<0) -#define S3C44B0X_rIIC_INTERRUPT_ENABLE (1<<5) -#define S3C44B0_IIC_TIMEOUT 100 - -int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) -{ - - int k, j, temp; - u32 rIICSTAT; - - /* - send the device offset - */ - - rIICSTAT = 0xD0; - IICSTAT = rIICSTAT; - - IICDS = chip; /* this is a write operation... */ - - rIICSTAT |= (1<<5); - IICSTAT = rIICSTAT; - - for(k=0; k<S3C44B0_IIC_TIMEOUT; k++) { - temp = IICCON; - if( (temp & S3C44B0X_rIIC_INTPEND) == S3C44B0X_rIIC_INTPEND) - break; - udelay(2000); - } - if (k==S3C44B0_IIC_TIMEOUT) - return -1; - - /* wait and check ACK */ - temp = IICSTAT; - if ((temp & S3C44B0X_rIIC_LAST_RECEIV_BIT) == S3C44B0X_rIIC_LAST_RECEIV_BIT ) - return -1; - - IICDS = addr; - IICCON = IICCON & ~(S3C44B0X_rIIC_INTPEND); - - /* wait and check ACK */ - for(k=0; k<S3C44B0_IIC_TIMEOUT; k++) { - temp = IICCON; - if( (temp & S3C44B0X_rIIC_INTPEND) == S3C44B0X_rIIC_INTPEND) - break; - udelay(2000); - } - if (k==S3C44B0_IIC_TIMEOUT) - return -1; - - temp = IICSTAT; - if ((temp & S3C44B0X_rIIC_LAST_RECEIV_BIT) == S3C44B0X_rIIC_LAST_RECEIV_BIT ) - return -1; - - /* - now we can start with the read operation... - */ - - IICDS = chip | 0x01; /* this is a read operation... */ - - rIICSTAT = 0x90; /*master recv*/ - rIICSTAT |= (1<<5); - IICSTAT = rIICSTAT; - - IICCON = IICCON & ~(S3C44B0X_rIIC_INTPEND); - - /* wait and check ACK */ - for(k=0; k<S3C44B0_IIC_TIMEOUT; k++) { - temp = IICCON; - if( (temp & S3C44B0X_rIIC_INTPEND) == S3C44B0X_rIIC_INTPEND) - break; - udelay(2000); - } - if (k==S3C44B0_IIC_TIMEOUT) - return -1; - - temp = IICSTAT; - if ((temp & S3C44B0X_rIIC_LAST_RECEIV_BIT) == S3C44B0X_rIIC_LAST_RECEIV_BIT ) - return -1; - - for (j=0; j<len-1; j++) { - - /*clear pending bit to resume */ - - temp = IICCON & ~(S3C44B0X_rIIC_INTPEND); - IICCON = temp; - - /* wait and check ACK */ - for(k=0; k<S3C44B0_IIC_TIMEOUT; k++) { - temp = IICCON; - if( (temp & S3C44B0X_rIIC_INTPEND) == S3C44B0X_rIIC_INTPEND) - break; - udelay(2000); - } - if (k==S3C44B0_IIC_TIMEOUT) - return -1; - - - buffer[j] = IICDS; /*save readed data*/ - - } /*end for(j)*/ - - /* - reading the last data - unset ACK generation - */ - temp = IICCON & ~(S3C44B0X_rIIC_INTPEND | (1<<7)); - IICCON = temp; - - /* wait but NOT check ACK */ - for(k=0; k<S3C44B0_IIC_TIMEOUT; k++) { - temp = IICCON; - if( (temp & S3C44B0X_rIIC_INTPEND) == S3C44B0X_rIIC_INTPEND) - break; - udelay(2000); - } - if (k==S3C44B0_IIC_TIMEOUT) - return -1; - - buffer[j] = IICDS; /*save readed data*/ - - rIICSTAT = 0x90; /*master recv*/ - - /* Write operation Terminate sending STOP */ - IICSTAT = rIICSTAT; - /*Clear Int Pending Bit to RESUME*/ - temp = IICCON; - IICCON = temp & (~S3C44B0X_rIIC_INTPEND); - - IICCON = IICCON | (1<<7); /*restore ACK generation*/ - - return 0; -} - -int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) -{ - int j, k; - u32 rIICSTAT, temp; - - - /* - send the device offset - */ - - rIICSTAT = 0xD0; - IICSTAT = rIICSTAT; - - IICDS = chip; /* this is a write operation... */ - - rIICSTAT |= (1<<5); - IICSTAT = rIICSTAT; - - IICCON = IICCON & ~(S3C44B0X_rIIC_INTPEND); - - /* wait and check ACK */ - for(k=0; k<S3C44B0_IIC_TIMEOUT; k++) { - temp = IICCON; - if( (temp & S3C44B0X_rIIC_INTPEND) == S3C44B0X_rIIC_INTPEND) - break; - udelay(2000); - } - if (k==S3C44B0_IIC_TIMEOUT) - return -1; - - temp = IICSTAT; - if ((temp & S3C44B0X_rIIC_LAST_RECEIV_BIT) == S3C44B0X_rIIC_LAST_RECEIV_BIT ) - return -1; - - IICDS = addr; - IICCON = IICCON & ~(S3C44B0X_rIIC_INTPEND); - - /* wait and check ACK */ - for(k=0; k<S3C44B0_IIC_TIMEOUT; k++) { - temp = IICCON; - if( (temp & S3C44B0X_rIIC_INTPEND) == S3C44B0X_rIIC_INTPEND) - break; - udelay(2000); - } - if (k==S3C44B0_IIC_TIMEOUT) - return -1; - - temp = IICSTAT; - if ((temp & S3C44B0X_rIIC_LAST_RECEIV_BIT) == S3C44B0X_rIIC_LAST_RECEIV_BIT ) - return -1; - - /* - now we can start with the read write operation - */ - for (j=0; j<len; j++) { - - IICDS = buffer[j]; /*prerare data to write*/ - - /*clear pending bit to resume*/ - - temp = IICCON & ~(S3C44B0X_rIIC_INTPEND); - IICCON = temp; - - /* wait but NOT check ACK */ - for(k=0; k<S3C44B0_IIC_TIMEOUT; k++) { - temp = IICCON; - if( (temp & S3C44B0X_rIIC_INTPEND) == S3C44B0X_rIIC_INTPEND) - break; - - udelay(2000); - } - - if (k==S3C44B0_IIC_TIMEOUT) - return -1; - - } /* end for(j) */ - - /* sending stop to terminate */ - rIICSTAT = 0xD0; /*master send*/ - IICSTAT = rIICSTAT; - /*Clear Int Pending Bit to RESUME*/ - temp = IICCON; - IICCON = temp & (~S3C44B0X_rIIC_INTPEND); - - return 0; -} +/* + * (C) Copyright 2004 + * DAVE Srl + * http://www.dave-tech.it + * http://www.wawnet.biz + * mailto:info@wawnet.biz + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * S3C44B0 CPU specific code + */ + +#include <common.h> +#include <command.h> +#include <asm/hardware.h> + +static void s3c44b0_flush_cache(void) +{ + volatile int i; + /* flush cycle */ + for(i=0x10002000;i<0x10004800;i+=16) + { + *((int *)i)=0x0; + } +} + + +int cpu_init (void) +{ + icache_enable(); + + return 0; +} + +int cleanup_before_linux (void) +{ + /* + cache memory should be enabled before calling + Linux to make the kernel uncompression faster + */ + icache_enable(); + + disable_interrupts (); + + return 0; +} + +void reset_cpu (ulong addr) +{ + /* + reset the cpu using watchdog + */ + + /* Disable the watchdog.*/ + WTCON&=~(1<<5); + + /* set the timeout value to a short time... */ + WTCNT = 0x1; + + /* Enable the watchdog. */ + WTCON|=1; + WTCON|=(1<<5); + + while(1) { + /*NOP*/ + } +} + +int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + disable_interrupts (); + reset_cpu (0); + + /*NOTREACHED*/ + return (0); +} + +void icache_enable (void) +{ + ulong reg; + + s3c44b0_flush_cache(); + + /* + Init cache + Non-cacheable area (everything outside RAM) + 0x0000:0000 - 0x0C00:0000 + */ + NCACHBE0 = 0xC0000000; + NCACHBE1 = 0x00000000; + + /* + Enable chache + */ + reg = SYSCFG; + reg |= 0x00000006; /* 8kB */ + SYSCFG = reg; +} + +void icache_disable (void) +{ + ulong reg; + + reg = SYSCFG; + reg &= ~0x00000006; /* 8kB */ + SYSCFG = reg; +} + +int icache_status (void) +{ + return 0; +} + +void dcache_enable (void) +{ + icache_enable(); +} + +void dcache_disable (void) +{ + icache_disable(); +} + +int dcache_status (void) +{ + return dcache_status(); +} + +/* + RTC stuff +*/ +#include <rtc.h> +#ifndef BCD2HEX + #define BCD2HEX(n) ((n>>4)*10+(n&0x0f)) +#endif +#ifndef HEX2BCD + #define HEX2BCD(x) ((((x) / 10) << 4) + (x) % 10) +#endif + +int rtc_get (struct rtc_time* tm) +{ + RTCCON |= 1; + tm->tm_year = BCD2HEX(BCDYEAR); + tm->tm_mon = BCD2HEX(BCDMON); + tm->tm_wday = BCD2HEX(BCDDATE); + tm->tm_mday = BCD2HEX(BCDDAY); + tm->tm_hour = BCD2HEX(BCDHOUR); + tm->tm_min = BCD2HEX(BCDMIN); + tm->tm_sec = BCD2HEX(BCDSEC); + + if (tm->tm_sec==0) { + /* we have to re-read the rtc data because of the "one second deviation" problem */ + /* see RTC datasheet for more info about it */ + tm->tm_year = BCD2HEX(BCDYEAR); + tm->tm_mon = BCD2HEX(BCDMON); + tm->tm_mday = BCD2HEX(BCDDAY); + tm->tm_wday = BCD2HEX(BCDDATE); + tm->tm_hour = BCD2HEX(BCDHOUR); + tm->tm_min = BCD2HEX(BCDMIN); + tm->tm_sec = BCD2HEX(BCDSEC); + } + + RTCCON &= ~1; + + if(tm->tm_year >= 70) + tm->tm_year += 1900; + else + tm->tm_year += 2000; + + return 0; +} + +int rtc_set (struct rtc_time* tm) +{ + if(tm->tm_year < 2000) + tm->tm_year -= 1900; + else + tm->tm_year -= 2000; + + RTCCON |= 1; + BCDYEAR = HEX2BCD(tm->tm_year); + BCDMON = HEX2BCD(tm->tm_mon); + BCDDAY = HEX2BCD(tm->tm_mday); + BCDDATE = HEX2BCD(tm->tm_wday); + BCDHOUR = HEX2BCD(tm->tm_hour); + BCDMIN = HEX2BCD(tm->tm_min); + BCDSEC = HEX2BCD(tm->tm_sec); + RTCCON &= 1; + + return 0; +} + +void rtc_reset (void) +{ + RTCCON |= 1; + BCDYEAR = 0; + BCDMON = 0; + BCDDAY = 0; + BCDDATE = 0; + BCDHOUR = 0; + BCDMIN = 0; + BCDSEC = 0; + RTCCON &= 1; +} diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index 9c74657..69cf9a6 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile @@ -31,6 +31,7 @@ COBJS-$(CONFIG_I2C_MXC) += mxc_i2c.o COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o COBJS-$(CONFIG_DRIVER_OMAP34XX_I2C) += omap24xx_i2c.o +COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
diff --git a/cpu/s3c44b0/cpu.c b/drivers/i2c/s3c44b0_i2c.c similarity index 70% rename from cpu/s3c44b0/cpu.c rename to drivers/i2c/s3c44b0_i2c.c index 2960f2f..b4d904b 100644 --- a/cpu/s3c44b0/cpu.c +++ b/drivers/i2c/s3c44b0_i2c.c @@ -24,208 +24,10 @@ * MA 02111-1307 USA */
-/* - * S3C44B0 CPU specific code - */ - #include <common.h> #include <command.h> #include <asm/hardware.h>
-static void s3c44b0_flush_cache(void) -{ - volatile int i; - /* flush cycle */ - for(i=0x10002000;i<0x10004800;i+=16) - { - *((int *)i)=0x0; - } -} - - -int cpu_init (void) -{ - icache_enable(); - - return 0; -} - -int cleanup_before_linux (void) -{ - /* - cache memory should be enabled before calling - Linux to make the kernel uncompression faster - */ - icache_enable(); - - disable_interrupts (); - - return 0; -} - -void reset_cpu (ulong addr) -{ - /* - reset the cpu using watchdog - */ - - /* Disable the watchdog.*/ - WTCON&=~(1<<5); - - /* set the timeout value to a short time... */ - WTCNT = 0x1; - - /* Enable the watchdog. */ - WTCON|=1; - WTCON|=(1<<5); - - while(1) { - /*NOP*/ - } -} - -int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - disable_interrupts (); - reset_cpu (0); - - /*NOTREACHED*/ - return (0); -} - -void icache_enable (void) -{ - ulong reg; - - s3c44b0_flush_cache(); - - /* - Init cache - Non-cacheable area (everything outside RAM) - 0x0000:0000 - 0x0C00:0000 - */ - NCACHBE0 = 0xC0000000; - NCACHBE1 = 0x00000000; - - /* - Enable chache - */ - reg = SYSCFG; - reg |= 0x00000006; /* 8kB */ - SYSCFG = reg; -} - -void icache_disable (void) -{ - ulong reg; - - reg = SYSCFG; - reg &= ~0x00000006; /* 8kB */ - SYSCFG = reg; -} - -int icache_status (void) -{ - return 0; -} - -void dcache_enable (void) -{ - icache_enable(); -} - -void dcache_disable (void) -{ - icache_disable(); -} - -int dcache_status (void) -{ - return dcache_status(); -} - -/* - RTC stuff -*/ -#include <rtc.h> -#ifndef BCD2HEX - #define BCD2HEX(n) ((n>>4)*10+(n&0x0f)) -#endif -#ifndef HEX2BCD - #define HEX2BCD(x) ((((x) / 10) << 4) + (x) % 10) -#endif - -int rtc_get (struct rtc_time* tm) -{ - RTCCON |= 1; - tm->tm_year = BCD2HEX(BCDYEAR); - tm->tm_mon = BCD2HEX(BCDMON); - tm->tm_wday = BCD2HEX(BCDDATE); - tm->tm_mday = BCD2HEX(BCDDAY); - tm->tm_hour = BCD2HEX(BCDHOUR); - tm->tm_min = BCD2HEX(BCDMIN); - tm->tm_sec = BCD2HEX(BCDSEC); - - if (tm->tm_sec==0) { - /* we have to re-read the rtc data because of the "one second deviation" problem */ - /* see RTC datasheet for more info about it */ - tm->tm_year = BCD2HEX(BCDYEAR); - tm->tm_mon = BCD2HEX(BCDMON); - tm->tm_mday = BCD2HEX(BCDDAY); - tm->tm_wday = BCD2HEX(BCDDATE); - tm->tm_hour = BCD2HEX(BCDHOUR); - tm->tm_min = BCD2HEX(BCDMIN); - tm->tm_sec = BCD2HEX(BCDSEC); - } - - RTCCON &= ~1; - - if(tm->tm_year >= 70) - tm->tm_year += 1900; - else - tm->tm_year += 2000; - - return 0; -} - -int rtc_set (struct rtc_time* tm) -{ - if(tm->tm_year < 2000) - tm->tm_year -= 1900; - else - tm->tm_year -= 2000; - - RTCCON |= 1; - BCDYEAR = HEX2BCD(tm->tm_year); - BCDMON = HEX2BCD(tm->tm_mon); - BCDDAY = HEX2BCD(tm->tm_mday); - BCDDATE = HEX2BCD(tm->tm_wday); - BCDHOUR = HEX2BCD(tm->tm_hour); - BCDMIN = HEX2BCD(tm->tm_min); - BCDSEC = HEX2BCD(tm->tm_sec); - RTCCON &= 1; - - return 0; -} - -void rtc_reset (void) -{ - RTCCON |= 1; - BCDYEAR = 0; - BCDMON = 0; - BCDDAY = 0; - BCDDATE = 0; - BCDHOUR = 0; - BCDMIN = 0; - BCDSEC = 0; - RTCCON &= 1; -} - - -/* - I2C stuff -*/ - /* * Initialization, must be called once on start up, may be called * repeatedly to change the speed and slave addresses. diff --git a/include/configs/B2.h b/include/configs/B2.h index 340b847..d9f6e14 100644 --- a/include/configs/B2.h +++ b/include/configs/B2.h @@ -67,6 +67,8 @@ */ #define CONFIG_SERIAL1 1 /* we use Serial line 1 */
+#define CONFIG_S3C44B0_I2C + /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com --- cpu/s3c44b0/cpu.c | 77 ---------------------------------- drivers/rtc/Makefile | 1 + drivers/rtc/s3c44b0_rtc.c | 102 +++++++++++++++++++++++++++++++++++++++++++++ include/configs/B2.h | 1 + 4 files changed, 104 insertions(+), 77 deletions(-) create mode 100644 drivers/rtc/s3c44b0_rtc.c
diff --git a/cpu/s3c44b0/cpu.c b/cpu/s3c44b0/cpu.c index 0c44691..752191d 100644 --- a/cpu/s3c44b0/cpu.c +++ b/cpu/s3c44b0/cpu.c @@ -143,80 +143,3 @@ int dcache_status (void) { return dcache_status(); } - -/* - RTC stuff -*/ -#include <rtc.h> -#ifndef BCD2HEX - #define BCD2HEX(n) ((n>>4)*10+(n&0x0f)) -#endif -#ifndef HEX2BCD - #define HEX2BCD(x) ((((x) / 10) << 4) + (x) % 10) -#endif - -int rtc_get (struct rtc_time* tm) -{ - RTCCON |= 1; - tm->tm_year = BCD2HEX(BCDYEAR); - tm->tm_mon = BCD2HEX(BCDMON); - tm->tm_wday = BCD2HEX(BCDDATE); - tm->tm_mday = BCD2HEX(BCDDAY); - tm->tm_hour = BCD2HEX(BCDHOUR); - tm->tm_min = BCD2HEX(BCDMIN); - tm->tm_sec = BCD2HEX(BCDSEC); - - if (tm->tm_sec==0) { - /* we have to re-read the rtc data because of the "one second deviation" problem */ - /* see RTC datasheet for more info about it */ - tm->tm_year = BCD2HEX(BCDYEAR); - tm->tm_mon = BCD2HEX(BCDMON); - tm->tm_mday = BCD2HEX(BCDDAY); - tm->tm_wday = BCD2HEX(BCDDATE); - tm->tm_hour = BCD2HEX(BCDHOUR); - tm->tm_min = BCD2HEX(BCDMIN); - tm->tm_sec = BCD2HEX(BCDSEC); - } - - RTCCON &= ~1; - - if(tm->tm_year >= 70) - tm->tm_year += 1900; - else - tm->tm_year += 2000; - - return 0; -} - -int rtc_set (struct rtc_time* tm) -{ - if(tm->tm_year < 2000) - tm->tm_year -= 1900; - else - tm->tm_year -= 2000; - - RTCCON |= 1; - BCDYEAR = HEX2BCD(tm->tm_year); - BCDMON = HEX2BCD(tm->tm_mon); - BCDDAY = HEX2BCD(tm->tm_mday); - BCDDATE = HEX2BCD(tm->tm_wday); - BCDHOUR = HEX2BCD(tm->tm_hour); - BCDMIN = HEX2BCD(tm->tm_min); - BCDSEC = HEX2BCD(tm->tm_sec); - RTCCON &= 1; - - return 0; -} - -void rtc_reset (void) -{ - RTCCON |= 1; - BCDYEAR = 0; - BCDMON = 0; - BCDDAY = 0; - BCDDATE = 0; - BCDHOUR = 0; - BCDMIN = 0; - BCDSEC = 0; - RTCCON &= 1; -} diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 94bc518..3831dd9 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -57,6 +57,7 @@ COBJS-$(CONFIG_RTC_PL031) += pl031.o COBJS-$(CONFIG_RTC_RS5C372A) += rs5c372.o COBJS-$(CONFIG_RTC_RX8025) += rx8025.o COBJS-$(CONFIG_RTC_S3C24X0) += s3c24x0_rtc.o +COBJS-$(CONFIG_RTC_S3C44B0) += s3c44b0_rtc.o COBJS-$(CONFIG_RTC_X1205) += x1205.o
COBJS := $(sort $(COBJS-y)) diff --git a/drivers/rtc/s3c44b0_rtc.c b/drivers/rtc/s3c44b0_rtc.c new file mode 100644 index 0000000..489536f --- /dev/null +++ b/drivers/rtc/s3c44b0_rtc.c @@ -0,0 +1,102 @@ +/* + * (C) Copyright 2004 + * DAVE Srl + * http://www.dave-tech.it + * http://www.wawnet.biz + * mailto:info@wawnet.biz + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * S3C44B0 CPU specific code + */ + +#include <common.h> +#include <command.h> +#include <asm/hardware.h> +#include <rtc.h> +#include <bcd.h> + +int rtc_get (struct rtc_time* tm) +{ + RTCCON |= 1; + tm->tm_year = BCD2BIN(BCDYEAR); + tm->tm_mon = BCD2BIN(BCDMON); + tm->tm_wday = BCD2BIN(BCDDATE); + tm->tm_mday = BCD2BIN(BCDDAY); + tm->tm_hour = BCD2BIN(BCDHOUR); + tm->tm_min = BCD2BIN(BCDMIN); + tm->tm_sec = BCD2BIN(BCDSEC); + + if (tm->tm_sec==0) { + /* we have to re-read the rtc data because of the "one second deviation" problem */ + /* see RTC datasheet for more info about it */ + tm->tm_year = BCD2BIN(BCDYEAR); + tm->tm_mon = BCD2BIN(BCDMON); + tm->tm_mday = BCD2BIN(BCDDAY); + tm->tm_wday = BCD2BIN(BCDDATE); + tm->tm_hour = BCD2BIN(BCDHOUR); + tm->tm_min = BCD2BIN(BCDMIN); + tm->tm_sec = BCD2BIN(BCDSEC); + } + + RTCCON &= ~1; + + if(tm->tm_year >= 70) + tm->tm_year += 1900; + else + tm->tm_year += 2000; + + return 0; +} + +int rtc_set (struct rtc_time* tm) +{ + if(tm->tm_year < 2000) + tm->tm_year -= 1900; + else + tm->tm_year -= 2000; + + RTCCON |= 1; + BCDYEAR = BIN2BCD(tm->tm_year); + BCDMON = BIN2BCD(tm->tm_mon); + BCDDAY = BIN2BCD(tm->tm_mday); + BCDDATE = BIN2BCD(tm->tm_wday); + BCDHOUR = BIN2BCD(tm->tm_hour); + BCDMIN = BIN2BCD(tm->tm_min); + BCDSEC = BIN2BCD(tm->tm_sec); + RTCCON &= 1; + + return 0; +} + +void rtc_reset (void) +{ + RTCCON |= 1; + BCDYEAR = 0; + BCDMON = 0; + BCDDAY = 0; + BCDDATE = 0; + BCDHOUR = 0; + BCDMIN = 0; + BCDSEC = 0; + RTCCON &= 1; +} + diff --git a/include/configs/B2.h b/include/configs/B2.h index d9f6e14..9340db6 100644 --- a/include/configs/B2.h +++ b/include/configs/B2.h @@ -68,6 +68,7 @@ #define CONFIG_SERIAL1 1 /* we use Serial line 1 */
#define CONFIG_S3C44B0_I2C +#define CONFIG_RTC_S3C44B0
/* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com --- cpu/s3c44b0/Makefile | 2 +- drivers/serial/Makefile | 1 + .../serial.c => drivers/serial/serial_s3c44b0.c | 0 include/configs/B2.h | 1 + 4 files changed, 3 insertions(+), 1 deletions(-) rename cpu/s3c44b0/serial.c => drivers/serial/serial_s3c44b0.c (100%)
diff --git a/cpu/s3c44b0/Makefile b/cpu/s3c44b0/Makefile index 790faeb..fd696f7 100644 --- a/cpu/s3c44b0/Makefile +++ b/cpu/s3c44b0/Makefile @@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a
START = start.o -COBJS = serial.o interrupts.o cpu.o +COBJS = interrupts.o cpu.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index d0efd73..37cc5a0 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -37,6 +37,7 @@ COBJS-$(CONFIG_IXP_SERIAL) += serial_ixp.o COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o COBJS-$(CONFIG_PL010_SERIAL) += serial_pl01x.o COBJS-$(CONFIG_PL011_SERIAL) += serial_pl01x.o +COBJS-$(CONFIG_S3C44B0_SERIAL) += serial_s3c44b0.o COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o COBJS-$(CONFIG_USB_TTY) += usbtty.o diff --git a/cpu/s3c44b0/serial.c b/drivers/serial/serial_s3c44b0.c similarity index 100% rename from cpu/s3c44b0/serial.c rename to drivers/serial/serial_s3c44b0.c diff --git a/include/configs/B2.h b/include/configs/B2.h index 9340db6..01b65c5 100644 --- a/include/configs/B2.h +++ b/include/configs/B2.h @@ -65,6 +65,7 @@ /* * select serial console configuration */ +#define CONFIG_S3C44B0_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */
#define CONFIG_S3C44B0_I2C
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com --- cpu/s3c44b0/Makefile | 2 +- cpu/s3c44b0/{cpu.c => cache.c} | 56 +----------------------------------- cpu/s3c44b0/cpu.c | 62 ---------------------------------------- 3 files changed, 2 insertions(+), 118 deletions(-) copy cpu/s3c44b0/{cpu.c => cache.c} (71%)
diff --git a/cpu/s3c44b0/Makefile b/cpu/s3c44b0/Makefile index fd696f7..ae909a6 100644 --- a/cpu/s3c44b0/Makefile +++ b/cpu/s3c44b0/Makefile @@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a
START = start.o -COBJS = interrupts.o cpu.o +COBJS = cache.o cpu.o interrupts.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/s3c44b0/cpu.c b/cpu/s3c44b0/cache.c similarity index 71% copy from cpu/s3c44b0/cpu.c copy to cpu/s3c44b0/cache.c index 752191d..bc10171 100644 --- a/cpu/s3c44b0/cpu.c +++ b/cpu/s3c44b0/cache.c @@ -24,10 +24,6 @@ * MA 02111-1307 USA */
-/* - * S3C44B0 CPU specific code - */ - #include <common.h> #include <command.h> #include <asm/hardware.h> @@ -42,57 +38,6 @@ static void s3c44b0_flush_cache(void) } }
- -int cpu_init (void) -{ - icache_enable(); - - return 0; -} - -int cleanup_before_linux (void) -{ - /* - cache memory should be enabled before calling - Linux to make the kernel uncompression faster - */ - icache_enable(); - - disable_interrupts (); - - return 0; -} - -void reset_cpu (ulong addr) -{ - /* - reset the cpu using watchdog - */ - - /* Disable the watchdog.*/ - WTCON&=~(1<<5); - - /* set the timeout value to a short time... */ - WTCNT = 0x1; - - /* Enable the watchdog. */ - WTCON|=1; - WTCON|=(1<<5); - - while(1) { - /*NOP*/ - } -} - -int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - disable_interrupts (); - reset_cpu (0); - - /*NOTREACHED*/ - return (0); -} - void icache_enable (void) { ulong reg; @@ -143,3 +88,4 @@ int dcache_status (void) { return dcache_status(); } + diff --git a/cpu/s3c44b0/cpu.c b/cpu/s3c44b0/cpu.c index 752191d..e4cdb82 100644 --- a/cpu/s3c44b0/cpu.c +++ b/cpu/s3c44b0/cpu.c @@ -32,17 +32,6 @@ #include <command.h> #include <asm/hardware.h>
-static void s3c44b0_flush_cache(void) -{ - volatile int i; - /* flush cycle */ - for(i=0x10002000;i<0x10004800;i+=16) - { - *((int *)i)=0x0; - } -} - - int cpu_init (void) { icache_enable(); @@ -92,54 +81,3 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /*NOTREACHED*/ return (0); } - -void icache_enable (void) -{ - ulong reg; - - s3c44b0_flush_cache(); - - /* - Init cache - Non-cacheable area (everything outside RAM) - 0x0000:0000 - 0x0C00:0000 - */ - NCACHBE0 = 0xC0000000; - NCACHBE1 = 0x00000000; - - /* - Enable chache - */ - reg = SYSCFG; - reg |= 0x00000006; /* 8kB */ - SYSCFG = reg; -} - -void icache_disable (void) -{ - ulong reg; - - reg = SYSCFG; - reg &= ~0x00000006; /* 8kB */ - SYSCFG = reg; -} - -int icache_status (void) -{ - return 0; -} - -void dcache_enable (void) -{ - icache_enable(); -} - -void dcache_disable (void) -{ - icache_disable(); -} - -int dcache_status (void) -{ - return dcache_status(); -}
add CONFIG_SA1100_SERIAL to activate the driver
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com --- cpu/sa1100/Makefile | 2 +- drivers/serial/Makefile | 1 + .../serial.c => drivers/serial/serial_sa1100.c | 0 include/configs/assabet.h | 1 + include/configs/dnp1110.h | 1 + include/configs/gcplus.h | 1 + include/configs/lart.h | 1 + include/configs/shannon.h | 1 + 8 files changed, 7 insertions(+), 1 deletions(-) rename cpu/sa1100/serial.c => drivers/serial/serial_sa1100.c (100%)
diff --git a/cpu/sa1100/Makefile b/cpu/sa1100/Makefile index 790faeb..fd696f7 100644 --- a/cpu/sa1100/Makefile +++ b/cpu/sa1100/Makefile @@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a
START = start.o -COBJS = serial.o interrupts.o cpu.o +COBJS = interrupts.o cpu.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 37cc5a0..8cac794 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -37,6 +37,7 @@ COBJS-$(CONFIG_IXP_SERIAL) += serial_ixp.o COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o COBJS-$(CONFIG_PL010_SERIAL) += serial_pl01x.o COBJS-$(CONFIG_PL011_SERIAL) += serial_pl01x.o +COBJS-$(CONFIG_SA1100_SERIAL) += serial_sa1100.o COBJS-$(CONFIG_S3C44B0_SERIAL) += serial_s3c44b0.o COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o diff --git a/cpu/sa1100/serial.c b/drivers/serial/serial_sa1100.c similarity index 100% rename from cpu/sa1100/serial.c rename to drivers/serial/serial_sa1100.c diff --git a/include/configs/assabet.h b/include/configs/assabet.h index 4da68b3..a6c442b 100644 --- a/include/configs/assabet.h +++ b/include/configs/assabet.h @@ -57,6 +57,7 @@ /* * select serial console configuration */ +#define CONFIG_SA1100_SERIAL #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on Intel Assabet */
/* allow to overwrite serial and ethaddr */ diff --git a/include/configs/dnp1110.h b/include/configs/dnp1110.h index 3f658a7..8f615bd 100644 --- a/include/configs/dnp1110.h +++ b/include/configs/dnp1110.h @@ -59,6 +59,7 @@ /* * select serial console configuration */ +#define CONFIG_SA1100_SERIAL #define CONFIG_SERIAL1 1 /* we use SERIAL 1 */
/* allow to overwrite serial and ethaddr */ diff --git a/include/configs/gcplus.h b/include/configs/gcplus.h index 81ee05f..77d4578 100644 --- a/include/configs/gcplus.h +++ b/include/configs/gcplus.h @@ -70,6 +70,7 @@ /* * select serial console configuration */ +#define CONFIG_SA1100_SERIAL #define CONFIG_SERIAL3 1 /* we use SERIAL 3 on ADS GCPlus */
/* allow to overwrite serial and ethaddr */ diff --git a/include/configs/lart.h b/include/configs/lart.h index 877d5c7..e34ec22 100644 --- a/include/configs/lart.h +++ b/include/configs/lart.h @@ -52,6 +52,7 @@ /* * select serial console configuration */ +#define CONFIG_SA1100_SERIAL #define CONFIG_SERIAL3 1 /* we use SERIAL 3 on LART */
/* allow to overwrite serial and ethaddr */ diff --git a/include/configs/shannon.h b/include/configs/shannon.h index 717036c..c8b0b16 100644 --- a/include/configs/shannon.h +++ b/include/configs/shannon.h @@ -59,6 +59,7 @@ /* * select serial console configuration */ +#define CONFIG_SA1100_SERIAL #define CONFIG_SERIAL3 1 /* we use SERIAL 3 */
/* allow to overwrite serial and ethaddr */
add CONFIG_NETARM_SERIAL to activate the driver
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com --- cpu/arm720t/Makefile | 2 +- drivers/serial/Makefile | 1 + {cpu/arm720t => drivers/serial}/serial_netarm.c | 5 ----- include/configs/modnet50.h | 1 + 4 files changed, 3 insertions(+), 6 deletions(-) rename {cpu/arm720t => drivers/serial}/serial_netarm.c (99%)
diff --git a/cpu/arm720t/Makefile b/cpu/arm720t/Makefile index c97f329..a038042 100644 --- a/cpu/arm720t/Makefile +++ b/cpu/arm720t/Makefile @@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a
START = start.o -COBJS = serial.o serial_netarm.o interrupts.o cpu.o +COBJS = serial.o interrupts.o cpu.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 8cac794..e76a2ad 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -35,6 +35,7 @@ COBJS-$(CONFIG_S3C64XX) += s3c64xx.o COBJS-$(CONFIG_SYS_NS16550_SERIAL) += serial.o COBJS-$(CONFIG_IXP_SERIAL) += serial_ixp.o COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o +COBJS-$(CONFIG_NETARM_SERIAL) += serial_netarm.o COBJS-$(CONFIG_PL010_SERIAL) += serial_pl01x.o COBJS-$(CONFIG_PL011_SERIAL) += serial_pl01x.o COBJS-$(CONFIG_SA1100_SERIAL) += serial_sa1100.o diff --git a/cpu/arm720t/serial_netarm.c b/drivers/serial/serial_netarm.c similarity index 99% rename from cpu/arm720t/serial_netarm.c rename to drivers/serial/serial_netarm.c index 1a1b2db..2eb5393 100644 --- a/cpu/arm720t/serial_netarm.c +++ b/drivers/serial/serial_netarm.c @@ -29,9 +29,6 @@ */
#include <common.h> - -#ifdef CONFIG_NETARM - #include <asm/hardware.h>
DECLARE_GLOBAL_DATA_PTR; @@ -196,5 +193,3 @@ void serial_puts (const char *s) serial_putc (*s++); } } - -#endif /* CONFIG_NETARM */ diff --git a/include/configs/modnet50.h b/include/configs/modnet50.h index b8ae018..74bab5f 100644 --- a/include/configs/modnet50.h +++ b/include/configs/modnet50.h @@ -56,6 +56,7 @@ /* * select serial console configuration */ +#define CONFIG_NETARM_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */
/* allow to overwrite serial and ethaddr */
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com --- cpu/arm1136/mx31/Makefile | 2 +- drivers/serial/Makefile | 1 + .../mx31/serial.c => drivers/serial/serial_mx31.c | 6 ------ 3 files changed, 2 insertions(+), 7 deletions(-) rename cpu/arm1136/mx31/serial.c => drivers/serial/serial_mx31.c (99%)
diff --git a/cpu/arm1136/mx31/Makefile b/cpu/arm1136/mx31/Makefile index b648ffd..0e06f0a 100644 --- a/cpu/arm1136/mx31/Makefile +++ b/cpu/arm1136/mx31/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
-COBJS = interrupts.o serial.o generic.o +COBJS = interrupts.o generic.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index e76a2ad..619d9da 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -35,6 +35,7 @@ COBJS-$(CONFIG_S3C64XX) += s3c64xx.o COBJS-$(CONFIG_SYS_NS16550_SERIAL) += serial.o COBJS-$(CONFIG_IXP_SERIAL) += serial_ixp.o COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o +COBJS-$(CONFIG_MX31_UART) += serial_mx31.o COBJS-$(CONFIG_NETARM_SERIAL) += serial_netarm.o COBJS-$(CONFIG_PL010_SERIAL) += serial_pl01x.o COBJS-$(CONFIG_PL011_SERIAL) += serial_pl01x.o diff --git a/cpu/arm1136/mx31/serial.c b/drivers/serial/serial_mx31.c similarity index 99% rename from cpu/arm1136/mx31/serial.c rename to drivers/serial/serial_mx31.c index e025e94..7c0682a 100644 --- a/cpu/arm1136/mx31/serial.c +++ b/drivers/serial/serial_mx31.c @@ -18,9 +18,6 @@ */
#include <common.h> - -#if defined CONFIG_MX31_UART - #include <asm/arch/mx31.h>
#define __REG(x) (*((volatile u32 *)(x))) @@ -227,6 +224,3 @@ int serial_init (void)
return 0; } - - -#endif /* CONFIG_MX31 */
add CONFIG_USB_S3C64XX to activate the driver
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com --- cpu/arm1176/s3c64xx/Makefile | 1 - drivers/usb/Makefile | 1 + .../s3c64xx/usb.c => drivers/usb/s3c64xx_usb.c | 0 include/configs/smdk6400.h | 1 + 4 files changed, 2 insertions(+), 1 deletions(-) rename cpu/arm1176/s3c64xx/usb.c => drivers/usb/s3c64xx_usb.c (100%)
diff --git a/cpu/arm1176/s3c64xx/Makefile b/cpu/arm1176/s3c64xx/Makefile index 4ab1811..fa4ee3f 100644 --- a/cpu/arm1176/s3c64xx/Makefile +++ b/cpu/arm1176/s3c64xx/Makefile @@ -30,7 +30,6 @@ LIB = $(obj)lib$(SOC).a
COBJS-y = interrupts.o COBJS-$(CONFIG_S3C6400) += cpu_init.o speed.o -COBJS-$(CONFIG_USB_OHCI_NEW) += usb.o
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
diff --git a/drivers/usb/Makefile b/drivers/usb/Makefile index b306a65..7ddb72a 100644 --- a/drivers/usb/Makefile +++ b/drivers/usb/Makefile @@ -33,6 +33,7 @@ COBJS-$(CONFIG_USB_EHCI) += usb_ehci_core.o # host COBJS-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o COBJS-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o +COBJS-$(CONFIG_USB_S3C64XX) += s3c64xx_usb.o COBJS-$(CONFIG_USB_SL811HS) += sl811_usb.o COBJS-$(CONFIG_USB_EHCI_FSL) += usb_ehci_fsl.o COBJS-$(CONFIG_USB_EHCI_PCI) += usb_ehci_pci.o diff --git a/cpu/arm1176/s3c64xx/usb.c b/drivers/usb/s3c64xx_usb.c similarity index 100% rename from cpu/arm1176/s3c64xx/usb.c rename to drivers/usb/s3c64xx_usb.c diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index 06d6a88..d3cf6e5 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -288,6 +288,7 @@
#if !defined(CONFIG_ENABLE_MMU) #define CONFIG_CMD_USB 1 +#define CONFIG_USB_S3C64XX #define CONFIG_USB_OHCI_NEW 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x74300000 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "s3c6400"
add CONFIG_KS8695_SERIAL to activate the driver
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com --- cpu/arm920t/ks8695/Makefile | 2 +- drivers/serial/Makefile | 1 + .../serial.c => drivers/serial/serial_ks8695.c | 0 include/configs/cm4008.h | 1 + include/configs/cm41xx.h | 1 + 5 files changed, 4 insertions(+), 1 deletions(-) rename cpu/arm920t/ks8695/serial.c => drivers/serial/serial_ks8695.c (100%)
diff --git a/cpu/arm920t/ks8695/Makefile b/cpu/arm920t/ks8695/Makefile index 7db9473..f6b0063 100644 --- a/cpu/arm920t/ks8695/Makefile +++ b/cpu/arm920t/ks8695/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
-COBJS = interrupts.o serial.o +COBJS = interrupts.o SOBJS = lowlevel_init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 619d9da..95255df 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -34,6 +34,7 @@ COBJS-$(CONFIG_DRIVER_S3C4510_UART) += s3c4510b_uart.o COBJS-$(CONFIG_S3C64XX) += s3c64xx.o COBJS-$(CONFIG_SYS_NS16550_SERIAL) += serial.o COBJS-$(CONFIG_IXP_SERIAL) += serial_ixp.o +COBJS-$(CONFIG_KS8695_SERIAL) += serial_ks8695.o COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o COBJS-$(CONFIG_MX31_UART) += serial_mx31.o COBJS-$(CONFIG_NETARM_SERIAL) += serial_netarm.o diff --git a/cpu/arm920t/ks8695/serial.c b/drivers/serial/serial_ks8695.c similarity index 100% rename from cpu/arm920t/ks8695/serial.c rename to drivers/serial/serial_ks8695.c diff --git a/include/configs/cm4008.h b/include/configs/cm4008.h index 124fad7..7ea1a46 100644 --- a/include/configs/cm4008.h +++ b/include/configs/cm4008.h @@ -53,6 +53,7 @@ * select serial console configuration */ #define CONFIG_ENV_IS_NOWHERE +#define CONFIG_KS8695_SERIAL #define CONFIG_SERIAL1 #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/cm41xx.h b/include/configs/cm41xx.h index 5c255ce..ea374da 100644 --- a/include/configs/cm41xx.h +++ b/include/configs/cm41xx.h @@ -53,6 +53,7 @@ * select serial console configuration */ #define CONFIG_ENV_IS_NOWHERE +#define CONFIG_KS8695_SERIAL #define CONFIG_SERIAL1 #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200
add CONFIG_LPC2292_SERIAL to activate the driver
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com --- cpu/arm720t/serial.c | 77 ---------------------------- drivers/serial/Makefile | 1 + drivers/serial/serial_lpc2292.c | 105 +++++++++++++++++++++++++++++++++++++++ include/configs/SMN42.h | 1 + include/configs/lpc2292sodimm.h | 1 + 5 files changed, 108 insertions(+), 77 deletions(-) create mode 100644 drivers/serial/serial_lpc2292.c
diff --git a/cpu/arm720t/serial.c b/cpu/arm720t/serial.c index 54a9b31..b54d1cf 100644 --- a/cpu/arm720t/serial.c +++ b/cpu/arm720t/serial.c @@ -122,81 +122,4 @@ serial_puts (const char *s) serial_putc (*s++); } } - -#elif defined(CONFIG_LPC2292) - -DECLARE_GLOBAL_DATA_PTR; - -#include <asm/arch/hardware.h> - -void serial_setbrg (void) -{ - unsigned short divisor = 0; - - switch (gd->baudrate) { - case 1200: divisor = 3072; break; - case 9600: divisor = 384; break; - case 19200: divisor = 192; break; - case 38400: divisor = 96; break; - case 57600: divisor = 64; break; - case 115200: divisor = 32; break; - default: hang (); break; - } - - /* init serial UART0 */ - PUT8(U0LCR, 0); - PUT8(U0IER, 0); - PUT8(U0LCR, 0x80); /* DLAB=1 */ - PUT8(U0DLL, (unsigned char)(divisor & 0x00FF)); - PUT8(U0DLM, (unsigned char)(divisor >> 8)); - PUT8(U0LCR, 0x03); /* 8N1, DLAB=0 */ - PUT8(U0FCR, 1); /* Enable RX and TX FIFOs */ -} - -int serial_init (void) -{ - unsigned long pinsel0; - - serial_setbrg (); - - pinsel0 = GET32(PINSEL0); - pinsel0 &= ~(0x00000003); - pinsel0 |= 5; - PUT32(PINSEL0, pinsel0); - - return (0); -} - -void serial_putc (const char c) -{ - if (c == '\n') - { - while((GET8(U0LSR) & (1<<5)) == 0); /* Wait for empty U0THR */ - PUT8(U0THR, '\r'); - } - - while((GET8(U0LSR) & (1<<5)) == 0); /* Wait for empty U0THR */ - PUT8(U0THR, c); -} - -int serial_getc (void) -{ - while((GET8(U0LSR) & 1) == 0); - return GET8(U0RBR); -} - -void -serial_puts (const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - -/* Test if there is a byte to read */ -int serial_tstc (void) -{ - return (GET8(U0LSR) & 1); -} - #endif diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 95255df..eaf4f8e 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -35,6 +35,7 @@ COBJS-$(CONFIG_S3C64XX) += s3c64xx.o COBJS-$(CONFIG_SYS_NS16550_SERIAL) += serial.o COBJS-$(CONFIG_IXP_SERIAL) += serial_ixp.o COBJS-$(CONFIG_KS8695_SERIAL) += serial_ks8695.o +COBJS-$(CONFIG_LPC2292_SERIAL) += serial_lpc2292.o COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o COBJS-$(CONFIG_MX31_UART) += serial_mx31.o COBJS-$(CONFIG_NETARM_SERIAL) += serial_netarm.o diff --git a/drivers/serial/serial_lpc2292.c b/drivers/serial/serial_lpc2292.c new file mode 100644 index 0000000..87b7d5f --- /dev/null +++ b/drivers/serial/serial_lpc2292.c @@ -0,0 +1,105 @@ +/* + * (C) Copyright 2002-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger mgroeger@sysgo.de + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Alex Zuepke azu@sysgo.de + * + * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#include <common.h> +#include <asm/arch/hardware.h> + +DECLARE_GLOBAL_DATA_PTR; + +void serial_setbrg (void) +{ + unsigned short divisor = 0; + + switch (gd->baudrate) { + case 1200: divisor = 3072; break; + case 9600: divisor = 384; break; + case 19200: divisor = 192; break; + case 38400: divisor = 96; break; + case 57600: divisor = 64; break; + case 115200: divisor = 32; break; + default: hang (); break; + } + + /* init serial UART0 */ + PUT8(U0LCR, 0); + PUT8(U0IER, 0); + PUT8(U0LCR, 0x80); /* DLAB=1 */ + PUT8(U0DLL, (unsigned char)(divisor & 0x00FF)); + PUT8(U0DLM, (unsigned char)(divisor >> 8)); + PUT8(U0LCR, 0x03); /* 8N1, DLAB=0 */ + PUT8(U0FCR, 1); /* Enable RX and TX FIFOs */ +} + +int serial_init (void) +{ + unsigned long pinsel0; + + serial_setbrg (); + + pinsel0 = GET32(PINSEL0); + pinsel0 &= ~(0x00000003); + pinsel0 |= 5; + PUT32(PINSEL0, pinsel0); + + return (0); +} + +void serial_putc (const char c) +{ + if (c == '\n') + { + while((GET8(U0LSR) & (1<<5)) == 0); /* Wait for empty U0THR */ + PUT8(U0THR, '\r'); + } + + while((GET8(U0LSR) & (1<<5)) == 0); /* Wait for empty U0THR */ + PUT8(U0THR, c); +} + +int serial_getc (void) +{ + while((GET8(U0LSR) & 1) == 0); + return GET8(U0RBR); +} + +void +serial_puts (const char *s) +{ + while (*s) { + serial_putc (*s++); + } +} + +/* Test if there is a byte to read */ +int serial_tstc (void) +{ + return (GET8(U0LSR) & 1); +} + diff --git a/include/configs/SMN42.h b/include/configs/SMN42.h index d6f41f9..05f6d9f 100644 --- a/include/configs/SMN42.h +++ b/include/configs/SMN42.h @@ -59,6 +59,7 @@ /* * select serial console configuration */ +#define CONFIG_LPC2292_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */
/* allow to overwrite serial and ethaddr */ diff --git a/include/configs/lpc2292sodimm.h b/include/configs/lpc2292sodimm.h index fa2917e..1515038 100644 --- a/include/configs/lpc2292sodimm.h +++ b/include/configs/lpc2292sodimm.h @@ -59,6 +59,7 @@ /* * select serial console configuration */ +#define CONFIG_LPC2292_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */
/* allow to overwrite serial and ethaddr */
add CONFIG_CLPS7111_SERIAL to activate the driver
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com --- cpu/arm720t/Makefile | 2 +- drivers/serial/Makefile | 1 + .../serial.c => drivers/serial/serial_clps7111.c | 4 ---- include/configs/armadillo.h | 1 + include/configs/ep7312.h | 1 + include/configs/impa7.h | 1 + 6 files changed, 5 insertions(+), 5 deletions(-) rename cpu/arm720t/serial.c => drivers/serial/serial_clps7111.c (96%)
diff --git a/cpu/arm720t/Makefile b/cpu/arm720t/Makefile index a038042..d5ac7d3 100644 --- a/cpu/arm720t/Makefile +++ b/cpu/arm720t/Makefile @@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a
START = start.o -COBJS = serial.o interrupts.o cpu.o +COBJS = interrupts.o cpu.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index eaf4f8e..6ab847f 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -33,6 +33,7 @@ COBJS-$(CONFIG_SYS_NS16550) += ns16550.o COBJS-$(CONFIG_DRIVER_S3C4510_UART) += s3c4510b_uart.o COBJS-$(CONFIG_S3C64XX) += s3c64xx.o COBJS-$(CONFIG_SYS_NS16550_SERIAL) += serial.o +COBJS-$(CONFIG_CLPS7111_SERIAL) += serial_clps7111.o COBJS-$(CONFIG_IXP_SERIAL) += serial_ixp.o COBJS-$(CONFIG_KS8695_SERIAL) += serial_ks8695.o COBJS-$(CONFIG_LPC2292_SERIAL) += serial_lpc2292.o diff --git a/cpu/arm720t/serial.c b/drivers/serial/serial_clps7111.c similarity index 96% rename from cpu/arm720t/serial.c rename to drivers/serial/serial_clps7111.c index b54d1cf..a6aecad 100644 --- a/cpu/arm720t/serial.c +++ b/drivers/serial/serial_clps7111.c @@ -29,9 +29,6 @@ */
#include <common.h> - -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) - #include <clps7111.h>
DECLARE_GLOBAL_DATA_PTR; @@ -122,4 +119,3 @@ serial_puts (const char *s) serial_putc (*s++); } } -#endif diff --git a/include/configs/armadillo.h b/include/configs/armadillo.h index ef6ce22..7ba5e17 100644 --- a/include/configs/armadillo.h +++ b/include/configs/armadillo.h @@ -64,6 +64,7 @@ /* * select serial console configuration */ +#define CONFIG_CLPS7111_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */
/* allow to overwrite serial and ethaddr */ diff --git a/include/configs/ep7312.h b/include/configs/ep7312.h index d12b13f..630fff3 100644 --- a/include/configs/ep7312.h +++ b/include/configs/ep7312.h @@ -55,6 +55,7 @@ /* * select serial console configuration */ +#define CONFIG_CLPS7111_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */
/* allow to overwrite serial and ethaddr */ diff --git a/include/configs/impa7.h b/include/configs/impa7.h index efd4214..c7001cc 100644 --- a/include/configs/impa7.h +++ b/include/configs/impa7.h @@ -54,6 +54,7 @@ /* * select serial console configuration */ +#define CONFIG_CLPS7111_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */
/* allow to overwrite serial and ethaddr */
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com --- cpu/arm_cortexa8/omap3/interrupts.c | 128 ----------------------------------- 1 files changed, 0 insertions(+), 128 deletions(-)
diff --git a/cpu/arm_cortexa8/omap3/interrupts.c b/cpu/arm_cortexa8/omap3/interrupts.c index 9e9817d..384ffdc 100644 --- a/cpu/arm_cortexa8/omap3/interrupts.c +++ b/cpu/arm_cortexa8/omap3/interrupts.c @@ -34,137 +34,9 @@
#include <common.h> #include <asm/io.h> -#include <asm/proc-armv/ptrace.h>
#define TIMER_LOAD_VAL 0
-#ifdef CONFIG_USE_IRQ -/* enable IRQ interrupts */ -void enable_interrupts(void) -{ - unsigned long temp; - __asm__ __volatile__("mrs %0, cpsr\n" - "bic %0, %0, #0x80\n" "msr cpsr_c, %0":"=r"(temp) - ::"memory"); -} - -/* - * disable IRQ/FIQ interrupts - * returns true if interrupts had been enabled before we disabled them - */ -int disable_interrupts(void) -{ - unsigned long old, temp; - __asm__ __volatile__("mrs %0, cpsr\n" - "orr %1, %0, #0xc0\n" - "msr cpsr_c, %1":"=r"(old), "=r"(temp) - ::"memory"); - return (old & 0x80) == 0; -} -#else -void enable_interrupts(void) -{ - return; -} -int disable_interrupts(void) -{ - return 0; -} -#endif - -void bad_mode(void) -{ - panic("Resetting CPU ...\n"); - reset_cpu(0); -} - -void show_regs(struct pt_regs *regs) -{ - unsigned long flags; - const char *processor_modes[] = { - "USER_26", "FIQ_26", "IRQ_26", "SVC_26", - "UK4_26", "UK5_26", "UK6_26", "UK7_26", - "UK8_26", "UK9_26", "UK10_26", "UK11_26", - "UK12_26", "UK13_26", "UK14_26", "UK15_26", - "USER_32", "FIQ_32", "IRQ_32", "SVC_32", - "UK4_32", "UK5_32", "UK6_32", "ABT_32", - "UK8_32", "UK9_32", "UK10_32", "UND_32", - "UK12_32", "UK13_32", "UK14_32", "SYS_32", - }; - - flags = condition_codes(regs); - - printf("pc : [<%08lx>] lr : [<%08lx>]\n" - "sp : %08lx ip : %08lx fp : %08lx\n", - instruction_pointer(regs), - regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp); - printf("r10: %08lx r9 : %08lx r8 : %08lx\n", - regs->ARM_r10, regs->ARM_r9, regs->ARM_r8); - printf("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n", - regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4); - printf("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n", - regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0); - printf("Flags: %c%c%c%c", - flags & CC_N_BIT ? 'N' : 'n', - flags & CC_Z_BIT ? 'Z' : 'z', - flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v'); - printf(" IRQs %s FIQs %s Mode %s%s\n", - interrupts_enabled(regs) ? "on" : "off", - fast_interrupts_enabled(regs) ? "on" : "off", - processor_modes[processor_mode(regs)], - thumb_mode(regs) ? " (T)" : ""); -} - -void do_undefined_instruction(struct pt_regs *pt_regs) -{ - printf("undefined instruction\n"); - show_regs(pt_regs); - bad_mode(); -} - -void do_software_interrupt(struct pt_regs *pt_regs) -{ - printf("software interrupt\n"); - show_regs(pt_regs); - bad_mode(); -} - -void do_prefetch_abort(struct pt_regs *pt_regs) -{ - printf("prefetch abort\n"); - show_regs(pt_regs); - bad_mode(); -} - -void do_data_abort(struct pt_regs *pt_regs) -{ - printf("data abort\n"); - show_regs(pt_regs); - bad_mode(); -} - -void do_not_used(struct pt_regs *pt_regs) -{ - printf("not used\n"); - show_regs(pt_regs); - bad_mode(); -} - -void do_fiq(struct pt_regs *pt_regs) -{ - printf("fast interrupt request\n"); - show_regs(pt_regs); - bad_mode(); -} - -void do_irq(struct pt_regs *pt_regs) -{ - printf("interrupt request\n"); - show_regs(pt_regs); - bad_mode(); -} - - static ulong timestamp; static ulong lastinc; static gptimer_t *timer_base = (gptimer_t *)CONFIG_SYS_TIMERBASE;
Dear Jean-Christophe,
Jean-Christophe PLAGNIOL-VILLARD wrote:
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com
As this patch has no patch description in body (except subject) it seems that you think that the code you like to remove here is already available somewhere else. Where?
Please correct typo in subject ('ompa').
Dirk
cpu/arm_cortexa8/omap3/interrupts.c | 128 ----------------------------------- 1 files changed, 0 insertions(+), 128 deletions(-)
diff --git a/cpu/arm_cortexa8/omap3/interrupts.c b/cpu/arm_cortexa8/omap3/interrupts.c index 9e9817d..384ffdc 100644 --- a/cpu/arm_cortexa8/omap3/interrupts.c +++ b/cpu/arm_cortexa8/omap3/interrupts.c @@ -34,137 +34,9 @@
#include <common.h> #include <asm/io.h> -#include <asm/proc-armv/ptrace.h>
#define TIMER_LOAD_VAL 0
-#ifdef CONFIG_USE_IRQ -/* enable IRQ interrupts */ -void enable_interrupts(void) -{
- unsigned long temp;
- __asm__ __volatile__("mrs %0, cpsr\n"
"bic %0, %0, #0x80\n" "msr cpsr_c, %0":"=r"(temp)::"memory");-}
-/*
- disable IRQ/FIQ interrupts
- returns true if interrupts had been enabled before we disabled them
- */
-int disable_interrupts(void) -{
- unsigned long old, temp;
- __asm__ __volatile__("mrs %0, cpsr\n"
"orr %1, %0, #0xc0\n""msr cpsr_c, %1":"=r"(old), "=r"(temp)::"memory");- return (old & 0x80) == 0;
-} -#else -void enable_interrupts(void) -{
- return;
-} -int disable_interrupts(void) -{
- return 0;
-} -#endif
-void bad_mode(void) -{
- panic("Resetting CPU ...\n");
- reset_cpu(0);
-}
-void show_regs(struct pt_regs *regs) -{
- unsigned long flags;
- const char *processor_modes[] = {
"USER_26", "FIQ_26", "IRQ_26", "SVC_26","UK4_26", "UK5_26", "UK6_26", "UK7_26","UK8_26", "UK9_26", "UK10_26", "UK11_26","UK12_26", "UK13_26", "UK14_26", "UK15_26","USER_32", "FIQ_32", "IRQ_32", "SVC_32","UK4_32", "UK5_32", "UK6_32", "ABT_32","UK8_32", "UK9_32", "UK10_32", "UND_32","UK12_32", "UK13_32", "UK14_32", "SYS_32",- };
- flags = condition_codes(regs);
- printf("pc : [<%08lx>] lr : [<%08lx>]\n"
"sp : %08lx ip : %08lx fp : %08lx\n",instruction_pointer(regs),regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);- printf("r10: %08lx r9 : %08lx r8 : %08lx\n",
regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);- printf("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);- printf("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);- printf("Flags: %c%c%c%c",
flags & CC_N_BIT ? 'N' : 'n',flags & CC_Z_BIT ? 'Z' : 'z',flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');- printf(" IRQs %s FIQs %s Mode %s%s\n",
interrupts_enabled(regs) ? "on" : "off",fast_interrupts_enabled(regs) ? "on" : "off",processor_modes[processor_mode(regs)],thumb_mode(regs) ? " (T)" : "");-}
-void do_undefined_instruction(struct pt_regs *pt_regs) -{
- printf("undefined instruction\n");
- show_regs(pt_regs);
- bad_mode();
-}
-void do_software_interrupt(struct pt_regs *pt_regs) -{
- printf("software interrupt\n");
- show_regs(pt_regs);
- bad_mode();
-}
-void do_prefetch_abort(struct pt_regs *pt_regs) -{
- printf("prefetch abort\n");
- show_regs(pt_regs);
- bad_mode();
-}
-void do_data_abort(struct pt_regs *pt_regs) -{
- printf("data abort\n");
- show_regs(pt_regs);
- bad_mode();
-}
-void do_not_used(struct pt_regs *pt_regs) -{
- printf("not used\n");
- show_regs(pt_regs);
- bad_mode();
-}
-void do_fiq(struct pt_regs *pt_regs) -{
- printf("fast interrupt request\n");
- show_regs(pt_regs);
- bad_mode();
-}
-void do_irq(struct pt_regs *pt_regs) -{
- printf("interrupt request\n");
- show_regs(pt_regs);
- bad_mode();
-}
static ulong timestamp; static ulong lastinc; static gptimer_t *timer_base = (gptimer_t *)CONFIG_SYS_TIMERBASE;
On 07:24 Sat 28 Mar , Dirk Behme wrote:
Dear Jean-Christophe,
Jean-Christophe PLAGNIOL-VILLARD wrote:
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com
As this patch has no patch description in body (except subject) it seems that you think that the code you like to remove here is already available somewhere else. Where?
yes in the arm interrupt so I remove it
Best Regards, J.
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 07:24 Sat 28 Mar , Dirk Behme wrote:
Dear Jean-Christophe,
Jean-Christophe PLAGNIOL-VILLARD wrote:
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com
As this patch has no patch description in body (except subject) it seems that you think that the code you like to remove here is already available somewhere else. Where?
yes in the arm interrupt so I remove it
Which file exactly? I'd like to review the (possible) differences.
Dirk
Hello Jean-Christophe,
2009/3/27 Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com:
add CONFIG_USB_S3C64XX to activate the driver
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com
cpu/arm1176/s3c64xx/Makefile | 1 - drivers/usb/Makefile | 1 + .../s3c64xx/usb.c => drivers/usb/s3c64xx_usb.c | 0 include/configs/smdk6400.h | 1 + 4 files changed, 2 insertions(+), 1 deletions(-) rename cpu/arm1176/s3c64xx/usb.c => drivers/usb/s3c64xx_usb.c (100%)
Why do you want to move all these processor specific code into generic driver code?
Kind Regards,
Remy
On 20:26 Tue 31 Mar , Remy Bohmer wrote:
Hello Jean-Christophe,
2009/3/27 Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com:
add CONFIG_USB_S3C64XX to activate the driver
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com
cpu/arm1176/s3c64xx/Makefile | 1 - drivers/usb/Makefile | 1 + .../s3c64xx/usb.c => drivers/usb/s3c64xx_usb.c | 0 include/configs/smdk6400.h | 1 + 4 files changed, 2 insertions(+), 1 deletions(-) rename cpu/arm1176/s3c64xx/usb.c => drivers/usb/s3c64xx_usb.c (100%)
Why do you want to move all these processor specific code into generic driver code?
IMHO it's a usb drivers and it's place is not in the cpu but in the drivers/usb/ even if it's just the USB init
Best Regards, J.
Dear Remy Bohmer,
In message 3efb10970903311126u1b97c3dbi5193e8547335199b@mail.gmail.com you wrote:
Why do you want to move all these processor specific code into generic driver code?
Indeed. That makes no sense to me.
Please stop here, Jean-Christophe.
Best regards,
Wolfgang Denk
Hello Jean,
Jean-Christophe PLAGNIOL-VILLARD wrote:
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com
cpu/s3c44b0/cpu.c | 735 +++++++----------------- drivers/i2c/Makefile | 1 + cpu/s3c44b0/cpu.c => drivers/i2c/s3c44b0_i2c.c | 198 ------- include/configs/B2.h | 2 + 4 files changed, 225 insertions(+), 711 deletions(-) rewrite cpu/s3c44b0/cpu.c (60%) rename cpu/s3c44b0/cpu.c => drivers/i2c/s3c44b0_i2c.c (70%)
Because I think this go through your arm git tree, you get for this patch my:
Acked-by: Heiko Schocher hs@denx.de
bye Heiko
participants (5)
-
Dirk Behme -
Heiko Schocher -
Jean-Christophe PLAGNIOL-VILLARD -
Remy Bohmer -
Wolfgang Denk