[U-Boot] [PATCH] at91: Add esd gmbh MEESC board support
This patch adds support for esd gmbh MEESC board. The MEESC is based on an Atmel AT91SAM9263 SoC.
Signed-off-by: Daniel Gorsulowski Daniel.Gorsulowski@esd.eu ---
Jean-Christophe: This patch requires an up-to-date mach-types.h, please sync it.
MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + board/esd/meesc/Makefile | 55 +++++++++++ board/esd/meesc/config.mk | 1 + board/esd/meesc/meesc.c | 211 +++++++++++++++++++++++++++++++++++++++++++ board/esd/meesc/partition.c | 37 ++++++++ include/configs/meesc.h | 185 +++++++++++++++++++++++++++++++++++++ 8 files changed, 497 insertions(+), 0 deletions(-) create mode 100644 board/esd/meesc/Makefile create mode 100644 board/esd/meesc/config.mk create mode 100644 board/esd/meesc/meesc.c create mode 100644 board/esd/meesc/partition.c create mode 100644 include/configs/meesc.h
diff --git a/MAINTAINERS b/MAINTAINERS index 9379c7e..449443a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -532,6 +532,10 @@ Peter Figuli peposh@etc.sk
wepep250 xscale
+Daniel Gorsulowski daniel.gorsulowski@esd.eu + + meesc ARM926EJS (AT91SAM9263 SoC) + Marius Gröger mag@sysgo.de
impa7 ARM720T (EP7211) diff --git a/MAKEALL b/MAKEALL index f4599d6..eb7b0d7 100755 --- a/MAKEALL +++ b/MAKEALL @@ -587,6 +587,7 @@ LIST_at91=" \ cmc_pu2 \ csb637 \ kb9202 \ + meesc \ mp2usb \ m501sk \ pm9263 \ diff --git a/Makefile b/Makefile index 46871d0..a5db70d 100644 --- a/Makefile +++ b/Makefile @@ -2787,6 +2787,9 @@ at91sam9rlek_config : unconfig fi; @$(MKCONFIG) -a at91sam9rlek arm arm926ejs at91sam9rlek atmel at91
+meesc_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs meesc esd at91 + pm9263_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs pm9263 ronetix at91
diff --git a/board/esd/meesc/Makefile b/board/esd/meesc/Makefile new file mode 100644 index 0000000..2dd6b25 --- /dev/null +++ b/board/esd/meesc/Makefile @@ -0,0 +1,55 @@ +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2008 +# Stelian Pop stelian.pop@leadtechdesign.com +# Lead Tech Design <www.leadtechdesign.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y += $(BOARD).o +COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/esd/meesc/config.mk b/board/esd/meesc/config.mk new file mode 100644 index 0000000..9ce161e --- /dev/null +++ b/board/esd/meesc/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x21f00000 diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c new file mode 100644 index 0000000..557a51c --- /dev/null +++ b/board/esd/meesc/meesc.c @@ -0,0 +1,211 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop stelian.pop@leadtechdesign.com + * Lead Tech Design <www.leadtechdesign.com> + * + * (C) Copyright 2009 + * Daniel Gorsulowski daniel.gorsulowski@esd.eu + * esd electronic system design gmbh <www.esd.eu> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91sam9263.h> +#include <asm/arch/at91sam9263_matrix.h> +#include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/clk.h> +#include <asm/arch/gpio.h> +#include <asm/arch/hardware.h> +#include <asm/arch/io.h> +#include <netdev.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Miscelaneous platform dependent initialisations + */ + +int get_hw_rev(void) +{ + int rev = at91_get_gpio_value(AT91_PIN_PB19); + rev |= at91_get_gpio_value(AT91_PIN_PB20) << 1; + rev |= at91_get_gpio_value(AT91_PIN_PB21) << 2; + rev |= at91_get_gpio_value(AT91_PIN_PB22) << 3; + + if (rev == 15) + rev = 0; + + return rev; +} + +#ifdef CONFIG_CMD_NAND +static void meesc_nand_hw_init(void) +{ + unsigned long csa; + + /* Enable CS3 */ + csa = at91_sys_read(AT91_MATRIX_EBI0CSA); + at91_sys_write(AT91_MATRIX_EBI0CSA, + csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); + + /* Configure SMC CS3 for NAND/SmartMedia */ + at91_sys_write(AT91_SMC_SETUP(3), + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC_PULSE(3), + AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | + AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); + at91_sys_write(AT91_SMC_CYCLE(3), + AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); + at91_sys_write(AT91_SMC_MODE(3), + AT91_SMC_READMODE | AT91_SMC_WRITEMODE | + AT91_SMC_EXNWMODE_DISABLE | +#ifdef CONFIG_SYS_NAND_DBW_16 + AT91_SMC_DBW_16 | +#else /* CONFIG_SYS_NAND_DBW_8 */ + AT91_SMC_DBW_8 | +#endif + AT91_SMC_TDF_(2)); + + /* Configure RDY/BSY */ + at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); + + /* Enable NandFlash */ + at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); +} +#endif /* CONFIG_CMD_NAND */ + +#ifdef CONFIG_MACB +static void meesc_macb_hw_init(void) +{ + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC); + at91_macb_hw_init(); +} +#endif + +/* + * Static memory controller initialization to enable Beckhoff ET1100 EtherCAT + * controller debugging + * The ET1100 is located at physical address 0x70000000 + * Its process memory is located at physical address 0x70001000 + */ +static void meesc_ethercat_hw_init(void) +{ + /* Configure SMC EBI1_CS0 for EtherCAT */ + at91_sys_write(AT91_SMC1_SETUP(0), + AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC1_PULSE(0), + AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(9) | + AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(9)); + at91_sys_write(AT91_SMC1_CYCLE(0), + AT91_SMC_NWECYCLE_(10) | AT91_SMC_NRDCYCLE_(5)); + /* Configure behavior at external wait signal, byte-select mode, 16 bit + data bus width, none data float wait states and TDF optimization */ + at91_sys_write(AT91_SMC1_MODE(0), + AT91_SMC_READMODE | AT91_SMC_EXNWMODE_READY | + AT91_SMC_BAT_SELECT | AT91_SMC_DBW_16 | AT91_SMC_TDF_(0) | + AT91_SMC_TDFMODE); + + /* Configure RDY/BSY */ + at91_set_B_periph(AT91_PIN_PE20, 0); /* EBI1_NWAIT */ +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = get_ram_size((long *) PHYS_SDRAM, (1 << 27)); + return 0; +} + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_MACB + rc = macb_eth_initialize(0, (void *)AT91SAM9263_BASE_EMAC, 0x00); +#endif + return rc; +} + +int checkboard(void) +{ + char str[32]; + char buf[32]; + + puts("Board: esd CAN-EtherCAT Gateway"); + if (getenv_r("serial#", str, sizeof(str)) > 0) { + puts(", serial# "); + puts(str); + } + printf("\nHardware-revision: 1.%d\n", get_hw_rev()); + printf("Crystal frequency:\t%8s MHz\n", + strmhz(buf, get_main_clk_rate())); + printf("CPU clock:\t\t%8s MHz\n", + strmhz(buf, get_cpu_clk_rate())); +#ifdef CONFIG_SHOW_VERBOSE_CLOCKINFO + printf("Master clock:\t\t%8s MHz\n", + strmhz(buf, get_mck_clk_rate())); + printf("PLL A clock:\t\t%8s MHz\n", + strmhz(buf, get_plla_clk_rate())); + printf("PLL B Reg.:\t\t0x%08X\n", + at91_sys_read(AT91_CKGR_PLLBR)); + printf("PLL B clock:\t\t%8s MHz\n", + strmhz(buf, get_pllb_clk_rate())); +#endif + printf("Mach-type: %lu\n", gd->bd->bi_arch_number); + return 0; +} + +int board_init(void) +{ + /* Enable Ctrlc */ + console_init_f(); + + /* Peripheral Clock Enable Register */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOA | + 1 << AT91SAM9263_ID_PIOB | + 1 << AT91SAM9263_ID_PIOCDE | + 1 << AT91SAM9263_ID_CAN); + + /* arch number of MEESC-Board */ + gd->bd->bi_arch_number = MACH_TYPE_MEESC; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + at91_serial_hw_init(); +#ifdef CONFIG_CMD_NAND + meesc_nand_hw_init(); +#endif + meesc_ethercat_hw_init(); +#ifdef CONFIG_HAS_DATAFLASH + at91_spi0_hw_init(1 << 0); +#endif +#ifdef CONFIG_MACB + meesc_macb_hw_init(); +#endif + at91_set_A_periph(AT91_PIN_PA13, 0); /* CAN_TX */ + at91_set_A_periph(AT91_PIN_PA14, 1); /* CAN_RX */ + return 0; +} diff --git a/board/esd/meesc/partition.c b/board/esd/meesc/partition.c new file mode 100644 index 0000000..df0e1db --- /dev/null +++ b/board/esd/meesc/partition.c @@ -0,0 +1,37 @@ +/* + * (C) Copyright 2008 + * Ulf Samuelsson ulf@atmel.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ +#include <common.h> +#include <config.h> +#include <asm/hardware.h> +#include <dataflash.h> + +AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; + +struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { + {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ +}; + +/* define the area offsets */ +dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { + {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, + {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, + {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, +}; diff --git a/include/configs/meesc.h b/include/configs/meesc.h new file mode 100644 index 0000000..5ff90c7 --- /dev/null +++ b/include/configs/meesc.h @@ -0,0 +1,185 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop stelian.pop@leadtechdesign.com + * Lead Tech Design <www.leadtechdesign.com> + * + * (C) Copyright 2009 + * Daniel Gorsulowski daniel.gorsulowski@esd.eu + * esd electronic system design gmbh <www.esd.eu> + * + * Configuation settings for the esd MEESC board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* Common stuff */ +#define AT91_CPU_NAME "AT91SAM9263" +#define CONFIG_SYS_HZ 1000 /* decrementer freq */ +#define CONFIG_MEESC 1 /* Board is esd MEESC */ +#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ +#define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */ +#define CONFIG_ENV_OVERWRITE 1 /* necessary on prototypes */ +#define CONFIG_DISPLAY_BOARDINFO 1 +#define CONFIG_PREBOOT /* enable preboot variable */ +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 +#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */ + +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_RELOCATE_UBOOT + +#define CONFIG_ARCH_CPU_INIT + +/* + * Hardware drivers + */ + +/* Console output */ +#define CONFIG_ATMEL_USART 1 +#undef CONFIG_USART0 +#undef CONFIG_USART1 +#undef CONFIG_USART2 +#define CONFIG_USART3 1 /* USART 3 is DBGU */ + +#define CONFIG_BOOTDELAY 3 +#define CONFIG_ZERO_BOOTDELAY_CHECK 1 + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE 1 +#define CONFIG_BOOTP_BOOTPATH 1 +#define CONFIG_BOOTP_GATEWAY 1 +#define CONFIG_BOOTP_HOSTNAME 1 + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_USB + +#define CONFIG_CMD_PING 1 +#define CONFIG_CMD_DHCP 1 +#define CONFIG_CMD_NAND 1 + +/* LED */ +#define CONFIG_AT91_LED 1 + +/* SDRAM */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM 0x20000000 + +/* DataFlash */ +#define CONFIG_ATMEL_DATAFLASH_SPI +#define CONFIG_HAS_DATAFLASH 1 +#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) +#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 +#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ +#define AT91_SPI_CLK 15000000 +#define DATAFLASH_TCSS (0x1a << 16) +#define DATAFLASH_TCHS (0x1 << 24) + +/* NOR flash is not populated, disable it */ +#define CONFIG_SYS_NO_FLASH 1 + +/* NAND flash */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_ATMEL +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_DBW_8 1 +/* our ALE is AD21 */ +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) +/* our CLE is AD22 */ +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22 +#endif + +/* Ethernet */ +#define CONFIG_MACB 1 +#define CONFIG_RMII 1 +#define CONFIG_NET_MULTI 1 +#define CONFIG_NET_RETRY_COUNT 20 +#undef CONFIG_RESET_PHY_R + +#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ + +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_END 0x21e00000 + +#define CONFIG_SYS_USE_DATAFLASH 1 +#undef CONFIG_SYS_USE_NANDFLASH + +#ifdef CONFIG_SYS_USE_DATAFLASH + +/* bootstrap + u-boot + env + linux in dataflash on CS0 */ +#define CONFIG_ENV_IS_IN_DATAFLASH 1 +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ + 0x8400) +#define CONFIG_ENV_OFFSET 0x4200 +#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ + CONFIG_ENV_OFFSET) +#define CONFIG_ENV_SIZE 0x4200 +#define CONFIG_BOOTCOMMAND "cp.b C0042000 22000000 210000; bootm" + +#else /* CONFIG_SYS_USE_NANDFLASH */ + +/* bootstrap + u-boot + env + linux in nandflash */ +#define CONFIG_ENV_IS_IN_NAND 1 +#define CONFIG_ENV_OFFSET 0x60000 +#define CONFIG_ENV_OFFSET_REDUND 0x80000 +#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ +#define CONFIG_BOOTCOMMAND "nand read 22000000 A0000 200000; bootm" + +#endif + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } + +#define CONFIG_SYS_PROMPT "=> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_LONGHELP 1 +#define CONFIG_CMDLINE_EDITING 1 + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN 0x2D000 +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ + +#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ + +#ifdef CONFIG_USE_IRQ +#error CONFIG_USE_IRQ not supported +#endif + +#endif
On 12:21 Tue 23 Jun , Daniel Gorsulowski wrote:
This patch adds support for esd gmbh MEESC board. The MEESC is based on an Atmel AT91SAM9263 SoC.
Signed-off-by: Daniel Gorsulowski Daniel.Gorsulowski@esd.eu
Jean-Christophe: This patch requires an up-to-date mach-types.h, please sync it.
diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c new file mode 100644 index 0000000..557a51c --- /dev/null +++ b/board/esd/meesc/meesc.c @@ -0,0 +1,211 @@ +/*
- (C) Copyright 2007-2008
- Stelian Pop stelian.pop@leadtechdesign.com
- Lead Tech Design <www.leadtechdesign.com>
- (C) Copyright 2009
- Daniel Gorsulowski daniel.gorsulowski@esd.eu
- esd electronic system design gmbh <www.esd.eu>
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <common.h> +#include <asm/arch/at91sam9263.h> +#include <asm/arch/at91sam9263_matrix.h>
please use <asm/arch/at91sam9_matrix.h>
+#include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/clk.h> +#include <asm/arch/gpio.h> +#include <asm/arch/hardware.h> +#include <asm/arch/io.h> +#include <netdev.h>
+DECLARE_GLOBAL_DATA_PTR;
+/*
- Miscelaneous platform dependent initialisations
- */
it will be better to only read it only and store it in a static
+int get_hw_rev(void) +{
- int rev = at91_get_gpio_value(AT91_PIN_PB19);
please add an empty line
- rev |= at91_get_gpio_value(AT91_PIN_PB20) << 1;
- rev |= at91_get_gpio_value(AT91_PIN_PB21) << 2;
- rev |= at91_get_gpio_value(AT91_PIN_PB22) << 3;
- if (rev == 15)
rev = 0;- return rev;
+}
<snip>
+int checkboard(void) +{
- char str[32];
- char buf[32];
- puts("Board: esd CAN-EtherCAT Gateway");
- if (getenv_r("serial#", str, sizeof(str)) > 0) {
puts(", serial# ");puts(str);- }
- printf("\nHardware-revision: 1.%d\n", get_hw_rev());
- printf("Crystal frequency:\t%8s MHz\n",
strmhz(buf, get_main_clk_rate()));- printf("CPU clock:\t\t%8s MHz\n",
strmhz(buf, get_cpu_clk_rate()));+#ifdef CONFIG_SHOW_VERBOSE_CLOCKINFO
- printf("Master clock:\t\t%8s MHz\n",
strmhz(buf, get_mck_clk_rate()));- printf("PLL A clock:\t\t%8s MHz\n",
strmhz(buf, get_plla_clk_rate()));- printf("PLL B Reg.:\t\t0x%08X\n",
at91_sys_read(AT91_CKGR_PLLBR));- printf("PLL B clock:\t\t%8s MHz\n",
strmhz(buf, get_pllb_clk_rate()));+#endif
- printf("Mach-type: %lu\n", gd->bd->bi_arch_number);
- return 0;
+}
please use cpu_info when it's possible to avoid copy & paste
+int board_init(void) +{
- /* Enable Ctrlc */
- console_init_f();
no need
- /* Peripheral Clock Enable Register */
- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOA |
1 << AT91SAM9263_ID_PIOB |1 << AT91SAM9263_ID_PIOCDE |1 << AT91SAM9263_ID_CAN);- /* arch number of MEESC-Board */
- gd->bd->bi_arch_number = MACH_TYPE_MEESC;
- /* adress of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
- at91_serial_hw_init();
+#ifdef CONFIG_CMD_NAND
- meesc_nand_hw_init();
+#endif
- meesc_ethercat_hw_init();
+#ifdef CONFIG_HAS_DATAFLASH
- at91_spi0_hw_init(1 << 0);
+#endif +#ifdef CONFIG_MACB
- meesc_macb_hw_init();
+#endif
- at91_set_A_periph(AT91_PIN_PA13, 0); /* CAN_TX */
- at91_set_A_periph(AT91_PIN_PA14, 1); /* CAN_RX */
please add a at91_can_hw_init function
- return 0;
+}
<snio>
+#ifndef __CONFIG_H +#define __CONFIG_H
+/* Common stuff */ +#define AT91_CPU_NAME "AT91SAM9263"
please remove
+#define CONFIG_SYS_HZ 1000 /* decrementer freq */ +#define CONFIG_MEESC 1 /* Board is esd MEESC */ +#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ +#define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */ +#define CONFIG_ENV_OVERWRITE 1 /* necessary on prototypes */ +#define CONFIG_DISPLAY_BOARDINFO 1 +#define CONFIG_PREBOOT /* enable preboot variable */
why which value?
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 +#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */
Best Regards, J.
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 12:21 Tue 23 Jun , Daniel Gorsulowski wrote:
This patch adds support for esd gmbh MEESC board. The MEESC is based on an Atmel AT91SAM9263 SoC.
Signed-off-by: Daniel Gorsulowski Daniel.Gorsulowski@esd.eu
Jean-Christophe: This patch requires an up-to-date mach-types.h, please sync it.
diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c new file mode 100644 index 0000000..557a51c --- /dev/null +++ b/board/esd/meesc/meesc.c @@ -0,0 +1,211 @@ +/*
- (C) Copyright 2007-2008
- Stelian Pop stelian.pop@leadtechdesign.com
- Lead Tech Design <www.leadtechdesign.com>
- (C) Copyright 2009
- Daniel Gorsulowski daniel.gorsulowski@esd.eu
- esd electronic system design gmbh <www.esd.eu>
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <common.h> +#include <asm/arch/at91sam9263.h> +#include <asm/arch/at91sam9263_matrix.h>
please use <asm/arch/at91sam9_matrix.h>
ok
+#include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/clk.h> +#include <asm/arch/gpio.h> +#include <asm/arch/hardware.h> +#include <asm/arch/io.h> +#include <netdev.h>
+DECLARE_GLOBAL_DATA_PTR;
+/*
- Miscelaneous platform dependent initialisations
- */
it will be better to only read it only and store it in a static
I only use it once, but if you really mean, I'll change it.
+int get_hw_rev(void) +{
- int rev = at91_get_gpio_value(AT91_PIN_PB19);
please add an empty line
ok
- rev |= at91_get_gpio_value(AT91_PIN_PB20) << 1;
- rev |= at91_get_gpio_value(AT91_PIN_PB21) << 2;
- rev |= at91_get_gpio_value(AT91_PIN_PB22) << 3;
- if (rev == 15)
rev = 0;- return rev;
+}
<snip> > + > +int checkboard(void) > +{ > + char str[32]; > + char buf[32]; > + > + puts("Board: esd CAN-EtherCAT Gateway"); > + if (getenv_r("serial#", str, sizeof(str)) > 0) { > + puts(", serial# "); > + puts(str); > + } > + printf("\nHardware-revision: 1.%d\n", get_hw_rev()); > + printf("Crystal frequency:\t%8s MHz\n", > + strmhz(buf, get_main_clk_rate())); > + printf("CPU clock:\t\t%8s MHz\n", > + strmhz(buf, get_cpu_clk_rate())); > +#ifdef CONFIG_SHOW_VERBOSE_CLOCKINFO > + printf("Master clock:\t\t%8s MHz\n", > + strmhz(buf, get_mck_clk_rate())); > + printf("PLL A clock:\t\t%8s MHz\n", > + strmhz(buf, get_plla_clk_rate())); > + printf("PLL B Reg.:\t\t0x%08X\n", > + at91_sys_read(AT91_CKGR_PLLBR)); > + printf("PLL B clock:\t\t%8s MHz\n", > + strmhz(buf, get_pllb_clk_rate())); > +#endif > + printf("Mach-type: %lu\n", gd->bd->bi_arch_number); > + return 0; > +} please use cpu_info when it's possible to avoid copy & paste
Coud you explain a few more? I can't find a function called 'cpu_info'.
+int board_init(void) +{
- /* Enable Ctrlc */
- console_init_f();
no need
Ok, I'll remove it
- /* Peripheral Clock Enable Register */
- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOA |
1 << AT91SAM9263_ID_PIOB |1 << AT91SAM9263_ID_PIOCDE |1 << AT91SAM9263_ID_CAN);- /* arch number of MEESC-Board */
- gd->bd->bi_arch_number = MACH_TYPE_MEESC;
- /* adress of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
- at91_serial_hw_init();
+#ifdef CONFIG_CMD_NAND
- meesc_nand_hw_init();
+#endif
- meesc_ethercat_hw_init();
+#ifdef CONFIG_HAS_DATAFLASH
- at91_spi0_hw_init(1 << 0);
+#endif +#ifdef CONFIG_MACB
- meesc_macb_hw_init();
+#endif
- at91_set_A_periph(AT91_PIN_PA13, 0); /* CAN_TX */
- at91_set_A_periph(AT91_PIN_PA14, 1); /* CAN_RX */
please add a at91_can_hw_init function
Ok, I'll do this by a separate patch
- return 0;
+}
<snio> > + > +#ifndef __CONFIG_H > +#define __CONFIG_H > + > +/* Common stuff */ > +#define AT91_CPU_NAME "AT91SAM9263" please remove
ok
+#define CONFIG_SYS_HZ 1000 /* decrementer freq */ +#define CONFIG_MEESC 1 /* Board is esd MEESC */ +#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ +#define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */ +#define CONFIG_ENV_OVERWRITE 1 /* necessary on prototypes */ +#define CONFIG_DISPLAY_BOARDINFO 1 +#define CONFIG_PREBOOT /* enable preboot variable */
why which value?
This is a custom value, which is set, during putting the board into operation. So it is unalterable to define CONFIG_PREBOOT
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 +#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */
Best Regards, J. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Best regards, Daniel Gorsulowski
Daniel Gorsulowski wrote:
Jean-Christophe PLAGNIOL-VILLARD wrote:
<snip> > + > +int checkboard(void) > +{ > + char str[32]; > + char buf[32]; > + > + puts("Board: esd CAN-EtherCAT Gateway"); > + if (getenv_r("serial#", str, sizeof(str)) > 0) { > + puts(", serial# "); > + puts(str); > + } > + printf("\nHardware-revision: 1.%d\n", get_hw_rev()); > + printf("Crystal frequency:\t%8s MHz\n", > + strmhz(buf, get_main_clk_rate())); > + printf("CPU clock:\t\t%8s MHz\n", > + strmhz(buf, get_cpu_clk_rate())); > +#ifdef CONFIG_SHOW_VERBOSE_CLOCKINFO > + printf("Master clock:\t\t%8s MHz\n", > + strmhz(buf, get_mck_clk_rate())); > + printf("PLL A clock:\t\t%8s MHz\n", > + strmhz(buf, get_plla_clk_rate())); > + printf("PLL B Reg.:\t\t0x%08X\n", > + at91_sys_read(AT91_CKGR_PLLBR)); > + printf("PLL B clock:\t\t%8s MHz\n", > + strmhz(buf, get_pllb_clk_rate())); > +#endif > + printf("Mach-type: %lu\n", gd->bd->bi_arch_number); > + return 0; > +} please use cpu_info when it's possible to avoid copy & paste
Coud you explain a few more? I can't find a function called 'cpu_info'.
Found config option CONFIG_DISPLAY_CPUINFO and enabled it, thank you for the hint.
Best regards, Daniel Gorsulowski
This patch adds support for esd gmbh MEESC board. The MEESC is based on an Atmel AT91SAM9263 SoC.
Signed-off-by: Daniel Gorsulowski Daniel.Gorsulowski@esd.eu --- MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + board/esd/meesc/Makefile | 55 ++++++++++++ board/esd/meesc/config.mk | 1 + board/esd/meesc/meesc.c | 197 +++++++++++++++++++++++++++++++++++++++++++ board/esd/meesc/partition.c | 37 ++++++++ include/configs/meesc.h | 188 +++++++++++++++++++++++++++++++++++++++++ 8 files changed, 486 insertions(+), 0 deletions(-) create mode 100644 board/esd/meesc/Makefile create mode 100644 board/esd/meesc/config.mk create mode 100644 board/esd/meesc/meesc.c create mode 100644 board/esd/meesc/partition.c create mode 100644 include/configs/meesc.h
diff --git a/MAINTAINERS b/MAINTAINERS index f36a1cc..c9066a9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -530,6 +530,10 @@ Peter Figuli peposh@etc.sk
wepep250 xscale
+Daniel Gorsulowski daniel.gorsulowski@esd.eu + + meesc ARM926EJS (AT91SAM9263 SoC) + Marius Gröger mag@sysgo.de
impa7 ARM720T (EP7211) diff --git a/MAKEALL b/MAKEALL index 063ebfc..47eb5af 100755 --- a/MAKEALL +++ b/MAKEALL @@ -583,6 +583,7 @@ LIST_at91=" \ cmc_pu2 \ csb637 \ kb9202 \ + meesc \ mp2usb \ m501sk \ pm9261 \ diff --git a/Makefile b/Makefile index 0d92d67..282b9fd 100644 --- a/Makefile +++ b/Makefile @@ -2769,6 +2769,9 @@ at91sam9rlek_config : unconfig fi; @$(MKCONFIG) -a at91sam9rlek arm arm926ejs at91sam9rlek atmel at91
+meesc_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs meesc esd at91 + pm9261_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs pm9261 ronetix at91
diff --git a/board/esd/meesc/Makefile b/board/esd/meesc/Makefile new file mode 100644 index 0000000..2dd6b25 --- /dev/null +++ b/board/esd/meesc/Makefile @@ -0,0 +1,55 @@ +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2008 +# Stelian Pop stelian.pop@leadtechdesign.com +# Lead Tech Design <www.leadtechdesign.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y += $(BOARD).o +COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/esd/meesc/config.mk b/board/esd/meesc/config.mk new file mode 100644 index 0000000..9ce161e --- /dev/null +++ b/board/esd/meesc/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x21f00000 diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c new file mode 100644 index 0000000..cb567ac --- /dev/null +++ b/board/esd/meesc/meesc.c @@ -0,0 +1,197 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop stelian.pop@leadtechdesign.com + * Lead Tech Design <www.leadtechdesign.com> + * + * (C) Copyright 2009 + * Daniel Gorsulowski daniel.gorsulowski@esd.eu + * esd electronic system design gmbh <www.esd.eu> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91sam9263.h> +#include <asm/arch/at91sam9_matrix.h> +#include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/clk.h> +#include <asm/arch/gpio.h> +#include <asm/arch/hardware.h> +#include <asm/arch/io.h> +#include <netdev.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Miscelaneous platform dependent initialisations + */ + +static int hw_rev; /* hardware revision */ + +int get_hw_rev(void) +{ + int rev = at91_get_gpio_value(AT91_PIN_PB19); + + rev |= at91_get_gpio_value(AT91_PIN_PB20) << 1; + rev |= at91_get_gpio_value(AT91_PIN_PB21) << 2; + rev |= at91_get_gpio_value(AT91_PIN_PB22) << 3; + + if (rev == 15) + rev = 0; + + return rev; +} + +#ifdef CONFIG_CMD_NAND +static void meesc_nand_hw_init(void) +{ + unsigned long csa; + + /* Enable CS3 */ + csa = at91_sys_read(AT91_MATRIX_EBI0CSA); + at91_sys_write(AT91_MATRIX_EBI0CSA, + csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); + + /* Configure SMC CS3 for NAND/SmartMedia */ + at91_sys_write(AT91_SMC_SETUP(3), + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC_PULSE(3), + AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | + AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); + at91_sys_write(AT91_SMC_CYCLE(3), + AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); + at91_sys_write(AT91_SMC_MODE(3), + AT91_SMC_READMODE | AT91_SMC_WRITEMODE | + AT91_SMC_EXNWMODE_DISABLE | +#ifdef CONFIG_SYS_NAND_DBW_16 + AT91_SMC_DBW_16 | +#else /* CONFIG_SYS_NAND_DBW_8 */ + AT91_SMC_DBW_8 | +#endif + AT91_SMC_TDF_(2)); + + /* Configure RDY/BSY */ + at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); + + /* Enable NandFlash */ + at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); +} +#endif /* CONFIG_CMD_NAND */ + +#ifdef CONFIG_MACB +static void meesc_macb_hw_init(void) +{ + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC); + at91_macb_hw_init(); +} +#endif + +/* + * Static memory controller initialization to enable Beckhoff ET1100 EtherCAT + * controller debugging + * The ET1100 is located at physical address 0x70000000 + * Its process memory is located at physical address 0x70001000 + */ +static void meesc_ethercat_hw_init(void) +{ + /* Configure SMC EBI1_CS0 for EtherCAT */ + at91_sys_write(AT91_SMC1_SETUP(0), + AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC1_PULSE(0), + AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(9) | + AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(9)); + at91_sys_write(AT91_SMC1_CYCLE(0), + AT91_SMC_NWECYCLE_(10) | AT91_SMC_NRDCYCLE_(5)); + /* Configure behavior at external wait signal, byte-select mode, 16 bit + data bus width, none data float wait states and TDF optimization */ + at91_sys_write(AT91_SMC1_MODE(0), + AT91_SMC_READMODE | AT91_SMC_EXNWMODE_READY | + AT91_SMC_BAT_SELECT | AT91_SMC_DBW_16 | AT91_SMC_TDF_(0) | + AT91_SMC_TDFMODE); + + /* Configure RDY/BSY */ + at91_set_B_periph(AT91_PIN_PE20, 0); /* EBI1_NWAIT */ +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = get_ram_size((long *) PHYS_SDRAM, (1 << 27)); + return 0; +} + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_MACB + rc = macb_eth_initialize(0, (void *)AT91SAM9263_BASE_EMAC, 0x00); +#endif + return rc; +} + +int checkboard(void) +{ + char str[32]; + hw_rev = get_hw_rev(); + + puts("Board: esd CAN-EtherCAT Gateway"); + if (getenv_r("serial#", str, sizeof(str)) > 0) { + puts(", serial# "); + puts(str); + } + printf("\nHardware-revision: 1.%d\n", hw_rev); + printf("Mach-type: %lu\n", gd->bd->bi_arch_number); + return 0; +} + +int board_init(void) +{ + /* Peripheral Clock Enable Register */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOA | + 1 << AT91SAM9263_ID_PIOB | + 1 << AT91SAM9263_ID_PIOCDE); + + /* arch number of MEESC-Board */ + gd->bd->bi_arch_number = MACH_TYPE_MEESC; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + at91_serial_hw_init(); +#ifdef CONFIG_CMD_NAND + meesc_nand_hw_init(); +#endif + meesc_ethercat_hw_init(); +#ifdef CONFIG_HAS_DATAFLASH + at91_spi0_hw_init(1 << 0); +#endif +#ifdef CONFIG_MACB + meesc_macb_hw_init(); +#endif +#ifdef CONFIG_CAN + at91_can_hw_init(); +#endif + return 0; +} diff --git a/board/esd/meesc/partition.c b/board/esd/meesc/partition.c new file mode 100644 index 0000000..df0e1db --- /dev/null +++ b/board/esd/meesc/partition.c @@ -0,0 +1,37 @@ +/* + * (C) Copyright 2008 + * Ulf Samuelsson ulf@atmel.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ +#include <common.h> +#include <config.h> +#include <asm/hardware.h> +#include <dataflash.h> + +AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; + +struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { + {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ +}; + +/* define the area offsets */ +dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { + {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, + {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, + {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, +}; diff --git a/include/configs/meesc.h b/include/configs/meesc.h new file mode 100644 index 0000000..0708372 --- /dev/null +++ b/include/configs/meesc.h @@ -0,0 +1,188 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop stelian.pop@leadtechdesign.com + * Lead Tech Design <www.leadtechdesign.com> + * + * (C) Copyright 2009 + * Daniel Gorsulowski daniel.gorsulowski@esd.eu + * esd electronic system design gmbh <www.esd.eu> + * + * Configuation settings for the esd MEESC board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* Common stuff */ +#define CONFIG_SYS_HZ 1000 /* decrementer freq */ +#define CONFIG_MEESC 1 /* Board is esd MEESC */ +#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ +#define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */ +#define CONFIG_ENV_OVERWRITE 1 /* necessary on prototypes */ +#define CONFIG_DISPLAY_BOARDINFO 1 +#define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info and speed */ +#define CONFIG_PREBOOT /* enable preboot variable */ +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 +#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */ + +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_RELOCATE_UBOOT + +#define CONFIG_ARCH_CPU_INIT + +/* + * Hardware drivers + */ + +/* Console output */ +#define CONFIG_ATMEL_USART 1 +#undef CONFIG_USART0 +#undef CONFIG_USART1 +#undef CONFIG_USART2 +#define CONFIG_USART3 1 /* USART 3 is DBGU */ + +#define CONFIG_BOOTDELAY 3 +#define CONFIG_ZERO_BOOTDELAY_CHECK 1 + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE 1 +#define CONFIG_BOOTP_BOOTPATH 1 +#define CONFIG_BOOTP_GATEWAY 1 +#define CONFIG_BOOTP_HOSTNAME 1 + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_USB + +#define CONFIG_CMD_PING 1 +#define CONFIG_CMD_DHCP 1 +#define CONFIG_CMD_NAND 1 + +/* LED */ +#define CONFIG_AT91_LED 1 + +/* SDRAM */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM 0x20000000 + +/* DataFlash */ +#define CONFIG_ATMEL_DATAFLASH_SPI +#define CONFIG_HAS_DATAFLASH 1 +#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) +#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 +#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ +#define AT91_SPI_CLK 15000000 +#define DATAFLASH_TCSS (0x1a << 16) +#define DATAFLASH_TCHS (0x1 << 24) + +/* NOR flash is not populated, disable it */ +#define CONFIG_SYS_NO_FLASH 1 + +/* NAND flash */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_ATMEL +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_DBW_8 1 +/* our ALE is AD21 */ +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) +/* our CLE is AD22 */ +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22 +#endif + +/* Ethernet */ +#define CONFIG_MACB 1 +#define CONFIG_RMII 1 +#define CONFIG_NET_MULTI 1 +#define CONFIG_NET_RETRY_COUNT 20 +#undef CONFIG_RESET_PHY_R + +#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ + +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_END 0x21e00000 + +#define CONFIG_SYS_USE_DATAFLASH 1 +#undef CONFIG_SYS_USE_NANDFLASH + +#ifdef CONFIG_SYS_USE_DATAFLASH + +/* CAN */ +#define CONFIG_CAN 1 + +/* bootstrap + u-boot + env + linux in dataflash on CS0 */ +#define CONFIG_ENV_IS_IN_DATAFLASH 1 +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ + 0x8400) +#define CONFIG_ENV_OFFSET 0x4200 +#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ + CONFIG_ENV_OFFSET) +#define CONFIG_ENV_SIZE 0x4200 +#define CONFIG_BOOTCOMMAND "cp.b C0042000 22000000 210000; bootm" + +#else /* CONFIG_SYS_USE_NANDFLASH */ + +/* bootstrap + u-boot + env + linux in nandflash */ +#define CONFIG_ENV_IS_IN_NAND 1 +#define CONFIG_ENV_OFFSET 0x60000 +#define CONFIG_ENV_OFFSET_REDUND 0x80000 +#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ +#define CONFIG_BOOTCOMMAND "nand read 22000000 A0000 200000; bootm" + +#endif + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } + +#define CONFIG_SYS_PROMPT "=> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_LONGHELP 1 +#define CONFIG_CMDLINE_EDITING 1 + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN 0x2D000 +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ + +#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ + +#ifdef CONFIG_USE_IRQ +#error CONFIG_USE_IRQ not supported +#endif + +#endif
On 13:24 Mon 29 Jun , Daniel Gorsulowski wrote:
This patch adds support for esd gmbh MEESC board. The MEESC is based on an Atmel AT91SAM9263 SoC.
Signed-off-by: Daniel Gorsulowski Daniel.Gorsulowski@esd.eu
MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + board/esd/meesc/Makefile | 55 ++++++++++++ board/esd/meesc/config.mk | 1 + board/esd/meesc/meesc.c | 197 +++++++++++++++++++++++++++++++++++++++++++ board/esd/meesc/partition.c | 37 ++++++++ include/configs/meesc.h | 188 +++++++++++++++++++++++++++++++++++++++++ 8 files changed, 486 insertions(+), 0 deletions(-) create mode 100644 board/esd/meesc/Makefile create mode 100644 board/esd/meesc/config.mk create mode 100644 board/esd/meesc/meesc.c create mode 100644 board/esd/meesc/partition.c create mode 100644 include/configs/meesc.h
diff --git a/MAINTAINERS b/MAINTAINERS index f36a1cc..c9066a9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -530,6 +530,10 @@ Peter Figuli peposh@etc.sk
wepep250 xscale
+Daniel Gorsulowski daniel.gorsulowski@esd.eu
- meesc ARM926EJS (AT91SAM9263 SoC)
Marius Gr�ger mag@sysgo.de
impa7 ARM720T (EP7211) diff --git a/MAKEALL b/MAKEALL index 063ebfc..47eb5af 100755 --- a/MAKEALL +++ b/MAKEALL @@ -583,6 +583,7 @@ LIST_at91=" \ cmc_pu2 \ csb637 \ kb9202 \
- meesc \ mp2usb \ m501sk \ pm9261 \
diff --git a/Makefile b/Makefile index 0d92d67..282b9fd 100644 --- a/Makefile +++ b/Makefile @@ -2769,6 +2769,9 @@ at91sam9rlek_config : unconfig fi; @$(MKCONFIG) -a at91sam9rlek arm arm926ejs at91sam9rlek atmel at91
+meesc_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs meesc esd at91
pm9261_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs pm9261 ronetix at91
diff --git a/board/esd/meesc/Makefile b/board/esd/meesc/Makefile new file mode 100644 index 0000000..2dd6b25 --- /dev/null +++ b/board/esd/meesc/Makefile @@ -0,0 +1,55 @@ +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2008 +# Stelian Pop stelian.pop@leadtechdesign.com +# Lead Tech Design <www.leadtechdesign.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +#
+include $(TOPDIR)/config.mk
+LIB = $(obj)lib$(BOARD).a
+COBJS-y += $(BOARD).o +COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o
+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS))
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+clean:
- rm -f $(SOBJS) $(OBJS)
+distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
+#########################################################################
+# defines $(obj).depend target +include $(SRCTREE)/rules.mk
+sinclude $(obj).depend
+######################################################################### diff --git a/board/esd/meesc/config.mk b/board/esd/meesc/config.mk new file mode 100644 index 0000000..9ce161e --- /dev/null +++ b/board/esd/meesc/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x21f00000 diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c new file mode 100644 index 0000000..cb567ac --- /dev/null +++ b/board/esd/meesc/meesc.c @@ -0,0 +1,197 @@ +/*
- (C) Copyright 2007-2008
- Stelian Pop stelian.pop@leadtechdesign.com
- Lead Tech Design <www.leadtechdesign.com>
- (C) Copyright 2009
- Daniel Gorsulowski daniel.gorsulowski@esd.eu
- esd electronic system design gmbh <www.esd.eu>
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <common.h> +#include <asm/arch/at91sam9263.h> +#include <asm/arch/at91sam9_matrix.h> +#include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/clk.h> +#include <asm/arch/gpio.h> +#include <asm/arch/hardware.h> +#include <asm/arch/io.h> +#include <netdev.h>
+DECLARE_GLOBAL_DATA_PTR;
+/*
- Miscelaneous platform dependent initialisations
- */
you miss my point here as if you can use the get_hw_rev multiple time then please do something like thie
static int hw_rev = -1; /* hardware revision */
int get_hw_rev(void) { if (hw_rev >= 0) return hw_rev;
hw_rev = at91_get_gpio_value(AT91_PIN_PB19);
hw_rev |= at91_get_gpio_value(AT91_PIN_PB20) << 1; hw_rev |= at91_get_gpio_value(AT91_PIN_PB21) << 2; hw_rev |= at91_get_gpio_value(AT91_PIN_PB22) << 3;
if (hw_rev == 15) hw_rev = 0;
return hw_rev; }
<snip>
+#define CONFIG_MACB 1 +#define CONFIG_RMII 1 +#define CONFIG_NET_MULTI 1 +#define CONFIG_NET_RETRY_COUNT 20 +#undef CONFIG_RESET_PHY_R
+#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
+#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_END 0x21e00000
+#define CONFIG_SYS_USE_DATAFLASH 1 +#undef CONFIG_SYS_USE_NANDFLASH
+#ifdef CONFIG_SYS_USE_DATAFLASH
+/* CAN */ +#define CONFIG_CAN 1
CONFIG_AT91_CAN will be better as the code is at91 specific
Best Regards, J.
To enable CAN init, CONFIG_CAN has to be defined in the board config file and at91_can_hw_init() has to be called in the board specific code.
CAN is available on AT91SAM9263 and AT91CAP9 SoC.
Signed-off-by: Daniel Gorsulowski Daniel.Gorsulowski@esd.eu --- cpu/arm926ejs/at91/at91cap9_devices.c | 15 +++++++++++++++ cpu/arm926ejs/at91/at91sam9263_devices.c | 15 +++++++++++++++ include/asm-arm/arch-at91/at91_common.h | 1 + 3 files changed, 31 insertions(+), 0 deletions(-)
diff --git a/cpu/arm926ejs/at91/at91cap9_devices.c b/cpu/arm926ejs/at91/at91cap9_devices.c index c0024ac..39e405f 100644 --- a/cpu/arm926ejs/at91/at91cap9_devices.c +++ b/cpu/arm926ejs/at91/at91cap9_devices.c @@ -3,6 +3,10 @@ * Stelian Pop stelian.pop@leadtechdesign.com * Lead Tech Design <www.leadtechdesign.com> * + * (C) Copyright 2009 + * Daniel Gorsulowski daniel.gorsulowski@esd.eu + * esd electronic system design gmbh <www.esd.eu> + * * See file CREDITS for list of people who contributed to this * project. * @@ -174,3 +178,14 @@ void at91_macb_hw_init(void) #endif } #endif + +#ifdef CONFIG_AT91_CAN +void at91_can_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PA12, 0); /* CAN_TX */ + at91_set_A_periph(AT91_PIN_PA13, 1); /* CAN_RX */ + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_CAN); +} +#endif diff --git a/cpu/arm926ejs/at91/at91sam9263_devices.c b/cpu/arm926ejs/at91/at91sam9263_devices.c index 0f2613e..f72efdf 100644 --- a/cpu/arm926ejs/at91/at91sam9263_devices.c +++ b/cpu/arm926ejs/at91/at91sam9263_devices.c @@ -3,6 +3,10 @@ * Stelian Pop stelian.pop@leadtechdesign.com * Lead Tech Design <www.leadtechdesign.com> * + * (C) Copyright 2009 + * Daniel Gorsulowski daniel.gorsulowski@esd.eu + * esd electronic system design gmbh <www.esd.eu> + * * See file CREDITS for list of people who contributed to this * project. * @@ -182,3 +186,14 @@ void at91_uhp_hw_init(void) at91_set_gpio_output(AT91_PIN_PA24, 0); } #endif + +#ifdef CONFIG_AT91_CAN +void at91_can_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PA13, 0); /* CAN_TX */ + at91_set_A_periph(AT91_PIN_PA14, 1); /* CAN_RX */ + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_CAN); +} +#endif diff --git a/include/asm-arm/arch-at91/at91_common.h b/include/asm-arm/arch-at91/at91_common.h index 9c4e019..01840ee 100644 --- a/include/asm-arm/arch-at91/at91_common.h +++ b/include/asm-arm/arch-at91/at91_common.h @@ -25,6 +25,7 @@ #ifndef AT91_COMMON_H #define AT91_COMMON_H
+void at91_can_hw_init(void); void at91_macb_hw_init(void); void at91_serial_hw_init(void); void at91_serial0_hw_init(void);
This patch adds support for esd gmbh MEESC board. The MEESC is based on an Atmel AT91SAM9263 SoC.
Signed-off-by: Daniel Gorsulowski Daniel.Gorsulowski@esd.eu --- MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + board/esd/meesc/Makefile | 55 ++++++++++++ board/esd/meesc/config.mk | 1 + board/esd/meesc/meesc.c | 198 +++++++++++++++++++++++++++++++++++++++++++ board/esd/meesc/partition.c | 37 ++++++++ include/configs/meesc.h | 188 ++++++++++++++++++++++++++++++++++++++++ 8 files changed, 487 insertions(+), 0 deletions(-) create mode 100644 board/esd/meesc/Makefile create mode 100644 board/esd/meesc/config.mk create mode 100644 board/esd/meesc/meesc.c create mode 100644 board/esd/meesc/partition.c create mode 100644 include/configs/meesc.h
diff --git a/MAINTAINERS b/MAINTAINERS index f36a1cc..c9066a9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -530,6 +530,10 @@ Peter Figuli peposh@etc.sk
wepep250 xscale
+Daniel Gorsulowski daniel.gorsulowski@esd.eu + + meesc ARM926EJS (AT91SAM9263 SoC) + Marius Gröger mag@sysgo.de
impa7 ARM720T (EP7211) diff --git a/MAKEALL b/MAKEALL index 063ebfc..47eb5af 100755 --- a/MAKEALL +++ b/MAKEALL @@ -583,6 +583,7 @@ LIST_at91=" \ cmc_pu2 \ csb637 \ kb9202 \ + meesc \ mp2usb \ m501sk \ pm9261 \ diff --git a/Makefile b/Makefile index 0d92d67..282b9fd 100644 --- a/Makefile +++ b/Makefile @@ -2769,6 +2769,9 @@ at91sam9rlek_config : unconfig fi; @$(MKCONFIG) -a at91sam9rlek arm arm926ejs at91sam9rlek atmel at91
+meesc_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs meesc esd at91 + pm9261_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs pm9261 ronetix at91
diff --git a/board/esd/meesc/Makefile b/board/esd/meesc/Makefile new file mode 100644 index 0000000..2dd6b25 --- /dev/null +++ b/board/esd/meesc/Makefile @@ -0,0 +1,55 @@ +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2008 +# Stelian Pop stelian.pop@leadtechdesign.com +# Lead Tech Design <www.leadtechdesign.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y += $(BOARD).o +COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/esd/meesc/config.mk b/board/esd/meesc/config.mk new file mode 100644 index 0000000..9ce161e --- /dev/null +++ b/board/esd/meesc/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x21f00000 diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c new file mode 100644 index 0000000..636d0ed --- /dev/null +++ b/board/esd/meesc/meesc.c @@ -0,0 +1,198 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop stelian.pop@leadtechdesign.com + * Lead Tech Design <www.leadtechdesign.com> + * + * (C) Copyright 2009 + * Daniel Gorsulowski daniel.gorsulowski@esd.eu + * esd electronic system design gmbh <www.esd.eu> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91sam9263.h> +#include <asm/arch/at91sam9_matrix.h> +#include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/clk.h> +#include <asm/arch/gpio.h> +#include <asm/arch/hardware.h> +#include <asm/arch/io.h> +#include <netdev.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Miscelaneous platform dependent initialisations + */ + +static int hw_rev = -1; /* hardware revision */ + +int get_hw_rev(void) +{ + if (hw_rev >= 0) + return hw_rev; + + hw_rev = at91_get_gpio_value(AT91_PIN_PB19); + hw_rev |= at91_get_gpio_value(AT91_PIN_PB20) << 1; + hw_rev |= at91_get_gpio_value(AT91_PIN_PB21) << 2; + hw_rev |= at91_get_gpio_value(AT91_PIN_PB22) << 3; + + if (hw_rev == 15) + hw_rev = 0; + + return hw_rev; +} + +#ifdef CONFIG_CMD_NAND +static void meesc_nand_hw_init(void) +{ + unsigned long csa; + + /* Enable CS3 */ + csa = at91_sys_read(AT91_MATRIX_EBI0CSA); + at91_sys_write(AT91_MATRIX_EBI0CSA, + csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); + + /* Configure SMC CS3 for NAND/SmartMedia */ + at91_sys_write(AT91_SMC_SETUP(3), + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC_PULSE(3), + AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | + AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); + at91_sys_write(AT91_SMC_CYCLE(3), + AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); + at91_sys_write(AT91_SMC_MODE(3), + AT91_SMC_READMODE | AT91_SMC_WRITEMODE | + AT91_SMC_EXNWMODE_DISABLE | +#ifdef CONFIG_SYS_NAND_DBW_16 + AT91_SMC_DBW_16 | +#else /* CONFIG_SYS_NAND_DBW_8 */ + AT91_SMC_DBW_8 | +#endif + AT91_SMC_TDF_(2)); + + /* Configure RDY/BSY */ + at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); + + /* Enable NandFlash */ + at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); +} +#endif /* CONFIG_CMD_NAND */ + +#ifdef CONFIG_MACB +static void meesc_macb_hw_init(void) +{ + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC); + at91_macb_hw_init(); +} +#endif + +/* + * Static memory controller initialization to enable Beckhoff ET1100 EtherCAT + * controller debugging + * The ET1100 is located at physical address 0x70000000 + * Its process memory is located at physical address 0x70001000 + */ +static void meesc_ethercat_hw_init(void) +{ + /* Configure SMC EBI1_CS0 for EtherCAT */ + at91_sys_write(AT91_SMC1_SETUP(0), + AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC1_PULSE(0), + AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(9) | + AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(9)); + at91_sys_write(AT91_SMC1_CYCLE(0), + AT91_SMC_NWECYCLE_(10) | AT91_SMC_NRDCYCLE_(5)); + /* Configure behavior at external wait signal, byte-select mode, 16 bit + data bus width, none data float wait states and TDF optimization */ + at91_sys_write(AT91_SMC1_MODE(0), + AT91_SMC_READMODE | AT91_SMC_EXNWMODE_READY | + AT91_SMC_BAT_SELECT | AT91_SMC_DBW_16 | AT91_SMC_TDF_(0) | + AT91_SMC_TDFMODE); + + /* Configure RDY/BSY */ + at91_set_B_periph(AT91_PIN_PE20, 0); /* EBI1_NWAIT */ +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = get_ram_size((long *) PHYS_SDRAM, (1 << 27)); + return 0; +} + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_MACB + rc = macb_eth_initialize(0, (void *)AT91SAM9263_BASE_EMAC, 0x00); +#endif + return rc; +} + +int checkboard(void) +{ + char str[32]; + + puts("Board: esd CAN-EtherCAT Gateway"); + if (getenv_r("serial#", str, sizeof(str)) > 0) { + puts(", serial# "); + puts(str); + } + printf("\nHardware-revision: 1.%d\n", get_hw_rev()); + printf("Mach-type: %lu\n", gd->bd->bi_arch_number); + return 0; +} + +int board_init(void) +{ + /* Peripheral Clock Enable Register */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOA | + 1 << AT91SAM9263_ID_PIOB | + 1 << AT91SAM9263_ID_PIOCDE); + + /* arch number of MEESC-Board */ + gd->bd->bi_arch_number = MACH_TYPE_MEESC; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + at91_serial_hw_init(); +#ifdef CONFIG_CMD_NAND + meesc_nand_hw_init(); +#endif + meesc_ethercat_hw_init(); +#ifdef CONFIG_HAS_DATAFLASH + at91_spi0_hw_init(1 << 0); +#endif +#ifdef CONFIG_MACB + meesc_macb_hw_init(); +#endif +#ifdef CONFIG_AT91_CAN + at91_can_hw_init(); +#endif + return 0; +} diff --git a/board/esd/meesc/partition.c b/board/esd/meesc/partition.c new file mode 100644 index 0000000..df0e1db --- /dev/null +++ b/board/esd/meesc/partition.c @@ -0,0 +1,37 @@ +/* + * (C) Copyright 2008 + * Ulf Samuelsson ulf@atmel.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ +#include <common.h> +#include <config.h> +#include <asm/hardware.h> +#include <dataflash.h> + +AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; + +struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { + {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ +}; + +/* define the area offsets */ +dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { + {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, + {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, + {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, +}; diff --git a/include/configs/meesc.h b/include/configs/meesc.h new file mode 100644 index 0000000..28c4de0 --- /dev/null +++ b/include/configs/meesc.h @@ -0,0 +1,188 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop stelian.pop@leadtechdesign.com + * Lead Tech Design <www.leadtechdesign.com> + * + * (C) Copyright 2009 + * Daniel Gorsulowski daniel.gorsulowski@esd.eu + * esd electronic system design gmbh <www.esd.eu> + * + * Configuation settings for the esd MEESC board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* Common stuff */ +#define CONFIG_SYS_HZ 1000 /* decrementer freq */ +#define CONFIG_MEESC 1 /* Board is esd MEESC */ +#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ +#define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */ +#define CONFIG_ENV_OVERWRITE 1 /* necessary on prototypes */ +#define CONFIG_DISPLAY_BOARDINFO 1 +#define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info and speed */ +#define CONFIG_PREBOOT /* enable preboot variable */ +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 +#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */ + +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_RELOCATE_UBOOT + +#define CONFIG_ARCH_CPU_INIT + +/* + * Hardware drivers + */ + +/* Console output */ +#define CONFIG_ATMEL_USART 1 +#undef CONFIG_USART0 +#undef CONFIG_USART1 +#undef CONFIG_USART2 +#define CONFIG_USART3 1 /* USART 3 is DBGU */ + +#define CONFIG_BOOTDELAY 3 +#define CONFIG_ZERO_BOOTDELAY_CHECK 1 + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE 1 +#define CONFIG_BOOTP_BOOTPATH 1 +#define CONFIG_BOOTP_GATEWAY 1 +#define CONFIG_BOOTP_HOSTNAME 1 + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_USB + +#define CONFIG_CMD_PING 1 +#define CONFIG_CMD_DHCP 1 +#define CONFIG_CMD_NAND 1 + +/* LED */ +#define CONFIG_AT91_LED 1 + +/* SDRAM */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM 0x20000000 + +/* DataFlash */ +#define CONFIG_ATMEL_DATAFLASH_SPI +#define CONFIG_HAS_DATAFLASH 1 +#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) +#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 +#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ +#define AT91_SPI_CLK 15000000 +#define DATAFLASH_TCSS (0x1a << 16) +#define DATAFLASH_TCHS (0x1 << 24) + +/* NOR flash is not populated, disable it */ +#define CONFIG_SYS_NO_FLASH 1 + +/* NAND flash */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_ATMEL +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_DBW_8 1 +/* our ALE is AD21 */ +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) +/* our CLE is AD22 */ +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22 +#endif + +/* Ethernet */ +#define CONFIG_MACB 1 +#define CONFIG_RMII 1 +#define CONFIG_NET_MULTI 1 +#define CONFIG_NET_RETRY_COUNT 20 +#undef CONFIG_RESET_PHY_R + +#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ + +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_END 0x21e00000 + +#define CONFIG_SYS_USE_DATAFLASH 1 +#undef CONFIG_SYS_USE_NANDFLASH + +#ifdef CONFIG_SYS_USE_DATAFLASH + +/* CAN */ +#define CONFIG_AT91_CAN 1 + +/* bootstrap + u-boot + env + linux in dataflash on CS0 */ +#define CONFIG_ENV_IS_IN_DATAFLASH 1 +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ + 0x8400) +#define CONFIG_ENV_OFFSET 0x4200 +#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ + CONFIG_ENV_OFFSET) +#define CONFIG_ENV_SIZE 0x4200 +#define CONFIG_BOOTCOMMAND "cp.b C0042000 22000000 210000; bootm" + +#else /* CONFIG_SYS_USE_NANDFLASH */ + +/* bootstrap + u-boot + env + linux in nandflash */ +#define CONFIG_ENV_IS_IN_NAND 1 +#define CONFIG_ENV_OFFSET 0x60000 +#define CONFIG_ENV_OFFSET_REDUND 0x80000 +#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ +#define CONFIG_BOOTCOMMAND "nand read 22000000 A0000 200000; bootm" + +#endif + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } + +#define CONFIG_SYS_PROMPT "=> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_LONGHELP 1 +#define CONFIG_CMDLINE_EDITING 1 + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN 0x2D000 +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ + +#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ + +#ifdef CONFIG_USE_IRQ +#error CONFIG_USE_IRQ not supported +#endif + +#endif
On 08:09 Tue 30 Jun , Daniel Gorsulowski wrote:
This patch adds support for esd gmbh MEESC board. The MEESC is based on an Atmel AT91SAM9263 SoC.
Signed-off-by: Daniel Gorsulowski Daniel.Gorsulowski@esd.eu
MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + board/esd/meesc/Makefile | 55 ++++++++++++ board/esd/meesc/config.mk | 1 + board/esd/meesc/meesc.c | 198 +++++++++++++++++++++++++++++++++++++++++++ board/esd/meesc/partition.c | 37 ++++++++ include/configs/meesc.h | 188 ++++++++++++++++++++++++++++++++++++++++ 8 files changed, 487 insertions(+), 0 deletions(-) create mode 100644 board/esd/meesc/Makefile create mode 100644 board/esd/meesc/config.mk create mode 100644 board/esd/meesc/meesc.c create mode 100644 board/esd/meesc/partition.c create mode 100644 include/configs/meesc.h
Applied to u-boot-arm
Best Regards, J.
On 08:09 Tue 30 Jun , Daniel Gorsulowski wrote:
To enable CAN init, CONFIG_CAN has to be defined in the board config file and at91_can_hw_init() has to be called in the board specific code.
CAN is available on AT91SAM9263 and AT91CAP9 SoC.
Signed-off-by: Daniel Gorsulowski Daniel.Gorsulowski@esd.eu
cpu/arm926ejs/at91/at91cap9_devices.c | 15 +++++++++++++++ cpu/arm926ejs/at91/at91sam9263_devices.c | 15 +++++++++++++++ include/asm-arm/arch-at91/at91_common.h | 1 + 3 files changed, 31 insertions(+), 0 deletions(-)
Applied to u-boot-arm
Best Regards, J.
participants (2)
-
Daniel Gorsulowski -
Jean-Christophe PLAGNIOL-VILLARD