[U-Boot] [PATCH v4 0/3] x530: Enable watchdog

We've seen some issues with the x530 under extreme conditions where the DDR gets into a bad state. Generally this results in an application crash followed by a lock-up in u-boot.
Enabling the watchdog prevents the lock up and will let the DDR training have another go. Sometimes this recovers but even a reboot loop is better than a complete lockup.
Changes in v4: - use DIV_ROUND_UP to avoid setting the timeout to 0.
Changes in v3: - new - specify timeout in milliseconds
Changes in v2: - update commit message
Chris Packham (3): watchdog: orion_wdt: support SPL usage watchdog: orion_wdt: take timeout value in ms arm: mvebu: x530: Enable watchdog in SPL and U-Boot
arch/arm/dts/armada-385-atl-x530-u-boot.dtsi | 4 ++ board/CZ.NIC/turris_omnia/turris_omnia.c | 2 +- board/alliedtelesis/x530/x530.c | 48 ++++++++++++++++++++ configs/x530_defconfig | 5 ++ drivers/watchdog/Kconfig | 1 + drivers/watchdog/orion_wdt.c | 27 ++++++++--- 6 files changed, 79 insertions(+), 8 deletions(-)

When run from the SPL the mvebu targets are using the hardware default offset for the SoC peripherals. devfdt_get_addr_size_index() understands how to deal with this via dm_get_translation_offset() so use this instead of fdtdec_get_addr_size_auto_noparent().
Signed-off-by: Chris Packham judge.packham@gmail.com Reviewed-by: Stefan Roese sr@denx.de ---
Changes in v4: None Changes in v3: None Changes in v2: None
drivers/watchdog/orion_wdt.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c index a0df02d10382..c1add3e7c121 100644 --- a/drivers/watchdog/orion_wdt.c +++ b/drivers/watchdog/orion_wdt.c @@ -114,9 +114,7 @@ static inline bool save_reg_from_ofdata(struct udevice *dev, int index, fdt_addr_t addr; fdt_size_t off;
- addr = fdtdec_get_addr_size_auto_noparent( - gd->fdt_blob, dev_of_offset(dev), "reg", index, &off, true); - + addr = devfdt_get_addr_size_index(dev, index, &off); if (addr == FDT_ADDR_T_NONE) return false;

On 17.02.19 22:30, Chris Packham wrote:
When run from the SPL the mvebu targets are using the hardware default offset for the SoC peripherals. devfdt_get_addr_size_index() understands how to deal with this via dm_get_translation_offset() so use this instead of fdtdec_get_addr_size_auto_noparent().
Signed-off-by: Chris Packham judge.packham@gmail.com Reviewed-by: Stefan Roese sr@denx.de
Changes in v4: None Changes in v3: None Changes in v2: None
Applied to u-boot-marvell/master.
Thanks, Stefan

The generic wdt_start API expects to be called with the timeout in milliseconds. Update the orion_wdt driver to accept a timeout in milliseconds and use the clock rate specified in the dts to convert the timeout to an appropriate value for the timer reload register.
Signed-off-by: Chris Packham judge.packham@gmail.com --- It turned out to be easy enough to make orion_wdt conform to the expected wdt APIs. It looks like the turris_mox already assumed a timeout in ms, so only the turris_omnia needed updating.
Changes in v4: - use DIV_ROUND_UP to avoid setting the timeout to 0.
Changes in v3: - new
Changes in v2: None
board/CZ.NIC/turris_omnia/turris_omnia.c | 2 +- drivers/watchdog/Kconfig | 1 + drivers/watchdog/orion_wdt.c | 23 +++++++++++++++++++---- 3 files changed, 21 insertions(+), 5 deletions(-)
diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index 1f7650cb3610..5e0b686c597d 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -379,7 +379,7 @@ int board_init(void) puts("Cannot find Armada 385 watchdog!\n"); } else { puts("Enabling Armada 385 watchdog.\n"); - wdt_start(watchdog_dev, (u32) 25000000 * 120, 0); + wdt_start(watchdog_dev, 120000, 0); } # endif
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 115fc4551ffd..7f7bc4bbc494 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -97,6 +97,7 @@ config WDT_BCM6345 config WDT_ORION bool "Orion watchdog timer support" depends on WDT + select CLK help Select this to enable Orion watchdog timer, which can be found on some Marvell Armada chips. diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c index c1add3e7c121..885821d562ea 100644 --- a/drivers/watchdog/orion_wdt.c +++ b/drivers/watchdog/orion_wdt.c @@ -14,7 +14,9 @@
#include <common.h> #include <dm.h> +#include <clk.h> #include <wdt.h> +#include <linux/kernel.h> #include <asm/io.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> @@ -27,6 +29,8 @@ struct orion_wdt_priv { void __iomem *rstout; void __iomem *rstout_mask; u32 timeout; + unsigned long clk_rate; + struct clk clk; };
#define RSTOUT_ENABLE_BIT BIT(8) @@ -44,17 +48,18 @@ static int orion_wdt_reset(struct udevice *dev) struct orion_wdt_priv *priv = dev_get_priv(dev);
/* Reload watchdog duration */ - writel(priv->timeout, priv->reg + priv->wdt_counter_offset); + writel(priv->clk_rate * priv->timeout, + priv->reg + priv->wdt_counter_offset);
return 0; }
-static int orion_wdt_start(struct udevice *dev, u64 timeout, ulong flags) +static int orion_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags) { struct orion_wdt_priv *priv = dev_get_priv(dev); u32 reg;
- priv->timeout = (u32) timeout; + priv->timeout = DIV_ROUND_UP(timeout_ms, 1000);
/* Enable the fixed watchdog clock input */ reg = readl(priv->reg + TIMER_CTRL); @@ -62,7 +67,8 @@ static int orion_wdt_start(struct udevice *dev, u64 timeout, ulong flags) writel(reg, priv->reg + TIMER_CTRL);
/* Set watchdog duration */ - writel(priv->timeout, priv->reg + priv->wdt_counter_offset); + writel(priv->clk_rate * priv->timeout, + priv->reg + priv->wdt_counter_offset);
/* Clear the watchdog expiration bit */ reg = readl(priv->reg + TIMER_A370_STATUS); @@ -147,9 +153,18 @@ err:
static int orion_wdt_probe(struct udevice *dev) { + struct orion_wdt_priv *priv = dev_get_priv(dev); + int ret; + debug("%s: Probing wdt%u\n", __func__, dev->seq); orion_wdt_stop(dev);
+ ret = clk_get_by_name(dev, "fixed", &priv->clk); + if (!ret) + priv->clk_rate = clk_get_rate(&priv->clk); + else + priv->clk_rate = 25000000; + return 0; }

On Mon, Feb 18, 2019 at 10:31 AM Chris Packham judge.packham@gmail.com wrote:
The generic wdt_start API expects to be called with the timeout in milliseconds. Update the orion_wdt driver to accept a timeout in milliseconds and use the clock rate specified in the dts to convert the timeout to an appropriate value for the timer reload register.
Signed-off-by: Chris Packham judge.packham@gmail.com
It turned out to be easy enough to make orion_wdt conform to the expected wdt APIs. It looks like the turris_mox already assumed a timeout in ms, so only the turris_omnia needed updating.
Changes in v4:
- use DIV_ROUND_UP to avoid setting the timeout to 0.
Changes in v3:
- new
Changes in v2: None
board/CZ.NIC/turris_omnia/turris_omnia.c | 2 +- drivers/watchdog/Kconfig | 1 + drivers/watchdog/orion_wdt.c | 23 +++++++++++++++++++---- 3 files changed, 21 insertions(+), 5 deletions(-)
diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index 1f7650cb3610..5e0b686c597d 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -379,7 +379,7 @@ int board_init(void) puts("Cannot find Armada 385 watchdog!\n"); } else { puts("Enabling Armada 385 watchdog.\n");
wdt_start(watchdog_dev, (u32) 25000000 * 120, 0);
wdt_start(watchdog_dev, 120000, 0); }
# endif
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 115fc4551ffd..7f7bc4bbc494 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -97,6 +97,7 @@ config WDT_BCM6345 config WDT_ORION bool "Orion watchdog timer support" depends on WDT
select CLK
Actually I just realised I can't do this yet. The armada-38x lacks a clock driver. So while the fixed-rate clock for the watchdog works fine. Enabling CONFIG_CLK causes the uart to not work because it can't look up it's clock. This is not initially noticeable because the SPL sets up the hardware but if you try to change the baudrate things get upset.
I'm running out of u-boot hacking time to attempt to port the armada-38x clock code from Linux. For now I'll send a quick v5 that removes this select.
help Select this to enable Orion watchdog timer, which can be found on some Marvell Armada chips.
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c index c1add3e7c121..885821d562ea 100644 --- a/drivers/watchdog/orion_wdt.c +++ b/drivers/watchdog/orion_wdt.c @@ -14,7 +14,9 @@
#include <common.h> #include <dm.h> +#include <clk.h> #include <wdt.h> +#include <linux/kernel.h> #include <asm/io.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> @@ -27,6 +29,8 @@ struct orion_wdt_priv { void __iomem *rstout; void __iomem *rstout_mask; u32 timeout;
unsigned long clk_rate;
struct clk clk;
};
#define RSTOUT_ENABLE_BIT BIT(8) @@ -44,17 +48,18 @@ static int orion_wdt_reset(struct udevice *dev) struct orion_wdt_priv *priv = dev_get_priv(dev);
/* Reload watchdog duration */
writel(priv->timeout, priv->reg + priv->wdt_counter_offset);
writel(priv->clk_rate * priv->timeout,
priv->reg + priv->wdt_counter_offset); return 0;
}
-static int orion_wdt_start(struct udevice *dev, u64 timeout, ulong flags) +static int orion_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags) { struct orion_wdt_priv *priv = dev_get_priv(dev); u32 reg;
priv->timeout = (u32) timeout;
priv->timeout = DIV_ROUND_UP(timeout_ms, 1000); /* Enable the fixed watchdog clock input */ reg = readl(priv->reg + TIMER_CTRL);
@@ -62,7 +67,8 @@ static int orion_wdt_start(struct udevice *dev, u64 timeout, ulong flags) writel(reg, priv->reg + TIMER_CTRL);
/* Set watchdog duration */
writel(priv->timeout, priv->reg + priv->wdt_counter_offset);
writel(priv->clk_rate * priv->timeout,
priv->reg + priv->wdt_counter_offset); /* Clear the watchdog expiration bit */ reg = readl(priv->reg + TIMER_A370_STATUS);
@@ -147,9 +153,18 @@ err:
static int orion_wdt_probe(struct udevice *dev) {
struct orion_wdt_priv *priv = dev_get_priv(dev);
int ret;
debug("%s: Probing wdt%u\n", __func__, dev->seq); orion_wdt_stop(dev);
ret = clk_get_by_name(dev, "fixed", &priv->clk);
if (!ret)
priv->clk_rate = clk_get_rate(&priv->clk);
else
priv->clk_rate = 25000000;
return 0;
}
-- 2.20.1

On Mon, Feb 18, 2019 at 10:41 AM Chris Packham judge.packham@gmail.com wrote:
On Mon, Feb 18, 2019 at 10:31 AM Chris Packham judge.packham@gmail.com wrote:
The generic wdt_start API expects to be called with the timeout in milliseconds. Update the orion_wdt driver to accept a timeout in milliseconds and use the clock rate specified in the dts to convert the timeout to an appropriate value for the timer reload register.
Signed-off-by: Chris Packham judge.packham@gmail.com
It turned out to be easy enough to make orion_wdt conform to the expected wdt APIs. It looks like the turris_mox already assumed a timeout in ms, so only the turris_omnia needed updating.
Changes in v4:
- use DIV_ROUND_UP to avoid setting the timeout to 0.
Changes in v3:
- new
Changes in v2: None
board/CZ.NIC/turris_omnia/turris_omnia.c | 2 +- drivers/watchdog/Kconfig | 1 + drivers/watchdog/orion_wdt.c | 23 +++++++++++++++++++---- 3 files changed, 21 insertions(+), 5 deletions(-)
diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index 1f7650cb3610..5e0b686c597d 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -379,7 +379,7 @@ int board_init(void) puts("Cannot find Armada 385 watchdog!\n"); } else { puts("Enabling Armada 385 watchdog.\n");
wdt_start(watchdog_dev, (u32) 25000000 * 120, 0);
wdt_start(watchdog_dev, 120000, 0); }
# endif
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 115fc4551ffd..7f7bc4bbc494 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -97,6 +97,7 @@ config WDT_BCM6345 config WDT_ORION bool "Orion watchdog timer support" depends on WDT
select CLK
Actually I just realised I can't do this yet. The armada-38x lacks a clock driver. So while the fixed-rate clock for the watchdog works fine. Enabling CONFIG_CLK causes the uart to not work because it can't look up it's clock. This is not initially noticeable because the SPL sets up the hardware but if you try to change the baudrate things get upset.
I'm running out of u-boot hacking time to attempt to port the armada-38x clock code from Linux. For now I'll send a quick v5 that removes this select.
*sigh* there is something about Mondays. To those outside of TZ +1300 sorry for the spam.
I thought I'd killed the serial port due to the clocking but this all seems to work fine. The problem was that on my older setup I needed to set CONFIG_BOARD_EARLY_INIT_F (it's selected automatically for MVEBU in u-boot#master). So v4 should be good to go (barring any more review comments).
help Select this to enable Orion watchdog timer, which can be found on some Marvell Armada chips.
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c index c1add3e7c121..885821d562ea 100644 --- a/drivers/watchdog/orion_wdt.c +++ b/drivers/watchdog/orion_wdt.c @@ -14,7 +14,9 @@
#include <common.h> #include <dm.h> +#include <clk.h> #include <wdt.h> +#include <linux/kernel.h> #include <asm/io.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> @@ -27,6 +29,8 @@ struct orion_wdt_priv { void __iomem *rstout; void __iomem *rstout_mask; u32 timeout;
unsigned long clk_rate;
struct clk clk;
};
#define RSTOUT_ENABLE_BIT BIT(8) @@ -44,17 +48,18 @@ static int orion_wdt_reset(struct udevice *dev) struct orion_wdt_priv *priv = dev_get_priv(dev);
/* Reload watchdog duration */
writel(priv->timeout, priv->reg + priv->wdt_counter_offset);
writel(priv->clk_rate * priv->timeout,
priv->reg + priv->wdt_counter_offset); return 0;
}
-static int orion_wdt_start(struct udevice *dev, u64 timeout, ulong flags) +static int orion_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags) { struct orion_wdt_priv *priv = dev_get_priv(dev); u32 reg;
priv->timeout = (u32) timeout;
priv->timeout = DIV_ROUND_UP(timeout_ms, 1000); /* Enable the fixed watchdog clock input */ reg = readl(priv->reg + TIMER_CTRL);
@@ -62,7 +67,8 @@ static int orion_wdt_start(struct udevice *dev, u64 timeout, ulong flags) writel(reg, priv->reg + TIMER_CTRL);
/* Set watchdog duration */
writel(priv->timeout, priv->reg + priv->wdt_counter_offset);
writel(priv->clk_rate * priv->timeout,
priv->reg + priv->wdt_counter_offset); /* Clear the watchdog expiration bit */ reg = readl(priv->reg + TIMER_A370_STATUS);
@@ -147,9 +153,18 @@ err:
static int orion_wdt_probe(struct udevice *dev) {
struct orion_wdt_priv *priv = dev_get_priv(dev);
int ret;
debug("%s: Probing wdt%u\n", __func__, dev->seq); orion_wdt_stop(dev);
ret = clk_get_by_name(dev, "fixed", &priv->clk);
if (!ret)
priv->clk_rate = clk_get_rate(&priv->clk);
else
priv->clk_rate = 25000000;
return 0;
}
-- 2.20.1

On 17.02.19 22:30, Chris Packham wrote:
The generic wdt_start API expects to be called with the timeout in milliseconds. Update the orion_wdt driver to accept a timeout in milliseconds and use the clock rate specified in the dts to convert the timeout to an appropriate value for the timer reload register.
Signed-off-by: Chris Packham judge.packham@gmail.com
It turned out to be easy enough to make orion_wdt conform to the expected wdt APIs. It looks like the turris_mox already assumed a timeout in ms, so only the turris_omnia needed updating.
Changes in v4:
- use DIV_ROUND_UP to avoid setting the timeout to 0.
Changes in v3:
- new
Changes in v2: None
Reviewed-by: Stefan Roese sr@denx.de
Thanks, Stefan

On 17.02.19 22:30, Chris Packham wrote:
The generic wdt_start API expects to be called with the timeout in milliseconds. Update the orion_wdt driver to accept a timeout in milliseconds and use the clock rate specified in the dts to convert the timeout to an appropriate value for the timer reload register.
Signed-off-by: Chris Packham judge.packham@gmail.com
It turned out to be easy enough to make orion_wdt conform to the expected wdt APIs. It looks like the turris_mox already assumed a timeout in ms, so only the turris_omnia needed updating.
Changes in v4:
- use DIV_ROUND_UP to avoid setting the timeout to 0.
Changes in v3:
- new
Changes in v2: None
Applied to u-boot-marvell/master.
Thanks, Stefan

Enable the hardware watchdog to guard against system lock ups when running in the SPL or U-Boot. Stop the watchdog just before booting so that the OS can re-enable it if needed.
Signed-off-by: Chris Packham judge.packham@gmail.com ---
Changes in v4: None Changes in v3: - specify timeout in milliseconds
Changes in v2: - update commit message
arch/arm/dts/armada-385-atl-x530-u-boot.dtsi | 4 ++ board/alliedtelesis/x530/x530.c | 48 ++++++++++++++++++++ configs/x530_defconfig | 5 ++ 3 files changed, 57 insertions(+)
diff --git a/arch/arm/dts/armada-385-atl-x530-u-boot.dtsi b/arch/arm/dts/armada-385-atl-x530-u-boot.dtsi index 7074a73537fa..79b694cb84bc 100644 --- a/arch/arm/dts/armada-385-atl-x530-u-boot.dtsi +++ b/arch/arm/dts/armada-385-atl-x530-u-boot.dtsi @@ -11,3 +11,7 @@ &uart0 { u-boot,dm-pre-reloc; }; + +&watchdog { + u-boot,dm-pre-reloc; +}; diff --git a/board/alliedtelesis/x530/x530.c b/board/alliedtelesis/x530/x530.c index d7d1942fe686..6934fd801730 100644 --- a/board/alliedtelesis/x530/x530.c +++ b/board/alliedtelesis/x530/x530.c @@ -7,6 +7,7 @@ #include <command.h> #include <dm.h> #include <i2c.h> +#include <wdt.h> #include <asm/gpio.h> #include <linux/mbus.h> #include <linux/io.h> @@ -24,6 +25,10 @@ DECLARE_GLOBAL_DATA_PTR; #define CONFIG_NVS_LOCATION 0xf4800000 #define CONFIG_NVS_SIZE (512 << 10)
+#ifdef CONFIG_WATCHDOG +static struct udevice *watchdog_dev; +#endif + static struct serdes_map board_serdes_map[] = { {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, {DEFAULT_SERDES, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, @@ -75,6 +80,10 @@ struct mv_ddr_topology_map *mv_ddr_topology_map_get(void)
int board_early_init_f(void) { +#ifdef CONFIG_WATCHDOG + watchdog_dev = NULL; +#endif + /* Configure MPP */ writel(0x00001111, MVEBU_MPP_BASE + 0x00); writel(0x00000000, MVEBU_MPP_BASE + 0x04); @@ -88,6 +97,17 @@ int board_early_init_f(void) return 0; }
+void spl_board_init(void) +{ +#ifdef CONFIG_WATCHDOG + int ret; + + ret = uclass_get_device(UCLASS_WDT, 0, &watchdog_dev); + if (!ret) + wdt_start(watchdog_dev, 120000, 0); +#endif +} + int board_init(void) { /* address of boot parameters */ @@ -100,9 +120,37 @@ int board_init(void) /* DEV_READYn is not needed for NVS, ignore it when accessing CS1 */ writel(0x00004001, MVEBU_DEV_BUS_BASE + 0xc8);
+ spl_board_init(); + return 0; }
+void arch_preboot_os(void) +{ +#ifdef CONFIG_WATCHDOG + wdt_stop(watchdog_dev); +#endif +} + +#ifdef CONFIG_WATCHDOG +void watchdog_reset(void) +{ + static ulong next_reset = 0; + ulong now; + + if (!watchdog_dev) + return; + + now = timer_get_us(); + + /* Do not reset the watchdog too often */ + if (now > next_reset) { + wdt_reset(watchdog_dev); + next_reset = now + 1000; + } +} +#endif + static int led_7seg_init(unsigned int segments) { int node; diff --git a/configs/x530_defconfig b/configs/x530_defconfig index 25b9e885d8e6..3bc37b9bee11 100644 --- a/configs/x530_defconfig +++ b/configs/x530_defconfig @@ -19,6 +19,8 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_U_BOOT_ONLY=y CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_MEMINFO=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -70,3 +72,6 @@ CONFIG_USB_STORAGE=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y +CONFIG_WATCHDOG=y +CONFIG_WDT=y +CONFIG_WDT_ORION=y

On 17.02.19 22:30, Chris Packham wrote:
Enable the hardware watchdog to guard against system lock ups when running in the SPL or U-Boot. Stop the watchdog just before booting so that the OS can re-enable it if needed.
Signed-off-by: Chris Packham judge.packham@gmail.com
Changes in v4: None Changes in v3:
- specify timeout in milliseconds
Changes in v2:
- update commit message
Reviewed-by: Stefan Roese sr@denx.de
Thanks, Stefan

On 17.02.19 22:30, Chris Packham wrote:
Enable the hardware watchdog to guard against system lock ups when running in the SPL or U-Boot. Stop the watchdog just before booting so that the OS can re-enable it if needed.
Signed-off-by: Chris Packham judge.packham@gmail.com
Changes in v4: None Changes in v3:
- specify timeout in milliseconds
Changes in v2:
- update commit message
Applied to u-boot-marvell/master.
Thanks, Stefan
participants (2)
-
Chris Packham
-
Stefan Roese