On 2/16/24 18:18, Heinrich Schuchardt wrote:

The existing code is unnecessarily convoluted:

Arrays __prci_init_clocks_fu[5|7]40 are initialized with data. In separate includes fu[5|7]40-prci.h the size of the arrays is provided as constants.

By moving the structures prci_clk_fu[5|7]40 to the respective code modules we can directly use ARRAY_SIZE() to access the size of the data used for initialization.

Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com

drivers/clk/sifive/fu540-prci.c | 7 ++++++- drivers/clk/sifive/fu540-prci.h | 22 ---------------------- drivers/clk/sifive/fu740-prci.c | 7 ++++++- drivers/clk/sifive/fu740-prci.h | 22 ---------------------- drivers/clk/sifive/sifive-prci.c | 3 +-- drivers/clk/sifive/sifive-prci.h | 4 ++++ 6 files changed, 17 insertions(+), 48 deletions(-) delete mode 100644 drivers/clk/sifive/fu540-prci.h delete mode 100644 drivers/clk/sifive/fu740-prci.h

diff --git a/drivers/clk/sifive/fu540-prci.c b/drivers/clk/sifive/fu540-prci.c index ceb2c6fab0d..e55a26ab8fd 100644 --- a/drivers/clk/sifive/fu540-prci.c +++ b/drivers/clk/sifive/fu540-prci.c @@ -58,7 +58,7 @@ static const struct __prci_clock_ops sifive_fu540_prci_tlclksel_clk_ops = { };

/* List of clock controls provided by the PRCI */ -struct __prci_clock __prci_init_clocks_fu540[] = { +static struct __prci_clock __prci_init_clocks_fu540[] = { [PRCI_CLK_COREPLL] = { .name = "corepll", .parent_name = "hfclk", @@ -83,3 +83,8 @@ struct __prci_clock __prci_init_clocks_fu540[] = { .ops = &sifive_fu540_prci_tlclksel_clk_ops, }, };

+const struct prci_clk_desc prci_clk_fu540 = {

• .clks = __prci_init_clocks_fu540,
• .num_clks = ARRAY_SIZE(__prci_init_clocks_fu540),

+}; diff --git a/drivers/clk/sifive/fu540-prci.h b/drivers/clk/sifive/fu540-prci.h deleted file mode 100644 index 113301107da..00000000000 --- a/drivers/clk/sifive/fu540-prci.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/*

• • Copyright (C) 2020-2021 SiFive, Inc.
• • Zong Li
• • Pragnesh Patel
• */

-#ifndef __SIFIVE_CLK_FU540_PRCI_H -#define __SIFIVE_CLK_FU540_PRCI_H

-#include "sifive-prci.h"

-#define NUM_CLOCK_FU540 4

-extern struct __prci_clock __prci_init_clocks_fu540[NUM_CLOCK_FU540];

-static const struct prci_clk_desc prci_clk_fu540 = {

• .clks = __prci_init_clocks_fu540,
• .num_clks = ARRAY_SIZE(__prci_init_clocks_fu540),

-};

-#endif /* __SIFIVE_CLK_FU540_PRCI_H */ diff --git a/drivers/clk/sifive/fu740-prci.c b/drivers/clk/sifive/fu740-prci.c index 5edc864e4bd..4274b215d2f 100644 --- a/drivers/clk/sifive/fu740-prci.c +++ b/drivers/clk/sifive/fu740-prci.c @@ -102,7 +102,7 @@ static const struct __prci_clock_ops sifive_fu740_prci_pcieaux_clk_ops = { };

/* List of clock controls provided by the PRCI */ -struct __prci_clock __prci_init_clocks_fu740[] = { +static struct __prci_clock __prci_init_clocks_fu740[] = { [FU740_PRCI_CLK_COREPLL] = { .name = "corepll", .parent_name = "hfclk", @@ -156,3 +156,8 @@ struct __prci_clock __prci_init_clocks_fu740[] = { .pwd = &__prci_pcieaux_data, } };

+const struct prci_clk_desc prci_clk_fu740 = {

• .clks = __prci_init_clocks_fu740,
• .num_clks = ARRAY_SIZE(__prci_init_clocks_fu740),

+}; diff --git a/drivers/clk/sifive/fu740-prci.h b/drivers/clk/sifive/fu740-prci.h deleted file mode 100644 index b74f0789061..00000000000 --- a/drivers/clk/sifive/fu740-prci.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/*

• • Copyright (C) 2020-2021 SiFive, Inc.
• • Zong Li
• • Pragnesh Patel
• */

-#ifndef __SIFIVE_CLK_FU740_PRCI_H -#define __SIFIVE_CLK_FU740_PRCI_H

-#include "sifive-prci.h"

-#define NUM_CLOCK_FU740 9

-extern struct __prci_clock __prci_init_clocks_fu740[NUM_CLOCK_FU740];

-static const struct prci_clk_desc prci_clk_fu740 = {

• .clks = __prci_init_clocks_fu740,
• .num_clks = ARRAY_SIZE(__prci_init_clocks_fu740),

-};

-#endif /* __SIFIVE_CLK_FU740_PRCI_H */ diff --git a/drivers/clk/sifive/sifive-prci.c b/drivers/clk/sifive/sifive-prci.c index c8fb6002907..603a176d06a 100644 --- a/drivers/clk/sifive/sifive-prci.c +++ b/drivers/clk/sifive/sifive-prci.c @@ -34,8 +34,7 @@ #include <linux/math64.h> #include <dt-bindings/clock/sifive-fu740-prci.h>

-#include "fu540-prci.h" -#include "fu740-prci.h" +#include "sifive-prci.h"

/*

• Private functions

diff --git a/drivers/clk/sifive/sifive-prci.h b/drivers/clk/sifive/sifive-prci.h index 5ce33d61846..b391698081d 100644 --- a/drivers/clk/sifive/sifive-prci.h +++ b/drivers/clk/sifive/sifive-prci.h @@ -320,4 +320,8 @@ unsigned long sifive_prci_hfpclkplldiv_recalc_rate(struct __prci_clock *pc,

int sifive_prci_clock_enable(struct __prci_clock *pc, bool enable);

+/* Clock driver data */ +extern const struct prci_clk_desc prci_clk_fu540; +extern const struct prci_clk_desc prci_clk_fu740;

• #endif /* __SIFIVE_CLK_SIFIVE_PRCI_H */

How does this affect SPL size?

--Sean